CN101076163B

CN101076163B - DSP fixer system of TD-SCDMA/3G/4G terminal

Info

Publication number: CN101076163B
Application number: CN200610155272.4A
Authority: CN
Inventors: 王涵; 许晓斌
Original assignee: ZHEJIANG HUALI COMMUNICATION GROUP CO Ltd
Current assignee: ZHEJIANG HUALI COMMUNICATION GROUP CO Ltd
Priority date: 2006-12-18
Filing date: 2006-12-18
Publication date: 2013-10-16
Anticipated expiration: 2026-12-18
Also published as: CN101076163A

Abstract

The invention is used for realizing the main function of physical layer in TD-SCDMA/3G/4G terminal- namely forward and backward (uplink and downlink) channel treatment process. Said forward and backward (uplink and downlink) channel treatment processes comprise: physical layer control; baseband demodulation; baseband modulation; channel encode and decode; pilot frequency searching; physical layer modulation/demodulation; voice encode and decode; and audio process. Wherein, all treatment processes relating to the output from hardware core to the DSP firmware (such as: multipath receiving front hardware core, audio analog front end hardware core, baseband modulator hardware core, searcher hardware core, viterbi decoder hardware core, DSP timer hardware core, Turbo/CRC decoder hardware core and mailbox transceiver hardware core) are scheduled and executed using an interruption approach; all forward/downlink channel firmware treatment processes are scheduled and executed using an front stage mode, and all backward/downlink channel firmware treatment processes are scheduled and executed using a back stage mode.

Description

The DSP fixer system of TD-SCDMA/3G/4G terminal

Technical field

The present invention proposes the DSP fixer system of a kind of TD-SCDMA of novel, technological precedence and 3G (Third Generation) Moblie (3G contains cdma2000, UMTS, TD-SCDMA etc.), the 4th third-generation mobile communication (4G) terminal.Belong to mobile communication technology and make the field.

Background technology

1, the composition of terminal D SP fixer system: terminal D SP fixer system namely is the software systems that operate in the DSP nuclear of terminal digital baseband chip.Usually, the DSP fixer system of TD-SCDMA, 3G, 4G terminal mainly is made of following subsystem: (referring to Fig. 1) DSP operating system (VDOS); CPU-DSP interface (CPU-DSP Interface); The layer empty system of one (physical layer) (Layerl Control); Base band demodulator (Demodulator); Baseband modulator (Modulator); Channel coding-decoder (Channel Codec); Searcher (Searcher); Physical layer multiplex sublayer (Multiplex Sublayer); Audio coder ﹠ decoder (codec) (Vocoders); Audio frequency is processed (Audio Processing); Stone professional (Hardware Services).The framework of the DSP fixer system of TD-SCDMA, 3G, 4G terminal, as shown in Figure 1.

2, the function of terminal D SP fixer system: (1) DSP operating system (VDOS): DSP operating system (being denoted as VDOS) be one with use irrelevant firmware subsystem, it provides following business: signal processing task scheduling and calling; Non-interrupt task is seized-preemptive type multitasking mechanism; The priority of interrupting layer subtask and seizing; The management of internal memory and DSP nuclear stone resource.(2) CPU-DSP interface: CPU-DSP interface software subsystem provides following full duplex asynchronous CPU-DSP messaging protocol function: stone is shaken hands; Message communicating between DSP and CPU; The DSP application interface, it has defined between the inner different firmware subsystems of DSP and the transfer of data rule of CPU-DSP interface software; The CPU-DSP interface software transmission mechanism that gives information, but do not contain and the structure of using relevant message.3) physical layer control (L1D): physical layer control firmware management subsystem state machine and the operation of base band firmware handle.It carries out following functions: dual microprocessor control system is safeguarded; The scheduling of the signal processing tasks between the different DSP firmware subsystems, and transfer of data is synchronous; Firmware subsystem initialization control; Different disposal state at the DSP firmware is controlled relevant peripheral hardware.(4) demodulator firmware: firmware subsystem demodulator is carried out multipath reception front end (FFE) Processing Algorithm of multipath signal receiver and is carried out controlled in wireless, comprises following functions: the time unifying that is controlled at multipath reception front end FFE stone module with the time track algorithm; The multipath reception lock-in detection; The deflection of elimination phase place and the merging of multipath reception symbol; The gain of the symbol of receiving and phasing (channel estimating); Carry out descrambling with personal attendant's machine sequence code to being subject to symbol; AFE (analog front end) is used for the adjustment of direct current (DC) biasing of i/q signal A/D (mould/number) conversion; Receive automatic gain control system (Rx AGC); Demultiplexing and the checking of forward direction (descending) channel power control bit; Transmission power control based on the Open loop and closed loop estimation; The system time that is used for the time unifying in the control band receiver of base master timing stone module is followed the tracks of; Frame synchronization-regularly the stone module is synchronous with the band receiver of base master; Frequency error estimates and VCTCXO (voltage controlled temperature compensated crystal oscillator) control (AFC, automatic frequency control); Calculate and receive (Rx) and send (Tx) signal strength signal intensity (received signal strength indicator RSSI and strength of transmitted signals indication TSSI); The estimation of signal interference ratio (signal bit energy/interference power) Eb/Nt.(5) channel coding-decoder: channel coding-decoder firmware subsystem is divided into channel decoder firmware (processing of forward direction (descending) channel signal) and channel encoder firmware (oppositely (up) channel signal is processed); 1) channel decoder firmware: the channel decoder firmware receives and realizes following functions from the data of decoder firmware and based on frame: the frame deinterleaving; Frame is eliminated the bit punching; Frame is eliminated bit and is repeated; Dynamic (frame by frame) speed of forward direction (descending) traffic channel data is determined; Adopt Viterbi stone accelerator to finish the deconvolution coding; Finish the Turbo decoding with Turbo decoder stone module; CRC calculates.2) channel encoder firmware: the channel encoder firmware receives from the frame data of physical layer multiplex sublayer firmware and realizes following functions: frame is CRC calculates and insert the tail bit; Convolution forward direction (descending) error correction coding; Adopt Turbo encoder stone module to finish the Turbo coding; Coded identification repeats; The coded identification punching; Coded identification interweaves.(6) modulator firmware: modulator firmware subsystem is used for providing data and control information to the modulator stone.It carries out following functions: symbol data is issued the modulator stone; Realize the data burst randomization with modulator personal attendant machine sequence code; Carry out the control of ON/OFF gate power packages by modulator stone interface; Reverse (up) power control sub-channel of support-provide power control bit (PCB) information to the modulator stone; The code channel gain is calculated.(7) searcher firmware (SMD, state-maintenance detects): searcher firmware (being also referred to as SMD) is carried out best forward direction (descending) pilot signal of energy algorithm for estimating removal search, and the multipath reception of assignment FFE stone and the control of main regularly stone.The searcher firmware is controlled by CPU, only starts initialization and search multipath signal under the CPU request.Each search is all asynchronous with the other parts that DSP estimates, when not having the CPU indication, Search Results can not affect firmware data stream.Forward direction (descending) pilot tone that the CPU basis searches and the analysis that forward direction (descending) pilot tone multipath signal strength is distributed start each time multipath reception assignment process, to guarantee the multipath signal receiver performance.1) searcher firmware function of search comprises: the searcher initialization-to the correct startup of searcher stone module; The analysis that forward direction (descending) pilot energy is calculated that is provided by search stone module; To CPU report forward direction (descending) pilot energy distribution situation.2) the multipath reception assignment function of searcher firmware comprises: send current active RX path distribution situation (current side-play amount, forward direction (descending) pilot signal strength level etc.); Request assignment RX path (heavily assignment) based on CPU; 3) the main time control function of searcher firmware comprises: the main timing alignment of forward direction (descending) pilot frequency acquisition process; According to shifting to an earlier date or delay of the multipath signal executive system master time block that arrives the earliest.(8) physical layer multiplex sublayer (MAD): physical layer multiplex sublayer firmware subsystem provides multiplex sublayer among the CPU, the speech business based on DSP, the data transmission mechanism between the channel decoder.Comprise following functions: at forward direction (descending) link: will send to CPU from the data that channel encoder is received, and the data of demultiplexing are sent to Voice decoder based on DSP.At reverse (up) link: multiplexing from the CPU multiplex sublayer with based on the data of DSP speech coder, and transfer data to channel encoder.(9) audio coder ﹠ decoder (codec): audio coder ﹠ decoder (codec) firmware subsystem is carried out compress speech and the audio frequency output decompress(ion) (Voice decoder) of input audio stream (speech coder).Each audio coder ﹠ decoder (codec) is supported variable Rate compression. it mean can be according to speech activity with the voice of input by 1 of full rate, 1/2,1/4 or 1/8 carries out compressed encoding and output. simultaneously, also can be by the audio coder ﹠ decoder (codec) firmware be arranged the rate reduction pattern, or stipulate minimum, the highest code rate, come speed control.(10) audio frequency is processed: audio frequency is processed the firmware subsystem Audio Signal Processing algorithm is provided, and linear PCM sampling source-audio frequency simulation front end (VBAFE) or the synchronous serial interface (SSP) of selecting the audio signal route.1) the audio frequency processing subsystem is supported following algorithm: tone produces algorithm-general tone generator provides tone signal to local loud speaker (in ring, the DTMF tone that busy grade is used); The PCM sampling volume adjusting of numeral volume control-VBAFE or SSP transmitting-receiving; Lateral produces the algorithm-regular value of the PCM sampling of microphone input is sent back loud speaker; Earmuff echo canceller (5ms playbacks the path).2) function of audio frequency processing subsystem can expand to and support extra optional algorithm: speech recognition; Noise suppression; Sound store; Optional algorithm can download on the DSP program storage, and audio firmware is also supported this algorithm.(11) stone is professional: the professional firmware subsystem of stone is realized following functions: the read/write access of DSP program storage and data storage

The function of above-mentioned TD-SCDMA/3G/4G terminal D SP fixer system relates to and realizes complicated TD-SCDMA/3G/4G physical layer protocol, simultaneously, also there is very high demand the aspects such as the management of terminal D SP firmware resource, processing speed, real-time on the other hand

Therefore, for obtaining preferably TD-SCDMA/3G/4G terminal D SP fixer system of robustness, before we adopt-oppositely (on-descending) channel status machine and three grades of task operation mechanisms are realized the major function of above-mentioned TD-SCDMA/3G/4G terminal D SP fixer system---front oppositely (on-descending) channel treatment processes and scheduling mode and method to comprising the task of finishing these processing procedures.Implementation is as mentioned below in detail.

Summary of the invention

1, firmware resource management: before design terminal DSP fixer system, according to regulation and the requirement of TD-SCDMA/3G/4G terminal physical layer agreement to terminal D SP fixer system function, performance, each DSP firmware subsystem of describing at aforementioned chapters and sections is determined that a cover is to the demand of firmware resource management.(1) the base band demodulator firmware should be carried out under interrupt condition, and interrupt rate is that the 19.2KHz. firmware should process 1,2 in each interruption, or 4 symbols (depending on character rate).All processing should be finished before next interruption arrives.(2) the channel encoder signal is processed and should be carried out frame by frame.(3) the modulator firmware should be when 4.8KHz interrupts sends to data on the modulator stone (4) searcher firmware and should according to CPU request and associated parameter, carry out with the data transmit-receive operation exception.(5) transfer of data between DSP physical layer multiplex sublayer subsystem and the CPU is asynchronous carries out, but must finish in same frame.(6) carry out frame by frame in the operation of audio coder ﹠ decoder (codec) firmware.(7) operation of audio frequency processing subsystem had both been sampled to PCM and had been carried out one by one, also carried out frame by frame, and this is realized by specific signal processing algorithm.(8) the professional firmware of stone is asked and asynchronous execution according to CPU.

Each DSP firmware module/subsystem is rationally proposed the .DSP firmware framework and is not subjected to the restriction of task size and content as different tasks. should subsystem function be assigned in the independent task modestly; the flexibility of protection system; avoid producing too much task, because too much task will make the task scheduling of L1D very complicated.

2. three grades of task operation mechanisms: for effective above-mentioned different demands of management, VDOS operating system allows three grades of operations; (1) interrupt class-be used for processing the highstrung task of requirement of real-time.Do one's utmost, reduce to full capacity this generic task to the demand of MIPS.(2) foreground level-be used for processing the less task of requirement of real-time.The demand of this generic task to MIPS need to be limited within the specific limits.(3) backstage level-be used for processing requirement of real-time is minimum, but MIPS is required more task.The common every frame of this other task of level is carried out and need to be finished before next frame arrives.

Every grade of operation of VDOS all goes to dispatch the also task of execution requirements with task list.In interrupt class, be to use the task list related with interrupt control unit to realize.In backstage and foreground level, and use relevant firmware and send request to VDOS and go to dispatch the task of corresponding task in tabulating.The VDOS scheduler task is according to interruption order and the priority that it is received, initiating task and updating task tabulation when task is finished from task list.As shown in Figure 2.VDOS realizes that in order to lower strategy interrupt class is highest, and the foreground level is intergrade, and the backstage level is lowermost level: (referring to Fig. 3) as long as the interruption of hang-up is arranged in the system, VDOS just remains on the handling interrupt state; VDOS carries out the task in the platform tabulation, until this task list is empty; The interruption and the foreground task that only do not have to hang up in system are tabulated when being empty, and VDOS just begins to carry out the task in the background task tabulation.The priority of three grades of task operation mechanisms, as shown in Figure 3.

2.1 interrupt class: in interrupt class, VDOS dispatches and the priority that defines different task with the stone interrupt control unit: the DSP interrupt control unit is designed to the relevant interrupt source of each application and has own unique interrupt vector address, in case interrupt source is sent an interruption, interrupt control unit produces an interruption and examines to DSP, and obtain correct interrupt vector address and give program bus, force DSP to jump to this specific address.All interrupt source is connected on the interrupt control unit with the chain sheet form.The priority of each interrupt source (by can concurrent interruption considering) is defined by its residing position in chained list, such as INT_VECTO limit priority is arranged, and INV_VECT1 is lowest priority.Each interrupt source can be routed to separately the INTO of DSP nuclear, in INT1 or the INT2 interruption.The VDOS priority that processing DSP nuclear interrupts and assignment DSP nuclear interrupts as follows: INTO-limit priority; INT1-lower priority: INT2-lowest priority.Table 1 has gathered all TD-SCDMA/3G/4G terminal D SP firmwares interruptions and has distributed priority.

VDOS provides minimum interrupt service routine, should call when using relevant interrupt service routine entering or withdraw from.Interrupt service routine guarantees to only have the higher interruption of priority to be enabled when carrying out low priority interrupt.

2.2 foreground level: in the foreground level, from the foreground task tabulation of organizing in the FIFO mode, carry out foreground level task.Each being scheduled of task has following 4 entrances (16 bit words): entrance #1: task address; Entrance #2: optional parameters (can be the input data address); Entrance #3: optional parameters (can be the output data address); Entrance #4: optional parameters (can be operator scheme).Foreground level operation is very useful for dispatching asynchronous task (such as searcher), and it provides the minimized ability of interrupt latency that makes.The task that all foreground levels are carried out can both be added in foreground and the background task tabulation.

2.3 backstage rank: in the backstage level, from the background task tabulation of organizing in the FIFO mode, carry out backstage level task.Each being scheduled of task has following 4 entrances (16 bit words): entrance #1: task address; Entrance #2: optional parameters (can be the input data address); Entrance #3: optional parameters (can be the output data address); Entrance #4: the most of backstages of optional parameters (can be operator scheme) level task is the task that every frame is carried out, and requires a large amount of computing capabilitys, and all can only add in the background task tabulation 3 in the task that the backstage level is carried out.

3, TD-SCDMA/3G/4G terminal D SP dual microprocessor control system

The data of IS2000 travelling carriage are processed can be divided into RX path (Rx) and transmit path (Tx).On RX path, TD-SCDMA/3G/4G terminal D SP firmware handle is from the data of base station (forward direction (descending) Channel Processing).On transmit path, TD-SCDMA/3G/4G terminal D SP firmware handle is sent to the data of base station (oppositely (up) Channel Processing).

All DSP process and adopt TD-SCDMA/3G/4G terminal D SP dual microprocessor control system to realize on forward direction (descending) and reverse (up) channel, and are divided into forward direction (descending) and reverse (up) state machine.All TD-SCDMA/3G/4G terminal D SP firmware state conversions (for forward direction (descending) and reverse (up) channel) ask to finish according to CPU.Whether the conversion request of not inspection of DSP firmware state is effective, and its CPU that places one's entire reliance upon drives the conversion of the state of doing.

VDOS is not directly to process relevant subsystem with signal with CPU-DSP port subsystem, but provides the business of other signals being processed the firmware subsystem.Therefore VDOS is in state of activation all the time with CPU-DSP port (professional the same with stone).

3.1 forward direction (descending) Channel Processing.When forward direction (descending) Channel Processing adopts state machine to finish, use following 5 main states: (referring to Fig. 4).The opening initialization state; Forward direction (descending) pilot channel obtains state; Forward direction (descending) synchronizing channel state; Idle condition; Forward direction/downlink traffic channel state.Forward direction (descending) channel status machine as shown in Figure 4.The state of forward direction (descending) channel status machine is the L1D variable, is stored in overall storing space.When travelling carriage will be linked into the TD-SCDMA/3G4G terminal network, carry out forward direction (descending) channel status machine normal flow as shown in Figure 4.

3.1.1 opening initialization state: this be the initial condition of forward and backward link of TD-SCDMA/3G/4G terminal D SP dual microprocessor control system at this one-phase, TD-SCDMA/3G/4G terminal D SP firmware subsystem is initialized to default opening initialization state.The state that these stone module initializations is become to require with the firmware subsystem of stone module interface

3.1.2 forward direction (descending) pilot channel obtains state: at this state, following DSP firmware subsystem is activated: the demodulator firmware; Searcher firmware (SMD).Before activating forward direction (descending) pilot search, CPU obtains request primitive to L1D by transmission, dual microprocessor control system is arranged to forward direction (descending) pilot channel obtains state.L1D is arranged to the value of the state that obtains with all global variables, and calls the demodulator firmware and obtain the initialization function and start and obtain state processing.(downlink pilot frequency channel obtains state at forward direction, the demodulator firmware is only realized for TD-SCDMA/3G/4G forward direction (descending) pilot search algorithm (Rx AGC, I/Q DC bias compensation receives signal energy and estimates) the algorithm of reliable operation, do not carry out symbol and process.

Receiving when confirming that the DSP dual microprocessor control system is transformed into forward direction (descending) pilot channel and obtains the primitive of state CPU initialization search, possible TD-SCDMA/3G/4G forward direction (descending) pilot signal of search in whole characteristic sequence code space.Search each possible forward direction (descending) pilot tone and be based on the energy estimation that forward direction (descending) pilot channel is processed, skew is not associated with TD-SCDMA/3G/4G base station characteristic sequence code.

The DSP dual microprocessor control system remains on forward direction (descending) pilot channel always and obtains state before not finding satisfied forward direction (descending) pilot tone.In case forward direction (descending) pilot tone that CPU picked up signal intensity is good, it just be necessary, send among the DSP such as parameters such as pilot frequency deviations (skew of base station characteristic sequence code), and indication DSP dual microprocessor control system jumps to forward direction (descending) synchronizing channel state.

In other all TD-SCDMA/3G/4G terminal D SP firmware states, request is activated searcher firmware (SMD) according to CPU, and with TD-SCDMA/3G/4G terminal data processing asynchronous (even in TD-SCDMA/3G/4G terminal D SP firmware state conversion process, the searcher firmware also can be activated).The performance of SMD and function (forward direction (descending) pilot search, multipath reception assignment) depend on the current state of TD-SCDMA/3G/4G terminal D SP dual microprocessor control system.

3.1.3 forward direction (descending) synchronizing channel state: forward direction (descending) synchronizing channel state is used for receiving and processing forward direction (descending) synchronous channel information.At this state, activate following DSP firmware subsystem: physical layer control subsystem (LID); The demodulator firmware; Channel coding-decoder (channel decoder); Physical layer multiplex sublayer (demodulation multiplexer).Forward direction (descending) synchronizing channel firmware handle process as shown in Figure 5.

Before TD-SCDMA/3G/4G terminal D SP dual microprocessor control system jumps to forward direction (descending) synchronizing channel state, CPU sends a primitive comes a FFE stone of assignment to SMD multipath reception, make it in the base station characteristic sequence code skew operation of obtaining, and forward direction (descending) synchronizing channel is decoded.

Next step, CPU sends a primitive makes TD-SCDMA/3G/4G terminal D SP dual microprocessor control system jump to forward direction (descending) synchronizing channel state to physical layer.In this, physical layer is arranged to forward direction (descending) synchronizing channel state with all global variables, and: (1) calls forward direction (descending) the synchronizing channel initialization function of demodulation firmware, starts the demodulation of forward direction (descending) synchronizing channel.(2) call forward direction (descending) the synchronizing channel function of initializing of channel decoder, the channel encoder parameter is arranged to forward direction (descending) synchronizing channel state.(3) return primitive to CPU, confirm that TD-SCDMA/3G/4G terminal D SP dual microprocessor control system jumps to forward direction (descending) synchronizing channel state.

Following sequence of events occurs at forward direction (descending) synchronizing channel state: (1) in case forward direction (descending) synchronizing channel is processed beginning, the demodulation firmware just begins to monitor that forward direction (descending) the synchronizing channel frame of FFE stone begins bit.(2) in case this signal is activated, the demodulator firmware just carries out the processing of forward direction (descending) synchronizing channel to the symbol (interrupting based on 19.2kbps) of input, and they are focused in the annular SoftDataBufChA buffer area.(3) in case the demodulation firmware fills up the data of a synchronization frame, it just calls the physical layer control subsystem.The physical layer control subsystem checks the current state of forward direction (descending) channel status machine, and channel decoder is received formatted program task (pre-Viterbi task) is put in the foreground task tabulation.(4) receiving the formatted program task finishes piece deinterleaving and the frame of forward direction (descending) sync channel data frame and goes bit to repeat.And will go the Frame of bit repetition to be put in the format buffer area (RxFmtBuf) of channel decoder through piece deinterleaving and frame.When the processing of finishing whole frame, receive the formatted program task and just activate the convolution decoder function.(5) the convolution decoder function writes the soft-decision coded data by Viterbi stone accelerator, reads hard decision output data, realizes folding coding.Whenever the Viterbi accelerator is write the hard decision buffer area, it just produces a Viterbi and interrupts sending to DSP.DSP reads hard decision data and next soft-decision data is write.Data in forward direction (descending) the synchronizing channel frame are continuous programming codes.Here it is, and why convolutional decoder can only initialization in the channel decoder function of initializing, and can not reset in forward direction (descending) synchronizing channel interframe.Because adopt Viterbi accelerator stone, forward direction (descending) sync channel data frame can't be ready in the end point of present frame, but the intermediate point that will arrive next frame just can be ready to.When the decoding of finishing the complete forward direction of a frame (descending) synchronizing channel frame, channel decoder just calls physical layer multiplex sublayer function and sends the data to CPU.

At forward direction (descending) synchronizing channel treatment state, CPU can not send new forward direction (descending) pilot search message to DSP, the unactivated reason of searcher firmware why that Here it is.

Only have a RX path to be assigned be used to obtaining forward direction (descending) synchronizing channel.Therefore, at forward direction (descending) Channel Processing state, the demodulator firmware is not carried out (multipath) diversity and is merged.

CPU receives the synchrodata frame from DSP, merges forward direction (descending) synchronous channel information (forward direction (descending) synchronizing channel frame).In case CPU decodes forward direction (descending) synchronous channel information, it just produces request primitive to L1D, synchronously main regularly stone module.

When L1D receives request primitive, firmware stops to send forward direction (descending) synchronizing channel frame to CPU.Based on the skew of base station, and the characteristic sequence code state and the frame counter that provide based on this primitive, L1D arranges, loads main regularly stone module.In case main regularly stone module is set up, loads (downloading suitable forward direction (descending) pilot tone and characteristic sequence code state), in this moment terminal and Network Synchronization.

3.1.4 idle condition: in this state terminal monitors paging channel or forward direction (descending) Common Control Channel.It is also received in the message of broadcast channel transmission.At this state, following DSP firmware subsystem is in state of activation: physical layer control (L1D); The demodulator firmware; Channel coding-decoder (channel decoder); Physical layer multiplex sublayer (demodulation multiplexer); The searcher firmware.

In idle condition, according to the configuration of CPU to it, audio frequency is processed firmware also can activate (such as tone generator or voice recognition tasks)

Before TD-SCDMA/3G/4G terminal D SP dual microprocessor control system jumped to idle condition, CPU sent multipath reception assignment primitive to SMD, and the characteristic sequence code side-play amount that the FFE stone works in the base station is set, and with suitable channel code de-spread.

The processing of two kinds of possible TD-SCDMA/3G/4G terminal idle pulleys is arranged: paging channel decoding and 2 concurrent decodings of channel---forward direction (descending) Common Control Channel (CCCH), broadcast channel (BCH).

3.1.4.1 paging channel is processed: paging channel is processed processing procedure as shown in Figure 6.After the multipath reception assignment was finished, CPU sent the paging channel request primitive to L1D, makes TD-SCDMA/3G/4G terminal D SP dual microprocessor control system jump to idle condition.At this constantly, L1D finishes: it is idle condition that overall forward direction (descending) state variable is set; The categorical variable that overall forward direction (descending) channel A is set is paging channel; Request arranges the speed of forward direction (descending) channel A according to CPU; The frame length of forward direction (descending) channel A is set; The encoding rate of forward direction (descending) channel A is set; Call the paging channel initialization function of demodulation firmware, start paging channel demodulation; Call the paging channel function of initializing of channel decoder; Return primitive to CPU, confirm that TD-SCDMA/3G/4G terminal D SP dual microprocessor control system jumps to idle condition, prepares to start the paging channel decoding.

Have following sequence of events in paging channel is processed: (1) demodulator firmware is carried out the paging channel processing (interrupting based on 19.2kbps) of incoming symbol and they is focused in the annular SoftDataBufChA buffer area.(2) in case the demodulation firmware fills up the data buffer area of a paging frame, it just calls the physical layer control subsystem.(3) the physical layer control subsystem checks the current state of firmware forward direction (descending) the channel status machine of TD-SCDMA/3G/4G terminal, and channel category-A type, and channel decoder is received format paging channel task (pre-Viterbi task) be put in the foreground task tabulation.(4) receive that the formatted program task is finished the piece deinterleaving based on paging channel speed and frame goes bit to repeat.And will go the Frame of bit repetition to be put in the format buffer area (RxFmtBuf) of channel decoder through piece deinterleaving and frame.When the processing of finishing whole frame, receive the formatted program task and just activate the convolution decoder function.(5) the convolution decoder function writes the soft-decision coded data by Viterbi stone accelerator, reads hard decision output data, realizes folding coding.Whenever the Viterbi accelerator is write the hard decision buffer area, it just produces a Viterbi and interrupts sending to DSP.DSP reads hard decision data and next soft-decision data is write.Data in the paging channel frame are continuous programming codes.Here it is, and why convolutional decoder can only initialization in the channel decoder function of initializing, and can not reset in paging channel interframe.Why this point can realize, is because do not have other channels and paging channel to carry out simultaneously demodulation.Because adopt Viterbi accelerator stone, the paging channel Frame can't be ready in the end point of present frame, but the intermediate point that will arrive next frame just can be ready to.When the decoding of finishing the complete paging channel frame of a frame, channel decoder just calls physical layer multiplex sublayer function and sends the data to CPU.CPU analyzes from the message of paging channel and correspondingly provides indication for the DSP firmware.For example, it can send access exploration or monitor specific paging channel.

3.1.4.2 the public control of forward direction (descending), broadcasting is processed: idle condition firmware handle Common Control Channel/the broadcast channel process as shown in Figure 7.To CCCH, each channel of BCH have one independently request primitive issue L1D, before sending any one channel request primitive, CPU should indicate SMD to carry out the multipath reception assignment by enabling corresponding channel and channel code being set.

When LID received forward direction (descending) the Common Control Channel request primitive of CPU, can proceed as follows: (1) was made as idle condition with overall forward direction (descending) state variable.(2) with overall forward direction (descending) channel A categorical variable be made as forward direction (descending) Common Control Channel.(3) speed of forward direction (descending) channel A is set according to CPU request.(4) frame length of forward direction (descending) channel A is set according to CPU request.(5) encoding rate of forward direction (descending) channel A is set according to CPU request.(6) call demodulation firmware forward direction (descending) Common Control Channel function of initializing.(7) call channel decoder forward direction (descending) Common Control Channel function of initializing.(8) return primitive to CPU, confirm that TD-SCDMA/3G/4G terminal D SP dual microprocessor control system has been in idle condition, and prepare the decoding of beginning forward direction (descending) control channel.

When LID receives the broadcast channel request primitive of CPU, can proceed as follows: (1) with overall forward direction (descending) channel B categorical variable be made as broadcast channel.(2) speed of forward direction (descending) channel B is set according to CPU request.(3) with the frame length of forward direction (descending) channel B.(4) encoding rate of forward direction (descending) channel B is set according to CPU request.(5) call demodulation firmware broadcast channel function of initializing.(6) call channel decoder broadcast channel function of initializing.(7) return primitive to CPU, confirm that TD-SCDMA/3G/4G terminal D SP dual microprocessor control system has been ready to start the broadcast channel decoding.

When 2 channels all are activated, following chain of events will occur: (1) to the channel of each activation, the demodulator firmware is carried out the paging channel of incoming symbol and is processed (interrupting based on 19.2kbps).And they are focused on corresponding in the Circular buffer district of the stone channel of its assignment (SoftDataBufChA, SoftDataBufChB).(2) in case the demodulator firmware is finished the collection to the frame soft symbol of the channel of some activation, it calls L1D.Because the frame length of different channels can be different, so each channel (A, B) needs independent process.(3) L1D checks the current state of firmware forward direction (descending) the channel status machine of TD-SCDMA/3G/4G terminal, and has finished the channel type that frame is prepared.Then with reception format forward direction (descending) the CCCH channel task of channel decoder to channel A, the reception format BCH channel task of channel decoder to channel B is put in the foreground task tabulation.Should dispatch first the Channel Processing with less frame length.(4) receive formatted program task (pre-Viterbi task) based on channel type and parameter (data rate, encoding rate, frame length) is finished the piece deinterleaving and frame goes bit to repeat.And will go the Frame of bit repetition to be put in the format buffer area (RxFmtBuf) of channel decoder through piece deinterleaving and frame.When the processing of finishing whole frame, receive the formatted program task and just activate the convolution decoder function.(5) the convolution decoder function writes the soft-decision coded data by Viterbi stone accelerator, reads hard decision output data, realizes folding coding.Whenever the Viterbi accelerator is write the hard decision buffer area, it just produces a Viterbi and interrupts sending to DSP.DSP reads hard decision data and next soft-decision data is write.Unlike synchronous and paging channel, the convolutional encoding of these 2 channels is discontinuous, and that is exactly whenever to finish a forward direction (descending) CCCH why, the BCH decoding, and the Viterbi decoder all should be reinitialized.(6) in case finish the decoding of whole frame data, Viterbi interrupt requests (ISR) is called the L1D expanded function, and forward direction (descending) CCCH, the rear Viterbi Processing tasks of BCH is put into the foreground task tabulation.This task is calculated CRC to each frame data and is compared with the CRC check tail bit that (BCH) receives, and removes CRC tail bit.Afterwards, rear Viterbi Processing tasks calls physical layer multiplex sublayer function, and data are sent to CPU.

In idle condition, CPU continues to monitor whole TD-SCDMA/3G/4G forward direction (descending) pilot channels and send primitive to SMD.Based on the result who returns to CPU from SMD, CPU keeps to the tracking of forward direction (descending) pilot set (activating candidate etc.) and by the additional RX path of SMD multipath reception assignment primitive assignment.The demodulation firmware utilizes a plurality of RX path to finish diversity combining.

3.1.4.3 slotted mode: idle condition L1D key-course is supported paging or forward direction (descending) Common Control Channel DSP firmware handle enabled/go the slotted mode that enables.Utilize the switch of request (slotted mode request primitive) the realization ON/OFF time slot of CPU.When CPU is in the OFF time slot, L1D stops idle condition being processed, and closes the Viterbi stone, and shielding FFE and modulator interrupt, and finish the residue task, sends confirm primitive to CPU and closes DSP nuclear.When CPU is in the ON time slot, L1D enables the idle condition firmware operation, reinitializes demodulator and channel coding-decoder firmware, and continues aforementioned channels and process.DSP nuclear is started by the slotted mode request primitive that cpu i/f interrupts exciting.

TD-SCDMA/3G/4G terminal D SP firmware supports quick paging channel to process.The purpose of this channel is the travelling carriage operation of introducing under the slotted mode, is implemented in paging channel or forward direction (descending) Common Control Channel time slot that the ON time slot woke and received assignment up, and is perhaps then opposite at the OFF time slot.Quick paging channel is processed and to be processed the energy that consumes than the paging channel of assignment time slot or forward direction (descending) Common Control Channel and will lack a lot.

It is to be finished under L1D control by the demodulation firmware that quick paging channel is processed.L1D receives the Quick Paging configuring request primitive that comprises the quick paging channel parameter that the base station provides in advance.Then, start quick paging channel demodulation with the Quick Paging request primitive.In the end point of Quick Paging time slot, L1D (by Quick Paging data acknowledgement primitive) is to CPU report quick paging channel decode results.If paging indicator and configuration change indicating device are configured to " OFF ", CPU sending time slots mode request primitive, indication DSP enters slotted mode again.Otherwise DSP then should remain on wake-up states and paging or forward direction (descending) common signal channel are deciphered.

3.1.5 forward direction/downlink traffic channel state: in traffic channel state, travelling carriage receives traffic channel frame, comprise from sound, data and the signaling of base station.At this state, following DSP subsystem activates: physical layer control (L1D); The demodulator firmware; Channel coding-decoder (channel decoder); The physical layer multiplex sublayer; Audio coder ﹠ decoder (codec) (Voice decoder); Audio process (processing of forward direction (descending) audio frequency); The searcher firmware

Before TD-SCDMA/3G/4G terminal D SP firmware forward direction (descending) channel status machine jumps to traffic channel state, CPU is according to up-to-date TD-SCDMA/3G/4G forward direction (descending) pilot channel distribution situation, send multipath reception assignment primitive and to the searcher firmware operation of FFE stone is set, and the TD-SCDMA/3G/4G terminal channel of assignment is deciphered.

Forward direction/downlink traffic channel firmware handle process as shown in Figure 9.

When receiving CPU traffic channel request primitive, L1D control TD-SCDMA/3G/4G terminal firmware forward direction (descending) channel status machine jumps to traffic channel state.The channel mask field of primitive is that DSP is provided at and begins to call forward direction (descending) FCH (or DTCH, Dedicated Traffic Channel), wants the channel information of demodulation during forward direction (descending) DCCH, at this time point, and L1D: overall forward direction (descending) is set

State variable is traffic channel state; The categorical variable that overall forward direction (descending) channel A is set according to the channel mask is primary channel/Dedicated Traffic Channel, and/or the categorical variable of forward direction (descending) channel B is Dedicated Control Channel; Ask according to CPU, radio bearer/radio configuration of forward direction (descending) channel A and/or B is set, speed, frame length, default forward direction (descending) link Multiplex Option global variable, and some other relevant parameter: the encoding rate that 1. forward direction (descending) channel A and/or B are set.2. call the traffic channel initialization function of demodulator firmware.3. call channel decoder traffic channel initialization function.The global variable that 4. the MAD demodulation multiplexer is set is default setting.5. send primitive to CPU, confirm that TD-SCDMA/3G/4G terminal D SP firmware forward direction (descending) channel status machine has jumped to service condition, and prepare to start primary channel/Dedicated Traffic Channel decoding.

CPU sends the traffic channel configuration request primitive to L1D afterwards, configure dedicated channel and business option.This primitives DSP begins to process with lower channel: forward direction (descending) FCH (DTCH) forward direction (descending) DCCH, forward direction (descending) SCH (forward complement channel/DSCH Downlink Shared Channel).L1D carries out following: it is descending that (1) arranges overall forward direction based on the channel mask) categorical variable of channel A is primary channel/Dedicated Traffic Channel, and/or the categorical variable of forward direction (descending) channel B is Dedicated Control Channel, and/or the categorical variable of forward direction (descending) channel C is complement channel.(2) according to radio bearer/radio configuration of bit rate variable set up overall situation forward direction (descending) channel A (B, C), speed, frame length.(3) call MAD forward direction (descending) business option update functions.(4) if be connected based on the voice service option of DSP, call so the Voice decoder function of initializing.(5) send primitive and come into force to the new traffic channel configuration of CPU affirmation, and TD-SCDMA/3G/4G terminal D SP firmware Traffic Channel decoding function all set.

Occur successively following sequence of events in forward direction (descending) the Traffic Channel processing procedure: (1) demodulator firmware is to channel (forward direction (descending) FCH (DTCH) and forward direction (descending) the DCCH execution incoming symbol processing (interrupting based on 19.2kbps) of each activation, and the symbol that demodulates focused on Circular buffer district (SoftDataBufChA, SoftDataBufChB) corresponding to the stone channel of assignment.The supplementary service channel is by hard nucleus management, so do not need to use buffer area.(2) in case the demodulator firmware arrives the end point of frame, it calls L1D.(3) L1D checks the current state of firmware forward direction (descending) the channel status machine of TD-SCDMA/3G/4G terminal, and channel decoder is put into the foreground task tabulation to the reception format task (also being known as pre-Viterbi task) of Dedicated Control Channel DCCH.(4) pre-Viterbi task is finished the piece deinterleaving and is gone the bit punching.Then activate the convolution decoder function.(5) the convolution decoder function writes the soft-decision coded data by Viterbi stone accelerator, reads hard decision output data, realizes folding coding.Whenever the Viterbi accelerator is write the hard decision buffer area, it just produces a Viterbi and interrupts sending to DSP.DSP reads hard decision data and next soft-decision data is write.The convolutional encoding of Traffic Channel is discontinuous, and that is exactly whenever to finish a traffic channel data frame why, and the Viterbi decoder all should be reinitialized.(6) in case finish the decoding of whole frame data, Viterbi interrupt requests (ISR) is called the L1D expanded function, the rear Viterbi of DCCH is processed and MAD demultiplexing task, and the pre-Viterbi task of forward direction (descending) FCH (or DTCH) is put into the foreground task tabulation.(7) the Viterbi task is compared to each frame data calculating CRC and with the CRC check tail bit that receives behind forward direction (descending) DCCH, and removes CRC tail bit.Afterwards, MAD demultiplexing task sends to CPU with data.(8) the pre-Viterbi task of forward direction (descending) FCH (DTCH) is finished the piece deinterleaving and is gone the bit punching.If allow the speed except full rate, then for the frame of 1/2,1/4 and 1/8 speed go the bit repetition.Next step is to activate the convolution decoder function.(9) dawn is finished the decoding of whole frame data, and Viterbi interrupt requests (ISR) is called the L1D expanded function, and rear Viterbi processing and the MAD demultiplexing task of forward direction (descending) FCH/DTCH are put into the foreground task tabulation.If audio-frequency function is used, Voice decoder and forward direction (descending) audio frequency Processing tasks also can be added in the tabulation so.If there is the SCH of convolution to be activated, L1D will dispatch on the foreground the pre-Vitcrbi task of SCH.(10) Viterbi tasks carrying frame quality is indicated the correlation matrix that calculates and carry out all frame rate that enable behind forward direction (descending) FCH (DTCH).In case they are ready to, the Rate decision program will be activated.The Rate decision program function detects the speed of present frame, correct locator data pointer, and correct frame category is set.(11) based on the current business option configuration, MAD demodulation multiplexer task is that Voice decoder extracts original data stream and send whole Frame to produce voice data (linear PCM sampling) frame to CPU. (12) Voice decoder task.L1D is by being sent to sound decorder with pointer, and data are placed in the voice output Circular buffer district.For guaranteeing the reliability of firmware operation, the size of buffer area must be double (can be used for supporting the audio frequency Processing tasks so that a large buffer area to be provided) at least.(13) after tone decoding was finished, forward direction (descending) acoustic processing task was activated from the task list of foreground.This task is taken out Voice decoder output data, processes, and then writes back to the output buffer area.(14) audio frequency simulation front end interrupt service subroutine (VBAFEISR) interrupts from forward direction (descending) audio frequency buffer area (ForwardAudioBuf) sense data based on 8kHz and writes in the VBAFE stone register.(15) if low data rate SCH is activated, comprises deinterleaving, go all symbol levels such as bit punching to process in stone, to finish.When frame data were finished dealing with, the stone deinterleaver produced an interruption and issues DSP.Deinterleaver ISR arranges the SCH data and reads sign, and indication SCH pre-Viterbi task read data from stone and starts the convolution decoder function that adopts Viterbi stone accelerator to received frame buffer area (RxFrameBuf).After finishing whole SCH frame coding, Viterbi ISR calls the L1D excitation function, and its rear Viterbi and MAD demodulation multiplexer task with complement channel is put into the foreground task tabulation.The CRC of the every frame of Viterbi task computation behind the SCH, and the CRC that calculates compared with the CRC tail bit that receives, and remove the CRC tail bit of every frame.Finish after these processing, MAD demodulation multiplexer task transfers data to CPU.(16) if high data rate SCH is activated, the stone function of expansion can be carried out Turbo/CRC decoding.Turbo/CRC decoding is to carry out after finishing symbol merging and alignment and piece deinterleaving.After frame decoding was finished, the Turbo/CRC decoder was sent out and is interrupted to DSP.Turbo/CRC decoder ISR (interrupt service subroutine) is from the stone copies data, and the MAD demodulation multiplexer task of complement channel is joined in the foreground task tabulation.

At service condition, CPU sends new search message constantly to SMD, safeguards (the demodulator firmware should be able to provide the diversity of at least three RX path to merge) to keep desired diversity merging and forward direction (descending) pilot set.Every next new request arrives, and the SMD subsystem just is activated.CPU keeps the assignment of multipath reception based on current forward direction (descending) pilot distribution general status.The RX path of current activation depends on forward direction (descending) the pilot distribution general status of current input, and real-time change.

3.2 reverse (up) Channel Processing: oppositely (up) Channel Processing realizes (referring to Figure 10) with a state machine and following three main states: the opening initialization state; The system access state; Reverse (up) traffic channel state.Oppositely the state of (up) channel status machine is a L1D variable, is stored in the global storage.The process that each terminal (MS/UE) is linked into the TD-SCDMA/3G/4G terminal network relates to the normal flow that reverse (up) channel status machine is as shown in figure 10 carried out.

3.2.1 opening initialization state: oppositely the opening initialization state in (up) channel status machine has description in 3.1.1.

3.2.2 system access state: the access state in reverse (up) channel status machine, following DSP firmware subsystem is activated: physical layer control (L1D); The modulator firmware; Channel coding-decoder (channel encoder); Physical layer multiplex sublayer (multiplexer)

Carry out following three kinds of different processing at TD-SCDMA/3G/4G terminal access state: the access transmission, (ACH): and oppositely (up) Common Control Channel transmission (CCCH).

3.2.2.1 access Channel Processing: access channel firmware handle process such as Fig. 1 Shown in.Before oppositely (up) Channel Processing state machine jumped to access state, CPU sent the access channel request primitive of the access channel message that comprises encapsulation to L1D.At access state, send immediately whole channel massage, rather than transmit one by one.Afterwards, in the correct moment, CPU sends the access exploration request primitive to LD, starts an access exploration.This primitive comprises initiates the needed full detail of access exploration---and RN (wireless network) postpones, Long Code Mask, power excursion, at this constantly, L1D:(1) reverse (up) state variable of the overall situation is set to access state.(2) categorical variable of reverse (up) channel A of the overall situation is set to access channel.(3) the oppositely speed of (up) channel A is set.(4) oppositely (up) channel A frame length is set.(5) the oppositely encoding rate of (up) channel A is set.(6) call modulator access channel initialization function.

Following sequence of events appears in the access channel treatment processes successively: (1) modulator ISR monitors the end point of frame boundaries, when arriving the end of frame boundaries, calls the L1D incentive programme.(2) L1D checks the type of state and reverse (up) channel A of reverse (up) channel status machine of current TD-SCDMA/3G/4G terminal D SP firmware, will access the channel encoder task and put into the background task tabulation.(3) channel encoder takes out Frame from access channel encapsulation buffer area, adds the tail bit, finishes convolutional encoding, and this Frame is carried out bit repeat and interweave.The data that interweave are combined into symbol.(4) the channel encoder task is filled the TxFrameBufA buffer area take frame as unit, by interrupting sending the data to modulator stone (every 4.8kHz interrupts producing a channel code symbol) the each scheduling channel encoder of (5) L1D, all can check remaining what access channel frames and will process.L1D scheduling channel encoder does not no longer stop the modulator stone after a frame time when having data to stay.No longer include anti-and (up) Channel Processing this time.

Based on the parameter that the base station provides, CPU starts a timer, is used for waiting for the response of the access exploration that sends recently.If timer expiry is not received response, CPU sends a new request to L1D, to initiate a new access exploration.

Do not have mechanism to go to identify regularly and the number of times of access exploration in DSP, as long as receive the CPU request, DSP just initiates access exploration.CPU sends access exploration and stops request primitive to DSP, stops current access exploration transmission.This situation typical case appears at that the access exploration that has sent is confirmed by the base station or travelling carriage has lost paging channel.If DSP receives this primitive when having important frame to send, these frames just have been dropped, and relevant variable all can be set as the value that finishes the access exploration transmission.

3.2.2.3 oppositely (up) Common Control Channel is processed: oppositely (up) Common Control Channel firmware handle process as shown in figure 12.When L1D receives oppositely (up) Common Control Channel request primitive from CPU: (1) overall situation oppositely (up) state variable is set to access state.(2) the oppositely categorical variable of (up) channel A of the overall situation is set.(3) request arranges the oppositely speed of (up) channel A according to CPU.(4) request arranges oppositely (up) channel A frame length according to CPU.(5) the oppositely encoding rate of (up) channel A is set.(6) call modulator (reverse/up) CCCH function of initializing.

Following sequence of events appears in the access channel treatment processes successively: (1) modulator ISR monitors the end point of frame boundaries, when arriving the end of frame boundaries, calls the L1D incentive programme.(2) L1D checks the type of state and reverse (up) channel A of reverse (up) channel status machine of current TD-SCDMA/3G/4G terminal D SP firmware, the MAD multiplexer is put into background task with access channel encoder task tabulate.(3) the multiplexer task prepares to be input to the data of channel encoder, and channel encoder task computation CRC increases the tail bit, finishes convolutional encoding, symbol repetition, block interleaving.(4) modulator ISR interrupts with 4.8kbps, reads the bit that is of convenient length from channel encoder output buffer area, and writes the modulator stone.

3.2.3 reverse (up) traffic channel state: in reverse (up) traffic channel state, travelling carriage sends voice, data, and signaling is to the base station.In traffic channel state, following DSP firmware subsystem is activated: physical layer control (L1D); Modulator firmware channel coding-decoder (channel encoder); Physical layer multiplex sublayer (multiplexer); Audio coder ﹠ decoder (codec) (speech coder); Audio frequency is processed (oppositely (up) audio frequency is processed).

CPU sends traffic channel request primitive to L1D, makes reverse (up) channel status machine of TD-SCDMA/3G/4G terminal D SP firmware jump to traffic channel state.Here, the primitive that makes oppositely (up) or forward direction (descending) channel status machine jump to service condition does not have any difference---and traffic channel request primitive sends to all initiation state conversions of two state machines.

Oppositely (up) Traffic Channel firmware handle process such as Fig. 1 Shown in.

CPU sends traffic channel request primitive to L1D,, make reverse (up) channel status machine of TD-SCDMA/3G/4G terminal D SP firmware jump to traffic channel state.Channel mask field in the primitive provides when beginning to call (reverse/up) FCH (or DTCH for DSP, up Dedicated Traffic Channel), (oppositely/up) DCCH (oppositely/up Dedicated Control Channel) time, with the information of which transmission.At this constantly, L1D:(1) reverse (up) state variable of the overall situation being set is traffic channel state.(2) according to the channel mask arrange the overall situation oppositely the categorical variable of (up) channel A be that the categorical variable of primary channel/Dedicated Traffic Channel and/or channel B is Dedicated Control Channel.(3) radio bearer/radio configuration of oppositely (up) channel A and/or B is set by the request of CPU, speed, frame length.Default oppositely (up) link Multiplex Option global variable and other relevant parameter.(4) the corresponding encoding rate of reverse (up) channel A and/or B is set.

In the initial condition of reverse (up) Channel Processing state machine, L1D can not dispatch the relevant firmware task of any oppositely (up) channel.It waits for reverse (up) of coming from CPU always thereby prefix sends request primitive can carry out oppositely (up) link processing.This event only occurs in when receiving the good frame of forward direction (descending) link.At this moment, L1D: call modulator firmware traffic channel initialization function; It is default value that MAD multiplexer global variable is set; If audio frequency activates, call oppositely (up) audio frequency processing initialize routine.

Oppositely in a single day (up) link is set up, and CPU sends the traffic channel configuration request primitive to L1D, and L1D arranges dedicated channel and business option.This primitive can ask DSP to begin transmission (reverse/up) FCH (DTCH), (oppositely/up) DCCH, any channel in the channels such as (oppositely up) SCH (reverse complemental channel/Uplink Shared Channel).Operation below L1D carries out: (1) is primary channel/Dedicated Traffic Channel according to the categorical variable that the channel mask arranges reverse (up) channel A of the overall situation, and/or oppositely the categorical variable of (up) channel B is Dedicated Control Channel, and/or oppositely the categorical variable of (up) channel C is complement channel.(2) oppositely (up) channel A (B, C) radio bearer/radio configuration of the overall situation, speed, frame length, encoding rate are set.(3) call oppositely (up) business option update functions of MAD.(4) if connect based on the voice service option of DSP, call the speech coding function of initializing.

Following sequence of events appears in reverse (up) Traffic Channel processing procedure successively: the benchmark that (1) speech coding stone (VBAFE) interrupts with 8KHz, and to the speech data sampling and send to DSP.VBAFE ISR inputs data from VBAFE stone register read, and is written among reverse (up) speech buffer storage district ReverseAudioBuf.When whole Frame was well found, VBAFE ISR called the L1D incentive functions.(2) L1D checks the oppositely state of (up) channel status machine of current TD-SCDMA/3G/4G terminal D SP firmware, and places oppositely (up) speech processes and speech coder task in the background task tabulation.(3) oppositely (up) audio frequency is processed and is taken out the linear PCM Frame, through processing accordingly, outputs to the speech coding task.(4) in case reverse (up) audio frequency is finished dealing with, the speech coding task just starts, and current frame is extracted speech parameter, and coded data is put into encoded voice buffer area EncoderVoiceBuf, offers in MAD multiplexer task.In case the speech coding task is determined the speed of current encoded frame, it will notify MAD (by routine call) and the latter to send FCH (DTCH) TxEmpty indication to CPU, the size of data that inquiry is multiplexing with voice.(5) after frame begins, modulator ISR (with 4.8KHz speed) starts MAD multiplexer and the channel encoder task that the L1D scheduling is in the primary channel/Dedicated Traffic Channel of backstage level.L1D arranges task in the background task tabulation by following order: SCH multiplexer, SCH channel encoder, DCCH multiplexer, the DCCH channel encoder, FCH (DTCH) multiplexer, FCH (DTCH) channel encoder, MAD TxEmpty, modulator power control task.This order is to send reverse (up) service request primitive that comprises current frame data to the CPU time enough.(6) the MAD multiplexer is accepted data from MAC one by one.MAD sends TxEmpty indication notice CPU, and DSP has been ready to receive new data, i.e. new oppositely (up) service request primitive.The data-reusing that MAD multiplexer task provides the multiplex sublayer (MAC) of moving among vocoded data and the CPU together.At the business option based on CPU, oppositely (up) service request primitive comprises the next frame data of requirement MAD and channel encoder processing.In the voice service option (can only transmit at basic letter/Dedicated Traffic Channel) based on DSP, need to be multiplexing with vocoded data from the data of CPU.(7) the channel encoder task is carried out convolutional encoding, symbol repetition, block interleaving to each information frame.If use Turbo coding (only being used for two-forty supplementary service channel), whole chnnel coding is finished by stone---SCH channel encoder task only needs to write data into the stone register.(8) modulator power control task is calculated the code channel gain of all code channels that need to use based on reverse (up) link gain table and present frame characteristic.At frame boundaries, modulator ISR is written to corresponding modulator stone register with the code channel gain of all code channels that need to use.(9) the modulator ISR that works in 4.8KHz finishes the coded data transmission (when using the stone channel encoder, data are directly to send to the stone register, and do not relate to any firmware) between DSP firmware and the modulator stone.Simultaneously, modulator ISR also is responsible for finishing the power control of being determined by the gate mask.

Description of drawings

Fig. 1 is the block architecture diagram of the DSP fixer system of TD-SCDMA, 3G, 4G terminal.

Fig. 2 is three grades of task operation mechanism block diagrams.

Fig. 3 is the priority block diagram of three grades of task operation mechanisms.

Fig. 4 is forward direction (descending) channel status machine basic status redirect block diagram.

Fig. 5 is forward direction (descending) synchronizing channel firmware handle process block diagram.

Fig. 6 is paging channel firmware handle process block diagram.

Fig. 7 is idle condition firmware handle Common Control Channel/broadcast channel process block diagram.

Fig. 8 is forward direction/downlink traffic channel firmware handle process block diagram.

Fig. 9 is reverse (up) channel status machine basic status redirect block diagram.

Figure 10 is access channel firmware handle process block diagram.

Figure 11 is reverse (up) Common Control Channel firmware handle process block diagram.

Figure 12 is reverse (up) Traffic Channel firmware handle process block diagram.

Embodiment

Before design terminal DSP fixer system, according to regulation and the requirement of TD-SCDMA/3G/4G terminal physical layer agreement to terminal D SP fixer system function, performance, each DSP firmware subsystem of describing at aforementioned chapters and sections is determined that a cover is to the demand of firmware resource management.(1) the base band demodulator firmware should be carried out under interrupt condition, and interrupt rate is that the 19.2KHz. firmware should process 1,2 in each interruption, or 4 symbols (depending on character rate). and all processing should be finished before next interruption arrives.(2) the channel encoder signal is processed and should be carried out frame by frame.(3) the modulator firmware should send to data on the modulator stone when 4.8KHz interrupts.(4) the searcher firmware should according to CPU request and associated parameter, be carried out with the data transmit-receive operation exception.(5) transfer of data between DSP physical layer multiplex sublayer subsystem and the CPU is asynchronous carries out, but must finish in same frame.(6) carry out frame by frame in the operation of audio coder ﹠ decoder (codec) firmware.(7) operation of audio frequency processing subsystem had both been sampled to PCM and had been carried out one by one, also carried out frame by frame, and this is realized by specific signal processing algorithm.(8) the professional firmware of stone is asked and asynchronous execution according to CPU.

1. three grades of task operation mechanisms: for effective above-mentioned different demands of management, VDOS operating system allows three grades of operations: interrupt class-be used for processing the highstrung task of requirement of real-time.Do one's utmost, reduce to full capacity this generic task to the demand of MIPS; Foreground level-be used for processing the less task of requirement of real-time.The demand of this generic task to MIPS need to be limited within the specific limits; Backstage level-be used for processing requirement of real-time minimum, but MIPS is required more task.The common every frame of this other task of level is carried out and need to be finished before next frame arrives.

Every grade of operation of VDOS all goes to dispatch the also task of execution requirements with task list.In interrupt class, be to use the task list related with interrupt control unit to realize.In backstage and foreground level, and use relevant firmware and send request to VDOS and go to dispatch the task of corresponding task in tabulating.The VDOS scheduler task is according to interruption order and the priority that it is received, initiating task and updating task tabulation when task is finished from task list.As shown in Figure 2.VDOS realizes that in order to lower strategy interrupt class is highest, and the foreground level is intergrade, and the backstage level is lowermost level (referring to Fig. 3): as long as the interruption of hang-up is arranged in the system, VDOS just remains on the handling interrupt state; VDOS carries out the task in the tabulation of foreground, until this task list is empty; The interruption and the foreground task that only do not have to hang up in system are tabulated when being empty, and VDOS just begins to carry out the task in the background task tabulation.The priority of three grades of task operation mechanisms, as shown in Figure 3.

1.1 interrupt class: in interrupt class, VDOS dispatches and the priority that defines different task with the stone interrupt control unit: the DSP interrupt control unit is designed to the relevant interrupt source of each application and has own unique interrupt vector address, in case interrupt source is sent an interruption, interrupt control unit produces an interruption and examines to DSP, and obtain correct interrupt vector address and give program bus, force DSP to jump to this specific address.All interrupt source is connected on the interrupt control unit with the chain sheet form.The priority of each interrupt source (by can concurrent interruption considering) is defined by its residing position in chained list, such as INT_VECT0 limit priority is arranged, and INT_VECT14 is lowest priority.Each interrupt source can be routed to separately the INT0 of DSP nuclear, in INT1 or the INT2 interruption.The VDOS priority that processing DSP nuclear interrupts and assignment DSP nuclear interrupts as follows: INT0-limit priority; The INT1-lower priority; The INT2-lowest priority.

Table 1 has gathered all TD-SCDMA/3G/4G terminal D SP firmwares to interrupt and distributes priority: VDOS that minimum interrupt service routine is provided, and should call when using relevant interrupt service routine entering or withdraw from.Interrupt service routine guarantees to only have the higher interruption of priority to be enabled when carrying out low priority interrupt.

1.2 foreground level: in the foreground level, from the foreground task tabulation of organizing in the FIFO mode, carry out foreground level task.Each being scheduled of task has following 4 entrances (16 bit words): entrance #1: task address; Entrance #2: optional parameters (can be the input data address); Entrance #3: optional parameters (can be the output data address); Entrance #4: optional parameters (can be operator scheme).

Foreground level operation is very useful for dispatching asynchronous task (such as searcher), and it provides the minimized ability of interrupt latency that makes.The task that all foreground levels are carried out can both be added in foreground and the background task tabulation 2.

1.3 backstage rank: in the backstage level, from the background task tabulation of organizing in the FIFO mode, carry out backstage level task.Each being scheduled of task has following 4 entrances (16 bit words): entrance #1: task address; Entrance #2: optional parameters (can be the input data address); Entrance #3: optional parameters (can be the output data address); Entrance #4: optional parameters (can be operator scheme).

Most of backstages level task is the task that every frame is carried out, and requires a large amount of computing capabilitys, and all can only add in the background task tabulation in the task that the backstage level is carried out.

2.TD-SCDMA/3G/4G terminal D SP dual microprocessor control system: the data of IS2000 travelling carriage are processed can be divided into RX path (Rx) and transmit path (Tx).On RX path, TD-SCDMA/3G/4G terminal D SP firmware handle is from the data of base station (forward direction (descending) Channel Processing).On transmit path, TD-SCDMA/3G/4G terminal D SP firmware handle is sent to the data of base station (oppositely (up) Channel Processing).

All DSP process and adopt TD-SCDMA/3G/4G terminal D SP dual microprocessor control system to realize on forward direction (descending) and reverse (up) channel, and are divided into forward direction (descending) and reverse (up) state machine.All TD-SCDMA/3G/4G terminal D SP firmware state conversions (for forward direction (descending) and reverse (up) channel) ask to finish according to CPU.Whether the conversion request of not inspection of DSP firmware state is effective, and the conversion of state is done in its place one's entire reliance upon driving of CPU.

2.1 forward direction (descending) Channel Processing: when forward direction (descending) Channel Processing adopts state machine to finish, use following 5 main states (referring to Fig. 4): the opening initialization state; Forward direction (descending) pilot channel obtains state; Forward direction (descending) synchronizing channel state; Idle condition; Forward direction/downlink traffic channel state.

Forward direction (descending) channel status machine as shown in Figure 4.The state of forward direction (descending) channel status machine is the L1D variable, is stored in overall storing space.When travelling carriage will be linked into the TD-SCDMA/3G/4G terminal network, carry out forward direction (descending) channel status machine normal flow as shown in Figure 4.

2.1.1 opening initialization state: this is the initial condition of the forward and backward link of TD-SCDMA/3G/4G terminal D SP dual microprocessor control system.At this one-phase, TD-SCDMA/3G/4G terminal D SP firmware subsystem is initialized to default opening initialization state.The state that these stone module initializations is become to require with the firmware subsystem of stone module interface

2.1.2 forward direction (descending) pilot channel obtains state: at this state, following DSP firmware subsystem is activated: the demodulator firmware; Searcher firmware (SMD).

Before activating forward direction (descending) pilot search, CPU obtains request primitive to L1D by transmission, dual microprocessor control system is arranged to forward direction (descending) pilot channel obtains state.L1D is arranged to the value of the state that obtains with all global variables, and calls the demodulator firmware and obtain the initialization function and start and obtain state processing.Obtain state at forward direction (descending) pilot channel, the demodulator firmware is only realized for TD-SCDMA/3G/4G forward direction (descending) pilot search algorithm (Rx AGC, the I/QDC bias compensation receives signal energy and estimates) the algorithm of reliable operation, do not carry out symbol and process.

2.1.3 forward direction (descending) synchronizing channel state: forward direction (descending) synchronizing channel state is used for receiving and processing forward direction (descending) synchronous channel information.At this state, activate following DSP firmware subsystem: physical layer control subsystem (LID); The demodulator firmware; Channel coding-decoder (channel decoder); Physical layer multiplex sublayer (demodulation multiplexer).Forward direction (descending) synchronizing channel firmware handle process as shown in Figure 5.

Before TD-SCDMA/3G/4G terminal D SP dual microprocessor control system jumps to forward direction (descending) synchronizing channel state, CPU sends a primitive comes a FFE stone of assignment to SMD multipath reception, make it in the base station characteristic sequence code skew operation of obtaining, ordered pair forward direction (descending) synchronizing channel is decoded.

Next step, CPU sends a primitive makes TD-SCDMA/3G/4G terminal D SP dual microprocessor control system jump to forward direction (descending) synchronizing channel state to physical layer.In this, physical layer is arranged to forward direction (descending) synchronizing channel state with all global variables, and: (1) calls forward direction (descending) the synchronizing channel initialization function of demodulation firmware, starts the demodulation of forward direction (descending) synchronizing channel.(2) call forward direction (descending) the synchronizing channel function of initializing of channel decoder, the channel encoder parameter is arranged to forward direction (descending) synchronizing channel state.(2) return primitive to CPU, confirm that TD-SCDMA/3G/4G terminal D SP dual microprocessor control system jumps to forward direction (descending) synchronizing channel state.

Following sequence of events occurs at forward direction (descending) synchronizing channel state: (1) dawn forward direction (descending) synchronizing channel is processed beginning, and the demodulation firmware just begins to monitor that forward direction (descending) the synchronizing channel frame of FFE stone begins bit.In case this signal is activated, the demodulator firmware just carries out the processing of forward direction (descending) synchronizing channel to the symbol (interrupting based on 19.2kbps) of input, and they are focused in the annular SoftDataBufChA buffer area.(2) in case the demodulation firmware fills up the data of a synchronization frame, it just calls the physical layer control subsystem.(3) the physical layer control subsystem checks the current state of forward direction (descending) channel status machine, and channel decoder is received formatted program task (pre-Viterbi task) is put in the foreground task tabulation.4. receive that the formatted program task is finished the piece deinterleaving of forward direction (descending) sync channel data frame and frame goes bit to repeat.And will go the Frame of bit repetition to be put in the format buffer area (RxFmtBuf) of channel decoder through piece deinterleaving and frame.When the processing of finishing whole frame, receive the formatted program task and just activate the convolution decoder function.5. the convolution decoder function writes the soft-decision coded data by Viterbi stone accelerator, reads hard decision output data, realizes folding coding.Whenever the Viterbi accelerator is write the hard decision buffer area, it just produces a Viterbi and interrupts sending to DSP.DSP reads hard decision data and data that next soft-decision data is write in forward direction (descending) the synchronizing channel frame are continuous programming codes.Here it is, and why convolutional decoder can only initialization in the channel decoder function of initializing, and can not reset in forward direction (descending) synchronizing channel interframe.Because adopt Viterbi accelerator stone, forward direction (descending) sync channel data frame can't be ready in the end point of present frame, but the intermediate point that will arrive next frame just can be ready to.When the decoding of finishing the complete forward direction of a frame (descending) synchronizing channel frame, channel decoder just calls physical layer multiplex sublayer function and sends the data to CPU.At forward direction (descending) synchronizing channel treatment state, CPU can not send new forward direction (descending) pilot search message to DSP, the unactivated reason of searcher firmware why that Here it is.Only have a RX path to be assigned be used to obtaining forward direction (descending) synchronizing channel.Therefore, at forward direction (descending) Channel Processing state, the demodulator firmware is not carried out (multipath) diversity and is merged.CPU receives the synchrodata frame from DSP, merges forward direction (descending) synchronous channel information (forward direction (descending) synchronizing channel frame).In case CPU decodes forward direction (descending) synchronous channel information, it just produces request primitive to L1D, synchronously main regularly stone module.When L1D receives request primitive, firmware stops to send forward direction (descending) synchronizing channel frame to CPU.The skew of base base station, and the characteristic sequence code state and the frame counter that provide based on this primitive, L1D arranges, loads main regularly stone module.In case main regularly stone module is set up, loads (downloading suitable forward direction (descending) pilot tone and characteristic sequence code state), in this moment terminal and Network Synchronization.

2.1.4 idle condition: in this state terminal monitors paging channel or forward direction (descending) Common Control Channel.It is also received in the message of broadcast channel transmission.At this state, following DSP firmware subsystem is in state of activation: physical layer control (L1D); The demodulator firmware; Channel coding-decoder (channel decoder); Physical layer multiplex sublayer (demodulation multiplexer); The searcher firmware.In idle condition, according to the configuration of CPU to it, audio frequency is processed firmware also can activate (such as tone generator or voice recognition tasks).

Before TD-SCDMA/3G/4G terminal D SP dual microprocessor control system jumped to idle condition, CPU sent multipath reception assignment primitive to SMD, and the characteristic sequence code side-play amount that the FFE stone works in the base station is set, and with suitable channel code de-spread.The processing of two kinds of possible TD-SCDMA/3G/4G terminal idle pulleys is arranged: paging channel decoding and 2 concurrent decodings of channel---forward direction (descending) Common Control Channel (CCCH), broadcast channel (BCH).

2.1.4.1 paging channel is processed: paging channel is processed processing procedure as shown in Figure 6.After the multipath reception assignment was finished, CPU sent the paging channel request primitive to L1D, makes TDSCDMA/3G/4G terminal D SP dual microprocessor control system jump to idle condition.At this constantly, L1D finishes: it is idle condition that overall forward direction (descending) state variable is set; The categorical variable that overall forward direction (descending) channel A is set is paging channel; Request arranges the speed of forward direction (descending) channel A according to CPU; The frame length of forward direction (descending) channel A is set; The encoding rate of forward direction (descending) channel A is set; Call the paging channel initialization function of demodulation firmware, start paging channel demodulation; Call the paging channel function of initializing of channel decoder; Return primitive to CPU, confirm that TD-SCDMA/3G/4G terminal D SP dual microprocessor control system jumps to idle condition, prepares to start the paging channel decoding.

2.1.4.2 the public control of forward direction (descending), broadcasting is processed: idle condition firmware handle Common Control Channel/the broadcast channel process as shown in Figure 7.To CCCH, each channel of BCH have one independently request primitive issue L1D, before sending any one channel request primitive, CPU should indicate SMD to carry out the multipath reception assignment by enabling corresponding channel and channel code being set.

When L1D received forward direction (descending) the Common Control Channel request primitive of CPU, can proceed as follows: (1) was made as idle condition with overall forward direction (descending) state variable.(2) with overall forward direction (descending) channel A categorical variable be made as forward direction (descending) Common Control Channel.(3) speed of forward direction (descending) channel A is set according to CPU request.(4) frame length of forward direction (descending) channel A is set according to CPU request.(5) encoding rate of forward direction (descending) channel A is set according to CPU request.(6) call demodulation firmware forward direction (descending) Common Control Channel function of initializing.(7) call channel decoder forward direction (descending) Common Control Channel function of initializing.(8) return primitive to CPU, confirm that TD-SCDMA/3G/4G terminal D SP dual microprocessor control system has been in idle condition, and prepare the decoding of beginning forward direction (descending) control channel.

2.1.4.3 slotted mode: idle condition L1D key-course is supported paging or forward direction (descending) Common Control Channel DSP firmware handle enabled/go the slotted mode that enables.Utilize the switch of request (slotted mode request primitive) the realization ON/OFF time slot of CPU.When CPU is in the OFF time slot, L1D stops idle condition being processed, and closes the Viterbi stone, and shielding FFE and modulator interrupt, and finish the residue task, sends confirm primitive to CPU and closes DSP nuclear.When CPU is in the ON time slot, L1D enables the idle condition firmware operation, reinitializes demodulator and channel coding-decoder firmware, and continues aforementioned channels and process.DSP nuclear is started by the slotted mode request primitive that cpu i/f interrupts exciting.TD-SCDMA/3G/4G terminal D SP firmware supports quick paging channel to process.The purpose of this channel is the travelling carriage operation of introducing under the slotted mode, is implemented in paging channel or forward direction (descending) Common Control Channel time slot that the ON time slot woke and received assignment up, and is perhaps then opposite at the OFF time slot.Quick paging channel is processed and to be processed the energy that consumes than the paging channel of assignment time slot or forward direction (descending) Common Control Channel and will lack a lot.It is to be finished under L1D control by the demodulation firmware that quick paging channel is processed.L1D receives the Quick Paging configuring request primitive that comprises the quick paging channel parameter that the base station provides in advance.Then, start quick paging channel demodulation with the Quick Paging request primitive.In the end point of Quick Paging time slot, L1D (by Quick Paging data acknowledgement primitive) is to CPU report quick paging channel decode results.If paging indicator and configuration change indicating device are configured to " OFF ", CPU sending time slots mode request primitive, indication DSP enters slotted mode again.Otherwise DSP then should remain on wake-up states and paging or forward direction (descending) common signal channel are deciphered.

2.1.5 forward direction/downlink traffic channel state: in traffic channel state, travelling carriage receives traffic channel frame, comprise from sound, data and the signaling of base station.At this state, following DSP subsystem activates: physical layer control (L1D); The demodulator firmware; Channel coding-decoder (channel decoder); The physical layer multiplex sublayer; Audio coder ﹠ decoder (codec) (Voice decoder); Audio process (processing of forward direction (descending) audio frequency); The searcher firmware.

Before TD-SCDMA/3G/4G terminal D SP firmware forward direction (descending) channel status machine jumps to traffic channel state, CPU is according to up-to-date TD-SCDMA/3G/4G forward direction (descending) pilot channel distribution situation, send multipath reception assignment primitive and to the searcher firmware operation of FFE stone is set, and the TD-SCDMA/3G/4G terminal channel of assignment is deciphered.Forward direction/downlink traffic channel firmware handle process as shown in Figure 9.

When receiving CPU traffic channel request primitive, L1D control TD-SCDMA/3G/4G terminal firmware forward direction (descending) channel status machine jumps to traffic channel state.The channel mask field of primitive is that DSP is provided at and begins to call forward direction (descending) FCH (or DTCH, Dedicated Traffic Channel), want the channel information of demodulation during forward direction (descending) DCCH, at this time point, L1D:(1) overall forward direction (descending) state variable being set is traffic channel state.(2) categorical variable that according to the channel mask overall forward direction (descending) channel A is set is primary channel/Dedicated Traffic Channel, and/or the categorical variable of forward direction (descending) channel B is Dedicated Control Channel.(3) according to the CPU request, radio bearer/radio configuration of forward direction (descending) channel A and/or B is set, speed, frame length, default forward direction (descending) link Multiplex Option global variable, and some other relevant parameter.(4) encoding rate of forward direction (descending) channel A and/or B is set.(5) call the traffic channel initialization function of demodulator firmware.(6) call channel decoder traffic channel initialization function.(7) global variable that the MAD demodulation multiplexer is set is default setting.(8) send primitive to CPU, confirm that TD-SCDMA/3G/4G terminal D SP firmware forward direction (descending) channel status machine has jumped to service condition, and prepare to start primary channel/Dedicated Traffic Channel decoding.CPU sends the traffic channel configuration request primitive to L1D afterwards, configure dedicated channel and business option.This primitives DSP begins to process with lower channel: forward direction (descending) FCH (DTCH) forward direction (descending) DCCH, forward direction (descending) SCH (forward complement channel/DSCH Downlink Shared Channel).L1D carries out following: (1) is primary channel/Dedicated Traffic Channel based on the categorical variable that the channel mask arranges overall forward direction (descending) channel A, and/or the categorical variable of forward direction (descending) channel B is Dedicated Control Channel, and/or the categorical variable of forward direction (descending) channel C is that complement channel (2) is according to bit rate variable set up overall situation forward direction (descending) channel A (B, C) radio bearer/radio configuration, speed, frame length.(3) call MAD forward direction (descending) business option update functions.(4) if be connected based on the voice service option of DSP, call so the Voice decoder function of initializing.(5) send primitive and come into force to the new traffic channel configuration of CPU affirmation, and TD-SCDMA/3G/4G terminal D SP firmware Traffic Channel decoding function all set.

Occur successively following sequence of events in forward direction (descending) the Traffic Channel processing procedure: (1) demodulator firmware is to channel (forward direction (descending) FCH (DTCH) and forward direction (descending) the DCCH execution incoming symbol processing (interrupting based on 19.2kbps) of each activation, and the symbol that demodulates focused on Circular buffer district (SoftDataBufChA corresponding to the stone channel of assignment, SoftDataBufChB) the supplementary service channel is by hard nucleus management, so do not need to use buffer area.(2) in case the demodulator firmware arrives the end point of frame, it calls the current state that L1D (3) L1D checks firmware forward direction (descending) the channel status machine of TD-SCDMA/3G/4G terminal, and channel decoder is put into the foreground task tabulation to the reception format task (also being known as pre-Viterbi task) of Dedicated Control Channel DCCH.(4) pre-Viterbi task is finished the piece deinterleaving and is gone the bit punching.Then activate the convolution decoder function.(5) the convolution decoder function writes the soft-decision coded data by Viterbi stone accelerator, reads hard decision output data, realizes folding coding.Whenever the Viterbi accelerator is write the hard decision buffer area, it just produces a Viterbi and interrupts sending to DSP.DSP reads hard decision data and next soft-decision data is write.The convolutional encoding of Traffic Channel is discontinuous, and that is exactly whenever to finish a traffic channel data frame why, and the Viterbi decoder all should be reinitialized.(6) in case finish the decoding of whole frame data, Viterbi interrupt requests (ISR) is called the L1D expanded function, the rear Viterbi of DCCH is processed and MAD demultiplexing task, and the pre-Viterbi task of forward direction (descending) FCH (or DTCH) is put into the foreground task tabulation.(7) the Viterbi task is compared to each frame data calculating CRC and with the CRC check tail bit that receives behind forward direction (descending) DCCH, and removes CRC tail bit.Afterwards, MAD demultiplexing task sends to CPU with data.(8) the pre-Viterbi task of forward direction (descending) FCH (DTCH) is finished the piece deinterleaving and is gone the bit punching.If allow the speed except full rate, then for the frame of 1/2,1/4 and 1/8 speed go the bit repetition.Next step is to activate the convolution decoder function.(9) in case finish the decoding of whole frame data, Viterbi interrupt requests (ISR) is called the L1D expanded function, the rear Vitcrbi of forward direction (descending) FCH/DTCH is processed and MAD demultiplexing task is put into foreground task and tabulated.If audio-frequency function is used, Voice decoder and forward direction (descending) audio frequency Processing tasks also can be added in the tabulation so.If there is the SCH of convolution to be activated, L1D will dispatch on the foreground the pre-Viterbi task of SCH.(10) Viterbi tasks carrying frame quality is indicated the correlation matrix that calculates and carry out all frame rate that enable behind forward direction (descending) FCH (DTCH).In case they are ready to, the Rate decision program will be activated.The Rate decision program function detects the speed of present frame, correct locator data pointer, and correct frame category is set.(11) based on the current business option configuration, MAD demodulation multiplexer task is that Voice decoder extracts original data stream and send whole Frame to produce voice data (linear PCM sampling) frame to CPU. (12) sound decoder task.LID is by being sent to sound decorder with pointer, and data are placed in the voice output Circular buffer district.For guaranteeing the reliability of firmware operation, the size of buffer area must be double (can be used for supporting the audio frequency Processing tasks so that a large buffer area to be provided) at least.(13) after tone decoding was finished, forward direction (descending) acoustic processing task was activated from the task list of foreground.This task is taken out Voice decoder output data, processes, and then writes back to the output buffer area.(14) audio frequency simulation front end interrupt service subroutine (VBAFE ISR) interrupts from forward direction (descending) audio frequency buffer area (ForwardAudioBuf) sense data based on 8kHz and writes in the VBAFE stone register.(15) if low data rate SCH is activated, comprises deinterleaving, go all symbol levels such as bit punching to process in stone, to finish.When frame data were finished dealing with, the stone deinterleaver produced an interruption and issues DSP.Deinterleaver ISR arranges the SCH data and reads sign, and indication SCH pre-Viterbi task read data from stone and starts the convolution decoder function that adopts Viterbi stone accelerator to received frame buffer area (RxFrameBuf).After finishing whole SCH frame coding, Viterbi ISR calls the L1D excitation function, and its rear Viterbi and MAD demodulation multiplexer task with complement channel is put into the foreground task tabulation.The CRC of the every frame of Viterbi task computation behind the SCH, and the CRC that calculates compared with the CRC tail bit that receives, and remove the CRC tail bit of every frame.Finish after these processing, MAD demodulation multiplexer task transfers data to CPU.(16) if high data rate SCH is activated, the stone function of expansion can be carried out Turbo/CRC decoding.Turbo/CRC decoding is to carry out after finishing symbol merging and alignment and piece deinterleaving.After frame decoding was finished, the Turbo/CRC decoder was sent out and is interrupted to DSP.Turbo/CRC decoder ISR (interrupt service subroutine) is from the stone copies data, and the MAD demodulation multiplexer task of complement channel is joined in the foreground task tabulation.

2.2 reverse (up) Channel Processing: oppositely (up) Channel Processing realizes (referring to Figure 10) with a state machine and following three main states: the opening initialization state; The system access state; Reverse (up) traffic channel state.Oppositely the state of (up) channel status machine is a L1D variable, is stored in the global storage.The process that each terminal (MS/UE) is linked into the TD-SCDMA/3G/4G terminal network relates to the normal flow that reverse (up) channel status machine is as shown in figure 10 carried out.

2.2.1 opening initialization state: oppositely the opening initialization state in (up) channel status machine has description in 3.1.1.

2.2.2 system access state: the access state in reverse (up) channel status machine, following DSP firmware subsystem is activated: physical layer control (L1D); The modulator firmware; Channel coding-decoder (channel encoder); Physical layer multiplex sublayer (multiplexer).Carry out following three kinds of different processing at TD-SCDMA/3G/4G terminal access state: the access transmission, (ACH); With oppositely (up) Common Control Channel transmission (CCCH).

2.2.2.1 access Channel Processing: access channel firmware handle process as shown in figure 11.Before oppositely (up) Channel Processing state machine jumped to access state, CPU sent the access channel request primitive of the access channel message that comprises encapsulation to L1D.At access state, send immediately whole channel massage, rather than transmit one by one.Afterwards, in the correct moment, CPU sends the access exploration request primitive to L1D, starts an access exploration.This primitive comprises initiates the needed full detail of access exploration---and RN (wireless network) postpones, Long Code Mask, power excursion, at this constantly, L1D:(1) reverse (up) state variable of the overall situation is set to access state.(2) categorical variable of reverse (up) channel A of the overall situation is set to access channel.(3) the oppositely speed of (up) channel A is set.(4) oppositely (up) channel A frame length is set.(5) the oppositely encoding rate of (up) channel A is set.(6) call modulator access channel initialization function.

Following sequence of events appears in the access channel treatment processes successively: (1) modulator ISR monitors the end point of frame boundaries, when arriving the end of frame boundaries, calls the L1D incentive programme.(2) L1D checks the type of state and reverse (up) channel A of reverse (up) channel status machine of current TD-SCDMA/3G/4G terminal D SP firmware, will access the channel encoder task and put into the background task tabulation.(3) channel encoder takes out Frame from access channel encapsulation buffer area, adds the tail bit, finishes convolutional encoding, and this Frame is carried out bit repeat and interweave.The data that interweave are combined into symbol.(4) the channel encoder task is filled the TxFrameBufA buffer area take frame as unit, by interrupting sending the data to modulator stone (every 4.8kHz interrupts producing a channel code symbol).(5) the each scheduling channel encoder of L1D, all can check remaining what access channel frames and will process.L1D scheduling channel encoder does not no longer stop the modulator stone after a frame time when having data to stay.No longer include oppositely (up) Channel Processing this time.

2.2.2.3 oppositely (up) Common Control Channel is processed: oppositely (up) Common Control Channel firmware handle process as shown in figure 12.When 1D receives oppositely (up) Common Control Channel request primitive from CPU: (1) overall situation oppositely (up) state variable is set to access state.(2) the oppositely categorical variable of (up) channel A of the overall situation is set.(3) request arranges the oppositely speed of (up) channel A according to CPU.(4) request arranges oppositely (up) channel A frame length according to CPU.(5) the oppositely encoding rate of (up) channel A is set.(6) call modulator (reverse/up) CCCH function of initializing.

Following sequence of events appears in the access channel treatment processes successively: (1) modulator ISR monitors the end point of frame boundaries, when arriving the end of frame boundaries, calls the L1D incentive programme.(2) L1D checks the type of state and reverse (up) channel A of reverse (OK) channel status machine of current TD-SCDMA/3G/4G terminal D SP firmware, the MAD multiplexer is put into background task with access channel encoder task tabulate.(3) the multiplexer task prepares to be input to the data of channel encoder, and channel encoder task computation CRC increases the tail bit, finishes convolutional encoding, symbol repetition, block interleaving.(4) modulator ISR interrupts with 4.8kbps, reads the bit that is of convenient length from channel encoder output buffer area, and writes the modulator stone.

2.2.3 reverse (up) traffic channel state: in reverse (up) traffic channel state, travelling carriage sends voice, data, and signaling is to the base station.In traffic channel state, following DSP firmware subsystem is activated: (1) physical layer control (L1D); (2) modulator firmware; (3) channel coding-decoder (channel encoder); (4) physical layer multiplex sublayer (multiplexer); (5) audio coder ﹠ decoder (codec) (speech coder); (6); (7) audio frequency is processed (oppositely (up) audio frequency is processed).

CPU sends traffic channel request primitive to L1D, makes reverse (up) channel status machine of TD-SCDMA/3G/4G terminal D SP firmware jump to traffic channel state.Here, the primitive that makes oppositely (up) or forward direction (descending) channel status machine jump to service condition does not have any difference---and traffic channel request primitive sends to all initiation state conversions of two state machines.Oppositely (up) Traffic Channel firmware handle process such as Fig. 1

Shown in.

CPU sends traffic channel request primitive to L1D,, make reverse (up) channel status machine of TD-SCDMA/3G/4G terminal D SP firmware jump to traffic channel state.Channel mask field in the primitive provides when beginning to call (reverse/up) FCH (or DTCH for DSP, up Dedicated Traffic Channel), (oppositely/up) DCCH (oppositely/up Dedicated Control Channel) time, with the information of which transmission.At this constantly, L1D:(1) reverse (up) state variable of the overall situation being set is traffic channel state.(2) according to the channel mask arrange the overall situation oppositely the categorical variable of (up) channel A be that the categorical variable of primary channel/Dedicated Traffic Channel and/or channel B is Dedicated Control Channel.(3) radio bearer/radio configuration of oppositely (up) channel A and/or B is set by the request of CPU, speed, frame length, default oppositely (up) link Multiplex Option global variable and other relevant parameter.(4) the corresponding encoding rate of reverse (up) channel A and/or B is set.(5) in the initial condition of reverse (up) Channel Processing state machine, L1D can not dispatch the relevant firmware task of any oppositely (up) channel.It waits for reverse (up) of coming from CPU always thereby prefix sends request primitive can carry out oppositely (up) link processing.This event only occurs in when receiving the good frame of forward direction (descending) link.At this moment, L1D: 1. call modulator firmware traffic channel initialization function.2. MAD multiplexer global variable is set is default value.If 3. audio frequency activates, call oppositely (up) audio frequency processing initialize routine.

Oppositely in a single day (up) link is set up, and CPU sends the traffic channel configuration request primitive to L1D, and L1D arranges dedicated channel and business option.This primitive can ask DSP to begin transmission (reverse/up) FCH (DTCH), (oppositely/up) DCCH, any channel in the channels such as (reverse/up) SCH (reverse complemental channel/Uplink Shared Channel).Operation below L1D carries out: (1) is primary channel/Dedicated Traffic Channel according to the categorical variable that the channel mask arranges reverse (up) channel A of the overall situation, and/or oppositely the categorical variable of (up) channel B is Dedicated Control Channel, and/or oppositely the categorical variable of (up) channel C is complement channel.(2) oppositely (up) channel A (B, C) radio bearer/radio configuration of the overall situation, speed, frame length, encoding rate are set.(3) call oppositely (up) business option update functions of MAD.(4) if connect based on the voice service option of DSP, call the speech coding function of initializing.

Following sequence of events appears in reverse (up) Traffic Channel processing procedure successively: the benchmark that (1) speech coding stone (VBAFE) interrupts with 8KHz, and to the speech data sampling and send to DSP.VBAFE ISR inputs data from VBAFE stone register read, and is written among reverse (up) speech buffer storage district ReverseAudioBuf.When whole Frame was well found, VBAFE ISR called the L1D incentive functions.(2) L1D checks the oppositely state of (up) channel status machine of current TD-SCDMA/3G/4G terminal D SP firmware, and places oppositely (up) speech processes and speech coder task in the background task tabulation.(3) oppositely (up) audio frequency is processed and is taken out the linear PCM Frame, through processing accordingly, outputs to the speech coding task.(4) in case reverse (up) audio frequency is finished dealing with, the speech coding task just starts, and current frame is extracted speech parameter, and coded data is put into encoded voice buffer area EncoderVoiceBuf, offers in MAD multiplexer task.In case the speech coding task is determined the speed of current encoded frame, it will notify MAD (by routine call) and the latter to send FCH (DTCH) TxEmpty indication to CPU, the size of data that inquiry is multiplexing with voice.(5) after frame begins, modulator ISR (with 4.8KHz speed) starts MAD multiplexer and the channel encoder task that the L1D scheduling is in the primary channel/Dedicated Traffic Channel of backstage level.L1D arranges task in the background task tabulation by following order: SCH multiplexer, SCH channel encoder, DCCH multiplexer, the DCCH channel encoder, FCH (DTCH) multiplexer, FCH (DTCH) channel encoder, MADTxEmpty, modulator power control task.This order is to send reverse (up) service request primitive that comprises current frame data to the CPU time enough.(6) the MAD multiplexer is accepted data from MAC one by one.MAD sends TxEmpty indication notice CPU, and DSP has been ready to receive new data, i.e. new oppositely (up) service request primitive.The data-reusing that MAD multiplexer task provides the multiplex sublayer (MAC) of moving among vocoded data and the CPU together.At the business option based on CPU, oppositely (up) service request primitive comprises the next frame data of requirement MAD and channel encoder processing.In the voice service option (can only transmit at primary channel/Dedicated Traffic Channel) based on DSP, need to be multiplexing with vocoded data from the data of CPU.(7) the channel encoder task is carried out convolutional encoding, symbol repetition, block interleaving to each information frame.If use Turbo coding (only being used for two-forty supplementary service channel), whole chnnel coding is finished by stone---SCH channel encoder task only needs to write data into the stone register.(8) modulator power control task is calculated the code channel gain of all code channels that need to use based on reverse (up) link gain table and present frame characteristic.At frame boundaries, modulator ISR is written to corresponding modulator stone register with the code channel gain of all code channels that need to use.(9) the modulator ISR that works in 4.8KHz finishes the coded data transmission (when using the stone channel encoder, data are directly to send to the stone register, and do not relate to any firmware) between DSP firmware and the modulator stone.Simultaneously, modulator ISR also is responsible for finishing the power control of being determined by the gate mask.

Table 1:TD-SCDMA/3G/4G terminal D SP firmware IDT

Interrupt source	Interrupt control register/interrupt vector	The DSP interrupt number	Interrupt cycle
				Multipath reception front end (Finger Front End)	INT_VECTO	INT0	19.2kHz
The audio frequency of audio frequency simulation front end is processed (VBAFE Audio)	INT_VECT1	INT0	8.0kHz
				Transmit modulator (Tx Modulator)	INT_VECT2	INT0	4.8kHz
SSP (synchronous serial interface) receives	INT_VECT3	INT0	8.OkHz
				Searcher (Searcher)	INT_VECT4	INT1	Asynchronous
The Viterbi decoder	INT_VECT6	INT1	1408 DSP cycles after receiving the DSP write request (1408DSP cycles after DSP write request)
				DSP timer 0 (Timer 0)	INT_VECT7	INT1	Asynchronous (asynchronous)
The Turbo/CRC decoder	INT_VECT8	INT1	50Hz
				Deinterleaver (De-Interleaver)	INT_VECT9	INT1	50Hz
House Keeping ADC	INT_VECT10	INT1	Asynchronous
				DSP timer 1 (Timer 1)	INT_VECT11	INT1	Asynchronous
Mailbox receives (Mailbox Receive)	INT_VECT12	INT2	Asynchronous (depending on the CPU request)
				Mailbox sends (Mailbox Transmit)	INT_VECT13	INT2	Asynchronous (depending on the CPU request)

Table 2TD-SCDMA/3G/4G terminal D SP firmware foreground task

Task name (Task Name)	The firmware subsystem	Process type	Scheduler
				Pre-Viterbi processes (Pre-Viterbi Processing)	Channel coding-decoder	Forward direction/down channel: carry out soft symbol frame formatting, deinterleaving, the repetition of elimination bit	L1D
Rear Viterbi processes (Post-Viterbi Processing)	Channel coding-decoder	Forward direction/down channel: calculate based on the output of Viterbi decoder and CRC, finish speed and differentiate algorithm i	L1D
				Physical layer demodulation multiplexer (Demultiplexer)	MAD	Forward direction/down channel: to the forward direction received/downlink frame demultiplexing, voice data is issued inner voice codec, the Frame of route input is to CPU.	L1D
Voice decoder (Voice Decoder)	Voice codec Vocoder	Forward direction/down channel: the coded speech data decode of input is become the PCM speech stream	L1D
				Forward direction/downstream tones is processed (Forward Audio Processing)	Audio frequency is processed	Process the speech PCM sampling of forward/downlink	L1D
Forward direction/downlink business option upgrades (Forward Service Option Update)	LID	Parameter with new forward direction/downlink business option join dependency is set	L1D
				Search data is processed (Search Data Processing)	SMD	Search for the search window in each time interval the strongest pilot tone in long	Searcher interrupt service subroutine (Searcher ISR)
Main timing calibration (Master Time Correction)	SMD	Finish the master timer timing alignment	Searcher ISR

Table 3TD-SCDMA/3G/4G terminal D SP firmware background task

Task name (Task Name)	The firmware subsystem	Process type	Scheduler
				Voice encryption device	Voice codec Vocoder	Oppositely/and up channel: the PCM voice sample of input is encoded into the voice compression encoded data stream	L1D
Oppositely/up speech processing	Audio frequency is processed	Process the speech PCM sampling of return/uplink	L1D
				Physical layer multiplex device Multiplexer	Physical layer multiplex sublayer MAD	Oppositely/and up channel: the data of the data of the voice codec of inside and CPU input are finished multiplexing, and sent to channel encoder.	L1D
Channel encoder	Channel coding-decoder	Oppositely/and up channel: convolutional encoding, the bit of finishing data flow repeat, and interweave.
				The conversion of firmware state	L1D	Carry out the conversion of TD SCDMA/3G/4G terminal firmware state machine, comprise necessary initialization.	L1D
The control of modulator power	Modulator Modulator	Calculating is in the code channel gain of all code channels of usefulness.	L1D
				Oppositely/uplink service option renewal (Reverse Service Option Update)	L1D	Arrange with new oppositely/parameter of uplink service option join dependency.	L1D

What need to understand is: although above-described embodiment is to the present invention's detailed explanation of contrasting; but these explanations, just to simple declaration of the present invention, rather than limitation of the present invention; any innovation and creation that do not exceed in the connotation of the present invention all fall within the scope of protection of the present invention.

Claims

1. a TD-SCDMA and 3G and 4G terminal D SP fixer system, this terminal D SP fixer system is made of DSP operating system, CPU-DSP interface software subsystem, physical layer control firmware subsystem L1D, base band demodulator firmware subsystem, baseband modulator firmware subsystem, channel coding-decoder firmware subsystem, searcher firmware subsystem, physical layer multiplex sublayer firmware subsystem, audio coder ﹠ decoder (codec) firmware subsystem, audio frequency processing firmware subsystem, the professional firmware subsystem of stone, it is characterized in that:

(1) the included above-mentioned firmware subsystem of this DSP fixer system to the main demand of DSP resource management is:

1) the base band demodulator firmware is carried out under interrupt condition, and its interruption is periodic, and firmware interrupts processing a plurality of symbols at each, and all processing were finished before next interruption arrives;

2) the channel encoder signal is processed and is carried out frame by frame;

3) the modulator firmware also is to carry out under interrupt condition, data is sent on the modulator stone in the processing implementation its periodic interruption;

4) the searcher firmware is carried out with the data transmit-receive operation exception according to CPU request and associated parameter;

5) transfer of data between DSP physical layer multiplex sublayer subsystem and the CPU is asynchronous carries out, but must finish in same frame;

6) carry out frame by frame in the operation of audio coder ﹠ decoder (codec) firmware;

7) operation of audio frequency processing subsystem had both been sampled to PCM and had been carried out one by one, also carried out frame by frame, was realized by signal processing algorithm;

8) the professional firmware of stone is asked and asynchronous execution according to CPU;

(2) on DSP task scheduling mode, this DSP fixer system adopts the task list of three grades of operations of interrupt class, foreground level, backstage level to dispatch and carry out need to finishing of task, and interrupt class is highest, and the foreground level is intergrade, and the backstage level is lowermost level;

(3) every grade of operation of above-mentioned DSP operating system all goes to dispatch the also task of execution requirements with task list, in interrupt class, to use the task list related with interrupt control unit to realize, in backstage and foreground level, with use relevant firmware and send request to DSP operating system and go to dispatch the task of corresponding task in tabulating, DSP operating system scheduling task is according to interruption order and the priority that it is received, initiating task and updating task tabulation when task is finished from task list; As long as the interruption of hang-up is arranged in the system, DSP operating system just remains on the handling interrupt state; DSP operating system is carried out the task in the tabulation of foreground, until this task list is empty; The interruption and the foreground task that only do not have to hang up in system are tabulated when being empty, and DSP operating system just begins to carry out the task in the background task tabulation.

2. TD-SCDMA according to claim 1 and 3G and 4G terminal D SP fixer system, it is characterized in that: in the firmware subsystem that it comprises, every stone is to the processing procedure of DSP firmware output, comprise following processing procedure and function, all adopt interrupt class task operating scheduling mode to start execution:

A) multipath reception front-end processing;

B) audio frequency of audio frequency simulation front end is processed;

C) baseband modulator function;

D) synchronous serial interface receives;

E) searcher firmware function;

F) Viterbi decoder firmware function;

G) the DSP timer 0;

H) Turbo and CRC decoder function;

I) deinterleaver function;

J) the DSP timer 1;

K) mailbox receiving function;

L) mailbox sending function;

(1) above-mentioned each processing procedure and function have respectively an independently interrupt source, and all interrupt source is connected on the interrupt control unit with the chain sheet form, and the priority of each interrupt source is defined by its residing position in chained list;

(2) each interrupt source can be routed to separately the INT0 of DSP nuclear, in INT1 or the INT2 interruption, and the DSP operating system priority that processing DSP nuclear interrupts and assignment DSP nuclear interrupts as follows:

1. INT0-limit priority;

2. INT1-lower priority;

3. INT2-lowest priority;

(3) following interrupt source is routed to separately in the INT0 interruption of DSP nuclear: the multipath reception front-end processing; The audio frequency of audio frequency simulation front end is processed; The baseband modulator function; Synchronous serial interface receives;

(4) following interrupt source is routed to separately in the INT1 interruption of DSP nuclear: the searcher firmware; Viterbi decoder firmware; Timer 0; Turbo and CRC decoder; Deinterleaver; DSP timer 1;

(5) following interrupt source is routed to separately in the INT2 interruption of DSP nuclear: the mailbox receiving function; The mailbox sending function.

3. TD-SCDMA according to claim 1 and 3G and 4G terminal D SP fixer system, it is characterized in that: in the firmware subsystem that it comprises, comprise that all following forward directions or down channel firmware handle process and function all adopt the foreground task mode to come scheduled for executing:

(1) pre-Viterbi processes;

(2) Viterbi processes after;

(3) physical layer demodulation multiplexer;

(4) voice decoder;

(5) forward direction or downstream tones are processed;

(6) search data is processed;

(7) main timing calibration.

4. TD-SCDMA according to claim 1 and 3G and 4G terminal D SP fixer system is characterized in that: in the firmware subsystem that it comprises, below all oppositely or up channel firmware handle process and function all adopt the background task mode to come scheduled for executing:

(1) voice encryption device;

(2) reverse or up speech is processed;

(3) physical layer multiplex device;

(4) channel encoder;

(5) firmware state conversion;

(6) modulator power control.

5. TD-SCDMA according to claim 1 and 3G and 4G terminal D SP fixer system, it is characterized in that: the mode that adopts forward direction or downstream state machine to process to the processing of forward direction or down channel is dispatched and is realized, the state conversion of forward direction or downstream state machine is the primitive startup of being issued physical layer control firmware L1D by CPU, and the primitive that is returned to CPU by L1D confirms:

(1) before activating forward direction or downlink pilot search, CPU obtains request primitive to L1D by transmission, dual microprocessor control system is arranged to forward direction or downlink pilot frequency channel obtains state, receiving when confirming that the DSP dual microprocessor control system is transformed into forward direction or downlink pilot frequency channel and obtains the primitive of state, CPU initialization search, possible TD-SCDMA and 3G and 4G forward direction or the down-bound pilot frequency signal of search in whole characteristic sequence code space;

(2) primitive of CPU transmission makes TD-SCDMA and 3G and 4G terminal D SP dual microprocessor control system jump to forward direction or descending synchronous signal channel state to L1D, L1D returns primitive to CPU, confirms that TD-SCDMA and 3G and 4G terminal D SP dual microprocessor control system jump to forward direction or descending synchronous signal channel state;

(3) after the multipath reception assignment is finished, CPU sends the paging channel request primitive to L1D, make TD-SCDMA and 3G and 4G terminal D SP dual microprocessor control system jump to idle condition, L1D returns primitive to CPU, confirm that TD-SCDMA and 3G and 4G terminal D SP dual microprocessor control system jump to idle condition, prepare to start the paging channel decoding;

(4) CPU is to forward direction or descending Common Control Channel CCCH, each channel of broadcast channel BCH have one independently request primitive issue L1D, before sending any one channel request primitive, CPU indication searcher firmware SMD carries out the multipath reception assignment by enabling corresponding channel and channel code being set, L1D returns primitive to CPU, confirm that TD-SCDMA and 3G and 4G terminal D SP dual microprocessor control system have been in idle condition and have prepared the beginning forward direction or the down control channel decoding, or confirm that TD-SCDMA and 3G and 4G terminal D SP dual microprocessor control system have been ready to start the broadcast channel decoding;

(5) when receiving CPU or forward direction or downlink traffic channel request primitive, L1D control TD-SCDMA and 3G and 4G terminal firmware forward direction or down channel state machine jump to traffic channel state, send primitive to CPU, confirm that TD-SCDMA and 3G and 4G terminal D SP firmware forward direction or down channel state machine have jumped to service condition, and prepare to start primary channel or Dedicated Traffic Channel decoding;

(6) CPU sends primitive to L1D, makes the state transition of TD-SCDMA and 3G and 4G terminal D SP dual microprocessor control system, and when state transition, L1D must at first arrange the parameter relevant with Channel Processing:

1. CPU obtains request primitive to L1D by transmission, dual microprocessor control system is arranged to forward direction or downlink pilot frequency channel obtains state; L1D is arranged to all global variables the value of the state that obtains;

2. primitive of CPU transmission makes TD-SCDMA and 3G and 4G terminal D SP dual microprocessor control system jump to forward direction or descending synchronous signal channel state to physical layer, in this, physical layer control firmware L1D is arranged to forward direction or descending synchronous signal channel state with all global variables;

3. CPU sends the paging channel request primitive to L1D, makes TD-SCDMA and 3G and 4G terminal D SP dual microprocessor control system jump to idle condition, and at this constantly, L1D finishes: it is idle condition that overall forward direction or downstream state variable are set; The categorical variable that overall forward direction or down channel A are set is paging channel; Request arranges speed, frame length, the encoding rate of forward direction or down channel A according to CPU;

(7) when L1D receives the forward direction of CPU or descending Common Control Channel request primitive, can proceed as follows: overall forward direction or downstream state variable are made as idle condition; The categorical variable of overall forward direction or down channel A is made as forward direction or descending Common Control Channel; Request arranges speed, frame length, the encoding rate of forward direction or down channel A according to CPU;

(8) when L1D receives the broadcast channel request primitive of CPU, can proceed as follows: the categorical variable of overall forward direction or down channel B is made as broadcast channel; Request arranges speed, frame length, the encoding rate of forward direction or down channel B according to CPU;

When (nine) receiving CPU traffic channel request primitive, L1D control TD-SCDMA and 3G and 4G terminal firmware forward direction or down channel state machine jump to traffic channel state, at this time point, L1D finishes: it is traffic channel state that overall forward direction or downstream state variable are set; The categorical variable that overall forward direction or down channel A is set according to the channel mask is that the categorical variable of primary channel or Dedicated Traffic Channel and/or forward direction or down channel B is Dedicated Control Channel; According to CPU request, the radio bearer of forward direction or down channel A and/or B or radio configuration, speed, frame length, default forward direction or downlink multiplexing option global variable are set; The encoding rate of forward direction or down channel A and/or B is set; The global variable that physical layer multiplex sublayer MAD demodulation multiplexer is set is default setting;

(10) CPU sends the access exploration request primitive to L1D, starts an access exploration, and at this constantly, L1D finishes: reverse or uplink state variable set up is access state with the overall situation; Overall situation categorical variable reverse or up channel A is set to access channel; Speed, frame length, the encoding rate of reverse or up channel A are set;

(11) can proceed as follows when L1D receives oppositely or the uplink common control channel request primitive from CPU: with the overall situation oppositely or the uplink state variable set up be access state; The categorical variable of oppositely overall or up channel A is set; Request arranges oppositely or speed, frame length, the encoding rate of up channel A according to CPU;

(12) CPU sends traffic channel request primitive to L1D, make TD-SCDMA and 3G and 4G terminal D SP firmware oppositely or the up channel state machine jump to traffic channel state, at this constantly, L1D finishes: the overall situation is set oppositely or the uplink state variable is traffic channel state; The overall situation is set oppositely or the categorical variable of up channel A is that the categorical variable of primary channel or Dedicated Traffic Channel and/or channel B is Dedicated Control Channel according to the channel mask; Request by CPU arranges oppositely or the radio bearer of up channel A and/or B or radio configuration, speed, frame length, default oppositely or uplink reuse option global variable; The corresponding encoding rate of reverse or up channel A and/or B is set.

6. TD-SCDMA according to claim 1 and 3G and 4G terminal D SP fixer system, it is characterized in that: CPU sends primitive to physical layer control firmware L1D, make the state transition of TD-SCDMA and 3G and 4G terminal D SP dual microprocessor control system, except reverse or reverse link traffic channel state, when state transition, L1D must carry out initialization to the demodulator relevant with Channel Processing, channel decoder, modulator, channel encoder, starts them and starts working:

(1) CPU obtains request primitive to physical layer control firmware L1D by transmission, dual microprocessor control system is arranged to forward direction or downlink pilot frequency channel obtains state, and L1D calls the demodulator firmware and obtains the initialization function and start and obtain state processing;

(2) primitive of CPU transmission makes TD-SCDMA and 3G and 4G terminal D SP dual microprocessor control system jump to forward direction or descending synchronous signal channel state to physical layer, at this moment carve, physical layer is called forward direction or the descending synchronous signal channel initialization function of demodulator firmware, start forward direction or descending synchronous signal channel demodulation, call forward direction or the descending synchronous signal channel function of initializing of channel decoder, the channel encoder parameter is arranged to forward direction or descending synchronous signal channel state;

(3) CPU sends the paging channel request primitive to L1D, make TD-SCDMA and 3G and 4G terminal D SP dual microprocessor control system jump to idle condition, at this constantly, L1D calls the paging channel initialization function of demodulator firmware, start paging channel demodulation, call the paging channel function of initializing of channel decoder, prepare to start the paging channel decoding;

(4) when L1D receives the forward direction of CPU or descending Common Control Channel request primitive, call demodulator firmware forward direction or descending Common Control Channel function of initializing, start forward direction or descending Common Control Channel demodulation, call channel decoder forward direction or descending Common Control Channel function of initializing, prepare the decoding of beginning forward direction or down control channel;

(5) when L1D receives the broadcast channel request primitive of CPU, call demodulation firmware broadcast channel function of initializing, call channel decoder broadcast channel function of initializing, prepare to start the broadcast channel decoding;

(6) when receiving CPU traffic channel request primitive, L1D calls the traffic channel initialization function of demodulator firmware, calls channel decoder traffic channel initialization function, prepares to start primary channel or Dedicated Traffic Channel decoding;

(7) CPU send the access channel message comprise encapsulation access channel request primitive to L1D, afterwards, CPU sends the access exploration request primitive to L1D, starts an access exploration, at this constantly, L1D calls modulator and accesses the channel initialization function;

(8) receive oppositely or the uplink common control channel request primitive from CPU as L1D, call the modulator firmware oppositely or uplink common control channel CCCH function of initializing.

7. TD-SCDMA according to claim 1 and 3G and 4G terminal D SP fixer system, it is characterized in that: when the state transition of TD-SCDMA and 3G and 4G terminal D SP dual microprocessor control system arrives reverse or reverse link traffic channel state, physical layer control firmware L1D can not dispatch any oppositely or the relevant firmware task of up channel, it waits for that always thereby the reverse or up prefix transmission request primitive of coming from CPU can carry out oppositely or uplink processing, this situation only occurs in when receiving forward direction or down link, at this moment, L1D:

(1) calls modulator firmware traffic channel initialization function;

(2) physical layer multiplex sublayer MAD demodulation multiplexer global variable being set is default value;

(3) if audio frequency activates, call oppositely or upstream tones processing initialize routine.

8. TD-SCDMA according to claim 1 and 3G and 4G terminal D SP fixer system is characterized in that: when CPU sends the traffic channel configuration request primitive to physical layer control firmware L1D, L1D arranges dedicated channel and business option, the operation below L1D carries out:

(1) according to the channel mask overall situation categorical variable reverse or up channel A being set is primary channel or Dedicated Traffic Channel, and/or oppositely or the categorical variable of up channel B be Dedicated Control Channel, and/or oppositely or the categorical variable of up channel C be the supplementary service channel;

(2) overall situation is set oppositely or up channel A or B or C radio bearer or radio configuration, speed, frame length, encoding rate;

(3) call the reverse or uplink service option update functions of physical layer multiplex sublayer MAD;

(4) if connect based on the voice service option of DSP, call the speech coding function of initializing.

9. TD-SCDMA according to claim 1 and 3G and 4G terminal D SP fixer system, it is characterized in that: forward direction or downlink traffic channel processing procedure comprise the processing of finishing successively following sequence:

(1) the demodulator firmware is to channel forward direction or descending primary channel FCH or Dedicated Traffic Channel DTCH and forward direction or the processing of downlink dedicated control channel DCCH execution incoming symbol of each activation, and the symbol that demodulates focused on Circular buffer district corresponding to the stone channel of assignment, the supplementary service channel is by hard nucleus management, so do not need to use buffer area;

(2) in case the demodulator firmware arrives the end point of frame, it calls physical layer control firmware L1D;

(3) L1D checks TD-SCDMA and the firmware forward direction of 3G and 4G terminal or the current state of down channel state machine, and channel decoder is put into the foreground task tabulation to the reception format task of Dedicated Control Channel DCCH;

(4) pre-Viterbi task is finished the piece deinterleaving and is gone the bit punching, then activates the convolution decoder function;

(5) the convolution decoder function writes the soft-decision coded data by Viterbi stone accelerator, read hard decision output data, realize folding coding, whenever the Viterbi accelerator is write the hard decision buffer area, it just produces a Viterbi and interrupts sending to DSP, and DSP reads hard decision data and next soft-decision data is write, and the convolutional encoding of Traffic Channel is discontinuous, whenever finish a traffic channel data frame, the Viterbi decoder is reinitialized;

(6) in case finish the decoding of whole frame data, the Viterbi interrupt requests is called the L1D expanded function, the rear Viterbi of Dedicated Control Channel DCCH is processed and physical layer multiplex sublayer MAD demultiplexing task, and the pre-Viterbi task of forward direction or descending primary channel FCH or Dedicated Traffic Channel DTCH is put into the foreground task tabulation;

(7) the rear Viterbi task of forward direction or downlink dedicated control channel DCCH is calculated CRC check to each frame data and is compared with the CRC check tail bit that receives, and remove CRC tail bit, afterwards, physical layer multiplex sublayer MAD demultiplexing task sends to CPU with data;

(8) the pre-Viterbi task of forward direction or downlink dedicated primary channel FCH or Dedicated Traffic Channel DTCH is finished the piece deinterleaving and is gone the bit punching, if allow the speed except full rate, then for 1/2, the frame of 1/4 and 1/8 speed goes bit to repeat, and next step is to activate the convolution decoder function;

(9) in case finish the decoding of whole frame data, the Viterbi interrupt requests is called the L1D expanded function, rear Viterbi processing and the physical layer multiplex sublayer MAD demultiplexing task of forward direction or descending primary channel FCH or Dedicated Traffic Channel DTCH are put into the foreground task tabulation, if audio-frequency function is used, Voice decoder and forward direction or downstream tones Processing tasks also can be added in the tabulation so, if there is the supplementary service channel SCH of convolution to be activated, L1D will dispatch on the foreground the pre-Viterbi task of SCH;

(10) correlation matrix of all frame rate that enable is calculated and carries out in the rear Viterbi tasks carrying frame quality indication of forward direction or descending primary channel FCH or Dedicated Traffic Channel DTCH; In case the correlation matrix of frame quality indication and the frame rate that enables is ready to, the Rate decision program will be activated; The Rate decision program function detects the speed of present frame, correct locator data pointer, and correct frame category is set;

(11) based on the current business option configuration, physical layer multiplex sublayer MAD demodulation multiplexer task is that Voice decoder extracts original data stream, and whole Frame is sent to CPU;

(12) Voice decoder task adopts the linear PCM sampling to produce audio data frame, and L1D is by being sent to sound decorder with pointer, and data are placed in the voice output Circular buffer district, and the size of buffer area must be the double of data at least;

After (13) tone decoding was finished, forward direction or descending acoustic processing task were activated from the task list of foreground, and this task is taken out Voice decoder output data, processes, and then writes back to the output buffer area;

(14) audio frequency simulation front end interrupt service subroutine interrupts from forward direction or downstream tones buffer area sense data based on 8kHz and writes in the voice baseband analog front end VBAFE stone register;

(15) are if low data rate supplementary service channel SCH is activated, comprise deinterleaving, go all symbol level processing of bit punching in stone, to finish, when frame data are finished dealing with, the stone deinterleaver produces an interruption and issues DSP, deinterleaver interrupt service subroutine ISR arranges the SCH data and reads sign, indication supplementary service channel SCH pre-Viterbi task from stone read data to the received frame buffer area, and the convolution decoder function of Viterbi stone accelerator is adopted in startup, after finishing whole SCH frame coding, Viterbi ISR calls the L1D excitation function, its rear Viterbi and physical layer multiplex sublayer MAD demodulation multiplexer task with the supplementary service channel is put into the foreground task tabulation, the CRC check of the every frame of Viterbi task computation behind the supplementary service channel SCH, and the CRC check that calculates compared with the CRC tail bit that receives, and remove the CRC tail bit of every frame, finish after these processing, physical layer multiplex sublayer MAD demodulation multiplexer task transfers data to CPU;

(16) are if high data rate supplementary service channel SCH is activated, the stone function of expansion can be carried out Turbo and CRC decoding, Turbo and CRC decoding are to carry out after finishing symbol merging and alignment and piece deinterleaving, after frame decoding is finished, Turbo and CRC decoder are sent out and are interrupted to DSP, Turbo and CRC decoder interrupt service subroutine ISR be from the stone copies data, and the physical layer multiplex sublayer MAD demodulation multiplexer task of supplementary service channel is joined in the foreground task tabulation.

10. TD-SCDMA according to claim 1 and 3G and 4G terminal D SP fixer system is characterized in that: oppositely or the reverse link traffic channel processing procedure comprise the processing of finishing successively following sequence of events:

(1) the speech coding stone is with the benchmark interrupt rate of 8KHz, to speech data sampling and send to DSP, the interrupt service subroutine ISR of voice baseband analog front end VBAFE is from VBAFE stone register read input data, and be written in reverse or the ascending voice buffer area, when whole Frame was well found, VBAFE ISR called physical layer control firmware L1D incentive functions;

(2) L1D checks current TD-SCDMA and 3G and 4G terminal D SP firmware oppositely or the state of up channel state machine, and place oppositely or ascending voice is processed and the speech coder task in background task is tabulated;

(3) reverse or upstream tones is processed and is taken out the linear PCM Frame, through processing accordingly, outputs to the speech coding task;

(4) in a single day reverse or upstream tones is finished dealing with, the speech coding task just starts, current frame is extracted speech parameter, coded data is put into the encoded voice buffer area, offer in physical layer multiplex sublayer MAD multiplexer task, in case the speech coding task is determined the speed of current encoded frame, it will notify physical layer multiplex sublayer MAD to send indication by routine call and the latter to CPU, the size of data that inquiry is multiplexing with voice;

(5) after frame begins, modulator interrupt service subroutine ISR starts MAD multiplexer and the channel encoder task that the L1D scheduling is in primary channel or the Dedicated Traffic Channel of backstage level, L1D arranges task in the background task tabulation by following order: supplementary service channel SCH multiplexer, SCH channel encoder, DCCH multiplexer, DCCH channel encoder, FCH or DTCH multiplexer, FCH or DTCH channel encoder, modulator power control task, this order are to send the reverse or uplink service request primitive that comprises current frame data to the CPU time enough;

(6) MAD multiplexer in physical layer multiplex sublayer is one by one from the MAC receive data, physical layer multiplex sublayer MAD sends indication notice CPU, DSP has been ready to receive new data, namely new oppositely or the uplink service request primitive, the data-reusing that physical layer multiplex sublayer MAD multiplexer task provides the multiplex sublayer MAC that moves among vocoded data and the CPU together, at the business option based on CPU, reverse or uplink service request primitive comprises the next frame data of requirement physical layer multiplex sublayer MAD and channel encoder processing, in the voice service option based on DSP, can only transmit at primary channel or Dedicated Traffic Channel, need to be multiplexing with vocoded data from the data of CPU;

(7) the channel encoder task is carried out convolutional encoding, symbol repetition, block interleaving to each information frame, if use the Turbo coding, only be used for two-forty supplementary service channel SCH, whole chnnel coding is finished by stone, and SCH channel encoder task only needs to write data into the stone register;

(8) modulator power control task is based on reverse or uplink gain table and present frame characteristic, calculate the code channel gain of all code channels that need to use, at frame boundaries, modulator ISR is written to corresponding modulator stone register with the code channel gain of all code channels that need to use;

(9) the modulator interrupt service subroutine ISR that works in 4.8KHz finishes the coded data transmission between DSP firmware and the modulator stone, when using the stone channel encoder, data are directly to send to the stone register, and do not relate to any firmware, simultaneously, modulator ISR also is responsible for finishing the power control of being determined by the gate mask.