CN101075630A - Phase change memory device and manufacturing method - Google Patents
Phase change memory device and manufacturing method Download PDFInfo
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- CN101075630A CN101075630A CN 200710002210 CN200710002210A CN101075630A CN 101075630 A CN101075630 A CN 101075630A CN 200710002210 CN200710002210 CN 200710002210 CN 200710002210 A CN200710002210 A CN 200710002210A CN 101075630 A CN101075630 A CN 101075630A
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Abstract
A phase change memory device comprises a photolithographically formed phase change memory cell having first and second electrodes and a phase change element positioned between and electrically coupling the opposed contact elements of the electrodes to one another. The phase change element has a width, a length and a thickness. The length, the thickness and the width are less than a minimum photolithographic feature size of the process used to form the phase change memory cell. The size of the photoresist masks used in forming the memory cell may be reduced so that the length and the width of the phase change element are each less than the minimum photolithographic feature size.
Description
The party of joint study contract
New York IBM, Taiwan Wang Hong Internaional, Inc and technology company of German Infineon (Infineon Technologies A.G.) are the party of joint study contract.
Technical field
The present invention relates to high density memory Set, and in order to make the method for this device, wherein the phase change storage medium comprises chalcogenide materials and other materials based on the phase change storage medium.
Background technology
The phase change storage medium is widely used in the writable disc.These materials include at least two kinds of solid-state phases, comprise as being roughly amorphous solid-state phase, and the solid-state phase that is roughly crystalline state.Laser pulse is used for the writable disc sheet, switching in mutually at two kinds, and reads the optical property of this kind material after phase change.
As this phase change storage medium of chalcogenide and similar material, can be applicable to electric current in the integrated circuit by applying its amplitude, and cause that crystalline phase changes.Roughly amorphous its resistance that is characterized as is higher than crystalline state, and this resistance value can measure easily and indicate in order to conduct.This specific character then causes uses programmable resistor material with interest such as formation Nonvolatile memory circuits, and this circuit can be used for the arbitrary access read-write.
Be converted to crystalline state from amorphous state and be generally the low current step.Be converted to amorphous state (following denotion is for resetting (reset)) from crystalline state and be generally high electric current step, it comprises that of short duration high current density pulse is to melt or destruction crystalline texture, thereafter this phase-transition material cooling fast, the process that suppresses phase change makes that at least partly phase change structure is maintained in amorphous state.Under the perfect condition, causing that phase-transition material is converted to amorphous reset current amplitude from crystalline state should be low more good more.Desire reduces the required reset current amplitude of resetting, can by lower the phase-transition material size of component in memory and reduce electrode therewith the contact area of phase-transition material realize, therefore can apply less absolute current value and realize higher current density at this phase-transition material element.
A kind of method of this field development is devoted to form small hole on integrated circuit structure, and uses micro-programmable resistance material to fill these small holes.The patent of being devoted to this small hole comprises: in the U.S. Patent No. 5,687,112 of bulletin on November 11st, 1997, being entitled as " Multibit Single Cell Memory Element Having Tapered Contact ", inventing the people is Ovshinky; U.S. Patent No. 5,789,277 on August 4th, 1998 bulletin is entitled as " Method of Making Chalogenide[sic] Memory Device ", invention people for Zahorik etc.; U.S. Patent No. 6 in bulletin on November 21st, 2000,150,253, being entitled as " Controllable Ovonic Phase-Change Semiconductor Memory Deviceand Methods of Fabricating the Same ", inventing the people is Doan etc.
When making this device and technological parameter with unusual microsize and must meet the desired strict technological specification of large scale storage device, can suffer from problem.Therefore, preferably can provide a kind of memory cell structure and the method for making this structure, it has microsize and low reset current.
Summary of the invention
One object of the present invention relates to phase-change memory, it comprise the memory cell access layer, with the memory cell layers that optionally is connected to the memory cell access layer, it comprises the phase change memory cell that forms in offset printing (photolithograph) mode.This memory cell comprises first and second electrode, and it has respectively relatively and first and second contact element of separating, and is positioned at the phase change element between first and second contact element, and it can be electrically connected to each other first and second contact element.Phase change element has width, length and thickness, the direction of linear measure longimetry between first and second contact element, and the width measure direction vertical with length.Length, thickness and width are less than the minimum offset printing characteristic size in order to the technology that forms phase change memory cell.In certain embodiments, this minimum offset printing characteristic size is about 200 nanometers, and this length is about 10 to 100 nanometers, and width is about 10 to 50 nanometers, and thickness is about 10 to 50 nanometers.
Another object of the present invention relates to a kind of in order to make the method for phase-change memory.Form the memory cell access layer on substrate, this memory cell access layer comprises access device and upper surface.Form memory cell layers, it optionally is connected to the memory cell access layer, and this memory cell layers comprises the phase change memory cell that forms in the offset printing mode.This memory cell comprises: first and second electrode, and it has respectively relatively and first and second contact element of separating, and phase change element, and it places between this first and second contact element, and this first and second contact element is electrically connected to each other.Phase change element comprises width, length and thickness.This memory cell layers forms step and comprises that reduction is used for the photoresistance means of mask dimensions that memory cell layers forms step, makes length and the width of phase change element less than the minimum offset printing characteristic size in order to the technology of formation phase change memory cell.
Method of the present invention is in order to form phase change element, and it is used for the memory cell of phase change random access storage device (PCRAM), and the method can be in order to the small phase change grid of the manufacturing in other devices, lead bridge or other similar structures.
Below describe structure of the present invention and method in detail.The purpose of prospectus part of the present invention is not to be to limit the present invention.The present invention is limited by claims.All embodiments of the invention, feature, purpose and advantage etc. can be passed through following specification, claims and accompanying drawing and obtain fully to understand.
Description of drawings
Fig. 1 and Fig. 2 are each element stereogram and simplification profile of the phase-change memory of manufacturing of the present invention.
Fig. 3-25 illustrates in order to make the method for the phase-change memory as shown in Fig. 1 and 2.
Fig. 3-4 shows the final step in order to the memory cell access layer of shop drawings 2.
Fig. 4 A shows the alternate embodiment of the memory cell access layer of Fig. 4.
Fig. 5 shows sediment phase change formed material layer and the result of first barrier layer on the memory cell access layer of Fig. 4.
Fig. 6 and 7 is for being positioned at the side-looking and the vertical view of the first photoresistance mask on first barrier layer.
Fig. 8 and 9 shows the result of mask through pruning of Fig. 6 and 7.
First barrier layer that Figure 10 and 11 shows Fig. 8 through etching, and then remove result behind the mask of Fig. 8.
Figure 12 shows the structure of Figure 10 and carries out the etched result of phase-change material layer.
Figure 13 shows the profile of the structure of Figure 12 along the 13-13 line.
Figure 13 A is the profile that is similar to the alternate embodiment of Figure 13, and it is the result after the sidewall etch of phase change element.
Figure 13 B carries out result after barrier deposition forms the cavity that is adjacent to phase change element for Figure 13 A structure.
Figure 14 and 15 shows the result of a plurality of processing steps, to generate three by the defined open area of the second photoresistance mask.
Figure 16 shows the result that the oxide etching step penetrates the open area.
Figure 17 shows the structure of Figure 16 and carries out the result that mask removes.
Figure 18 and 19 shows the result of sidewall shearing procedure.
Figure 20 shows the phase change element structure of Figure 18 is carried out etched result.
The structure that Figure 21 shows Figure 20 electrically contacts the reinforced layer deposition, follows the result of depositing electrically conductive body.
The structure that Figure 22 and 22A show Fig. 1 is carried out the result after the cmp step.
Figure 22 B and 22C show the alternate embodiment of the structure of Figure 22, and wherein phase-transition material is in order to assist phase change element and the isolation of electrode heat.
Figure 23 shows and applies the structural result of second separate layer in Figure 22.
Figure 24 and 25 is end view and vertical view, embolism is shown by the through hole in second separate layer.
Figure 26-38 shows in order to make the step of alternate embodiment of the present invention, and wherein Figure 26 shows the structure that is similar to Fig. 5, but on the phase-change material layer with under comprised separate layer.
Figure 27 shows deposition mas on the structure of Figure 26.
Figure 28 is for to prune the mask of Figure 27.
Figure 29 is similar to Figure 10, and show etching and the mask of Figure 28 removed after the result.
After Figure 30 shows another etching step, then remove the result of Figure 29 through etch stop layer.
Figure 31 shows the result of deposited barrier layer on the structure of Figure 30.
Figure 32 shows the result who forms mask on the structure of Figure 31.
Figure 33 shows etching and removes the result of the mask of Figure 32.
Figure 34 shows at the downward etching material in the open area of Figure 33 to the formed result of stacking of the upper surface of memory cell access layer.
Figure 35 shows deposition and electrically contacts the structural result of reinforced layer in Figure 34.
Figure 36 shows the result of structure after the cmp step of Figure 35.
Figure 37 shows the deposition separate layer in the structural result of Figure 36.
Figure 38 shows and generates through hole and penetrate into downwards and electrically contact reinforced layer, fills this through hole with electric conducting material, and covers this structure with metal level, and generate the alternate embodiment of the phase-change memory of Fig. 1 and 2.
The main element symbol description
10 phase change devices
12 levels of access
14 substrates
16 memory cell layers
18,20 access transistors
21 doped layers
22,24 drain electrodes
26,28 source electrodes
30,32 grids
34 common source line
35,36 embolisms
35A, 36A embolism extension
38 upper surfaces
40 dielectric film layers
40A medium packed layer
42 first electrodes
44 second electrodes
46 third electrodes
48,50 grooves
52,54 phase change elements
56 phase change element length
58 phase change element thickness
60 phase change element width
62 conductive bit
64 separate layers
65 main parts
66 through holes
67 conductive plugs
68 source electrode embolisms
69 electrically contact reinforcement material
70 dielectric materials
The 70A phase-change material layer
71 through etched barrier layer
72 first barrier layers
73 thickness
74 first photoresistance masks
76 less masks
78 first sizes
80 first phase change element structures
80A is through etched side wall construction
81 horizontal sizes
82 first barrier layer structures
84 second barrier layers
86 first separate layers
87 through etched first separate layer
88 second photoresistance masks
90,92,94 open areas
95 side wall dimensions
102 electrically contact reinforcement material
104 electric conducting materials
105 upper surfaces
106 metallic conductor elements
108 electrically contact reinforcing element
110 phase-change material layer
112 substrate separate layers
Separate layer on 114
116 through etched substrate separate layer
118 through etched barrier layer
Separate layer on 120 deep etchings
124 through etched substrate separate layer
128 upper surfaces
132 oxides
134 surfaces
136 oxides
138 through holes
140 contact embolisms
Embodiment
Follow-up invention description is with reference to ad hoc structure embodiment and method.Be understandable that category of the present invention is not to be limited to specific disclosed embodiment, and the present invention can utilize other features, element, method and embodiment to implement.Like in each embodiment will be specified with like numerals will.
Fig. 1 and 2 is two views of the phase change device 10 of one embodiment of the present of invention.Device 10 roughly comprises the memory cell access layer 12 that is formed on the substrate 14, and is formed at the memory cell layers 16 on the level of access 12.In the present embodiment, level of access 12 comprises first and second access transistor 18,20. Access transistor 18,20 has comprised that first and second drain electrode 22,24, first and second source electrode 26,28, first and second polysilicon word line are as first and second grid 30,32 and common source line 34.Common source line 34 contacts are to first and second source electrode 26,28.If necessary, can offer first and second source electrode 26,28 source electrode line independently separately.Access transistor 18,20 is traditional configuration haply, but so uninevitable.Simultaneously, level of access 12 can comprise access transistor access device in addition.First and second embolism 35,36 upper surfaces from memory access layer 12 extend through dielectric film layer 40 and arrival doped layer 21.
Memory cell layers 16 comprises first electrode 42 that contacts to the upper surface 38 and first embolism 35, contact to second electrode 44 of upper surface 38 and contact to the third electrode 46 of the upper surface 38 and second embolism 36.First and second electrode 42,44 is separated by groove 48, and second is then separated by groove 50 with third electrode 44,46.First and second phase change element 52,54 is formed in first and second groove 48,50, between upper surface 38 and be in contact with it, contacts to sidewall sidewall definition electrode 42,44,46 simultaneously.As shown in Figure 2, first and second phase change element 52,54 has length 56 and thickness 58.As shown in Figure 1, each first and second phase change element 52,54 has width 60.The length 56 of two phase change elements, thickness 58 and width 60 typically equate, but so uninevitable.The following detailed description in detail, the size of phase change element 52,54 is minimized, and changes needed electric current to reduce between two phases, and this two phase comprises roughly crystalline state and the higher roughly amorphous state of resistance that resistance is lower.
Memory cell layers 16 comprises conductive bit 62, and it is separated with electrode 42,44,46 by separate layer 64, and separate layer is typically by being constituted as dielectric materials such as silicon dioxide.Through hole is formed in second separate layer 64, and conductive plug 67 extends through this through hole 66, to be electrically connected the bit line 62 and second electrode 44.
Then describe in detail a kind of in order to make the method for phase-change memory with reference to Fig. 3-2.Memory cell access layer 12 is typically by the known technology manufacturing.Fig. 3 and 4 has illustrated in order to make the final step of memory cell access layer 12.Source electrode embolism 68 from upper surface 38 extend to doped layer 21, between first and second grid 30,32.The part that source electrode embolism 68 is adjacent to upper surface 38 is removed (typically removing with etching mode), and fill with dielectric material 70 in the etched zone that removes.Afterwards, upper surface 38 is subjected to cmp, so that upper surface is fit to carry out the deposition of memory cell layers 16.
Fig. 4 A illustrates the alternate embodiment of memory cell access layer 12, and wherein the step of etching source electrode embolism 68 is substituted, but deposit another medium packed layer 40A, the extension 35A, the 36A that then form embolism 35,36 pass medium packed layer 40A.Fig. 5 shows the memory cell access layer 12 sediment phase change formed material layer 70A of Fig. 4 on upper surface 38, and deposits the result on first barrier layer 72 (being also referred to as cover layer), and layer 72 typically is the silicon nitride oxygen barrier.Phase-change material layer 70 has thickness 73, the thickness 58 of its corresponding diagram 1.Layer 70 preferable more Bao Yuehao, but still can keep the functional characteristic of phase change bridge 52,54.In the present embodiment, the thickness of layer 70,72 is about 20 nanometers.When being constituted by following known phase-transition material, thickness 73 is preferably between about 10 to 50 nanometers, and more preferably be not more than about 20 nanometers, it is typically 200 nanometers much smaller than in order to form the employed minimum offset printing characteristic size of mask 74 (following).
Fig. 6 forms the result of the first photoresistance mask 74 on first barrier layer 72 with showing.Mask 74 is typically made by etching mode, and is in order to form the first road mask of phase change element 52,54.Fig. 8 and 9 shows photoresistance oxygen gas plasma shearing procedure, and to generate less mask 76, it has first size 78, the width 60 of this first size corresponding diagram 1.In the present embodiment, first size 78 is about 40 nanometers, and much smaller than the minimum offset printing characteristic size in order to formation mask 74, it is typically 200 nanometers.First size 78 is preferably between about 10 to 50 nanometers, and is not more than about 40 nanometers more.
Figure 10 and 11 shows the part that etch layer 72 is not covered by less mask 76, then removes mask 76.Figure 12 shows the result of etching phase-change material layer 70A.These steps and in order to reduce the selectivity sidewall etch step of side wall dimensions have caused the first phase change element structure 80 and first barrier layer structure 82, and its shape is identical with less mask illustrated in fig. 11 76.
The simplification profile of Figure 13 for being done along line 13-13.Figure 13 A shows the structure of Figure 13, the selectivity sidewall etch step of being carried out at phase change element structure 80, to generate through etched side wall construction 80A, its horizontal size 81 is less than the horizontal size of structure 82, and the horizontal size of structure 82 typically is about 40 nanometers.Figure 13 B illustrates the structure of Figure 13 A and carries out the deposition of a barrier layer 84B to generate the result in cavity 85.The insulation effect of phase change element structure 80A has been strengthened in cavity 85, and helps to reduce needed phase change electric current, and then improves element function.
Figure 14 and 15 shows the result of several processing steps.The typical case is deposited on the exposed parts of structure 82,80 and upper surface 38 by second barrier layer 84 that silicon nitride constituted.Typically by as first separate layers 86 that oxide constituted such as silicon dioxide, be deposited on second barrier layer 84, the thickness of layer 86 is about 300 nanometers in the present embodiment.Typically the second photoresistance mask 88 that is formed by the offset printing mode is formed on first separate layer 86.Mask 88 has first, second, third open area 90,92,94, and it extends downward first separate layer 86.
Figure 16 shows the result of oxide etching step, and wherein the part of first separate layer 86 is removed, and so that open area 90,92,94 is extended downwardly into second barrier layer 84, stays through etched first separate layer 87.Figure 17 shows the result after mask 88 removes.
Figure 18 and 19 shows the result of structure behind suitable sidewall shearing procedure of Figure 17, to reduce the side wall dimensions 95 through etching first separate layer 87.This step living one approaches and through etched first separate layer 89, its thickness is preferably about 20 to 150 nanometers in fact less than minimum offset printing characteristic size, and is more preferred from about 60 nanometers.This technology can be utilized and comprise hydrofluoric acid dipping or 193 nanometer steppers and be similar to known mask and prune technology.The length 56 of size 95 corresponding phase change elements 52,54.
Figure 20 shows the suitable etching technique with the composition that is applicable to each layer, the result of etching second barrier layer 84, first barrier layer structure 82 and the first phase change element structure 80.In the present embodiment, approach and act as the mask of etch layer 84,82,80 through etched first separate layer 89.This step has caused the generation of first and second phase change element 52,54.
The structure that Figure 21 shows Figure 20 electrically contacts reinforcement material 102 (being typically titanium nitride) in deposition, follows the result of deposits conductive material 104 (being typically tungsten).Layer 1 02 is in order to strengthen electrically contacting between electrode 42,44,46 and phase change element 52,54.The cmp step then in order to generate the structure shown in Figure 22 and 22A, comprises surface 105 and electrode 42,44,46.Each electrode 42,44,46 comprises that reinforced layer 102 is formed to electrically contact reinforcing element 108 from electric conducting material 104 formed metallic conductor elements 106 and from electrically contacting.
Figure 22 B shows alternate embodiment, and wherein phase-change material layer 110 is deposited on the sidewall 112 of etch structures, to surface 38, please refer to Figure 20 from element 89 simultaneously.Afterwards, electrically contacting reinforced layer 102 is deposited in the open area 90,92,94, as described in Figure 21 and 22 with electric conducting material 104.The embodiment of Figure 22 C is similar to the embodiment of Figure 22 B, but layer 110 has covered surface 38 simultaneously.In two embodiment, layer 110 helps to improve phase change element 52,54 and interelectrode insulation effect.This step helps to reduce phase change element 52,54 needed switching currents, and then improves element function.
As shown in figure 23, second separate layer 64 is applied on the surface 105, and through hole 66 forms and pass layer 64, with contact to second electrode 44.Second conductive material layer then puts on the layer 64, to generate bit line 62 on layer 64.The phase change device 10 that is generated is shown in Fig. 1 and figure.
Another alternate embodiment is discussed with reference to Figure 26-38.The preliminary production step of this embodiment is identical with Fig. 1-4.Figure 26 shows the similar structure with Fig. 5, but has comprised substrate separate layer 112 (between upper surface 38 and phase-change material layer 70) simultaneously and gone up separate layer 114 (between layer 70 and 72).Two compartment layer 112,114 typically is made of silicon dioxide.Other also can be used among the two compartment layer 112,114 as materials such as SiN.Figure 27 is similar to Fig. 6, and comprises that mask 74 is deposited on the layer 72.The vertical view of Figure 27 is identical with Fig. 7.Figure 28 is similar to Fig. 8, the shearing procedure that mask 74 is shown with or less mask 76, its vertical view is identical with Fig. 9.Figure 29 is similar to Figure 10, and the result of etch stop layer 72 is shown, and generating through etched barrier layer 71, and removes mask 76.The vertical view of Figure 29 is identical with Figure 11.Figure 30 is similar to Figure 12, and the result of etching separate layer 114 and phase-change material layer 70 is shown, and then removes through etch stop layer 71.This step has caused through etched substrate separate layer 116 and phase change element structure 80.
Figure 31 show second barrier layer 84 (being typically silicon nitride) be deposited on layer 116, structure 80, with the result of layer on 112.Afterwards, shown in figure 32, mask 88 (typically being silicon nitride) is formed on the layer 84, wherein is formed with open area 90,92,94.Vertical view is identical with Figure 15.As shown in figure 33, layer 84 and layer 116 part that is positioned under the open area 90,92,94 are removed, and then remove mask 88, stay separate layer 120 on etched barrier layer 118 and deep etching.Figure 34 shows and stacks the material that is etched under the open area 90,92,94, pass substrate separate layer 112 and arrive the result of the upper surface 38 of layer 40.This step generates through etch substrate separate layer 124, and phase change element 52,54 is separate on upper surface 38, and therefore separates on memory cell access layer 12.Barrier layer 118 is positioned at the part on the phase change element 52,54, act as the protection cover layer when etch substrate separate layer 112.
Figure 35 shows and electrically contacts reinforced layer 126 (being typically titanium nitride) and be deposited on result on upper surface 128, sidewall 130 and the upper surface 38 of Figure 34 structure.Figure 36 shows deposition oxide 132 (SiO for example
2), then carry out cmp to generate surface 134 result.Afterwards, oxide or other separate layers 136 are deposited on the upper surface 134, as shown in figure 37.Through hole 138 forms and passes oxide skin(coating) 136 and 132, then metallizes, and typically forms tungsten plug 140 among through hole 138.Metal level 142 has covered oxide skin(coating) 136 and contact embolism 140.The phase-change memory 10 that is generated as shown in figure 38.
The embodiment of memory cell has comprised and used the phase change storage medium in phase change element 52,54, comprises chalcogenide materials and other materials.Chalcogenide comprises any in the following quaternary element: oxygen (O), sulphur (S), selenium (Se) and tellurium (Te), the part of VI family on the forming element periodic table.Chalcogenide comprises the more electropositive element of a chalcogen and one or combined with radical and gets.The chalcogen compound alloy comprises chalcogen compound is combined with other materials such as transition metal etc.The chalcogen compound alloy generally includes the element that is selected from the periodic table of elements the 6th hurdle more than, for example germanium (Ge) and tin (Sn).Usually, more than one compound in the column element under the chalcogen compound alloy comprises: antimony (Sb), gallium (Ga), indium (In) and silver (Ag).Many with phase transformation turn to the basis storage medium in technological document, be described, comprise following alloy: gallium/antimony, indium/antimony, indium/selenium, antimony/tellurium, germanium/tellurium, germanium/antimony/tellurium, indium/antimony/tellurium, gallium/selenium/tellurium, tin/antimony/tellurium, indium/antimony/germanium, silver/indium/antimony/tellurium, germanium/tin/antimony/tellurium, germanium/antimony/selenium/tellurium and tellurium/germanium/antimony/sulphur.In germanium/antimony/tellurium alloy family, can attempt large-scale alloying component.This composition can following feature formula be represented: Te
aGe
bSb
100-(a+b)
A researcher has described the most useful alloy and has been, average tellurium concentration included in deposition materials is far below 70%, typically be lower than 60%, and the tellurium content range in the alloy of general type is from minimum 23% to the highest by 58%, and best for to obtain tellurium content between 48% to 58%.It is about 5% that the concentration of germanium is higher than, and its average range in material generally is lower than 50% from minimum 8% to the highest by 30%.Best, the concentration range of germanium is between 8% to 40%.Remaining main component then is an antimony in this composition.Above-mentioned percentage is atomic percent, and it is 100% for all constituent elements summation.(Ovshinky ' 112 patents, hurdle 10～11) comprises Ge2Sb2Te5, GeSb2Te4 and GeSb4Te7 by the specific alloy that another researcher assessed.(Noboru Yamada; " Potential of Ge-Sb-Te Phase-changeOptical Disks for High-Data-Rate Recording "; SPIE is v.3109; pp.28-37 (1997)) more generally; transition metal such as chromium (Cr), iron (Fe), nickel (Ni), niobium (Nb), palladium (Pd), platinum (Pt) and above-mentioned mixture or alloy; can combine with germanium/antimony/tellurium to form the phase change alloy, it includes programmable electrical resistance property.The specific examples of spendable storage medium, as described in Ovshinsky ' 112 patent intermediate hurdles 11-13, its example is listed reference at this.
The phase change alloy can switch for general amorphous first configuration state and between for second configuration state of general crystalline solid state at material according to its sequence of positions in this element active channel zone.These materials are at least Bistable." amorphous " speech refers to more inordinate relatively structure, and it is than monocrystalline property more out of order, and has detectable feature, as the resistance value higher than crystalline state." crystalline state " refers to structure relatively more orderly, and therefore it include detectable feature, for example lower than amorphous state resistance value than amorphous state orderliness more.Typically, phase-transition material can switch to all detectable different conditions between complete crystalline state and the complete amorphous state by electricity.Other are subjected to the change of amorphous state and crystalline state and comprise atom order, free electron density and activation energy among the material spy that influences.This material is changeable to become different solid-state or changeable becoming by two or more solid-state formed mixtures, provides from amorphous state to the grey exponent part between the crystalline state.Electrical property in this material also may change thereupon.
The phase change alloy can switch to another phase from a kind of phase by applying electric pulse.The previous observation point out, short, pulse is by a relatively large margin tended to phase with phase-transition material and changed over and be roughly amorphous state.Long, tend to phase with phase-transition material than the pulse of low amplitude and change over and be roughly crystalline state.Short, the energy in the pulse is enough big by a relatively large margin, therefore is enough to destroy the bond of crystalline texture, enough simultaneously shortly therefore can prevent that atom is arranged in crystalline state once more.Do not having under the situation of inappropriate experiment, can determine to be specially adapted to the suitable pulsed quantity varied curve that specific phase changes alloy.At the further part of this paper, this phase-transition material should be understood with the GST designate simultaneously, also can use the phase-transition material of other types.Described in this article a kind of material that is applicable among the PCRAM is Ge
2Sb
2Te
5
The present invention illustrates with reference to phase-transition material.Yet, also can use other storage mediums (being sometimes referred to as programmable material).As employed among the present invention, storage medium is its electrical property such as resistance etc., can be by applying energy the changer.This change can be that ladder sexually revises or sequential change, or is the combination of the two.
Other the programmable storage medium that can be used among other embodiment of the present invention comprises doping N
2GST, Ge
xSb
y, or other change the material that decides resistance with different crystalline states; Pr
xCa
yMnO
3, PrSrMnO, ZrO
x, TiO
x, NiO
x, WO
x, the SrTiO through mixing
3Or other utilizes electric pulse to change the material of resistance states; Or other uses electric pulse to change the material of resistance states; Tetra cyanogen subculture dimethyl benzene quinone (7,7,8,8-tetracyanoquinodimethane, TCNQ), (methanofullerene 6 for methane fullerene 66 phenyl C61 methyl butyrates, 6-phenyl C61-butyric acid methyl ester, PCBM), TCNQ-PCBM, Cu-TCNQ, Ag-TCNQ, C60-TCNQ, the TCNQ that mixes with other material or any other polymeric material its include bistable state or the multistable Resistance states of controlling with electric pulse.Other examples of programmable resistance storage medium comprise GeSbTe, GeSb, NiO, Nb-SrTiO3, Ag-GeTe, PrCaMnO, ZnO, Nb
2O
5, Cr-SrTiO
3
About extraneous informations such as the manufacturing of phase change random access storage device, element material, use, operations, please refer to U.S. patent application case No.11/155,067, the applying date is 2005/1/17, and denomination of invention is " Thin Film Fuse Phase Change Ram andManufacturing Method ".
The advantage of embodiment of the present invention comprises, contacts with better electrical between phase change element at electrode.In addition, use a heat insulator between electrode and phase-transition material, strengthened the thermal insulation effect between electrode and phase change element.The length of phase change element, width, with the restriction of thickness, the volume of guaranteeing phase change element is less than the cube in order to the minimum offset printing characteristic size that forms phase change memory cell.Therefore, the electric current that is used to reset and programme is restricted in the small volume, has allowed with low rank, reset current position and low rank, replacement energy position, and has realized higher current density and localized heating effect.
Though the present invention is described with reference to preferred embodiment, should institute be appreciated that the present invention is not limited to the content of its detailed description.Substitute mode and alter mode advise in formerly describing, and other substitute modes and alter mode will can be expected for those skilled in the art.Particularly, according to structure of the present invention and method, all have be same as in fact member of the present invention in conjunction with and realize the identical result in fact with the present invention, neither disengaging spiritual category of the present invention.Therefore, all these substitute modes and alter mode are intended to drop in the category that appending claims and equivalent thereof of the present invention define.
Any patent application of mentioning in preamble and open text are all classified the application's reference as.
Claims (36)
1. phase-change memory comprises:
The memory cell access layer; And
Memory cell layers, it optionally is connected to this memory cell access layer, and this memory cell layers comprises the phase change memory cell that forms in the offset printing mode, and this memory cell comprises:
First and second electrode, it has respectively relatively and first and second contact element of separating;
Phase change element, it and is electrically connected to each other this first and second contact element between this first and second contact element;
This phase change element comprises width, length and thickness, and this linear measure longimetry is between this first and second contact element, and this width measure direction vertical with this length; And
Each this length, thickness, with width less than in order to form the minimum offset printing characteristic size of this phase change memory cell.
2. device as claimed in claim 1, wherein this second electrode comprises the metal plug element, it is connected to this second contact element and separates with this second contact element.
3. device as claimed in claim 2, wherein this contact element comprises the titanium nitride layer, it extends between this phase change element and this metal plug element.
4. device as claimed in claim 1, wherein this phase change element is arranged at and is abutted to this memory cell access layer place.
5. device as claimed in claim 1, wherein this phase change element is arranged at this memory cell access layer and separates part.
6. device as claimed in claim 5, wherein this phase change element is separated with oxide and this memory cell access layer.
7. device as claimed in claim 1, wherein this memory cell layers is included in the reinforcement material that electrically contacts between those electrodes and this phase change element, to strengthen electrically contacting between those electrodes and this phase change element.
8. device as claimed in claim 7, wherein this contact reinforcement material comprises titanium nitride.
9. device as claimed in claim 1, wherein this memory cell layers is included in the heat insulator between those electrodes and this phase change element, to strengthen the thermal insulation between those electrodes and this phase change element.
10. device as claimed in claim 1, wherein this memory cell layers comprise electrically contact reinforcement material, and heat insulator electrically contact between the reinforcement material in those electrodes and this phase change element and this, to strengthen the thermal insulation between those electrodes and this phase change element and to electrically contact.
11. device as claimed in claim 1, wherein this phase change element has two solid-state phases of reversibly bringing out by electric current.
12. device as claimed in claim 1, wherein this phase change element has two solid-state phases of reversibly bringing out by applying voltages to more than one this electrode.
13. device as claimed in claim 1, wherein this phase change element has at least two solid-state phases, and it comprises roughly amorphous phase and roughly crystalline phase.
14. device as claimed in claim 1, wherein this phase change element comprises storage medium, and this storage medium comprises alloy, it comprise germanium, antimony, with the combination of tellurium.
15. device as claimed in claim 1, wherein this phase change element comprises storage medium it comprises alloy, this alloy comprise two or more than be selected from the combination of following group material: germanium, antimony, tellurium, selenium, indium, titanium, gallium, bismuth, tin, copper, palladium, lead, silver, sulphur and gold.
16. device as claimed in claim 1, wherein this first and second electrode comprises and is selected from an element of following group: titanium, tungsten, molybdenum, aluminium, tantalum, copper, platinum, iridium, lanthanum, nickel, ruthenium and alloy thereof.
17. device as claimed in claim 1 wherein should about 200 nanometers of minimum offset printing characteristic size.
18. device as claimed in claim 1, wherein this length is between about 10 to 100 nanometers.
19. device as claimed in claim 1, wherein this length is not more than about 60 nanometers.
20. device as claimed in claim 1, wherein this width is between about 10 to 50 nanometers.
21. device as claimed in claim 1, wherein this width is not more than about 40 nanometers.
22. device as claimed in claim 1, wherein this thickness is between about 10 to 50 nanometers.
23. device as claimed in claim 1, wherein this thickness is not more than about 20 nanometers.
24. the method in order to the manufacturing phase-change memory comprises:
Form the memory cell access layer on substrate, this memory cell access layer comprises access device and upper surface;
Form memory cell layers, it optionally is connected to the memory cell access layer, and this memory cell layers comprises the phase change memory cell that forms in the offset printing mode, and this memory cell comprises:
First and second electrode, it has respectively relatively and first and second contact element of separating;
Phase change element, it places between this first and second contact element, and this first and second contact element is electrically connected to each other;
This phase change element comprises width, length and thickness, and this linear measure longimetry is between this first and second contact element, and this width measure direction vertical with this length; And
This memory cell layers forms making of step:
The volume of this phase change element is less than the cube in order to the minimum offset printing characteristic size that forms this phase change memory cell; And
Contact area between this phase change element and this first contact element is defined by the width and the thickness of this phase change element, less than the quadratic power of this minimum offset printing characteristic size.
25. method as claimed in claim 24, wherein this memory cell layers forms step and comprises reducing and be used for this memory cell layers and form the employed mask size of step, makes at least one of this length of this phase change element and width less than this minimum offset printing characteristic size.
26. method as claimed in claim 24, wherein this memory cell layers forms step and comprises and carry out wet etching process with at least one of this width of definition part part and this length at least.
27. method as claimed in claim 21, wherein this memory cell layers formation step comprises, covers at least one part of this contact element with heat insulator.
28. method as claimed in claim 27, wherein this contact element covering step is utilized phase-transition material and is carried out.
29. method as claimed in claim 24, wherein this memory cell layers formation step comprises, forms to electrically contact reinforcement material between this first and second contact element and this phase change element, with electrically contacting of reinforcement and this phase change element.
30. method as claimed in claim 29, wherein this memory cell layers formation step comprises at least one part that covers this contact material with heat insulator.
31. method as claimed in claim 28 comprises that also use and this phase change element identical materials are as this contact material.
32. the method in order to the manufacturing phase-change memory comprises:
Form the memory cell access layer on substrate, this memory cell access layer comprises access device and upper surface;
Sediment phase change formed material layer is on this upper surface;
Deposit first barrier layer on this phase-change material layer;
Forming first is masked on this first barrier layer;
Reduce this first means of mask dimensions, dwindle mask to generate first, it has first size, and this first size is less than the minimum offset printing characteristic size that forms at this first mask in the step;
This first barrier layer of etching first is not dwindled the part that mask covers by this, to expose this upper surface and to generate first barrier layer structure;
Remove this and first dwindle mask;
The part that this phase-change material layer of etching is not covered by this first barrier layer structure is to generate the first phase change element structure;
Deposit second barrier layer on this first phase change element structure and this upper surface;
Deposit first separate layer on this second barrier layer;
Forming second is masked on this first separate layer;
The part that this first separate layer of etching is not covered by this second mask;
Remove this second mask;
The size of reducing this first separate layer is to generate the first less separate layer, and it has second size, and this second size forms this minimum offset printing characteristic size of step less than this second mask;
Be etched down to this upper surface at all material that is not covered by this less first separate layer, stack to generate first and second material that extends from this upper surface, this first and second material stacks and comprises first and second separate phase change element;
Cover to electrically contact reinforcement material that those materials stack and this upper surface;
Coating electric conductors electrically contacts on the reinforced layer to generate electrode in this, and those electrodes electrically contact reinforcement material by this and contact to this phase change element;
Being coated with second separate layer stacks in those electrodes and those materials;
Form through hole and pass this second separate layer so that the selected person in those electrodes is formed opening; And
Be coated with second electric conducting material on this second separate layer with this through hole in.
33. method as claimed in claim 32 also is included in this and electrically contacts before the reinforcement material covering step, sediment phase change formed material layer stacks in this first and second material.
34. method as claimed in claim 32 also is included in this and electrically contacts reinforcement material and cover before the step, sediment phase change formed material layer in this first and second material stack with this upper surface on.
35. the method in order to the manufacturing phase-change memory comprises:
Form the memory cell access layer on substrate, this memory cell access layer comprises access device and upper surface;
Deposition end separate layer is on this upper surface;
Sediment phase change formed material layer is on this end separate layer;
Separate layer is on this phase-change material layer on the deposition;
Deposit first barrier layer on separate layer on this;
Deposition first is masked on this first barrier layer;
Reduce this first mask to generate the first less mask, it has first size, and this first size forms the minimum offset printing characteristic size of step less than this first mask;
This first barrier layer of etching is not by the part that this less mask covered, to generate first barrier layer structure;
Remove this less mask;
Do not carried out etching at separate layer on this and this phase-change material layer, to generate through the etched separate layer and the first phase change element structure of going up by the part that this first barrier layer structure is covered;
Remove this first barrier layer structure;
Deposit second barrier layer in this on separate layer in the etching and this first phase change element structure and this upper surface;
Forming second is masked on this second barrier layer;
The part that this second barrier layer of etching is not covered by this second mask is to generate through etched barrier layer;
Remove this second mask;
Be etched down to this upper surface at all material that is not covered by this less first separate layer, stack to generate first and second material that extends from this upper surface, this first and second material stacks and comprises first and second separate phase change element;
Cover those materials and stack and this upper surface to electrically contact reinforcement material, make this electrically contact the reinforcement material contact to those phase change elements;
Apply second separate layer and electrically contact reinforcement material and those materials stack in this;
Form through hole and pass this second separate layer, produce opening this is electrically contacted reinforcement material; And
The coating electric conducting material is on this second separate layer and in this through hole.
36. method as claimed in claim 35, wherein this second separate layer applies step and comprises the barrier material that deposits first quantity, then carry out one and have an even surface metallization processes on this barrier material of this first quantity, and the barrier material that then deposits second quantity.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US75878406P | 2006-01-13 | 2006-01-13 | |
| US60/758,784 | 2006-01-13 |
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| CN101075630A true CN101075630A (en) | 2007-11-21 |
| CN101075630B CN101075630B (en) | 2010-08-04 |
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| CN2007100022104A Expired - Fee Related CN101075630B (en) | 2006-01-13 | 2007-01-12 | Phase change memory device and manufacturing method |
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| CN (1) | CN101075630B (en) |
| TW (1) | TWI339889B (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102487120A (en) * | 2010-12-03 | 2012-06-06 | 中芯国际集成电路制造(北京)有限公司 | Formation method of phase change random access memory (PCRAM) |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6456525B1 (en) * | 2000-09-15 | 2002-09-24 | Hewlett-Packard Company | Short-tolerant resistive cross point array |
| CN1300839C (en) * | 2004-08-06 | 2007-02-14 | 中国科学院上海微系统与信息技术研究所 | Process for preparing nano electronic phase change storage |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102487120A (en) * | 2010-12-03 | 2012-06-06 | 中芯国际集成电路制造(北京)有限公司 | Formation method of phase change random access memory (PCRAM) |
| CN102487120B (en) * | 2010-12-03 | 2014-03-12 | 中芯国际集成电路制造(北京)有限公司 | Formation method of phase change random access memory (PCRAM) |
Also Published As
| Publication number | Publication date |
|---|---|
| CN101075630B (en) | 2010-08-04 |
| TWI339889B (en) | 2011-04-01 |
| TW200735330A (en) | 2007-09-16 |
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