CN101072082A - Transmission method - Google Patents

Abstract

A transmission method, whereby data of different classes are transmitted and whereby different reliability positions exist, whereby the bits of the different classes are mapped to respective reliability positions.

Description

Transmission method

The application is dividing an application of following application: international application: on October 2nd, 2002; International application no: PCT/EP02/11094; National applications number: 02820456.5; Denomination of invention: " transmission method ".

Technical field

The present invention relates to a kind of on the reliability position method of allocation bit, this reliability position relates to probability, i.e. the probability that will correctly be transmitted of bit on a reliability position.This processing procedure is also referred to as the priority mapping.

Background technology

For communication system, it is a very important aspect that high message transmission rate is provided.Under the situation of mobile communication system, this connects down link is particular importance, and down link means the connection from the base station to the terminal.Insert (High Speed Downlink Packet Access, i.e. HSDPA) for the so-called high-speed downlink packet of UMTS (global system for mobile communications) and be developed, it provides 10.8Mbps the peak data rate of (MBPS).

The HSDPA data channel is the improvement to existing UMTS downlink sharied signal channel (DSCH) basically.HSDPA allows under 16 the situation to carry out up to the sign indicating number of 15 sign indicating numbers multiplexing to different users or mobile radio station.Main multiple access is in time domain, and different user is arranged by each Transmission Time Interval (TTI) in time domain, and this time interval is corresponding to 3 UMT time slots, that is, and and 2ms.Simultaneously, distribute to a user the sign indicating number number can change for each different TTI.According to the load and the channel condition of system, base station or Node B are adjusted its modulation and encoding rate to each user.Encoding rate is called as MCS (modulation and coded system) grade with a definite combination of modulating the two.Can change in this MCS grade of each TTI.This is determined based on feedback information or channel quality information (CQI) from user terminal or mobile radio station by the base station, and these information produce in being measured by channel condition.Channel quality information periodically sends, and the scope in its cycle is 1-80 TTI.

For reaching high data rate, use a kind of modulation and coded system that allows high information bit rate/code word.Therefore, use so-called higher modulation technique, this modulation technique makes bit number that a symbol comprises more than 2.An example is 16QAM (quadrature amplitude modulation).For these modulation techniques, each independent position of a bit in the symbol is not protected comparably.Therefore, attempt is mapped to significant bits and is subjected to the position protected preferably, and less important bit is mapped to the position of being protected by inferior strategic point.This is called as the mapping of bit priority power, and will use the example of HSDPA to elaborate in the back.In addition, for chnnel coding, used the so-called Turbo code of code check (rate) R=I/3.This code check is represented the ratio of total bit number to load or systematic bits number.

1.1HSDPA coding strand (referring to Fig. 1 and Fig. 2)

It was suggested the mapping of bit priority power is included in the current HSPDA coding strand, investigated with reference to Fig. 1 below.

The output of Turbo encoder (Turbo Enc) is made up of three bit classifications in this case: comprise systematic bits and two groups of Parity Check Bits (parity check 1 bit and parity check 2 bits) of load or real information, Parity Check Bits is used for error correction.Data are fed to the first code check matching unit (first code check coupling), have experienced first code check coupling at this this Parity Check Bits.These data are stored in a virtual I R (incremental redundancy) buffer (virtual I R buffer) before being fed to the second code check matching unit (second code check coupling), experience second code check coupling (RM Sys in this all bit classification, RM P1_2, RMP2_2).

Each output through the bit classification of code check coupling is imported into mapping of a bit priority power and interleave unit (bit priority is weighed mapper and interleaver), these different input data (be systematic bits and not on the same group Parity Check Bits) be admitted to the Bit Allocation in Discrete unit (Bit Allocation in Discrete, DU).After Bit Allocation in Discrete cells D U, before being mapped to physical channel, these bits interweave (according to Release R99 and (32 * 30) interleaver (R99 Intlv (32 * 30)) with interleave unit

In Bit Allocation in Discrete cells D U, carry out so-called priority mapping.To more understand following content by the priority mapping:

If adopt than the higher modulation system of QPSK (orthogonal phase shift phase keying), then mean and compared the more bits into symbol that is encoded with QPSK, different bit positions has different reliabilities, as can be seen from Figure 2, has described four 16QAM modulation systems among the figure.Each of 16 combined values of real part and imaginary part is called as a symbol and represents a bit sequence.For all conformations (constellation), the order of bit mapping is i ₁q ₁i ₂q ₂Difference between mode a-d only is the value of real part is assigned to i ₁And i ₂, and the value of imaginary part is assigned to q ₁And q ₂Clearly, the change of value wherein between 0-1 occurs in the bit position of the boundary of quadrant, and the bit position that occurs within the quadrant compared with the change of wherein value can obtain better protection.Therefore, according to bit mapping order, for example MSB (higher bit) can be subjected to better protection than LSB (lowest bit).

The difficulty of the position of determining in the symbol has appearred bit is assigned to now.Exist the bit classification of different priority for the Turbo encoder, i.e. their correct reception is not of equal importance.These different bit classifications are aforementioned systematic bits and parity check 1 bit and parity check 2 bits that have than low priority with highest priority.Therefore, systematic bits preferably is assigned to the position of high reliability.The detailed description of the distribution method of Shi Yonging can find in the 2nd joint up to now.

After Bit Allocation in Discrete, carry out interleaving treatment according to the rule of using in the UMTS standard.

2. Bit Allocation in Discrete unit (referring to Fig. 3 and Fig. 4)

This joint concentrated discussion Bit Allocation in Discrete unit (DU), this still will explain in conjunction with HSDPA.In [1], be proposed in the additional afterwards Bit Allocation in Discrete unit that allows the mapping of bit priority power of HARQ (mixed automatic retransmission request) functional (functionality).In Fig. 3, describe the Bit Allocation in Discrete unit of current use in detail.The Bit Allocation in Discrete unit is essentially an interleaver, and line number wherein is corresponding to the bit number in every symbol.The stream of systematic bits is at first write the form of embarking on journey at the 1st row and the 2nd row, and two streams of 1 bit of parity check afterwards and parity check 2 bits alternately write remaining areas, and promptly preferably the 3rd row and the 4th is gone.Can both be contained in the situation of the 1st row and the 2nd row in not every systematic bits, systematic bits also can write the 3rd row and the 4th row.This situation is handled below.

The data that will carry out interleaving treatment afterwards are output as the form of row.

The Bit Allocation in Discrete unit is as described below in [1]:

Interleaver is read in with meeting delegation in data delegation, and row connect a row ground [by reading] and go out interleaver.For execution priority mapping, at first be read into from the whole stream of the systematic bits of Turbo encoder, the back is followed by the bit that replaces of two odd-even checks streams.Fig. 3 has represented the 16-QAM bit allocation procedures of use code check for [R=] 1/2 yard.Should be noted that odd and even data stream alternately can read from the lower right corner of interleaver, so that systematic bits and Parity Check Bits can be from same symbols.

Therefore for R=1/2, all systematic bits can be placed on highly reliable position, and do not require and be the favourable distribution of systematic bits design under holding not on the high reliability position on the position of low reliability.

Yet according to the careful observation for the Bit Allocation in Discrete unit, significantly, for R ≠ 1/2, bit mapping becomes suboptimum because systematic bits also is in low reliability position now, promptly in this example in the third line and fourth line.Fig. 4 shows the example of R=3/4.Equally, the input and output of data are described similar with Fig. 3, difference is that the whole last third part of systematic bits can be mapped in the mode of bulk state on the bit position of low reliability in this case, and promptly adjacent bit is set on the adjacent position in allocation units.Can be mapped to high reliability bit positions in the mode of bulk state for R＜1/2, the first Parity Check Bits.In both cases, this being distributed on the frame is uneven fully, therefore produced weak link in decode procedure.Be further described with reference to Fig. 5 to high and the locational mapping of low reliable probability, Fig. 5 shows a Bit Allocation in Discrete cells D U:

Bit Allocation in Discrete cells D U can be represented by a r*c matrix, and wherein r represents that line number c represents columns.For the 16QAM modulation, line number is 4, and 4 bits form a symbol in the case.The selection of columns then wants to hold the bit number of expectation.These bits are fed to matrix by delegation with meeting delegation, follow Parity Check Bits then with the systematic bits beginning.Having filled up the position of systematic bits is marked by a hatched zone.As explained above, systematic bits may not be two row that adapt to the high reliability position of the top 16QAM of being mapped to just, goes but covered more than two row or be less than two.Connect the mode of delegation ground filling with delegation and combine, will cause above mentionedly shining upon by piece.

In the past, in German application 10150839.5, advised a kind of bit mapping mode, it is by using the similar code check Matching Algorithm should difficulty [2] to be used for that Bit Allocation in Discrete alleviated.This method is abolished above mentioned systematic bits on low securing position and Parity Check Bits disunity disadvantage of distributing separately on the high reliability position, and is provided at the more unified Bit Allocation in Discrete on each reliability position.Therefore, an algorithm similar to so-called code check matching algorithm is applied to systematic bits (bit of a classification) and Parity Check Bits are assigned in the bit stream (promptly will be mapped to the bit stream of high reliability and low reliability bits position in modulation at last) of high reliability and low reliability.

Yet this distribution method requires more complicated process to consider all possible combination of different modulation systems, bit rate, bit rate or the like.

In a word, discussed how with high reliability and the low reliability category of Bit Allocation in Discrete to 16QAM.Very simple allocation rule is arranged here, as [6] of Samsung suggestion, and [1] of advising by Motorola recently, yet these rules cause the piece of systematic bits to be mapped to the position of low reliability.Show this effect by independent emulation [2] and will reduce performance.Advised other allocation rule, these rules have realized the uniform distribution of the low belief system bit in total set of systematic bits, for example, and by using different code check matching ways [3].These rules have illustrated and can carry out in the mode preferably, but they are not too simple.

Summary of the invention

Based on the description of front, people face awkward situation, promptly or be that good Bit Allocation in Discrete mode requires the enforcement complexity of height or the enforcement complexity that the suitable method of salary distribution is only required appropriateness.The objective of the invention is to solve this awkward situation.

So the present invention also has another purpose to be to create the method for an allocation bit on different classes of position, it does not require the assigning process of high complexity but still the rational uniformity of Bit Allocation in Discrete can be provided.

Another aspect of the present invention has guaranteed the rational uniform distribution of bit on different reliability positions in the frame, thereby has avoided the weak spot that may occur in decode procedure.

Another aspect of the present invention is: compare with DE10150839.5 or [2], the present invention has simplified mapping ruler, but good performance is provided, thereby has defined good trading off between the complexity of performance and realization.Therefore, on the other hand, the invention provides the simple preferred plan that can reach more uniform Bit Allocation in Discrete and not increase the complexity of realization.

Can reach purpose of the present invention with a kind of method, the feature of this method is disclosed in the attached independent claims.To propose in the dependent claims favourable improvement of the present invention.

The present invention is based on the idea of writing rule that changes the Bit Allocation in Discrete unit, it according to:

Data are write interleaver by row with connecing row, and row are read from interleaver with connecing row.N up front _cIn the row, systematic bits is written into the 1st row to N _R+1OK, subsequently they be written into the 1st the row to Nr capable, wherein

$N_r=\left[\frac{N_{t,\mathrm{sys}}}{N_{\mathrm{col}}}\right],$

Promptly fully by N _{T, sys}The number of the row that the individual systematic bits that has been sent out (symbol of " square brackets " of use integer number next less or that equate for expression is rounded to downwards) is occupied, and

$N_c=(\frac{N_{t,\mathrm{sys}}}{N_{\mathrm{col}}}-N_r)\·N_{\mathrm{col}}=N_{t,\mathrm{sys}}-N_r\·N_{\mathrm{col}}$

N _{T, sys}Be the number of the systematic bits that sends, and N _ColBe defined as in [1]:

$N_{\mathrm{col}}=\frac{N_{\mathrm{trans}}}{{\log }_2\left(M\right)},$

N wherein _TransBe the bit of being encoded of will being sent out and code check coupling, and M is the number of modulation symbol constellation points, i.e. logz ₂(M) be the bit number of every symbol.

This mode prevents that block mode is mapped to inappropriate bit reliability, and does not require high realization complexity.

Brief summary:

N _{T, sys}Number for the systematic bits that sends

N _TransAdd the number of the Parity Check Bits of transmission for the systematic bits number that sends

N _rNumber for the row that taken by systematic bits

N _ColFor in delegation separately row or the total number of clauses and subclauses

N _cBe the number of row, described row have N _R+1Dimension, wherein dimension is defined as distributing to the entry number of systematic bits, i.e. N _R+1Individual clauses and subclauses are to distribute to the clauses and subclauses of systematic bits.

Description of drawings

Below with reference to the accompanying drawings, by the mode of preferred embodiment the present invention is described, wherein

Fig. 1 shows a schematic diagram of the parts of HSDPA coding strand.

Fig. 2 shows the 16QAM modulation system

Fig. 3 shows the example of the Bit Allocation in Discrete unit of 16QAM modulation system and code check R=1/2

Fig. 4 shows the example of the Bit Allocation in Discrete unit of 16QAM modulation system and code check R=3/4

Fig. 5 shows the traditional interleaver that is used for bit mapping treatment progress.Black matrix represent that with arrow dotted line delegation connects two kinds of different classes of bits that delegation writes interleaver (prior art).

Fig. 6 shows the use according to interleaver of the present invention

Embodiment

Detailed description of the present invention (Fig. 6)

Referring now to Fig. 6, wherein show a Bit Allocation in Discrete unit.

According to the Basic Ways of Bit distribution method of the present invention or that bit is mapped to the method for different reliabilities position is as follows:

For reference Fig. 1-5 be described according to the Bit distribution method of prior art and for the method for proposing, different classes of bit (being systematic bits and Parity Check Bits) is written into a Bit Allocation in Discrete cells D U after the code check coupling: under the situation of this unit at 16QAM, be made up of a structure that is similar to the 4*X block interleaver, this can be by a matrix notation.X represents columns.Yet, bit is not to be write by delegation as prior art with meeting delegation, neither be read out by row with connecing row, but some difference of their literary style: at first, the zone that is used for " interleaver " of systematic bits is determined, just as the mode in the interleaver that at first systematic bits is write a standard.This determine to be based in the interleaver or in corresponding matrix the calculating of number of entries, aforesaid (referring to " disclosure of an invention ").In the drawings, the number of clauses and subclauses or the zone in the matrix are by the cross hatched regions domain representation.Bit is not abreast but vertically is written into interleaver afterwards, and promptly row connect row, but only is written as in the zone that the bit of this specific classification keeps.Then, data are read by row with connecing row.This is shown among Fig. 6.

After bit map unit sense data, from the bit of the first half, promptly two row above are mapped to the high reliability bit, and are mapped to the bit of low reliability from the bit of Lower Half.

In one embodiment, the optimization of Bit Allocation in Discrete and the interleave function of HSDPA have been proposed.[1] compare and do not have additional complexity, and bit has been reduced with the negative effect that block mode is mapped to the position with unsuitable reliability.

In preferred an enforcement, used the interleaving scheme that describes in detail in [3].This permission makes great efforts to be issued to fabulous performance in minimum may realizing, this is confirmed by the comparison emulation of [4].

Clearly, promptly this scheme can change in several modes, comprises following manner for those skilled in the art:

The number of ■ row and/or row can change;

The different classes of bit number that ■ writes allocation units can change;

The number of the reliability that ■ is different can change (also can be to have the bit set that other is not the attribute of reliability);

■ should be noted that Bit Allocation in Discrete can not play a good interleaver simultaneously, and will follow other a interleaver.Realized as described in during this interleaver can as be used in the past;

■ can at first be gathered together from each Parity Check Bits of Turbo encoder, is written as the space that Parity Check Bits keeps by one afterwards with being listed as.

If only there is the bit of single reliability category in output, then this scheme also can be used.In the case, this suggestion is used to different classes of bit collection is arrived together, and they all output to same data flow.At this moment, for the reason of simplifying, bit mapper can randomly be organized into 4 row, but when one read with being listed as, all bits were output to an independent data flow certainly.This has also been avoided treatment step complicated of putting forward justice in [7].

In addition, this method can only not be applied to the turbo coded data, but can be applicable to all data especially, wherein different subclass is related to different preference.

This method also can be used for the kind of modulation that all are higher than QPSK.

Yet but this method also can be used to have identical priority be sent out data more than once.For example, for a bit, once transmission can be placed on the position of high reliability, and transmission next time then is placed on the position of low reliability, and is then opposite for another bit, therefore, increased the probability of correct reception.

Usually, the present invention can be applicable to any communication system or mobile radio telephone network, is used for the transfer of data between a central location (for example a Node B or a base station) and a terminal (for example travelling carriage).

Especially, the present invention can be applicable to the system according to the operation of UMTS standard.

3. reference

Notice that mentioned document provides the address by 3GPP (being third generation partner program): ETSI, Mobile Competence Centre, 650, route des lucioles, 06921 Sophia Antipolis Cedex, they are cited with the employed form of this tissue.

[1] R1-02-286, Motorola, " Enhancement of two-stage RateMatching Scheme for HS-DSCH (being used for the improvement of the two-stage code rate matching way of HS-DSCH) " Orlando, Florida, February 2002

[2] R1-01-1101, Siemens, " Details of IncrementalRedundancy by means of Rate Matching (by the details of the incremental redundancy of code check coupling) ", 3GPP TSG-RAN WG 1/WG 2 Ad Hoc on HSDPA, SophiaAntipolis, France, November, 2001

[3] R1-01-1231, Siemens, " Interleaver operation inconjunction with SMP (interleaver of operating with SMP) ", Jeju, Korea, November 19-23,2001

[4] R1-02-0081, Ericsson, " Comparison of differentinterleaving schemes (comparison of different interleaving scheme) ", Espoo, Finland, January, 2002

[5] 3GPP TSG RAN, " High Speed Downlink Packet Access:Physical Layer Aspects (high-speed downlink packet inserts: the physical layer situation) ", TSG-R1 Technical Report, TR25.858

[6] R1-02-0024, Samsung, " textual advice of Text proposal for SMP (SymbolMapping based on bit priority) SMP (based on the sign map of bit priority power) ", and Orlando, Florida, February 2002

[7] R1-02-0345, IPWireless, " HSDPA Bit Collection (HSDPA bit set) " Orlando, Florida, February 2002[notice that document itself states that improperly Espoo is the site of a meeting]

5. abbreviation is shown

Abbreviation:

The ARQ arq

The BCH broadcast channel

The BER BER

The BLER BLER(block error rate)

The BS base station

The CCPCH Common Control Physical Channel

The composite transport channel of CCTrCH coding

CFN Connection Frame Number code

The CRC CRC

The DCH dedicated channel

DL downlink (forward link)

The DPCCH Dedicated Physical Control Channel

The DPCH DPCH

The DPDCH Dedicated Physical Data Channel

The DS-CDMA direct sequence CDMA

The DSCH downlink sharied signal channel

The discontinuous transmission of DTX

The FACH forward access channel

The FDD Frequency Division Duplexing (FDD)

The FER FER (Floating Error Rate)

GF Galois field

The request of HARQ mixed automatic retransmission

The Dedicated Physical Control Channel that HS-DPCCH is associated with the high-speed down link transmission

The HS-DSCH high-speed downlink shared channel

The HS-PDSCH High-Speed Physical Downlink Shared Channel

The shared control channel of HS-SCCH high-speed downlink shared channel

The MAC medium receive control

Mcps million chip per seconds

The MS travelling carriage

OVSF orthogonal variable spreading factor (sign indicating number)

The parallel convolution code that connects of PCCC

The PCH paging channel

The PhCH physical channel

The PRACH Physical Random Access Channel

The RACH Random Access Channel

System's convolution coder of RSC recurrence

The RV redundancy versions

RX receives

The SCH synchronizing channel

The SF spreading factor

The SFN System Frame Number

SIR signal/interference ratio

SNR signal/noise ratio

The TF transformat

The TFC transformat combination

TFCI transformat combination indicating device

The control of TPC transmitting power

The TrCH transmission channel

The TTI Transmission Time Interval

The TX emission

UL up link (reverse link)

RAN WG1 Radio Access Network working group 1 (physical layer)

CR changes request

HI HS-DSCH indicating device

The HSDPA high-speed downlink packet inserts

MCS (modulation and encoding scheme)

Claims (10)

1. transmission method, different classes of data are sent out by this method, and have different reliability positions thus, thereby different classes of bit is mapped on the corresponding reliability position,

It has expressed certain sequence of a more than bit to transmit by a more than bit of symbolic formulation thereby-wherein data are modulated,

-described different classes of the data that wherein will be sent out comprise the bit of at least the first and second classifications,

-wherein said reliability position is represented by a position in the symbol, can place a bit on this position, and the reliability of described reliability position and transmission is linked,

-and have at least the different value of two described transmission reliabilities to exist, and

-the process that wherein a bit is mapped to the position in the symbol comprises the following steps:

A) set up one N is arranged _RowRow and N _ColThe matrix (DU) of row, this matrix (DU) has N _Row* N _ColIndividual clauses and subclauses can be placed a bit thus on each clauses and subclauses, wherein be linked with all clauses and subclauses of delegation and the same value of described transmission reliability;

B) determine the number N of a plurality of bits that will be sent out of the first bit classification _{T, sys}, and be these bits distribute respective number line by line in matrix clauses and subclauses,

Has N thereby distribute _R+1If the Nc row of dimension are and N _r＞0, then distribute the remaining N that has _rThe N of dimension _Co1-N _cRow,

N wherein _rColumns and 1＜N for the bit of fully being distributed to the first bit classification _c＜N _Col,

C) being calculated as follows of Nc:

$N_c=(\frac{N_{t,\mathrm{sys}}}{N_{\mathrm{col}}}-N_r)\·N_{\mathrm{col}}=N_{t,\mathrm{sys}}-N_r\·N_{\mathrm{col}},$ And $N_r=\left[\frac{N_{t,\mathrm{sys}}}{N_{\mathrm{col}}}\right],$ And if N _c=0 all row are assigned with N _rOK;

D) fill these clauses and subclauses of having distributed with the bit one of first category with being listed as.

2. the described method of claim 1, wherein this transmission reliability is that a bit is positioned over the reliability that can correctly be transmitted on the corresponding position.

3. arbitrary described method in the aforementioned claim 1 or 2, wherein the first bit classification comprises systematic bits.

4. arbitrary described method among the aforementioned claim 1-3, wherein the second bit classification comprises Parity Check Bits.

5. according to any the described method among the aforementioned claim 1-4, wherein said matrix column is mapped to a symbol.

6. method according to claim 1 is if described reliability is that effectively then the bit of one of this classification is mapped to a given reliability therefrom.

7. the described method of claim 1, wherein the bit in an independent classification is mapped to several reliabilities, and carries out in such a way, and promptly each bit is distributed to several reliabilities equably or almost evenly.

8. the described method of claim 1-7, it is suitable in a mobile wireless network data being sent to from the central location of network the terminal of described network.

9. the described method of claim 8, wherein mobile radio telephone network moves according to the UMTS standard.

10. Bit distribution method,

-wherein the bit of at least the first and second classifications is mapped to the different position in the symbol,

-position in this symbol is associated with the reliability of transmission thus,

-and at least two kinds of different values of this reliability existence,

-mapping process comprises the following steps: thus

A) set up one N is arranged _RowRow and N _ColMatrix (the N of row _Row* N _Col), so this matrix one total N _Row* N _ColIndividual clauses and subclauses are being associated with the same value of this transmission reliability with all clauses and subclauses in the delegation thus;

B) determine the number N of the bit of the first bit classification _{T, sys}, and in matrix, distribute corresponding entry number line by line,

Has N thereby distribute _R+1The preceding N of row _cIf row are and N _r＞0, then distribute to have N _rThe remaining N of row _Col-N _cRow, wherein

$N_c=(\frac{N_{t,\mathrm{sys}}}{N_{\mathrm{col}}}-N_r)\·N_{\mathrm{col}}=N_{t,\mathrm{sys}}-N_r\·N_{\mathrm{col}},$ And $N_r=\left[\frac{N_{t,\mathrm{sys}}}{N_{\mathrm{col}}}\right],$

If N _c=0 all row is assigned with N _rOK;

C) fill these clauses and subclauses of having distributed with the bit one of first category with being listed as.

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