CN101071981B - Voltage-rising DC/DC converter - Google Patents
Voltage-rising DC/DC converter Download PDFInfo
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- CN101071981B CN101071981B CN2006100783365A CN200610078336A CN101071981B CN 101071981 B CN101071981 B CN 101071981B CN 2006100783365 A CN2006100783365 A CN 2006100783365A CN 200610078336 A CN200610078336 A CN 200610078336A CN 101071981 B CN101071981 B CN 101071981B
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Abstract
The disclosed boost dc/dc converter includes the screened circuit, the switch type boost circuit, the pulse width modulation (PFM) circuit, and AND gate. Based on magnitude of load current, the screened circuit is in use for outputting mask signal. When system is in light load, medium load and heavy load, using the mask signal related to load current makes system possible to select operation in PFM mode, or in pulse frequency modulation mode, or in mixed pulse wave shield mode in order to reach purpose of optimized system effectiveness.
Description
Technical field
The present invention relates to a kind of boost type DC/direct current transducer (DC/DC converter), and be particularly related to a kind of boost type DC/direct current transducer of application pulse wave modulation tech.
Background technology
In power conversion system, when load variations, will cause the variation of incident power supply conversion efficiency, so we wish that still the system of this moment can provide high efficiency and stable power conversions at system's full load or when very big load variations is arranged.With regard to application, electronic products such as processor, random access memory, display and mobile phone etc. can't be in fully loaded state at any time, particularly mobile communication product such as mobile phone all is the battery saving mode that is in standby in many times, thus one high efficiency power conversion system can both be provided under any load condition is very important.
Fig. 1 is the circuit diagram of known boost type DC/direct current transducer 100, is having only under the situation of using the pulse-width modulation pattern, and transducer 100 comprises suitching type booster circuit 110, pulse-width modulation circuit 120 and load 130.Wherein suitching type booster circuit 110 comprises inductor 111, diode 112, capacitor 113, power transistor 114.The conducting that comes power switched transistor 114 by the mode of pulse wave modulation (PWM) whether.When power transistor 114 conductings, diode 112 presents reverse biased, from input voltage V
In1Electric energy be stored in inductor 111, this moment load 130 electric energy provide by capacitor 113.When power transistor 114 ended, diode 112 presented forward bias voltage drop, and this moment, capacitor 113 and load 130 absorbed by input voltage V
In1And the electric energy that provided of inductor 111, therefore make V
Out1＞V
In1
Pulse-width modulation circuit 120 is made up of the control feedback circuit, comprises error amplifier 121, triangular wave generator 122, pulse-width modulation comparator 123 and driver 124.The output voltage V of suitching type booster circuit 110
Out1In the process resistor R
1With resistor R
2Dividing potential drop after (this moment, its value was for V
Out1* R
2/ R
1+ R
2) again by error amplifier 121 and reference voltage V
Ref1Relatively, and pulse-width modulation comparator 123 receive error amplifiers 121 output signal and with the output signal of triangular wave generator 122 relatively, and produce pulse-width modulation signal PWM_CK.Pass through driver 124 afterwards again to amplify pulse-width modulation signal PWM_CK and driving power transistor 114.
Please refer to Fig. 2, it is the load current of boost type DC/direct current transducer 100 of Fig. 1 and the graph of a relation of system effectiveness, use under the pulse-width modulation pattern situation 100 of boost type DC/direct current transducers, boost type DC/direct current transducer 100 is at load current I as shown in Figure 2
L1The system effectiveness of (underloading) ratio is at load current I under the little situation
L1The system effectiveness of (heavy duty) is low under the big situation.This is because pulse-width modulation is to use the mode of fixed frequency to control, even and if power transistor 114 is still doing with the frequency that is same as heavy duty and switches thereby consume too much unnecessary power switched on power transistor 114 when underloading, therefore make that whole input power loss improves, and cause system effectiveness to reduce, so boost type DC/direct current transducer that can improve system effectiveness of design is necessary.
Summary of the invention
The purpose of this invention is to provide a kind of boost type DC/direct current transducer, its can system be in underloading, in carry and during heavy duty, make system can by corresponding to the shielded signal of load current with selection operation respectively in pulse-width modulation, pulse frequency modulated and mix in the pulse wave mask pattern, this kind boost type DC/direct current transducer can make the system effectiveness optimization to improve known boost type DC/direct current transducer system effectiveness situation on the low side when the underloading.
For reaching above-mentioned and other purpose, the present invention proposes a kind of boost type DC/direct current transducer, comprise suitching type booster circuit, pulse-width modulation circuit, screened circuit and with door.Wherein the suitching type booster circuit is in order to according to control signal, receives input voltage and output voltage is provided, and wherein output voltage is greater than input voltage.The pulse-width modulation circuit is in order to according to output voltage and reference voltage and the output pulse width modulating signal.Screened circuit is to export shielded signal in order to the size of the load current of the boost type DC/direct current transducer according to the present invention.Be in order to reception pulse-width modulation signal and shielded signal and export control signal that with door wherein the responsibility cycle of shielded signal can change with load current again.Screened circuit includes load sensor and shielded signal generator.Wherein load sensor is in order to according to load current and the output loading signal, and the shielded signal generator is then in order to produce shielded signal according to load signal.
Above-mentioned boost type DC/direct current transducer further comprises driver and bleeder circuit in one embodiment, and driver can will amplify to export the suitching type booster circuit to the control signal of door.Bleeder circuit comprises first resistor and second resistor, wherein first resistor is electrically connected on output voltage and second resistor is connected in first resistor with first end and with its second end ground connection, the contact of first resistor and second resistor also is electrically connected on the pulse-width modulation circuit.Bleeder circuit exports the pulse-width modulation circuit to after the output voltage of suitching type booster circuit can being reduced a preset ratio.
Above-mentioned boost type DC/direct current transducer, in one embodiment, the suitching type booster circuit comprises inductor, diode, capacitor, switch.Wherein inductor is electrically connected on input voltage, diode is electrically connected on inductor with anode, capacitor is electrically connected on the negative electrode of diode and output voltage with first end and with its second end ground connection, switch then is electrically connected between the anode of inductor and diode and with the second end ground connection with first end, and according to first end and second end of control signal conducting or stopcock.In one embodiment, switch is NMOS (n-channel Metal-Oxide-Semiconductor) transistor, and receives control signal with its grid.
The pulse-width modulation circuit includes error amplifier, triangular wave generator and comparator.Wherein error amplifier is to receive reference voltage with its first input end, and is electrically connected the dividing potential drop of output voltage with second input, exports after the voltage amplification with above-mentioned first input end to the second input again.The triangular wave generator is in order to the output triangular wave, and then comparator can be according to the comparative result of the output voltage of triangular wave and error amplifier, with the output pulse width modulating signal.Wherein when the voltage of the triangular wave output voltage greater than error amplifier, then comparator is the output logic high potential, otherwise comparator is with the output logic electronegative potential.
Above-mentioned boost type DC/direct current transducer, in one embodiment, load signal can be voltage signal, and load signal is the increasing function of load current.Moreover the shielded signal generator still includes delay chain and buffer, and wherein delay chain can produce digital signal according to load signal and frequency signal.And buffer can regularly capture digital signal, and produces shielded signal according to the digital signal of acquisition.
Above-mentioned boost type DC/direct current transducer, in one embodiment, above-mentioned buffer is an input/serial output state (parallel in/serial out register) arranged side by side.
Above-mentioned boost type DC/direct current transducer, in one embodiment, delay chain includes a plurality of delay cells, and wherein each delay cell all receives load signal.First delay cell can postpone frequency signal to export behind one Preset Time, exports behind the output delay Preset Time of i delay cell with i-1 delay cell, and wherein i is the integer greater than.Digital signal is the set of the output of above-mentioned delay cell, and Preset Time is the decreasing function of load current.
Above-mentioned boost type DC/direct current transducer, in one embodiment, the output that each delay cell is all regularly reset delay cell according to reset signal.And in the middle of the digital signal that buffer captured, numerical value is that 1 bit quantity is the increasing function of load current.The responsibility cycle of shielded signal is in the middle of the digital signal that buffer captured again, and numerical value is the increasing function of 1 bit quantity.If in the middle of the digital signal that buffer captured, numerical value be 1 bit quantity less than a default value, then buffer produces shielded signal in the pulse frequency modulated mode.
In boost type DC/direct current transducer of the present invention, when system is in heavy duty, then adopt the pulse-width modulation pattern, when system is in underloading, then adopt the pulse frequency modulated pattern, when system load is judged not to heavy duty or underloading when carrying in being, system then adopts mixes the pulse wave mask pattern.That is to say that it is to be pulse-width modulation, pulse frequency modulated or mixing pulse wave mask pattern that boost type DC/direct current transducer of the present invention can decide the pattern of shielded signal according to the size of load current.No matter that is system is during from heavy duty to underloading, all can adjust the switching times of power transistor by shielded signal, reducing the unnecessary power loss on power transistor, and reach the purpose that improves power supply conversion efficiency.
State with other purpose, feature and advantage and can become apparent on the present invention for allowing, preferred embodiment cited below particularly, and conjunction with figs. are described in detail below.
Description of drawings
Fig. 1 is known boost type DC/direct current transducer.
Fig. 2 is the load of known boost type DC/direct current transducer and the graph of a relation of efficient.
Fig. 3 is the schematic diagram of the boost type DC/direct current transducer of one embodiment of the invention.
Fig. 4 is the schematic diagram of shielded signal in one embodiment of the invention.
Fig. 5 is an Organization Chart within the shielded signal generator of one embodiment of the invention.
Fig. 6 is the schematic diagram of operating principle of the shielded signal generator of one embodiment of the invention.
Fig. 7 is the digital signal of one embodiment of the invention and the graph of a relation of load current.
Fig. 8 is one embodiment of the invention and operation chart door.
Fig. 9 is pulse-width modulation pattern, pulse frequency modulated pattern of one embodiment of the invention and the efficient schematic diagram that mixes pulse wave mask pattern three.
The main element description of symbols
100,300: boost type DC/direct current transducer
110,310: the suitching type booster circuit
111,311: inductor
112,312: diode
113,313: capacitor
114: power transistor
314: switch
130,380: load
120,320: the pulse-width modulation circuit
121,321: error amplifier
122,322: the triangular wave generator
123: the pulse-width modulation comparator
323: comparator
124,360: driver
330: screened circuit
331: load sensor
332: the shielded signal generator
3321: delay chain
3322: buffer
340: with door
350: bleeder circuit
R
1, R
3, R
2, R
4: resistor
PWM_CK: pulse-width modulation signal
DU
1～DU
n: delay cell
D
1～D
5: digital signal
S
Mask: shielded signal
I
L1, I
L3, I
L31, I
L32, I
L33, I
L34, I
L35: load current
S
C, d (t): control signal
S
L: load signal
Q: frequency signal
V
In1, V
In3: input voltage
V
Out1, V
Out3: output voltage
V
Ref1, V
Ref3: reference voltage
T
L: the acquisition time
T
RThe replacement time
Embodiment
The following stated please refer to Fig. 3 for one of the present invention embodiment.Fig. 3 is the boost type DC/direct current transducer 300 according to one embodiment of the invention, it comprise suitching type booster circuit 310, pulse-width modulation circuit 320, screened circuit 330, with door 340, bleeder circuit 350 and driver 360.
Suitching type booster circuit 310 can be according to control signal S
C, according to input voltage V
In3And provide output voltage V
Out3, and output voltage V
Out3Greater than this input voltage V
In3Pulse-width modulation circuit 320 can be according to output voltage V again
Out3Dividing potential drop (V
Out3* R
4/ (R
3+ R
4)) and reference voltage V
Ref3And output pulse width modulating signal PWM_CK.Screened circuit 330 can be according to load current I
L3With output shielded signal S
MaskCan receive pulse-width modulation signal PWM_CK and shielded signal S with door 340
Mask, and control signal d is provided (t).
In the present embodiment, suitching type booster circuit 310 includes inductor 311, diode 312, capacitor 313 and switch 314.Inductor 311 is electrically connected on input voltage V
In3, diode 312 is electrically connected on inductor 311 with anode, and capacitor 313 is electrically connected on the negative electrode and the output voltage V of diode 312 with first end again
Out3, and with its second end ground connection.Switch 314 is to be electrically connected between the anode of inductor 311 and diode 312 with first end, and with its second end ground connection, and according to the control signal S that is received
CAnd first end of conducting or stopcock 314 and second end.Switch 314 is nmos pass transistor (n-channel metal oxide semiconductor fieldeffect transistor) in the present embodiment, receives control signal S with its grid
CBecause of the circuit working situation of suitching type booster circuit 310 is similar to the suitching type booster circuit 110 of Fig. 1, so do not give unnecessary details at this.
Pulse-width modulation circuit 320 among the embodiment includes error amplifier 321, triangular wave generator 322 and comparator 323 again.Wherein error amplifier 321 is to receive reference voltage V with first input end
Ref3, and be electrically connected on output voltage V with its second input
Out3Dividing potential drop, again with above-mentioned V
Ref3With V
Out3The error voltage of dividing potential drop amplify back output.Triangular wave generator 322 is used to export triangular wave, and next comparator 323 will be according to the comparative result of the output of triangular wave and error amplifier 321, and output pulse width modulating signal PWM CK.Wherein when the voltage of the triangular wave output voltage greater than error amplifier, then comparator is the output logic high potential, otherwise comparator is the output logic electronegative potential, and vice versa.
Boost type DC/the direct current transducer 300 of present embodiment further comprises bleeder circuit 350 and driver 360.Bleeder circuit 350 comprises first resistor R
3And second resistor R
4And in order to output voltage V
Out3Multiply by a preset ratio R
4/ (R
3+ R
4) back so that V
Out3* R
4/ (R
3+ R
4) size be similar to reference voltage V
Ref3Size to export comparator 323 to.In bleeder circuit 350, resistor R
3Be electrically connected on output voltage V
Out3, resistor R
4Be electrically connected on first resistor R with first end
3, and with its second end ground connection.Resistor R wherein
3With resistor R
4Contact also be electrically connected on pulse-width modulation circuit 320.In present embodiment, in output voltage V
Out3With reference voltage V
Ref3When the two differed a lot of, bleeder circuit 350 just can be with output voltage V
Out3Carry out dividing potential drop so that output voltage V
Out3Dividing potential drop and reference voltage V
Ref3The value of the two is more or less the same to input to error amplifier 321.If output voltage V
Out3With reference voltage V
Ref3When the two was close, bleeder circuit 350 just can omit so.Driver 360 can be in order to being enlarged into control signal S from the control signal d (t) with door 340
CAnd export suitching type booster circuit 310 to.
Fig. 4 is the schematic diagram of shielded signal in the present embodiment.Shielded signal S
MaskCycle be T
1+ T
2, T wherein
1Be responsibility cycle.Responsibility cycle T
1Size be according to load current I
L3Size and determine, that is, load current I
L3Shielded signal S during rising
MaskResponsibility cycle T
1Also can and then become big.
Please refer to Fig. 5 and be Organization Chart within the shielded signal generator 332.Shielded signal generator 332 includes delay chain 3321 and buffer 3322, and wherein delay chain 3321 is the load signal S that provide according to by load sensor 331
LSize produces digital signal D with frequency signal Q
1～D
n(wherein n is the integer greater than 1).Hypothesis N=5 and buffer 3322 can regularly capture digital signal D in following examples
1～D
5, and buffer 3322 is according to the digital signal D that is captured
1～D
5And generation shielded signal S
MaskTo select the required shielded signal S of present system
MaskPattern be pulse-width modulation, pulse frequency modulated or mix pulse wave mask pattern thrin.The buffer 3322 of present embodiment is an input/serial output state arranged side by side.
Please refer to the schematic diagram of Fig. 6 for the operating principle of shielded signal generator 332.Above-mentioned delay chain 3321 includes 5 delay cell DU
1～DU
5, and each delay cell DU
1～DU
5All receive load signal S
L, first delay cell DU wherein
1Frequency signal Q is postponed preset time T
dAfter be output as D
1And i delay cell DU
iOutput D with i-1 delay cell
I-1Postpone preset time T
dAfter be output as D
i, DU for example
3Output D
3Compare DU
2Output D
2Postponed preset time T
d, wherein i is the integer greater than.In the present embodiment, the characteristic of delay cell is to postpone preset time T
dWith load signal S
LSize be inversely proportional to.So, when load current is big, load signal S
LAlso and then become big, simultaneously preset time T
dCan be less.In the acquisition time T
LThe time buffer 3322 will capture digital signal D
1～D
5, when buffer 3322 acquisitions, be in the digital signal D of high potential
1～D
5Number will be many.5 high potentials are for example arranged, at this moment digital signal D
1～D
5Be (11111).Otherwise when load current hour, load signal S
LAlso and then diminish, simultaneously preset time T
dCan be bigger, when buffer 3322 acquisitions, be in the digital signal D of logic high potential
1～D
5Number will lack, for example have only three high potentials, this moment digital signal D
1～D
5Be (11100).In the replacement time T
RThe time, each delay cell DU
1～DU
5Can trigger and replacement delay cell DU by reset signal
1～DU
5Be output as logic low potential.
Next, Fig. 7 is digital signal D in the present embodiment
1～D
5With load current I
L3Graph of a relation.As digital signal (D
1～D
5) when being (00000) or (10000), this moment, load current was less than I
L32Be underloading, the shielded signal S of buffer 3322 outputs
MaskResponsibility cycle can be less, and this moment shielded signal S
MaskBoost type DC/direct current transducer 300 is operated in the pulse frequency modulated pattern.As digital signal (D
1～D
5) when being (11111), this moment, load current was greater than I
L35Be heavy duty, the shielded signal S of buffer 3322 outputs
MaskResponsibility cycle can be bigger, and this moment shielded signal S
MaskBoost type DC/direct current transducer 300 is operated in the pulse-width modulation pattern.And as digital signal (D
1～D
5) when being (11000), (11100) or (11110), this moment, load current was between I
L32With I
L35Between carry the shielded signal S of buffer 3322 outputs in being
MaskThe size of responsibility cycle between above-mentioned two patterns, promptly this moment shielded signal S
MaskBoost type DC/direct current transducer 300 is operated in to be mixed in the pulse wave mask pattern.
In mixing pulse wave mask pattern and pulse-width modulation pattern, shielded signal S
MaskResponsibility cycle and digital signal (D
1～D
5) the high potential bit quantity be directly proportional.For instance, as digital signal (D
1～D
5) when being (11000), the figure place that is in logic high potential is 2, this moment shielded signal S
MaskResponsibility cycle be 2/5=40%.On the other hand, as digital signal (D
1～D
5) when being (11100), the figure place that is in logic high potential is 3, this moment shielded signal S
MaskResponsibility cycle be 3/5=60%, the rest may be inferred by analogy for it.
Fig. 8 is the operation chart with door 340.As shielded signal S
MaskResponsibility cycle when big, also can increase with the pulse number of the control signal d (t) of door 340, as shown in Figure 8 as load current I
L32＜I
L33The time, I
L33Pairing and door 340 control signal d (t) pulse number and I
L32Comparing can be more, that is to say I
L32Therefore pairing control signal d (t) pulse number is less, makes that the switch 314 pairing switching times among Fig. 3 are less, also can reduce the switch cost of switch 314 and makes system effectiveness rise.
In sum, load sensor 331 can detect load current I
L3Value and output and corresponding load signal S
L, next the shielded signal generator will be according to load signal S
LAnd provide shielded signal S
Mask, then will be according to shielded signal S with door 340
MaskProvide control signal d (t) with pulse wave modulating signal PWM_CK.Afterwards, the control signal S after driver 360 will amplify
COutput causes the switch 314 of suitching type booster circuit 310.By this, the boost type DC/direct current transducer of present embodiment can individually operate in pulse-width modulation pattern, pulse frequency modulated pattern or mix the pulse wave mask pattern with selection according to the size of load current.
Fig. 9 is pulse-width modulation pattern in the present embodiment, pulse frequency modulated pattern and mixing pulse wave mask pattern three's an efficient comparison diagram.With boost type DC/direct current transducer 300 of being applied in the mobile phone is example, when it is in heavy duty, use the pulse-width modulation pattern as mobile phone in call mode following time, and use the pulse frequency modulated pattern when underloading such as under the battery saving mode to reduce the switch number of times, reduce power supply conversion efficiency so as not to the frequent loss of switching of switch.In then use when carrying and mix the pulse wave mask pattern, can make that so the power source conversion of system maintains high efficiency, as shown in Figure 9.As shown in the above description, the present invention underloading, in carry, can individually make during heavy duty system operation at the pulse wave frequency modulating, mix under the pattern of pulse wave mask pattern or pulse-width modulation, make system can both maintain high efficiency state.
Though the present invention discloses as above with preferred embodiment; right its is not in order to limit the present invention; any person of ordinary skill in the field; without departing from the spirit and scope of the invention; when can doing a little change and improvement, so the present invention's protection range is as the criterion when looking the claim person of defining.
Claims (16)
1. boost type DC/direct current transducer is characterized in that comprising:
The suitching type booster circuit according to control signal, receives input voltage and output voltage is provided, and this output voltage is greater than this input voltage;
The pulse-width modulation circuit is according to this output voltage and reference voltage output pulse width modulating signal;
Screened circuit, according to the load current output shielded signal of this boost type DC/direct current transducer, the responsibility cycle of this shielded signal can change with this load current; And
With door, receive this pulse-width modulation signal and this shielded signal, export this control signal,
Wherein this screened circuit comprises:
Load sensor is according to this load current output loading signal; And
The shielded signal generator produces this shielded signal according to this load signal.
2. boost type DC/the direct current transducer according to claim 1 is characterized in that also comprising:
Bleeder circuit will export this pulse-width modulation circuit to after this output voltage reduction preset ratio.
3. boost type DC/the direct current transducer according to claim 2 is characterized in that this bleeder circuit comprises:
First resistor is electrically connected on this output voltage; And
Second resistor is electrically connected on this first resistor with first end, with the second end ground connection;
Wherein the contact of this first resistor and this second resistor also is electrically connected on this pulse-width modulation circuit.
4. boost type DC/the direct current transducer according to claim 1 is characterized in that also comprising:
Driver will export this suitching type booster circuit to after this control signal amplification.
5. boost type DC/the direct current transducer according to claim 1 is characterized in that this suitching type booster circuit comprises:
Inductor is electrically connected on this input voltage;
Diode is electrically connected on this inductor with anode;
Capacitor is electrically connected on negative electrode and this output voltage of this diode with first end, with the second end ground connection; And
Switch is electrically connected on first end between the anode of this inductor and this diode, with the second end ground connection, according to this control signal conducting or turn-off first end and second end of this switch.
6. boost type DC/the direct current transducer according to claim 5 is characterized in that this switch is a nmos pass transistor, receives this control signal with grid.
7. boost type DC/the direct current transducer according to claim 1 is characterized in that this pulse-width modulation circuit comprises:
Error amplifier receives this reference voltage with first input end, is electrically connected on this output voltage with second input, exports after the voltage amplification with above-mentioned first input end to the second input;
The triangular wave generator, the output triangular wave; And
Comparator according to the comparative result of the output voltage of this triangular wave and this error amplifier, is exported this pulse-width modulation signal.
8. boost type DC/the direct current transducer according to claim 7, it is characterized in that if the voltage of this triangular wave greater than the output voltage of this error amplifier, this comparator output logic high potential then, otherwise this comparator output logic electronegative potential.
9. boost type DC/the direct current transducer according to claim 1 it is characterized in that this load signal is a voltage signal, and this load signal is the increasing function of this load current.
10. boost type DC/the direct current transducer according to claim 1 is characterized in that this shielded signal generator comprises:
Delay chain produces digital signal according to this load signal and frequency signal; And
Buffer regularly captures this digital signal, produces this shielded signal according to this digital signal that captures.
11. the boost type DC/direct current transducer according to claim 10 is characterized in that this buffer is input/serial output state arranged side by side.
12. the boost type DC/direct current transducer according to claim 10 is characterized in that this delay chain comprises:
A plurality of delay cells, each above-mentioned a plurality of delay cell all receives this load signal, wherein first delay cell postpones this frequency signal to export behind one Preset Time, export behind i delay cell this Preset Time of output delay i-1 delay cell, i is the integer greater than, this digital signal is the set of the output of above-mentioned a plurality of delay cells, and this Preset Time is the decreasing function of this load current.
13. the boost type DC/direct current transducer according to claim 12 is characterized in that the output that each above-mentioned a plurality of delay cell is all regularly reset this delay cell according to reset signal.
14. the boost type DC/direct current transducer according to claim 10 is characterized in that in the middle of this digital signal that this buffer captures, numerical value is 1 the bit quantity increasing function for this load current.
15. the boost type DC/direct current transducer according to claim 10, the responsibility cycle that it is characterized in that this shielded signal be in the middle of this digital signal that this buffer captured, numerical value is the increasing function of 1 bit quantity.
If 16. the boost type DC/direct current transducer according to claim 15 is characterized in that in the middle of this digital signal that this buffer captured, numerical value be 1 bit quantity less than a default value, then this buffer produces this shielded signal in pulse wave frequency modulating mode.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2006100783365A CN101071981B (en) | 2006-05-11 | 2006-05-11 | Voltage-rising DC/DC converter |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2006100783365A CN101071981B (en) | 2006-05-11 | 2006-05-11 | Voltage-rising DC/DC converter |
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| CN101071981A CN101071981A (en) | 2007-11-14 |
| CN101071981B true CN101071981B (en) | 2010-09-29 |
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| CN2006100783365A Expired - Fee Related CN101071981B (en) | 2006-05-11 | 2006-05-11 | Voltage-rising DC/DC converter |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103441658B (en) * | 2013-08-30 | 2016-05-04 | 深圳市汇顶科技股份有限公司 | A kind of Boost controller and Boost converter |
Families Citing this family (13)
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| CN101339209B (en) * | 2008-08-08 | 2012-02-29 | 欣旺达电子股份有限公司 | Method for on-load detection in boosted circuit using impulse width |
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| US9235221B2 (en) * | 2012-03-23 | 2016-01-12 | Fairchild Semiconductor Corporation | Early warning strobe for mitigation of line and load transients |
| US9690159B2 (en) * | 2012-04-09 | 2017-06-27 | Sharp Kabushiki Kaisha | Display device and method of generating supply power therefor |
| US8619445B1 (en) | 2013-03-15 | 2013-12-31 | Arctic Sand Technologies, Inc. | Protection of switched capacitor power converter |
| US9041459B2 (en) * | 2013-09-16 | 2015-05-26 | Arctic Sand Technologies, Inc. | Partial adiabatic conversion |
| CN105449994B (en) * | 2014-09-10 | 2017-09-29 | 立锜科技股份有限公司 | The control circuit of power supply changeover device |
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| WO2017007991A1 (en) | 2015-07-08 | 2017-01-12 | Arctic Sand Technologies, Inc. | Switched-capacitor power converters |
| CN105490534B (en) * | 2015-12-24 | 2018-08-21 | 成都信息工程大学 | A kind of current-mode control DCDC boosting variators and its pulse frequency modulated method |
| CN112714999A (en) * | 2018-11-23 | 2021-04-27 | 华为技术有限公司 | Power supply control method and device |
| CN110932547B (en) * | 2019-10-16 | 2022-06-21 | 重庆中易智芯科技有限责任公司 | Adaptive modulation mode switching circuit applied to high-efficiency DC-DC converter |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5568044A (en) * | 1994-09-27 | 1996-10-22 | Micrel, Inc. | Voltage regulator that operates in either PWM or PFM mode |
| US5745352A (en) * | 1994-10-27 | 1998-04-28 | Sgs-Thomson Microelectronics S.R.L. | DC-to-DC converter functioning in a pulse-skipping mode with low power consumption and PWM inhibit |
| CN1691481A (en) * | 2004-04-27 | 2005-11-02 | 株式会社理光 | Switching regulator and method for changing output voltages thereof |
| CN1734907A (en) * | 2004-08-04 | 2006-02-15 | 三洋电机株式会社 | Charge pump circuit |
-
2006
- 2006-05-11 CN CN2006100783365A patent/CN101071981B/en not_active Expired - Fee Related
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5568044A (en) * | 1994-09-27 | 1996-10-22 | Micrel, Inc. | Voltage regulator that operates in either PWM or PFM mode |
| US5745352A (en) * | 1994-10-27 | 1998-04-28 | Sgs-Thomson Microelectronics S.R.L. | DC-to-DC converter functioning in a pulse-skipping mode with low power consumption and PWM inhibit |
| CN1691481A (en) * | 2004-04-27 | 2005-11-02 | 株式会社理光 | Switching regulator and method for changing output voltages thereof |
| CN1734907A (en) * | 2004-08-04 | 2006-02-15 | 三洋电机株式会社 | Charge pump circuit |
Non-Patent Citations (1)
| Title |
|---|
| JP特开平10-334581 1998.12.18 |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103441658B (en) * | 2013-08-30 | 2016-05-04 | 深圳市汇顶科技股份有限公司 | A kind of Boost controller and Boost converter |
Also Published As
| Publication number | Publication date |
|---|---|
| CN101071981A (en) | 2007-11-14 |
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