CN101055878A - Thin film transistor base board and the method for reducing the interference between the metal leads - Google Patents
Thin film transistor base board and the method for reducing the interference between the metal leads Download PDFInfo
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- CN101055878A CN101055878A CN 200610060302 CN200610060302A CN101055878A CN 101055878 A CN101055878 A CN 101055878A CN 200610060302 CN200610060302 CN 200610060302 CN 200610060302 A CN200610060302 A CN 200610060302A CN 101055878 A CN101055878 A CN 101055878A
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- interference
- gate line
- film transistor
- thin film
- voltage signal
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Abstract
The invention relates to a thin film transistor substrate, which comprises an insulation substrate, a plurality of grid lines, a plurality of anti-interference wires and a plurality of data lines. The anti-interference wires are insulatively disposed between the grid lines and the data lines relative to the grid lines; the voltage signal of the anti-interference wires is being in inversive phase of the voltage signal of the grid lines. The thin film transistor substrate of the invention can lower the interference of the grid lines to the data lines. The invention also provides a method of reducing the interference between metal wires.
Description
[technical field]
The present invention relates to a kind of thin film transistor base plate, also relate to a kind of method of disturbing between the plain conductor that reduces.
[background technology]
At present, LCD has replaced conventional cathode ray tube (the Cathode Ray Tube that is used for calculator gradually, CRT) display, and, because characteristics such as the liquid crystal display utensil is light, thin, little, make its be fit to very much be applied to desktop PC, personal digital assistant (Personal Digital Assistant, PDA), portable phone, TV and multiple office automation and audio-visual equipment.
LCD generally includes a colored filter substrate, a thin film transistor base plate and is sandwiched in the liquid crystal layer between this two substrates.Wherein, this thin film transistor base plate is provided with many gate lines and and these many many data wires that gate lines insulation is intersected.
Seeing also Fig. 1, is a kind of structural representation of thin film transistor base plate of prior art exposure.This thin film transistor base plate 100 comprises many gate lines 101, many data wires 102 and many thin-film transistors 103.This gate line 101 intersects with these data wire 102 insulation, defines a plurality of pixel cells 104.This thin-film transistor 103 is arranged at this gate line 101 and these data wire 102 intersections, and this thin-film transistor 103 is electrically connected with this gate line 101 and this data wire 102 respectively.
Seeing also Fig. 2, is the cutaway view along line II-II shown in Figure 1.This gate line 101 is arranged on the dielectric base 110, and an insulating barrier 120 is arranged on this gate line 101, and many data wires 102 are arranged on this insulating barrier 120, and there is the overlapping region in this data wire 102 with this gate line 101.When these gate line 101 loading sweep signals were chosen one-row pixels unit 104, this data wire 102 was sent to picture element signal each pixel cell simultaneously.
Because there is the overlapping region in this data wire 102 with this gate line 101, the signal of this gate line 101 can produce the signal of this data wire 102 and disturb, and causes the distorted signals of this data wire 102, influences display effect.
[summary of the invention]
For solving above-mentioned gate line, provide a kind of gate line that reduces that the thin film transistor base plate that data wire disturbs is necessity in fact to the problem that data wire disturbs.
A kind of method of disturbing between the plain conductor that reduces also is provided.
A kind of thin film transistor base plate, it comprises a dielectric base, many gate lines, many anti-interference leads and many data wires, this anti-interference wire insulation is arranged between this gate line and this data wire, and it is provided with respect to this gate line, and the voltage signal of this anti-interference lead and the voltage signal of this gate line are anti-phase.
A kind of method of disturbing between the plain conductor that reduces, its step comprises: adjacent one first metal wire and one second metal wire is provided; One anti-interference lead is set between this first metal wire and second metal wire, and the voltage signal of the voltage signal of this anti-interference lead and this first metal wire is anti-phase.
Compared to prior art, above-mentioned thin film transistor base plate is provided with anti-interference lead between this gate line and this data wire, the voltage signal of this anti-interference lead and the voltage signal of this gate line are anti-phase, can make this gate line and this anti-interference lead the electric field at this data wire place a little less than, thereby reduce of the interference of this gate line to this data wire.In like manner, the method that voltage signal disturbs between above-mentioned reduction metal wire can effectively reduce the interference between metal wire.
[description of drawings]
Fig. 1 is the schematic diagram of the thin film transistor base plate of prior art.
Fig. 2 is the section enlarged diagram along line II-II shown in Figure 1.
Fig. 3 is the schematic diagram of thin film transistor base plate of the present invention.
Fig. 4 is the section enlarged diagram along Fig. 3 hatching IV-IV.
Fig. 5 is the section enlarged diagram along Fig. 3 hatching V-V.
Fig. 6 is that this anti-interference lead reduces the principle schematic that this gate line disturbs this data wire.
Fig. 7 is that the present invention reduces between plain conductor the plain conductor of the interference method schematic diagram of arranging.
[embodiment]
See also Fig. 3, Fig. 4 and Fig. 5, Fig. 3 is the floor map of the disclosed thin film transistor base plate of an embodiment of the present invention, and Fig. 4 is the section enlarged diagram along line IV-IV shown in Figure 3, and Fig. 5 is the section enlarged diagram along line V-V shown in Figure 3.This thin film transistor base plate 200 comprises a substrate of glass 210, many gate line 201, one first insulating barriers 220, many anti-interference leads 230, one second insulating barrier 240 and many data wires 202.202 vertically insulated intersecting of many data wires of these many gate lines 201 and this, define a plurality of pixel cells (not indicating).This gate line 201 is arranged on this substrate of glass 210, this first insulating barrier 220 is arranged on this gate line 201 and this substrate of glass 210, this anti-interference lead 230 is arranged on this first insulating barrier 220, this second insulating barrier 240 is arranged on this anti-interference lead 230 and this first insulating barrier 220, and this data wire 202 is arranged on this second insulating barrier 240.
This anti-interference lead 230 be arranged at this gate line 201 directly over, and be parallel to this gate line 201.This anti-interference lead 230 is electrically connected with a signal source (figure does not show), this signal source provide one with the voltage signal of this gate line 201 anti-phase and absolute value less than the signal of the voltage signal absolute value of this gate line 201 to this anti-interference lead 230, and the width of this anti-interference lead 230 is less than the width of this gate line 201, and so the purpose that is provided with is the excessive interference that causes this gate line 201 of signal that prevents this anti-interference lead 230.The distance of this anti-interference lead 230 and this gate line 201 so can reduce this anti-interference lead 230 interference to this data wire 202 own less than the distance of this anti-interference lead 230 with this data wire 202.
The interference that act as 201 pairs of these data wires 202 of this gate line of reduction of this anti-interference lead 230.Seeing also Fig. 6, is the principle schematic that this anti-interference lead 230 reduces the interference of 201 pairs of these data wires 202 of this gate line.When loading a positive voltage signal on this gate line 201, the voltage of this anti-interference lead 230 is for negative, form an electric field between this gate line 201 and this anti-interference lead 230, negative electrical charge on this anti-interference lead 230 is gathered in the side near this gate line 201 because of this effect of electric field, then only there is a little negative electrical charge near these data wire 202 1 sides, make this gate line 201 and this anti-interference lead 230 the electric field that forms near this data wire 202 places a little less than, so this anti-interference lead 230 can reduce the interference of 201 pairs of these data wires 202 of this gate line.
Compared to prior art, this thin film transistor base plate 200 is provided with anti-interference lead 203 between this gate line 201 and this data wire 202, the voltage signal of the voltage signal of this anti-interference lead 230 and this gate line 201 is anti-phase, can make this gate line 201 and this anti-interference lead 230 the electric field at this data wire place a little less than, thereby effectively reduce the interference of 201 pairs of these data wires 202 of this gate line.
The present invention also provides a kind of method of disturbing between plain conductor that reduces.Seeing also Fig. 7, is plain conductor according to this method schematic diagram of arranging.The 3rd plain conductor 330 disturbs the lead that is provided with for reducing by 310 pairs second plain conductors of first plain conductor 320.The width of the 3rd plain conductor 330 is less than the width of this first plain conductor 310.The voltage inversion of the voltage of the 3rd plain conductor 330 and this plain conductor 310, and the absolute value of voltage of the 3rd plain conductor 330 is less than the absolute value of this first plain conductor 310.The distance of the 3rd plain conductor 330 and this first plain conductor 310 is less than the distance of itself and this second plain conductor 320.
In like manner, adopt said method can effectively reduce the interference of 310 pairs of these second plain conductors 320 of this first metal wire.
Claims (8)
1. thin film transistor base plate, it comprises a dielectric base, many gate lines and many data wires that intersect with this gate line, it is characterized in that: it further comprises an anti-interference lead, this anti-interference wire insulation is arranged between this gate line and this data wire, and it is provided with respect to this gate line, and the voltage signal of this anti-interference lead and the voltage signal of this gate line are anti-phase.
2. thin film transistor base plate as claimed in claim 1 is characterized in that: the distance of this anti-interference lead and this gate line is less than the distance of this anti-interference lead and this data wire.
3. thin film transistor base plate as claimed in claim 1 is characterized in that: the absolute value of the voltage signal of this anti-interference lead is less than the absolute value of the voltage signal of this gate line.
4. thin film transistor base plate as claimed in claim 1 is characterized in that: the width of this anti-interference lead is less than the width of this gate line.
5. method that reduces to disturb between the plain conductor, its step comprises:
Adjacent one first metal wire and one second metal wire is provided;
One anti-interference lead is set between this first metal wire and second metal wire, and should
The voltage signal of the voltage signal of anti-interference lead and this first metal wire is anti-phase.
6. the method for disturbing between the reduction plain conductor as claimed in claim 5 is characterized in that: the distance of this anti-interference lead and this first metal wire is less than the distance of this anti-interference lead and this second metal wire.
7. the method for disturbing between the plain conductor as claimed in claim 5 is characterized in that: the absolute value of this anti-interference wire voltage signal is less than the absolute value of this first metal wire voltage signal.
8. the method for disturbing between the reduction plain conductor as claimed in claim 5 is characterized in that: the width of this anti-interference lead is less than the width of this first metal wire.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2006100603023A CN100481467C (en) | 2006-04-14 | 2006-04-14 | Thin film transistor base board and the method for reducing the interference between the metal leads |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2006100603023A CN100481467C (en) | 2006-04-14 | 2006-04-14 | Thin film transistor base board and the method for reducing the interference between the metal leads |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101055878A true CN101055878A (en) | 2007-10-17 |
| CN100481467C CN100481467C (en) | 2009-04-22 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB2006100603023A Expired - Fee Related CN100481467C (en) | 2006-04-14 | 2006-04-14 | Thin film transistor base board and the method for reducing the interference between the metal leads |
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| Country | Link |
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| CN (1) | CN100481467C (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111293126A (en) * | 2020-02-17 | 2020-06-16 | 京东方科技集团股份有限公司 | Array substrate, organic light-emitting display panel and display device |
-
2006
- 2006-04-14 CN CNB2006100603023A patent/CN100481467C/en not_active Expired - Fee Related
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111293126A (en) * | 2020-02-17 | 2020-06-16 | 京东方科技集团股份有限公司 | Array substrate, organic light-emitting display panel and display device |
| CN111293126B (en) * | 2020-02-17 | 2023-10-24 | 京东方科技集团股份有限公司 | Array substrate, organic light-emitting display panel and display device |
Also Published As
| Publication number | Publication date |
|---|---|
| CN100481467C (en) | 2009-04-22 |
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| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20090422 Termination date: 20190414 |
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| CF01 | Termination of patent right due to non-payment of annual fee |