CN101046793B - Bus signal control method, system, interface single plate and network equipment internal single board - Google Patents
Bus signal control method, system, interface single plate and network equipment internal single board Download PDFInfo
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- CN101046793B CN101046793B CN200710087498XA CN200710087498A CN101046793B CN 101046793 B CN101046793 B CN 101046793B CN 200710087498X A CN200710087498X A CN 200710087498XA CN 200710087498 A CN200710087498 A CN 200710087498A CN 101046793 B CN101046793 B CN 101046793B
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Abstract
The present invention discloses a bus signal control method. Said method includes the following steps: A, when the active state of interface single board is converted, making high-speed bus interface device be come into high-impedance state, and making the bus signal passing through the described high-speed bus interface device be synchronously interrupted under the described high-impedance state; and B, when the conversion of active state of said interface single board is completed, making said high-speed bus interface device be come into normal working state from the described high-impedance state, under the normal working state making the described bus signal be synchronously restored to make transmission. Besides, said invention also provides a bus signal control system, interface single board and network equipment internal single board.
Description
Technical field
The present invention relates to the communications electronics technical field, concrete be particularly related to veneer in a kind of bus signal control method, system, interface single plate and the network equipment.
Background technology
Conventional network equipment refers to that mainly router, Ethernet switch, gateway on the IP network etc. carries out the equipment of data communication.Comprise the network equipment internal single board that can plug and change on the network equipment, be called for short interior veneer.The business interface that these interior veneers generally externally provide as the network equipment, perhaps be used to function that realizes switching network or master control borad etc., the network equipment is by changing different interior veneers, with the purpose that realizes different business interfaces being provided or upgrading to more high performance master control borad.The network equipment is generally all wished can charged incessantly for a long time work, and strict demand is also arranged for the power interruption recovering time, therefore require the interior veneer of the network equipment under the situation of faults itself, can realize warm swap, usually be also referred to as hot plug, so just can guarantee constantly electricity work of the network equipment itself when changing these interior veneers.
What realize that physics links to each other by connector with the interior veneer of the network equipment is the interface single plate of outside, and they can realize corresponding concrete function according to the control of the network equipment.Transmit electric signal between these interface single plates and the interior veneer when work, electric signal comprises earth signal, control signal and the bus signals of power supply signal, correspondence.When change changing according to business, need realize under the situation that the whole network equipment does not cut off the power supply that also the plug of this interface single plate is operated, with the operate as normal of the assurance network equipment with interface single plate that interior veneer links to each other.
Because the network equipment and interface single plate are electronic equipment, therefore the Hot Plug Capability that will realize various veneers just must carry out the specific aim design, promptly to consider when warm swap, to guarantee the integrality of the operating signal of the network equipment, and in the plug process, avoid components from being damaged on the veneer, make on the device and can not produce surge current and signal conflict, can not be damaged to guarantee the network equipment and interface single plate.
Interface single plate hot plug of the prior art realizes block diagram as shown in Figure 1, and this interface single plate hot-plug method is to realize hot plug by the control circuit that increases upper and lower electricity on interface single plate.As can be seen from Figure 1, comprise the control circuit of connector, switch, gauge tap and the high speed parallel bus interface IC that links to each other with bus signals (input signal, output signal, two-way signaling) on the interface single plate.The variety classes power supply that interface single plate needs, as power supply 1, power supply 2 ... and power supply n, the various bus signals that need as input signal, output signal and two-way signaling, and the earth signal that needs etc., all have each self-corresponding switch; Accordingly, also comprise connector on the network equipment internal single board, connector on the interface single plate is by docking with connector on the network equipment internal single board, realize the connection of power supply, ground wire and the various bus signal lines of two veneers, various power supplys on the interface single plate link to each other with the circuit of interface single plate inside by corresponding switch with bus signal line, switching on and off by the control circuit on the veneer of these switches controlled, and this control circuit carries out work according to the upper and lower electric control signal of interface board that the interior veneer that links to each other with this interface single plate provides.
Warm swap for the supporting interface veneer, the connector of any side veneer in interface single plate and the corresponding network device interior veneer partly is provided with the different contact pin of length, supports the different connector of contact pin length to guarantee the insertion that interface single plate can safety and to extract and remain to select for use on the veneer of a side.Insert interior veneer with interface single plate, and it is that example is described that the connector of interface single plate partly is provided with contact pin, the contact pin that connects earth signal on the interface single plate is the longest, earth signal can be connected at first in the process of interface single plate insertion interior veneer like this, and earth signal can disconnect at last in the withdrawal process, has guaranteed that the safety of interface single plate is inserted or extracted; Control circuit on the interface single plate is connected with interior veneer after earth signal is connected immediately, for interior veneer provides interface board plug condition indicative signal, after interior veneer is received this indicator signal, detecting this interface single plate has inserted on the throne, and return the upper and lower electric control signal of interface board for this control circuit, control circuit is controlled each switch closure and is connected, finish interface single plate on be electrically interposed in.
By above description to prior art as can be known, on the veneer of existing support hot plug, bus signals is owing to link to each other with high speed parallel bus interface IC, therefore in the loop of this bus signals, increased and carried out the electronic switch that bus is isolated, realize difference in functionality with the control high speed parallel bus interface IC that switches on and off by switch, this electronic switch is generally integrated IC device, equal tenaculum hot-line insertion and extractions, the switching function of this IC device are generally by being in controlled conducting or realizing by the field effect transistor of state.But increase along with network equipment complexity, Bus Speed on the veneer is also more and more higher, an effective work clock cycle of many high speed parallel bus reached within the nanosecond several nanoseconds to tens, because high speed parallel bus generally is the synchronous sequence of multiplex data bus, therefore the existing electronic switch that can be used in the plug control of high speed parallel bus interface IC adopts multi-disc/multichannel electronics, and multi-disc electronic switch or exist than big difference with the bus signals input and output time delay between the inner different passages of a slice electronic switch, the time-delay of general signal needs about several nanoseconds at least.Therefore this electronic switch is when being switched on or switched off, bus signals is after passing through these switches, between the parallel bus sequential of strict synchronism different delays can appear originally, though caused high speed parallel bus interface IC can realize warm swap, problem that but can't operate as normal.
Summary of the invention
The object of the present invention is to provide a kind of bus signal control method, with overcome interface single plate of the prior art when the hot plug because between the bus signals of high-speed parallel transmission occur postponing poor, thereby cause the problem that high speed parallel bus can't operate as normal.
Another object of the present invention is to provide a kind of bus signal control system, with solve system of the prior art when the interface single plate hot plug because between the bus signals of high-speed parallel transmission occur postponing poor, thereby cause the problem that system can't operate as normal.
Another purpose of the present invention is to provide interface single plate and network equipment internal single board, with overcome the existing interface veneer when the hot plug because between the bus signals of high-speed parallel transmission difference occurs postponing and cause the problem that interface single plate can't operate as normal.
For solving the problems of the technologies described above, the invention provides following technical scheme:
A kind of bus signal control method is provided with the jtag interface analog control circuit, comprising:
When A, interface single plate conversion work state, send command word by described jtag interface analog control circuit to the high speed bus interface device, described command word makes the high speed bus interface device enter high-impedance state, through bus signals sync break under described high-impedance state of described high speed bus interface device;
B, when interface single plate conversion work state is finished, send command word by described jtag interface analog control circuit to the high speed bus interface device, described command word makes the high speed bus interface device enter the operate as normal attitude from described high-impedance state, and described bus signals recovers transmission synchronously under described operate as normal attitude.
Described interface single plate conversion work state comprises: described interface single plate is extracted from network equipment internal single board, or described interface single plate is inserted on the network equipment internal single board.
Described steps A high speed bus interface device enters high-impedance state and realizes by following steps:
Described jtag interface analog control circuit is to high speed bus interface device output interface sequential, and described interface sequence is for triggering the command word that the high speed bus interface device enters high-impedance state;
After receiving described command word, described high speed bus interface device enters high-impedance state.
Described step B high speed bus interface device enters the operate as normal attitude and realizes by following steps:
Described jtag interface analog control circuit is to high speed bus interface device output interface sequential, and described interface sequence is for triggering the command word that the high speed bus interface device enters the operate as normal attitude;
Described high speed bus interface device enters the operate as normal attitude after receiving described command word.
Described high speed bus interface device is positioned on the described interface single plate, or described high speed bus interface device is positioned on the described network equipment internal single board.
The high speed bus interface device is positioned on the described interface single plate and interface single plate when being inserted into network equipment internal single board, and described jtag interface analog control circuit sends command word to described high speed bus interface device and takes a step forward and comprise: the power supply on the described interface single plate is described high speed bus interface device and the power supply of described jtag interface analog control circuit.
Further comprise between described steps A and the step B:
Described interface single plate transmit status indicator signal is to network equipment internal single board;
Network equipment internal single board returns according to described condition indicative signal and powers on or down power connection or the disconnection on the electric control signal control interface veneer.
A kind of bus signal control system comprises interface single plate and network equipment internal single board, on any one veneer in described interface single plate and the network equipment internal single board jtag interface analog control circuit is set, and described any one veneer is further used for:
When described interface single plate conversion work state, command word by described jtag interface analog control circuit transmission, make the high speed bus interface device on this any one veneer enter high-impedance state, and when described interface single plate conversion work state is finished, command word by described jtag interface analog control circuit sends makes described high speed bus interface device enter the operate as normal attitude.
Described any one veneer further comprises command executing unit,
Described jtag interface analog control circuit, specifically be used for to described high speed bus interface device output interface sequential, the command word that described interface sequence enters high-impedance state for triggering high speed bus interface device, or for triggering the command word that the high speed bus interface device enters the operate as normal attitude;
Described command executing unit after being used to receive the command word of described jtag interface analog control circuit transmission, makes described high speed bus interface device enter high-impedance state or operate as normal attitude.
Described high speed bus interface device is positioned on the described interface single plate, and described interface single plate further comprises:
Power supply unit, when being used for interface single plate insertion network equipment internal single board, described jtag interface analog control circuit is this high speed bus interface device and the power supply of described jtag interface analog control circuit before high speed bus interface device output interface sequential.
Described system further comprises:
Send signal element, be positioned on the described interface single plate, be used for the transmit status indicator signal to network equipment internal single board;
The return signal unit is positioned on the described network equipment internal single board, is used for returning according to described condition indicative signal powering on or down power connection or the disconnection on the electric control signal control interface veneer.
A kind of interface single plate comprises high speed bus interface device, power supply and internal circuit, also comprises the jtag interface analog control circuit, and described high speed bus interface device is further used for:
During described interface single plate conversion work state, command word by described jtag interface analog control circuit transmission, make the high speed bus interface device on this interface single plate enter high-impedance state, and when described interface single plate conversion work state is finished, command word by described jtag interface analog control circuit sends makes described high speed bus interface device enter the operate as normal attitude.
Described interface single plate further comprises command executing unit,
Described jtag interface analog control circuit, specifically be used for to described high speed bus interface device output interface sequential, the command word that described interface sequence enters high-impedance state for triggering high speed bus interface device, or for triggering the command word that the high speed bus interface device enters the operate as normal attitude;
Described command executing unit after being used to receive the command word of described jtag interface analog control circuit transmission, makes described high speed bus interface device enter high-impedance state or operate as normal attitude.
Described interface single plate further comprises:
Power supply unit, when being used for interface single plate insertion network equipment internal single board, described jtag interface analog control circuit is the power supply of this high speed bus interface device and described jtag interface analog control circuit before high speed bus interface device output interface sequential.
Described interface single plate further comprises:
Send signal element, be used for the transmit status indicator signal to network equipment internal single board.
A kind of network equipment internal single board comprises high speed parallel bus interface device, power supply and internal circuit, also comprises the jtag interface analog control circuit, and described high speed parallel bus interface device is further used for:
During the interface single plate conversion work state corresponding with described interior veneer, command word by described jtag interface analog control circuit transmission, make this high speed bus interface device enter high-impedance state, and when described interface single plate conversion work state is finished, command word by described jtag interface analog control circuit sends makes described high speed bus interface device enter the operate as normal attitude.
Described network equipment internal single board further comprises command executing unit,
Described jtag interface analog control circuit, specifically be used for to described high speed bus interface device output interface sequential, the command word that described interface sequence enters high-impedance state for triggering high speed bus interface device, or for triggering the command word that the high speed bus interface device enters the operate as normal attitude;
Described command executing unit after being used to receive the command word of described jtag interface analog control circuit transmission, makes described high speed bus interface device enter high-impedance state or operate as normal attitude.
Described interior veneer further comprises:
The return signal unit, be used for condition indicative signal that the receiving interface veneer sends after, return according to described condition indicative signal and to power on or power connection or the disconnection on the electric control signal control interface veneer down.
By above description to technical solution of the present invention as can be known, the present invention is when interface single plate conversion work state, make the high speed bus interface device enter high-impedance state, thereby make bus signals sync break through this high speed bus interface device, and when this interface single plate conversion work state is finished, the high speed bus interface device enters the operate as normal attitude, and bus signals recovers transmission synchronously.The conversion of the duty of this high speed bus interface device is by being provided with the jtag interface analog control circuit on corresponding veneer, and realizes to the mode that the high speed bus interface device sends command word.Because bus signals input high speed parallel bus interface device, or it is poor all can not signal lag to occur during output high speed parallel bus interface device, this is the character that the high speed parallel bus interface device itself has, therefore interface single plate need not for bus signals the IC switch to be set, as long as IC changes between high-impedance state and operate as normal attitude by control high speed parallel bus interface, just can realize switching on and off of bus signals, finish the hot plug of whole interface single plate.And because this high speed parallel bus interface device is the device that veneer itself just has, so the present invention can be under the situation that does not increase additional devices, when the interface single plate hot plug, can overcome the delay inequality of bus signals, make all energy operate as normal of interface single plate and network equipment internal single board.
Description of drawings
Fig. 1 is the realization block diagram of veneer hot plug of the prior art;
Fig. 2 is a high speed parallel bus interface device synoptic diagram of the present invention;
Fig. 3 is the inventive method first embodiment process flow diagram;
Fig. 4 is the inventive method second embodiment process flow diagram;
Fig. 5 is the realization block diagram of the inventive method second embodiment;
Fig. 6 is the hierarchy synoptic diagram of the point-to-multipoint transmission of the inventive method second embodiment;
Fig. 7 is the inventive method the 3rd embodiment process flow diagram;
Fig. 8 is the realization block diagram of the inventive method the 3rd embodiment;
Fig. 9 is the realization block diagram of the inventive method the 4th embodiment;
Figure 10 is the system of the present invention first embodiment block diagram;
Figure 11 is the system of the present invention second embodiment block diagram;
Figure 12 is the embodiment block diagram of interface single plate of the present invention;
Figure 13 is the embodiment block diagram of network equipment internal single board of the present invention.
Embodiment
Core of the present invention provides a kind of bus signal control method, this method is when interface single plate conversion work state, make the high speed bus interface device enter high-impedance state, thereby make bus signals sync break through this high speed bus interface device, and when this interface single plate conversion work state is finished, the high speed bus interface device enters the operate as normal attitude, and bus signals recovers transmission synchronously.Wherein do not increase additional devices in the transmission channel of high speed parallel bus interface device and bus signals, realize the transformation of this interface device duty by the mode that sends command word at the inner jtag interface analog control circuit that is provided with of veneer, and then make interface single plate cooperate the warm swap of realizing interface single plate with network equipment internal single board, do not influence simultaneously the operate as normal of interface single plate, and guarantee interface single plate in the warm swap process and on device do not damage.
In order to make those skilled in the art person understand the present invention program better, the present invention is described in further detail below in conjunction with the drawings and specific embodiments.
The present invention has utilized special-purpose BST (boundary scan testing) interface of IC (integrated circuit) device inside to realize the hot plug of interface single plate, BST is by increase a logical block between IC kernel and pin, and these logical blocks are coupled together, realize control with a special controller to these logical blocks, because these logical blocks are positioned at " edge " of device, therefore be called boundary scan.Figure 2 shows that the applied high speed parallel bus interface device synoptic diagram of the present invention with boundary-scan function, the logical block that links to each other with each pin among the figure is controlled by TAP (test port) controller, be equivalent to a transparent unit in normal operation, not influencing this device inside is communicated with by pin with outside, and under test mode, each logical block can be controlled the input and output of coupled pin, and can realize that the serial of data moves; The TAP controller is used for from the test port input control order, exports from TDO (serial boundary scan outputting data signals) mouthful by input, output, the mobile and control data of control data in logical block of order register steering logic unit.
The high speed bus interface device of support boundary scan as shown in Figure 2 comprises the high speed parallel bus interface IC that will use in the subsequent embodiment of the present invention, and this high speed parallel bus interface IC controls the state machine of TAP controller by JTAG (JTAG) control interface.The state machine of TAP controller can make this high speed parallel bus interface IC change between different states, and these states comprise the high-impedance state of IC and the operating conditions of IC.As long as the state machine conversion according to the TAP controller just can utilize jtag interface to make this IC be in certain specific function operation pattern.In order to realize bus signal control method among the present invention, can make high speed parallel bus interface IC enter a kind of high-impedance state by the JTAG control interface, i.e. HIGHZ pattern, this pattern also are the mode of operations that IEEE1149.1 recommends.Under the HIGHZ pattern, all output pins of high speed parallel bus interface IC and I/O (I/O) pin all are in disarmed state, and this disarmed state is exactly a high-impedance state.According to the standard of IEEE1149.1, when this high-impedance state, system's input and clock signal are imported under the effective situation, and damaging can not appear in high speed parallel bus interface IC.
The inventive method first embodiment process flow diagram is as shown in Figure 3:
Step 301: make the high speed bus interface device enter high-impedance state during interface single plate conversion work state, the bus signals sync break.
Interface single plate conversion work state comprises that this interface single plate extracts from network equipment internal single board, or this interface single plate is inserted on the network equipment internal single board.The high speed bus interface device can be positioned on the interface single plate, also can be positioned on the network equipment internal single board.
Concrete, the jtag interface analog control circuit that is provided with on the veneer is to high speed bus interface device output interface sequential, this interface sequence is for triggering the command word that the high speed bus interface device enters high-impedance state, and the high speed bus interface device enters high-impedance state after receiving this command word.
When the high speed bus interface device is positioned on the interface single plate, at first be this high speed bus interface device and the power supply of this jtag interface analog control circuit to the power supply that the high speed bus interface device sends on the command word front port veneer at the jtag interface analog control circuit.
Step 302: interface single plate conversion work state is finished, and the high speed bus interface device enters the operate as normal attitude, and bus signals recovers transmission synchronously.
Concrete, the jtag interface analog control circuit that the high speed bus interface device passes through to be provided with is to high speed bus interface device output interface sequential, this interface sequence is for triggering the command word that the high speed bus interface device enters the operate as normal attitude, and the high speed bus interface device enters the operate as normal attitude after receiving this command word.
Further, between step 301 and step 302, interface single plate transmit status indicator signal is to network equipment internal single board, and network equipment internal single board returns according to condition indicative signal and powers on or power connection or the disconnection on the electric control signal control interface veneer down.
Second embodiment of the inventive method:
The inventive method second embodiment process flow diagram the figure shows the jtag interface analog control circuit that will be used for the high speed parallel bus interface device of duty conversion and control this interface device and is arranged on flow process on the interface single plate to be plugged as shown in Figure 4.
Step 401: be high speed bus interface device and the power supply of jtag interface analog control circuit on it during interface single plate conversion work state.
The command word that step 402:JTAG interface analog control circuit enters high-impedance state to the output of high speed bus interface device.
Step 403: the high speed bus interface device enters high-impedance state, the bus signals sync break.
Step 404: interface single plate transmission interface plate plug condition indicative signal is to network equipment internal single board.
Step 405: network equipment internal single board returns that interface board powers on or electric control signal down.
Step 406: power connection on the interface single plate or disconnection.
Step 407:JTAG interface analog control circuit enters the command word of operate as normal attitude to the output of high speed bus interface device.
Step 408: the high speed bus interface device enters the operate as normal attitude, and bus signals recovers transmission synchronously.
Use the inventive method second embodiment flow process and carry out bus signal control, the realization block diagram of realization interface single plate hot plug as shown in Figure 5.High speed parallel bus interface IC links to each other by corresponding interface with the jtag interface analog control circuit in the figure, and visual representation has gone out this jtag interface analog control circuit high speed parallel bus interface IC is carried out the control of different conditions mode of operation.
For the warm swap of supporting interface veneer, the connector of interface single plate partly is provided with the different contact pin of length, selects for use on the corresponding network device interior veneer and supports the different plug-in unit of contact pin length with the insertion that guarantees interface single plate safety with extract.Inserting network equipment internal single board with interface single plate is that example is described, the contact pin that connects earth signal on the interface single plate is the longest, making interface single plate insert in the process of interior veneer earth signal can connect at first, and earth signal can disconnect at last in the withdrawal process, can guarantee that like this safety of interface single plate is inserted or extracted; With power supply 1, power supply 2 ..., the contact pin that links to each other of power supply n, after earth signal is connected, these power supplys at first receive the electric signal that the network equipment provides, and are connected to high speed parallel interface IC and the power supply of jtag interface analog control circuit by the oval frame among the figure.Jtag interface analog control circuit tenaculum hot-line insertion and extraction, be generally programmable logic device (PLD), in the process that interface single plate inserts, this jtag interface analog control circuit and high speed parallel bus interface IC at first obtain power supply by oval frame, realize normally working on power.The jtag interface mimic channel is after powering on, TRST interface on this circuit, TCK interface, TMS interface and TDO interface send interface sequence to high speed parallel bus interface IC simultaneously, this sequential provides the jtag boundary sweep test order of a simulation, this boundary scan testing order is cured as a command word that makes high speed parallel bus interface IC enter high-impedance state in this circuit, high speed parallel bus interface IC has just entered high-impedance state after receiving this command word.
IC device for supporting jtag interface as the high speed parallel bus interface IC in the present embodiment, make this IC enter the order register that high-impedance state just need write the bit code " 00101 " of control command this IC inner boundary scan function module.Concrete, this high speed parallel bus interface IC will enter high-impedance state need pass through following steps:
(1) TRST=1 is set.
(2) enter SHIFT-IR (order register displacement) state: at continuous 5 TCK rising edges,
Control TMS=01100 has promptly entered the SHIFT-IR state.
(3) order code is write order register: at the SHIFT-IR state, by the TDI interface of IC device, promptly the output TDO signal of present embodiment jtag interface analog control circuit writes order register with " 00101 ", and this writes needs 5 clock period.
(4) enter EXIT1-IR (going out order register) state: at the 5th rising edge of SHIFT-IR state, promptly during last order code, make TMS=1, then entered the EXIT1-IR state.
(5) enter UPDATE-IR (update instruction register) state: after entering the EXIT1-IR state, make TMS=1 again, then enter the UPDATE-IR state.
(6) enter RUN-TEST/IDLE (operation test) state: after entering the UPDATE-IR state, make TMS=0 again, then enter the RUN-TEST/IDLE state, this moment, high speed parallel bus interface IC entered high-impedance state.
Above-mentioned control procedure generally can utilize programmable logic device (PLD) to realize by programming by VHDL or Verilog hardware description language, also can be by the incompatible realization of logical groups of digital circuit.
After interface single plate inserts interior veneer, interior veneer contacts with contact pin on the interface single plate connector, the interface single plate internal circuit provides interface board plug condition indicative signal for network equipment internal single board, after interior veneer is received this indicator signal, detecting this interface single plate inserts fully, and return the upper and lower electric control signal of interface single plate to this internal circuit, each road power supply on the control circuit control interface veneer, power supply 1, power supply 2 ..., the switch connection of power supply n, these power supplys are the power supply of interface single plate internal circuit.The jtag interface analog control circuit can be by certain time-delay or the other upper and lower electric control signal that provides by interior veneer simultaneously, to the other simulation jtag interface sequential of high speed parallel bus interface IC output, this sequential makes high speed parallel bus interface IC withdraw from high-impedance state, enter normal operating conditions, bus signals (input signal, output signal, two-way signaling) the transmission channel conducting that link to each other with this high speed parallel bus interface IC this moment, whole interface single plate is finished and is worked on power.
Because bus signals input high speed parallel bus interface IC, or it is poor all can not signal lag to occur during output high speed parallel bus interface IC, this is the character that high speed parallel bus interface IC itself has, therefore interface single plate need not for bus signals the IC switch to be set, as long as IC changes between high-impedance state and operate as normal attitude by control high speed parallel bus interface, can realize switching on and off of bus signals, finish the hot plug of whole interface single plate, therefore high speed parallel bus interface IC is equivalent to additionally add switching function in this embodiment, because this high speed parallel bus interface IC is the device that interface single plate itself just has, so the embodiment of the invention under the situation that does not increase additional devices, makes interface single plate can overcome the time-delay operate as normal when hot plug.
This setup is applicable to that high speed parallel bus is the situation of point-to-multipoint transmission between network equipment internal single board and the interface single plate, and the hierarchy synoptic diagram of this point-to-multipoint transmission as shown in Figure 6.As can be seen from the figure, the corresponding a plurality of interface single plates of each network equipment internal single board, veneer 0 ..., veneer n, the high speed parallel bus interface IC of network equipment internal single board, power supply, control signal interface link to each other with high speed parallel bus interface IC, power supply, the control signal interface of corresponding n interface single plate respectively by high speed parallel bus, carry out bus signal transmission between the high speed parallel interface bus IC of the high speed parallel bus interface IC of interior veneer by high speed parallel bus and interface single plate.The hot plug by the interface single plate of high speed parallel bus transfer bus signal of each and network equipment internal single board all is to be set to high-impedance state by self high speed parallel bus interface IC realize, therefore when network equipment internal single board is connected with the interface single plate of a plurality of outsides, the warm swap of any one external interface veneer can not influence the data transmission between the interface single plate of network equipment internal single board and other operate as normal, because these interface single plates all are to carry out charged hot plug separately.
The 3rd embodiment of the inventive method:
The inventive method the 3rd embodiment process flow diagram the figure shows the jtag interface analog control circuit that will be used for the high speed parallel bus interface device of duty conversion and control this interface device and is arranged on flow process on the network equipment internal single board as shown in Figure 7.
Step 701: during interface single plate conversion work state, the command word that the high speed bus interface device output of the jtag interface analog control circuit on the network equipment internal single board on this interior veneer enters high-impedance state.
Step 702: the high speed bus interface device enters high-impedance state, the bus signals sync break.
Step 703: interface single plate transmission interface plate plug condition indicative signal is to network equipment internal single board.
Step 704: network equipment internal single board returns that interface board powers on or electric control signal down.
Step 705: power connection on the interface single plate of warm swap or disconnection.
Step 706:JTAG interface analog control circuit enters the command word of operate as normal attitude to the output of high speed bus interface device.
Step 707: the high speed bus interface device enters the operate as normal attitude, and bus signals recovers transmission synchronously.
Use the inventive method the 3rd embodiment flow process and carry out bus signal control, the realization block diagram of realization interface single plate hot plug as shown in Figure 8.High speed parallel bus interface IC links to each other by corresponding interface with the jtag interface analog control circuit in the figure, and visual representation has gone out this jtag interface analog control circuit high speed parallel bus interface IC is carried out the control of different conditions mode of operation.
Still inserting network equipment internal single board with interface single plate is that example is described, the contact pin that connects earth signal on the interface single plate is the longest, earth signal is connected at first when interface single plate inserts network equipment internal single board by connector, and earth signal disconnects at last in the withdrawal process, guarantees that with this safety of interface single plate inserts and extract; Jtag interface analog control circuit on the interior veneer is generally programmable logic device (PLD), after the earth signal of interface single plate is connected, this jtag interface analog control circuit control high speed parallel bus interface IC enters high-impedance state, i.e. TRST interface on this JTAG analog control circuit, the TCK interface, TMS interface and TDO interface send interface sequence to high speed parallel bus interface IC simultaneously, this sequential provides the jtag boundary sweep test order of a simulation, this boundary scan testing order is cured as a command word that makes high speed parallel bus interface IC enter high-impedance state in this circuit, high speed parallel bus interface IC has just entered high-impedance state after receiving this command word, passes through the bus signals (input signal of this high speed parallel bus interface IC this moment on the interior veneer, output signal, two-way signaling) all interrupted transmission.After interface single plate is inserted into interior veneer fully, the interface board plug condition indicative signal that this interface single plate will identify state on the throne sends on the power control circuit of interior veneer, after power control circuit is received this indicator signal, trigger each the road power supply on the interior veneer, power supply 1, power supply 2 ..., the switch connection of power supply n, can be the circuit supply of interface single plate inside behind these switch connections.The jtag interface analog control circuit can be through the high speed parallel bus interface IC output other simulation jtag interface sequential of certain time-delay on interior veneer simultaneously, this sequential makes high speed parallel bus interface IC withdraw from high-impedance state, enter normal operating conditions, through the bus signals recovery of this high speed parallel bus interface IC transmit on the interior veneer this moment, because bus signals input high speed parallel bus interface IC, or the delay inequality of signal all can not appear during output high speed parallel bus interface IC, this is the character that high speed parallel bus interface IC itself has, therefore be that interior veneer or the interface single plate that need carry out hot plug all need not for the transmission of bus signals the IC switch to be set, high speed parallel bus interface IC by the control interior veneer changes between high-impedance state and operate as normal attitude, just realized switching on and off of bus signals, after the high speed parallel bus interface IC of interior veneer enters the operate as normal attitude, the bus signals synchronous transmission of connecting is to interface single plate, and parallel synchronous transmission on the high speed parallel bus interface IC of this interface single plate.
Therefore among this embodiment the high speed parallel bus interface IC on the network equipment internal single board in the process of interface single plate hot plug, additionally added the effect of switch, this high speed parallel bus interface IC is the device that interior veneer itself just has, therefore present embodiment is under the situation that does not increase additional devices, can realize that also the device on each equipment and the equipment is operate as normal synchronously in the process of interface single plate hot plug.
This setup shown in the present embodiment is only applicable to that high speed parallel bus is the situation of point-to-point transmission between network equipment internal single board and the interface single plate, this is to be set to high-impedance state and to realize because the hot plug of interface single plate is high speed bus interface IC by interior veneer, that is to say it is that data transmission by interrupting the interior veneer high speed parallel bus realizes, a plurality of interface single plates are parallel to be connected on the public high speed parallel bus interface IC of this interior veneer if the outside has, the hot plug of any one external interface veneer all can interior veneer interface IC be set to high-impedance state, therefore can influence this interface IC the interface single plate of other operate as normal is carried out the process of data transmission, so this mode only is applicable to the situation of the corresponding external interface veneer of interior veneer.
The inventive method the 4th embodiment:
The realization block diagram of the inventive method the 4th embodiment as shown in Figure 9.The figure shows the situation that has high speed parallel bus interface IC and low speed bus interface IC in the interface single plate simultaneously, high speed parallel bus interface IC is owing to need input or output high-speed bus signal (high speed input signal in the figure, the high speed output signal, the high-speed bidirectional signal), therefore in the process of interface single plate hot plug, need to control this interface IC and be operated in high-impedance state and operate as normal attitude by jtag interface simulation and control circuit, to finish the function that in the hot plug process high-speed bus signal is switched on and off, guarantee can not produce delay inequality in the high-speed bus signal input, interface single plate can operate as normal.Consistent among the course of work of high speed parallel bus interface IC and the embodiment two when being electrically interposed on this interface single plate, do not repeat them here.
And in the interface single plate hot plug process, low speed bus interface IC on this interface single plate and low speed bus signal (low speed input signal, the low speed output signal, the low-speed bidirectional signal) links to each other, controlling this low speed bus signal switches on and off still and can use electronic switch, because compare with the transmission speed of low speed bus signal, the time-delay of electronic switch and delay inequality can be ignored, when the power control circuit on the interface single plate receives on the interface board that interior veneer sends, during following electric control signal, power switch on this power control circuit control interface veneer and low speed signal switch are closed simultaneously to be connected, finish interface single plate on be electrically interposed in.
The bus signal control system first embodiment block diagram of the present invention realizes among this embodiment that the high speed bus interface device of state exchange function is positioned on the interface single plate as shown in figure 10.
This system comprises: interface single plate S1 and network equipment internal single board S2.Interface single plate S1 comprises high speed bus interface device S11, when interface single plate S1 conversion work state, make high speed bus interface device S11 enter high-impedance state, and interface single plate S1 conversion work state make high speed bus interface device S11 enter the operate as normal attitude when finishing.
Interface single plate S1 also comprises jtag interface analog control circuit S12, be used for to high speed bus interface device output interface sequential, the command word that this interface sequence enters high-impedance state for triggering high speed bus interface device S11, or for triggering the command word that high speed bus interface device S11 enters the operate as normal attitude; Command executing unit S13 after being used to receive the command word of jtag interface analog control circuit S12 transmission, makes high speed bus interface device S11 enter high-impedance state or operate as normal attitude.Power supply unit S14, when being used for interface single plate S1 insertion network equipment internal single board S2, jtag interface analog control circuit S12 is this high speed bus interface device S11 and jtag interface analog control circuit S12 power supply before high speed bus interface device S11 output interface sequential; Send signal element S15, be used for the transmit status indicator signal to network equipment internal single board S2.
Network equipment internal single board S2 comprises return signal cell S 21, is used for returning according to condition indicative signal powering on or down power connection or the disconnection on the electric control signal control interface veneer S1.
The bus signal control system second embodiment block diagram of the present invention realizes among this embodiment that the high speed bus interface device of state exchange function is positioned on the network equipment internal single board as shown in figure 11.
This system comprises: network equipment internal single board S3 and interface single plate S4.Network equipment internal single board S3 comprises high speed bus interface device S31, when interface single plate S4 conversion work state, make high speed bus interface device S31 enter high-impedance state, and interface single plate S4 conversion work state make high speed bus interface device S31 enter the operate as normal attitude when finishing.
Network equipment internal single board S3 also comprises jtag interface analog control circuit S32, be used for to high speed bus interface device S31 output interface sequential, the command word that this interface sequence enters high-impedance state for triggering high speed bus interface device S31, or for triggering the command word that high speed bus interface device S31 enters the operate as normal attitude; Command executing unit S33 after being used to receive the command word of jtag interface analog control circuit S32 transmission, makes high speed bus interface device S31 enter high-impedance state or operate as normal attitude.
Also comprise return signal cell S 34 on the network equipment internal single board S3, be used for returning and power on or down power connection or the disconnection on the electric control signal control interface veneer S4 according to condition indicative signal.
Interface single plate S4 comprises transmission signal element S41, is used for the transmit status indicator signal to network equipment internal single board S3.
The embodiment block diagram of interface single plate of the present invention as shown in figure 12, this interface single plate comprises high speed bus interface device, power supply and the internal circuit of finishing various functions, for convenience of explanation, power supply and various internal circuit do not draw in the block diagram of Figure 12:
This interface single plate comprises: high speed bus interface device S51, when being further used for interface single plate conversion work state, make the high speed bus interface device S51 on this interface single plate enter high-impedance state, and when interface single plate conversion work state is finished, make high speed bus interface device S51 enter the operate as normal attitude.This interface single plate also comprises jtag interface analog control circuit S52, be used for to high speed bus interface device S51 output interface sequential, the command word that this interface sequence enters high-impedance state for triggering high speed bus interface device S51, or for triggering the command word that high speed bus interface device S51 enters the operate as normal attitude; Command executing unit S53 after being used to receive the command word of jtag interface analog control circuit S52 transmission, makes high speed bus interface device S5 enter high-impedance state or operate as normal attitude.
This interface single plate also comprises power supply unit S54, when being used for interface single plate insertion network equipment internal single board, jtag interface analog control circuit S52 is this high speed bus interface device S51 and this jtag interface analog control circuit S52 power supply before high speed bus interface device S51 output interface sequential; Send signal element S55, be used for the transmit status indicator signal to network equipment internal single board.
The embodiment block diagram of network equipment internal single board of the present invention as shown in figure 13, this interior veneer comprises high speed bus interface device, power supply and the internal circuit of finishing various functions, for convenience of explanation, power supply and various internal circuit do not draw in the block diagram of Figure 13:
This network equipment internal single board comprises: high speed bus interface device S61, when being further used for the interface single plate conversion work state corresponding with this interior veneer, make this high speed bus interface device S61 enter high-impedance state, and when interface single plate conversion work state is finished, make high speed bus interface device S61 enter the operate as normal attitude.This network equipment internal single board also comprises jtag interface analog control circuit S62, be used for to high speed bus interface device S61 output interface sequential, the command word that this interface sequence enters high-impedance state for triggering high speed bus interface device S61, or for triggering the command word that high speed bus interface device S61 enters the operate as normal attitude; Command executing unit S63 after being used to receive the command word of jtag interface analog control circuit S62 transmission, makes high speed bus interface device S61 enter high-impedance state or operate as normal attitude.
This network equipment internal single board also comprises return signal cell S 64, be used for condition indicative signal that the receiving interface veneer sends after, return according to condition indicative signal and to power on or power connection or the disconnection on the electric control signal control interface veneer down.
By the description of the above embodiment of the invention as can be known, the present invention has used the signal lag difference all can not appear in the high speed parallel bus interface device when bus signals inputs or outputs characteristic, change between high-impedance state and operate as normal attitude by control high speed parallel bus interface device, just can realize switching on and off of bus signals, and because this high speed parallel bus interface device is the device that veneer itself just has, so the present invention can be under the situation that does not increase additional devices, when the interface single plate hot plug, can overcome the delay inequality of bus signals, make all energy operate as normal of interface single plate and network equipment internal single board.
Though described the present invention by embodiment, those of ordinary skills know, the present invention has many distortion and variation and do not break away from spirit of the present invention, wish that appended claim comprises these distortion and variation and do not break away from spirit of the present invention.
Claims (18)
1. a bus signal control method is characterized in that, the jtag interface analog control circuit is set, and comprising:
When A, interface single plate conversion work state, send command word by described jtag interface analog control circuit to the high speed bus interface device, described command word makes the high speed bus interface device enter high-impedance state, through bus signals sync break under described high-impedance state of described high speed bus interface device;
B, when interface single plate conversion work state is finished, send command word by described jtag interface analog control circuit to the high speed bus interface device, described command word makes the high speed bus interface device enter the operate as normal attitude from described high-impedance state, and described bus signals recovers transmission synchronously under described operate as normal attitude.
2. method according to claim 1 is characterized in that, described interface single plate conversion work state comprises: described interface single plate is extracted from network equipment internal single board, or described interface single plate is inserted on the network equipment internal single board.
3. method according to claim 1 is characterized in that, described steps A high speed bus interface device enters high-impedance state and realizes by following steps:
Described jtag interface analog control circuit is to high speed bus interface device output interface sequential, and described interface sequence is for triggering the command word that the high speed bus interface device enters high-impedance state;
After receiving described command word, described high speed bus interface device enters high-impedance state.
4. method according to claim 1 is characterized in that, described step B high speed bus interface device enters the operate as normal attitude and realizes by following steps:
Described jtag interface analog control circuit is to high speed bus interface device output interface sequential, and described interface sequence is for triggering the command word that the high speed bus interface device enters the operate as normal attitude;
Described high speed bus interface device enters the operate as normal attitude after receiving described command word.
5. method according to claim 4 is characterized in that, described high speed bus interface device is positioned on the described interface single plate, or described high speed bus interface device is positioned on the described network equipment internal single board.
6. method according to claim 5, it is characterized in that, the high speed bus interface device is positioned on the described interface single plate and interface single plate when being inserted into network equipment internal single board, and described jtag interface analog control circuit sends command word to described high speed bus interface device and takes a step forward and comprise: the power supply on the described interface single plate is described high speed bus interface device and the power supply of described jtag interface analog control circuit.
7. method according to claim 2 is characterized in that, further comprises between described steps A and the step B:
Described interface single plate transmit status indicator signal is to network equipment internal single board;
Network equipment internal single board returns according to described condition indicative signal and powers on or down power connection or the disconnection on the electric control signal control interface veneer.
8. bus signal control system, comprise interface single plate and network equipment internal single board, it is characterized in that on any one veneer in described interface single plate and the network equipment internal single board jtag interface analog control circuit is set, described any one veneer is further used for:
When described interface single plate conversion work state, command word by described jtag interface analog control circuit transmission, make the high speed bus interface device on this any one veneer enter high-impedance state, and when described interface single plate conversion work state is finished, command word by described jtag interface analog control circuit sends makes described high speed bus interface device enter the operate as normal attitude.
9. system according to claim 8 is characterized in that, described any one veneer further comprises command executing unit,
Described jtag interface analog control circuit, specifically be used for to described high speed bus interface device output interface sequential, the command word that described interface sequence enters high-impedance state for triggering high speed bus interface device, or for triggering the command word that the high speed bus interface device enters the operate as normal attitude;
Described command executing unit after being used to receive the command word of described jtag interface analog control circuit transmission, makes described high speed bus interface device enter high-impedance state or operate as normal attitude.
10. system according to claim 9 is characterized in that, described high speed bus interface device is positioned on the described interface single plate, and described interface single plate further comprises:
Power supply unit, when being used for interface single plate insertion network equipment internal single board, described jtag interface analog control circuit is this high speed bus interface device and the power supply of described jtag interface analog control circuit before high speed bus interface device output interface sequential.
11. system according to claim 8 is characterized in that, described system further comprises:
Send signal element, be positioned on the described interface single plate, be used for the transmit status indicator signal to network equipment internal single board;
The return signal unit is positioned on the described network equipment internal single board, is used for returning according to described condition indicative signal powering on or down power connection or the disconnection on the electric control signal control interface veneer.
12. an interface single plate comprises high speed bus interface device, power supply and internal circuit, it is characterized in that, also comprises the jtag interface analog control circuit, described high speed bus interface device is further used for:
During described interface single plate conversion work state, command word by described jtag interface analog control circuit transmission, make the high speed bus interface device on this interface single plate enter high-impedance state, and when described interface single plate conversion work state is finished, command word by described jtag interface analog control circuit sends makes described high speed bus interface device enter the operate as normal attitude.
13. interface single plate according to claim 12 is characterized in that, described interface single plate further comprises command executing unit,
Described jtag interface analog control circuit, specifically be used for to described high speed bus interface device output interface sequential, the command word that described interface sequence enters high-impedance state for triggering high speed bus interface device, or for triggering the command word that the high speed bus interface device enters the operate as normal attitude;
Described command executing unit after being used to receive the command word of described jtag interface analog control circuit transmission, makes described high speed bus interface device enter high-impedance state or operate as normal attitude.
14. interface single plate according to claim 13 is characterized in that, described interface single plate further comprises:
Power supply unit, when being used for interface single plate insertion network equipment internal single board, described jtag interface analog control circuit is the power supply of this high speed bus interface device and described jtag interface analog control circuit before high speed bus interface device output interface sequential.
15. interface single plate according to claim 12 is characterized in that, described interface single plate further comprises:
Send signal element, be used for the transmit status indicator signal to network equipment internal single board.
16. a network equipment internal single board comprises high speed parallel bus interface device, power supply and internal circuit, it is characterized in that, also comprises the jtag interface analog control circuit, described high speed parallel bus interface device is further used for:
During the interface single plate conversion work state corresponding with described interior veneer, command word by described jtag interface analog control circuit transmission, make this high speed bus interface device enter high-impedance state, and when described interface single plate conversion work state is finished, command word by described jtag interface analog control circuit sends makes described high speed bus interface device enter the operate as normal attitude.
17. interior veneer according to claim 16 is characterized in that, described network equipment internal single board further comprises command executing unit,
Described jtag interface analog control circuit, specifically be used for to described high speed bus interface device output interface sequential, the command word that described interface sequence enters high-impedance state for triggering high speed bus interface device, or for triggering the command word that the high speed bus interface device enters the operate as normal attitude;
Described command executing unit after being used to receive the command word of described jtag interface analog control circuit transmission, makes described high speed bus interface device enter high-impedance state or operate as normal attitude.
18. interior veneer according to claim 16 is characterized in that, described interior veneer further comprises:
The return signal unit, be used for condition indicative signal that the receiving interface veneer sends after, return according to described condition indicative signal and to power on or power connection or the disconnection on the electric control signal control interface veneer down.
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| CN200710087498XA CN101046793B (en) | 2007-03-19 | 2007-03-19 | Bus signal control method, system, interface single plate and network equipment internal single board |
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| CN200710087498XA CN101046793B (en) | 2007-03-19 | 2007-03-19 | Bus signal control method, system, interface single plate and network equipment internal single board |
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| CN102622075B (en) * | 2011-01-26 | 2015-06-10 | 鼎桥通信技术有限公司 | Dynamic energy-saving control method and device for high-speed serial interface |
| CN102664622A (en) * | 2012-02-29 | 2012-09-12 | 哈尔滨工业大学 | Control system and method of matrix switch supportive of four working modes |
| CN102565461B (en) * | 2012-02-29 | 2014-04-02 | 哈尔滨工业大学 | Real-time on-off times recording device for relay in matrix switch module and method for realizing on-off times recording by employing same |
| CN107135514A (en) * | 2016-02-26 | 2017-09-05 | 大唐移动通信设备有限公司 | Electric control method and device on a kind of BBU of base station machine frame |
| CN105955911B (en) * | 2016-05-09 | 2023-06-02 | 杭州宏杉科技股份有限公司 | Hot plug control circuit and control method thereof |
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