CN101041415A - Method for making nano hole on silicon chip - Google Patents
Method for making nano hole on silicon chip Download PDFInfo
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- CN101041415A CN101041415A CN 200610097417 CN200610097417A CN101041415A CN 101041415 A CN101041415 A CN 101041415A CN 200610097417 CN200610097417 CN 200610097417 CN 200610097417 A CN200610097417 A CN 200610097417A CN 101041415 A CN101041415 A CN 101041415A
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Abstract
The invention relates to a preparing method for nanometer pore on silicon wafer directly by alternating tip electric field, which is simple and easy operation. At first, silicon single wafer or silicon wafer with modified hydrophobic or hydrophilic single layer on the surface by chemical bonding or physical absorption is fixed on the sample stage; then a program is started to control the distance between the tip and the sample and the relative motion; AC voltage pulse is sent between said sample and the tip to form the nanometer pore on said sample. Not only it is provided with simple equipment and convenience operation but also diameter and depth of nanometer pore can be controlled accurately and easily. It can be applied in information storage field and nano-electronic device preparation so on.
Description
Technical field
What the present invention relates to is a kind of method of utilizing alternation needle point electric field directly to make nano-pore on silicon chip, belongs to nano-device manufacturing and technical field of information storage.
Background technology
Nano-pore on the silicon chip has multiple use, can directly be used as 2 D photon crystal; Growth templates as special nanostructured; Can be used for fixedly that nano particle forms various two dimensions or three-D pattern, compare the position that accurately to control nano particle with self assembly; Can be used for probe molecules such as the big molecule of fixed biologically, make biochip; Also can be used as the micro-nano reactor, research monomolecular reaction etc.Utilize the needle point electric field to induce local oxidation formation silica quantum point on silicon chip, corrode with corrosive agent hydrofluoric acid, NaOH or tetramethyl ammonium hydroxide solution then, on silicon chip, can prepare nano-pore.But this method step is loaded down with trivial details, the reaming phenomenon can occur in the corrosion process, and is difficult to obtain darker nano-pore.The method that directly forms nano-pore at present on silicon chip mainly is focused particle beam (FIB) and electron beam exposure (ELB), and these two kinds of methods can be controlled accurately to aperture, the degree of depth and the angle of nano-pore.But the shortcoming of these two kinds of methods is an equipment, and price own is very expensive, and process is also very consuming time, is unfavorable for applying.
Summary of the invention
Technical problem: the purpose of this invention is to provide a kind of method of utilizing the needle point alternating electric field to prepare nano-pore on silicon chip, the aperture of nano-pore, depth controlled can be used for nanoprocessing manufacturing and area information storage.
Technical scheme: the method for preparing nano-pore on the silicon chip of the present invention is:
Silicon chip is carried out flatness and hydrophobic, hydrophilic treated, form the smooth sample surfaces of large tracts of land.Silicon chip is fixed on the sample platform, and the distance of control silicon chip and needle point and needle point apply pulse voltage in the position of silicon chip surface between described silicon chip sample and needle point, form nano-pore on described silicon chip sample.
Described silicon chip sample is not modified n type or p type silicon chip, and perhaps the n type or the p type silicon chip of hydrophilic or hydrophobic monomolecular film modified on the surface by chemical bonding or physical absorption; Used silicon chip, its high preferred orientation are 111,100,110,911.Described needle point is the metal needle point, or the conductive semiconductor silicon needle point of surperficial evaporation platinum or platinumiridio or platinum-rhodium alloy or gold.The voltage that is applied is alternating-current pulse, its frequency at 1 hertz to 1.0 * 10
8Hertz, pulse voltage amplitude is the 5-100 volt, pulse operating time is 0.1 microsecond to 10 second.The distance of described silicon chip and needle point is 0~5 micron.
Implementation result: the present invention utilizes the needle point alternating electric field directly to prepare nano-pore at the bottom of the silicon wafer-based, have the following advantages: the first, directly on silicon chip, prepare nano-pore, with earlier silicon chip being carried out local oxidation, and then compare with corrosive wet chemical methods such as hydrofluoric acid, NaOH, step is simple, is easy to realize the control to aperture and hole depth.The second, the aperture of nano-pore and hole depth can be by adjusting operating environment humidity, the intensity of pulse voltage, and in the pulse duration, the frequency of the pulse voltage of using realizes.Three, the present invention is easy to operate simple, saves time than focused particle beam and electron beam exposure, is easy to combine with other microelectronics processing modes.The 4th, used material is silicon chip or the silicon chip that passed through finishing.Silicon is very stable in the chemical property of room temperature, and present technique for processing silicon chip, is easy to prepare the silicon chip of large scale flatness in nano-scale, makes this method be expected to be used for information storage technology.
Description of drawings
Fig. 1 is a principle of the invention schematic diagram.Wherein have: needle point 1, silicon chip 2,, electric field 3, power supply 4.
Fig. 2 is that the invention process one example is at not modified (111) making nano hole on silicon chip.Wherein, Fig. 2 (a) is the AFM pattern phase of silicon (111) monocrystalline crystal face; Fig. 2 (b) is shown in being after applying the pulse of 2s that the 20V frequency is 10KHz between needle point and the sample, the nano aperture of formation.
The specific embodiment
The present invention uses alternation needle point electric field in the principle of making nano hole on silicon chip as shown in Figure 1, produce alternating-current pulse by external power supply 4, make to produce local highfield 3 between needle point 1 and the silicon chip 2, induce silicon chip 2 that the reaction of local Thermochemical Decomposition takes place, form the hole of nanoscale.
The present invention makes the method for silicon nano hole, carry out as follows: with silicon single crystal flake or the surperficial silicon chip of modifying hydrophobic or hydrophilic self-assembled monolayer by chemical bonding or physical absorption, be fixed on the sample platform, distance and needle point are in the position of silicon chip surface between control silicon chip sample and the needle point, between above-mentioned sample and described needle point, apply potential pulse, can on above-mentioned sample, form the hole of nanoscale.Wherein, needle point can be the metal needle point, or the semiconductor silicon needle point of surperficial evaporation platinum, platinumiridio, gold; Described potential pulse is an alternating-current pulse, its frequency at 1 hertz to 1.0 * 10
8Hertz, pulse voltage amplitude is the 5-100 volt, pulse operating time is 0.1 microsecond to 10 second.Used silicon chip is not modified n type or p type silicon chip, and perhaps the n type or the p type silicon chip of hydrophilic or hydrophobic monomolecular film modified on the surface by chemical bonding or physical absorption; Used silicon chip, its high preferred orientation are 111,100,110,911.
Embodiment 1: going up the making nano-pore with atomic-force microscope needle-tip at not modified silicon chip (111) is that example illustrates nano-pore preparation process of the present invention:
Fig. 2 (a) is the AFM pattern phase of silicon (111) monocrystalline crystal face.Silicon (111) single crystal samples is fixed on AFM with conducting resinl, and (as Molecular Imaging, USA) on the sample platform of instrument, used needle point is a commodity AFM platinum needle point.Use the contained inscription module of AFM itself, after applying the pulse of 2s that the 20V frequency is 10KHz between silicon (111) single facet and the atomic-force microscope needle-tip, the nano aperture of formation: the aperture is about 200nm, and the degree of depth in hole is 4nm., confirm whether to form nano-pore by the AFM imaging then.Shown in Fig. 2 (b).
Claims (5)
1. method that on silicon chip, prepares nano-pore, it is characterized in that the method for preparing is: silicon chip is fixed on the sample platform, the distance of control silicon chip and needle point and needle point are in the position of silicon chip surface, between described silicon chip sample and needle point, apply pulse voltage, on described silicon chip sample, form nano-pore.
2. the method that on silicon chip, prepares nano-pore according to claim 1, it is characterized in that described silicon chip sample is not modified n type or p type silicon chip, perhaps the n type or the p type silicon chip of hydrophilic or hydrophobic monomolecular film modified on the surface by chemical bonding or physical absorption; Used silicon chip, its high preferred orientation are 111,100,110,911.
3. the method for preparing nano-pore on silicon chip according to claim 1 is characterized in that described needle point is the metal needle point, or the conductive semiconductor silicon needle point of surperficial evaporation platinum or platinumiridio or platinum-rhodium alloy or gold.
4. the method for preparing nano-pore on silicon chip according to claim 1 is characterized in that the voltage that is applied is alternating-current pulse, its frequency at 1 hertz to 1.0 * 10
8Hertz, pulse voltage amplitude is the 5-100 volt, pulse operating time is 0.1 microsecond to 10 second.
5. the method for preparing nano-pore on silicon chip according to claim 1, the distance that it is characterized in that described silicon chip and needle point is 0~5 micron.
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CN200610097417XA CN101041415B (en) | 2006-11-07 | 2006-11-07 | Method for making nano hole on silicon chip |
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CN200610097417XA CN101041415B (en) | 2006-11-07 | 2006-11-07 | Method for making nano hole on silicon chip |
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CN101041415B CN101041415B (en) | 2010-08-11 |
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Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
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CN103594334A (en) * | 2013-11-21 | 2014-02-19 | 中国科学院半导体研究所 | MBE method for growing locating quantum dots on patterned substrate through AFM nanoimprinting |
CN104034296A (en) * | 2014-06-30 | 2014-09-10 | 西南交通大学 | Detection method for thickness of monocrystalline silicon surface scratch damaged layer |
CN104711678A (en) * | 2015-02-04 | 2015-06-17 | 杭州电子科技大学 | Method for preparing silicon nanostructure material under alternative electric fields |
CN109824012A (en) * | 2019-01-18 | 2019-05-31 | 广东工业大学 | A kind of nano-pore accurate manufacture process |
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US5838005A (en) * | 1995-05-11 | 1998-11-17 | The Regents Of The University Of California | Use of focused ion and electron beams for fabricating a sensor on a probe tip used for scanning multiprobe microscopy and the like |
JP4634692B2 (en) * | 2001-01-31 | 2011-02-16 | エレクトロ サイエンティフィック インダストリーズ インコーポレーテッド | Laser processing method |
CN1329905C (en) * | 2004-12-09 | 2007-08-01 | 江苏大学 | Nano class processing method for energizing impression |
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Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103594334A (en) * | 2013-11-21 | 2014-02-19 | 中国科学院半导体研究所 | MBE method for growing locating quantum dots on patterned substrate through AFM nanoimprinting |
CN104034296A (en) * | 2014-06-30 | 2014-09-10 | 西南交通大学 | Detection method for thickness of monocrystalline silicon surface scratch damaged layer |
CN104711678A (en) * | 2015-02-04 | 2015-06-17 | 杭州电子科技大学 | Method for preparing silicon nanostructure material under alternative electric fields |
CN104711678B (en) * | 2015-02-04 | 2017-07-04 | 杭州电子科技大学 | A kind of method that silicon nanostructure material is prepared under alternating electric field |
CN109824012A (en) * | 2019-01-18 | 2019-05-31 | 广东工业大学 | A kind of nano-pore accurate manufacture process |
CN109824012B (en) * | 2019-01-18 | 2020-01-17 | 广东工业大学 | Accurate manufacturing method of nano-pore |
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