CN101022262A - Clamping five level variable frequency driving device utilizing internal and external ring double-group rectifier bridge - Google Patents
Clamping five level variable frequency driving device utilizing internal and external ring double-group rectifier bridge Download PDFInfo
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Abstract
A clamp five level frequency conversion driving device with internal and external double-set of rectification bridge is prepared as forming master circuit by two sets of non-controllable rectification bridges and clamp five level inverter, selecting intermediate DC clamp capacity according system voltage level, using diode clamp five level structure as inverter and semiconductor switching component as master switch as well as using controller to generate PWM control signal by applying digital signal microprocessor as kernel.
Description
Technical field
The present invention relates to many level of power electronics topological structure, specifically be meant a kind of topology of 5 level frequency variant speed regulating device.
Background technology
Below the existing alternating current motor 200kW of China is low pressure 380V, and the above electric moter voltage grade of 200kW mostly is 6kV and 10kV.Because be subjected to the restriction of power device withstand voltage level and current capacity, the converting means of traditional two-level inversion device is difficult to satisfy the requirement of high-power transformation of electrical energy.By contrast, multi-level converter and correlation technique thereof have many remarkable advantages, are thought by industry to have broad application prospects in the high-voltage large-capacity field.Therefore, research high-voltage large-capacity electric machine speed regulation technology for reducing China's per unit area yield energy consumption and cost, is enhanced productivity and benefit, and increasing international competitiveness has strategic meaning.
Multi-electrical level inverter mainly has the following advantages: near sinusoidal, voltage harmonic content is little more for (1), output voltage.(2), output voltage dv/dt is little, and is little to the insulation influence of load (such as motor), reduces the level of electromagnetic interference simultaneously greatly.(3), the single tube with low withstand voltage level constitutes high-pressure system, the single tube problem of withstand voltage of solution high-pressure system.
The mesohigh converter plant of employing multilevel converter has the converter plant of voltage-type H bridge tandem type converter plant and many level of AC-DC-AC voltage-type structure at present, and the application of this two classes converter plant has obtained certain effect, but also has some problems.
The general structure of main circuit of existing H bridge tandem type frequency converter is shown in Figure 1, multipleization of secondary phase shift isolating transformer provides the three-phase alternating current input for each H bridge power unit among Fig. 1 a, each H bridge power unit is that three-phase is not controlled rectification and two level H-bridge inverter structures, shown in Fig. 1 b, each H bridge uses the low tension switch device, and the output series connection of a plurality of H bridges unit realizes high pressure output, the more approaching sine of output voltage waveforms, without output filter, the current on line side harmonic wave is little simultaneously.The shortcoming of this structure is also clearly: because the output voltage grade is high more, series connection power cell number is also many more, general output 6kV is 5~7 grades of power unit cascades, output 10kV is 8~10 grades of power unit cascades, the secondary winding of required like this phase shift isolating transformer is a lot, need 15~30 groups of secondary three phase windings, the cost of general phase shift isolating transformer has accounted for more than 1/3rd of system cost.Therefore, phase shift isolating transformer volume is big, wiring is complicated, manufacture difficulty increases, and cost also increases a lot, becomes bottleneck.
Existing AC-DC-AC voltage-type multi-level frequency conversion apparatus structure, prime are handed over-the uncontrollable rectifiers of straight partly many employings, and to obtain DC bus-bar voltage, a back grade straight-friendship part adopts multi-electrical level inverter, to obtain corresponding voltage with multiple levels output.For the multi-electrical level inverter structure of back level, main application is the diode-clamped structure at present.
The topological structure of existing diode-clamped five-level inverter as shown in the figure, this structure front end busbar voltage V
DcGiven by rectifier, four electric capacity of series connection on the bus, each capacitance equates, bears V respectively
Dc/ 4 voltage by clamping diode, makes the withstand voltage voltage levvl that remains a dc capacitor of each switching device.By switch combination, be output as the combination of 5 kinds of level, V
Dc, 3V
Dc/ 4,2V
Dc/ 4, V
Dc/ 4 and 0.But, there is theory to prove at present, under the higher or modulation ratio condition with higher, bus capacitor voltage all unsettled situation can occur to this structure, thereby causes the uncontrollable of system in power factor.In order to solve the problem of the bus capacitor balance of voltage, the structure of Fig. 3 is suggested, and this structure is linked one group of uncontrollable rectifier bridge respectively on each electric capacity, by forcing the mode of clamp, each bus capacitor voltage all is stabilized in V
DcOn/4, thereby realize the stable of whole system.But the employed rectifier bridge of this kind structure is too much, and each rectifier bridge all needs corresponding input transformer, and this makes systems bulky, and cost is too high.
Summary of the invention:
The objective of the invention is to design a kind of topological structure of AC-DC-AC voltage-type multi-level frequency conversion speed regulating device, the invention solves the problem of each flying capacitor balance of voltage on the diode-clamped five-level inverter dc bus, realized the stable and controllable that converter plant is exported in full-load range, this converter plant can be applied to mesohigh speed governing field.
The invention is characterized in, contain: one group of double winding input transformer, two groups of uncontrollable rectifier bridges, a diode-clamped five-level inverter, and total digital controller, wherein:
One group of two winding transformer, former limit input three-phase alternating current line voltage is V
1, secondary 1 output three-phase alternating voltage is V
1, secondary 2 output AC voltages are V
1/ 2;
Two groups of uncontrollable rectifier bridges are made up of the uncontrollable diode rectifier bridge of outer shroud and the uncontrollable diode rectifier bridge of interior ring, the described two winding transformer secondary 1 of the uncontrollable diode rectifier bridge input termination of outer shroud, and input voltage is V
1, output voltage is V
Dc, this two winding transformer secondary 2 of uncontrollable diode rectification bridge joint of interior ring, input voltage is V
1/ 2, output voltage is V
Dc/ 2;
The diode-clamped five-level inverter, the capacitor C of four the parameter unanimities of connecting successively on the inlet highway
4, C
3, C
2And C
1, capacitor C
1The connecting to neutral volt, capacitor C
4Connect the positive output end of the uncontrollable diode rectifier bridge of outer shroud, capacitor C
4, C
3Tie point p connect in the positive input terminal of uncontrollable diode rectifier bridge of ring, capacitor C
2, C
1Tie point n connect in the low side of uncontrollable diode rectifier bridge of ring, capacitor C
3, C
1Between middle flying capacitor voltage V
31Equal V
Dc/ 2, go up mutually in the brachium pontis and capacitor C with each behind clamping diode of described tie point p forward serial connection
4And the emitter-base bandgap grading of a switch element that connects links to each other, this p also through descending the collector electrode of a switching device in the brachium pontis to link to each other mutually behind three clamping diodes that oppositely are connected in series, connects capacitor C behind the clamping diode of the emitter-base bandgap grading of this switching device through two forwards serial connections simultaneously with each
3, C
2Tie point, described tie point n links to each other with each emitter-base bandgap grading of going up a switching device in the brachium pontis mutually after through the clamping diode of three forwards serial connection, the collector electrode of this switching device through two clamping diodes that oppositely are connected in series after with capacitor C
3, C
2Tie point link to each other, this tie point n descend the emitter-base bandgap grading of a switching device in the brachium pontis to link to each other mutually after also oppositely being connected in series a clamping diode with each simultaneously, the collector electrode forward of this switching device is connected in series behind two clamping diodes and capacitor C
3, C
2Tie point link to each other described capacitor C
3, C
2Two clamping diodes of tie point forward serial connection after link to each other described capacitor C of while with each mid point of going up brachium pontis mutually
3, C
2Tie point also oppositely be connected in series behind two clamping diodes and descend the mid point of brachium pontis to link to each other mutually with each;
Total digital controller contains: dsp processor, and output pwm signal expanded circuit and pwm signal drive circuit, wherein:
Dsp processor, its voltage analog input are respectively through voltage transformer and described capacitor C
4, C
3, C
2, C
1Two ends link to each other, according to the value of predefined electric capacity both end voltage to described each capacitor C
4, C
3, C
2, C
1The voltage at two ends carries out definite value control, and the current analog amount input of this dsp processor links to each other with line current output as the motor of controlling object through each current transformer, predicts and send real-time PWM control impuls with this; This dsp processor also is provided with three road PWM delivery outlets and an I/O assist control mouth,
The output pwm signal expanded circuit, input is connected with each output port of described dsp processor, and output is then exported 24 road pwm pulses,
The pwm signal drive circuit, 24 pwm pulse outputs of input and described output pwm signal expanded circuit link to each other, and the output of this drive circuit is then exported each switching device that 24 road pwm pulses are controlled described diode-clamped five-level inverter.
Advantage that the present invention has and wound property part:
1, with respect to traditional diode-clamped five-level structure, the invention solves the equilibrium problem of each capacitance voltage on the dc bus, realized that in full-load range the converter plant system stablizes.This RHVC can be applied to mesohigh speed governing field.
2, compare traditional topological structure (as shown in Figure 3) that passes through four groups of rectifier bridge control capacitance current potentials, the number of the minimizing rectifier bridge that the present invention can be has at double reduced the number of corresponding input transformer simultaneously, greatly reduces the cost of system.
The waveform of control technology on an experimental system that accompanying drawing 7, Fig. 8 adopt for this programme.Fig. 7 is four simulation waveforms that capacitance voltage is dynamically controlled after system start-up on the power cell bus, waveform shows adopts this programme, can realize the Balance Control of each capacitance voltage of dc bus side, make whole RHVC system works stable, and existing diode-clamped five-level converter plant no this item technology still.Fig. 8 a is the line voltage simulation waveform of the asynchronous machine that outputs to of converter plant, and Fig. 8 b is the experimental waveform of its line voltage output, and waveform shows native system scheme can realize the many level outputs of high pressure, has advantage mentioned above simultaneously.
Description of drawings:
The general structure of main circuit of the existing H bridge of Fig. 1 a tandem type high voltage converter;
The existing H bridge power unit of Fig. 1 b;
The diode-clamped five-level inverter that Fig. 2 is traditional;
The full clamp formula of Fig. 3 diode-clamped five-level inverter;
The two rectifier type diode-clamped five-level topological structures of Fig. 4 inner and outer ring;
Fig. 5 is the RHVC system construction drawing;
The circuit logic theory diagram of Fig. 6 total digital controller;
Fig. 7 a bus capacitor V
C1Voltage is the simulation waveform of control dynamically;
Fig. 7 b bus capacitor V
C2Voltage is the simulation waveform of control dynamically;
Fig. 7 c bus capacitor V
C3Voltage is the simulation waveform of control dynamically;
Fig. 7 d bus capacitor V
C4Voltage is the simulation waveform of control dynamically;
The phase voltage simulation waveform of Fig. 8 a converter plant output;
The phase voltage experimental waveform of Fig. 8 b converter plant output.
Embodiment:
Structure of the present invention as shown in Figure 4, two groups of rectifier bridges are connected in respectively on the dc bus and inner flying capacitor on, the balance of voltage of each electric capacity on the control bus, thus control diode-clamped five-level inverter export in full-load range and is stablized:
Described two groups of rectifier bridges below are referred to as outer shroud rectifier bridge and interior ring rectifier bridge respectively, and the inner and outer ring rectifier bridge all is uncontrollable rectifier bridge, and the output DC pressure ratio is 1: 2, supposes that promptly outer shroud rectifier bridge output voltage is V
Dc, then interior ring rectifier bridge output voltage is V
Dc/ 2, the ring capacitance voltage is 1/2 of total bus voltage value in so then can guaranteeing, this is equivalent to the degree of freedom of original five level structure median generatrix voltages is reduced to 1 by 3.System's output stable and controllable of this structure, and topological structure is simple: compare traditional five-electrical level inverter structure shown in Figure 2, make the bus capacitor of the uncontrollable balance controlled balance that becomes, compare four rectifier bridge clamp circuit structures shown in Figure 3, saved one times rectifier bridge and corresponding input transformer number.
Described diode-clamped five-level inverter, DC side has 4 electric capacity in the topology as shown in Figure 4, and establishing dc voltage is V
Dc, 4 even dividing potential drops of electric capacity, then the voltage of each electric capacity is V
Dc/ 4, the effect of clamping diode is the withstand voltage voltage levvl that remains certain dc capacitor that makes each switching device.By different switch combinations, can export the phase voltage combination of 5 kinds of level, V
Dc, 3V
Dc/ 4,2V
Dc/ 4, V
Dc/ 4 and 0.
The stable output of described full-load range, present existing result of study shows, diode-clamped five-level inverter structure as shown in Figure 2, when the power-factor of load higher, the uncontrollable balance of bus capacitor voltage makes whole frequency conversion speed-adjusting system cisco unity malfunction.Purpose of the present invention is exactly to propose new topological structure, makes converter plant in total power factor scope, and complete modulation is than realizing system stability output in the scope.
The RHVC system configuration as shown in Figure 5, wherein clamping capacitance voltage detecting link is attempted by on the clamping capacitance by voltage sensor, detects clamping capacitance voltage, realizes the capacitance voltage balance by software control.The output current of sampling is simultaneously imported total digital controller with it as feedback signal, goes out corresponding PWM pulse-width signal, the operating state of coming the control of conversion speed regulating device by the total digital controller calculating and sending.
Described total digital controller comprises the drive circuit of digital signal microprocessor, pulse-width signal expanded circuit and pulse-width signal:
Described digital signal microprocessor, its analog input are four bus capacitor magnitudes of voltage, carry out conversion through the analog input interface circuit, are input to the analog-to-digital conversion interface of digital signal microprocessor then; Digital signal microprocessor comprises three tunnel pulse-width modulation delivery outlets and as 1 I/O mouth of assist control line;
Described pulse-width signal expanded circuit, it is a Field Programmable Gate Array device, three tunnel pulse-width modulation delivery outlets of digital signal microprocessor and be connected to the pulse-width signal expanded circuit as 1 I/O mouth of assist control line, described pulse-width signal expanded circuit is exported 24 road width-modulation pulse signals, described 1 I/O mouth as fault time control block pwm pulse output;
The drive circuit of described pulse-width signal, import 24 road width-modulation pulse signals of described pulse-width signal expanded circuit output, export corresponding pulse-width modulation power drive signal, described pulse-width modulation power drive signal is connected to device for power switching corresponding on each phase brachium pontis of described diode-clamped inverter.
For achieving the above object, the present invention adopts following scheme:
Topology of the present invention is by one group of double winding input transformer, two groups of uncontrollable rectifier bridges, and diode-clamped five-level inverter and total digital controller are formed, and see shown in Figure 4.
Described double winding input transformer is that no-load voltage ratio is the AC transformer of 2: 2 and 2: 1, supposes that former limit input three-phase alternating current line voltage is V
1, then secondary 1 output three-phase alternating voltage is V
1, secondary 2 output V
1/ 2.
Described two groups of diode rectifier bridges that uncontrollable rectifier bridge is a traditional structure below are referred to as outer shroud rectifier bridge and interior ring rectifier bridge respectively, and the uncontrollable rectifier bridge input of outer shroud connects transformer secondary 1, and input voltage is V
1, establishing its output voltage is V
Dc, the uncontrollable rectifier bridge input of interior ring connects transformer secondary 2, and input voltage is V
1/ 2, then its output voltage is V
Dc/ 2.
Described diode-clamped five-level inverter (hereinafter to be referred as inverter), four electric capacity of series connection on the inlet highway, the parameter unanimity of each electric capacity, as shown in Figure 4.Wherein, the busbar voltage V of inverter
40Connect the output of the uncontrollable rectifier bridge of described outer shroud, voltage is V
Dc, the middle flying capacitor voltage V of inverter
31Connect the output of the uncontrollable rectifier bridge of described interior ring, voltage is V
Dc/ 2.The voltage of each electric capacity adopts the software control balance on the bus, remains on V
Dc/ 4, by clamping diode with each mutually the switching device of brachium pontis link to each other, thereby make each switching device withstand voltagely remain on certain capacitance voltage level, by different switch combinations, can export the phase voltage combination of 5 kinds of level.According to the withstand voltage rank of switching tube, can realize the motor of different electric pressures is carried out frequency control in full-load range, withstand voltage as switching device is 3300V, then can realize the motor of 6kV electric pressure is carried out frequency control in full-load range.
The circuit logic theory diagram of described total digital controller is seen accompanying drawing 6, is core with high performance digital signal microprocessor (DigitalSignal Processor) as the TMS320LF2812 of TI company, with three road PWM delivery outlets and 1 I/O mouth as the assist control line, expand to 24 road PWM output by Field Programmable Gate Array device (Field Programmable Gate Array/ComplexProgrammable Logic Device) as EPM7128S, generate 24 the road through drive circuit then and drive pwm pulse signal, remove to trigger 24 power semiconductor switchs, pwm pulse output was blocked in control when wherein 1 I/O mouth was as fault.The analog input interface circuit is finished the function of signal condition and isolation, four capacitance voltage signals on the 4 tunnel detected buses is carried out being input to after the conversion analog-to-digital conversion mouth of DSP.Software calculates the deviation of 4 capacitance voltage values and setting in real time, prediction is also sent real-time PWM control impuls, dynamically control each capacitance voltage in set point with this, finish the dynamic control of each capacitance voltage balance, realize the stable operation of whole RHVC, simultaneously the also alternating voltage output of control of conversion device of pwm signal that generates by software.Man-machine interface and communication unit are finished by serial communication interface that keyboard shows and are communicated by letter with PC and the function of monitoring; The switching value input-output unit is finished the monitoring, power device overcurrent of system running state, failure protection function such as overheated, and other peripheral controlled function require to decide on specific implementation.
Claims (1)
1, adopt the internal and external ring double-group rectifier bridge clamping five level variable frequency driving device, it is characterized in that, contain: one group of double winding input transformer, two groups of uncontrollable rectifier bridges, a diode-clamped five-level inverter, and total digital controller, wherein:
One group of two winding transformer, former limit input three-phase alternating current line voltage is V
1, secondary 1 output three-phase alternating voltage is V
1, secondary 2 output AC voltages are V
1/ 2;
Two groups of uncontrollable rectifier bridges are made up of the uncontrollable diode rectifier bridge of outer shroud and the uncontrollable diode rectifier bridge of interior ring, the described two winding transformer secondary 1 of the uncontrollable diode rectifier bridge input termination of outer shroud, and input voltage is V
1, output voltage is V
Dc, this two winding transformer secondary 2 of uncontrollable diode rectification bridge joint of interior ring, input voltage is V
1/ 2, output voltage is V
Dc/ 2;
The diode-clamped five-level inverter, the electric capacity (C of four the parameter unanimities of connecting successively on the inlet highway
4), (C
3), (C
2) and (C
1), electric capacity (C
1) the connecting to neutral volt, electric capacity (C
4) connect the positive output end of the uncontrollable diode rectifier bridge of outer shroud, electric capacity (C
4), (C
3) tie point (p) connect in the positive input terminal of uncontrollable diode rectifier bridge of ring, electric capacity (C
2), (C
1) tie point (n) connect in the low side of uncontrollable diode rectifier bridge of ring, electric capacity (C
3), (C
1) between middle flying capacitor voltage V
31Equal V
Dc/ 2, go up mutually in the brachium pontis and electric capacity (C with each behind clamping diode of described tie point (p) forward serial connection
4) and the emitter-base bandgap grading of a switch element connecing link to each other, this point (p) also through descending the collector electrode of a switching device in the brachium pontis to link to each other mutually behind three reed position diodes that oppositely are connected in series, connects electric capacity (C behind the clamping diode of the emitter-base bandgap grading of this switching device through two forwards serial connections simultaneously with each
3), (C
2) tie point, described tie point (n) links to each other with each emitter-base bandgap grading of going up a switching device in the brachium pontis mutually after through the reed position diode of three forwards serial connection, the collector electrode of this switching device through two clamping diodes that oppositely are connected in series after with electric capacity (C
3), (C
2) tie point link to each other, this tie point (n) also oppositely descend the emitter-base bandgap grading of a switching device in the brachium pontis to link to each other mutually behind clamping diode of serial connection with each simultaneously, the collector electrode forward of this switching device is connected in series behind two clamping diodes and electric capacity (C
3), (C
2) tie point link to each other described electric capacity (C
3), (C
2) two clamping diodes of tie point forward serial connection after link to each other described electric capacity (C of while with each mid point of going up brachium pontis mutually
3), (C
2) tie point also oppositely be connected in series behind two clamping diodes and descend the mid point of brachium pontis to link to each other mutually with each;
Total digital controller contains: dsp processor, and output pwm signal expanded circuit and pwm signal drive circuit, wherein:
Dsp processor, its voltage analog input are respectively through voltage transformer and described electric capacity (C
4), (C
3), (C
2), (C
1) two ends link to each other, according to the value of predefined electric capacity both end voltage to described each electric capacity (C
4), (C
3), (C
2), (C
1) voltage at two ends carries out definite value control, the current analog amount input of this dsp processor links to each other with line current output as the motor of controlling object through each current transformer, predicts and send real-time PWM control impuls with this; This dsp processor also is provided with three road PWM delivery outlets and an I/O assist control mouth,
The output pwm signal expanded circuit, input is connected with each output port of described dsp processor, and output is then exported 24 road pwm pulses,
The pwm signal drive circuit, 24 pwm pulse outputs of input and described output pwm signal expanded circuit link to each other, and the output of this drive circuit is then exported each switching device that 24 road pwm pulses are controlled described diode-clamped five-level inverter.
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