CN101021740A - Method and system for realizing one board forced resetting - Google Patents
Method and system for realizing one board forced resetting Download PDFInfo
- Publication number
- CN101021740A CN101021740A CN 200710080334 CN200710080334A CN101021740A CN 101021740 A CN101021740 A CN 101021740A CN 200710080334 CN200710080334 CN 200710080334 CN 200710080334 A CN200710080334 A CN 200710080334A CN 101021740 A CN101021740 A CN 101021740A
- Authority
- CN
- China
- Prior art keywords
- veneer
- wdt
- pin
- repositioning information
- processing capacity
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Landscapes
- Debugging And Monitoring (AREA)
Abstract
The invention discloses a method and system to realize mandatory reduction of single-desk, which core is: a system acquires the corresponding reduction information according to the demands of different components, and transforms the information to boundary scan device BS in the single-desk with function of logic or dealing through system bus on the backplane. Based on the reduction information, the BS device takes induction on the corresponding device. Under the conditions of abnormal single-desk business and normal dog-software working, this invention can achieve the reduction of single-desk through standard system bus. Moreover, it's more flexible to achieve reduction through system bus, and doesn't need software support to take reduction when the single-desk appears unknown breakdown.
Description
Technical field
The present invention relates to the communications field, relate in particular to the board resetting technology.
Background technology
In order to solve VLSI (Very Large Scale Integration, VLSI (very large scale integrated circuit)) test problem, JETAG (Joint European Test ActionGroup by the establishment of companies such as Philips, Siemens, european union testing action group) a kind of boundary scan technique has been proposed, BSC (Boundary ScanCell between the kernel circuitry of its input and output pin by being arranged on the device on the veneer and described device, boundary scan cell), described device and peripheral circuit thereof are tested.JETAG was renamed as JTAG (Joint Test Action Group, JTAG) afterwards.Nineteen ninety, IEEE has been duly admitted the JTAG standard, after replenishing and revising, and called after IEEE1149.1-90 standard.The IEEE1149.1 standard has promoted the development and the widespread use of boundary scan technique widely.
Application of Boundary-scan Technology is more and more general now, is mainly used in technology such as interconnecting test, FLASH loading, programming in logic.Application also develops into system-level from chip-scale, circuit board level.Guaranteed after veneer breaks down by described boundary scan technique, can reset timely described veneer.
Prior art related to the present invention provides a kind of employing WDT (Watchdog Timer, " house dog " timer) circuit to realize the method for board resetting.Described WDT circuit is an independently timer, and its kind is a lot, but ultimate principle is identical.The important pin that WDT often has comprises RESET pin, MR pin, WDI pin, WDO pin, VCC pin and GND pin as shown in Figure 1.
Wherein said RESET pin is the reset signal output pin;
The implication of described MR pin is MANUAL RESET INPUT, expression manual operation input pin, when this pin receives low level, can be on described/RESET reset pin the reset signal of output low level;
The implication of WDI pin is WATCHDOG INPUT, it is the input signal of WDT, when WDI keeps high level or low level time to surpass the setting of WDT in limited time, then/ reset signal that WDO can output low level, and any one is from the high level to the low level, and perhaps the saltus step from the low level to the high level all can be with the WDT zero clearing;
The implication of WDO pin is WATCHDOG OUTPU, is the output signal of WDT;
VCC pin and GND pin are represented power supply and ground.
When adopting the WDT circuit to realize board resetting, can realize resetting of veneer by manual operation MR pin; Also can realize resetting of veneer by the clear dog software of veneer, main thought is:
The clear dog software of veneer is given WDT at the normal timing reset signal that constantly sends in service, and clear WDT timer (being also referred to as " clear dog ") makes WDT can't produce reset signal.If the WDT timer can't receive reset signal, then pick up counting, when reaching the setting-up time of WDT, just produce spill over and make described board resetting, recover the normal operation of monoboard programme.
Following situation appears in prior art in actual applications sometimes:
1, system is in operational process, single board service undesired (just " deadlock " phenomenon appears in monoboard programme) appears sometimes, but the situation of the normal operation of clear dog software, utilize the WDT circuit can't realize automatically reseting of veneer this moment merely, to such an extent as to can not recover regular traffic.
2, the mode of manual operation MR control board resetting can't realize operated from a distance in the prior art; And when adopting the resetting of clear dog software control veneer of veneer, the clear dog software of veneer is had dependence, if abnormal conditions appear in the clear dog software of veneer, then can't realize this function.Therefore prior art lacks dirigibility.
3, according to statistics, if veneer is in reset mode always, about 20% when power consumption has only operate as normal, therefore in actual application, require veneer hold reset state sometimes, as because fan failure causes the uncontrollable veneer temperature of electricity down to raise, when overheated phenomenon occurring, just require these veneers to enter and the hold reset state.Prior art can only realize resetting repeatedly of veneer, can't satisfy the requirement of veneer hold reset state, this be because: therefore in the process of veneer hold reset state, the clear dog software of veneer can't normally move, and also just can't satisfy the requirement of veneer hold reset state at all.
Summary of the invention
Embodiments of the invention provide a kind of method and system of realizing one board forced resetting, it is undesired at single board service, but under the situation of clear dog software operate as normal, can realize automatically reseting of veneer, thereby can recover the normal operation of single board service, and realize one board forced resetting by system bus, operate more flexible, when running into veneer generation unknown failure, do not need the support of board software, just can be neatly to specifying veneer to realize the forced resetting operation.
Embodiments of the invention are realized by the following technical solutions:
Embodiments of the invention provide a kind of method that realizes one board forced resetting, and it comprises:
System obtains corresponding repositioning information according to the demand that resets of each device in the veneer, and described repositioning information is transferred to BS (boundary scan) device that has the logical OR processing capacity on the veneer by system bus;
Described BS device with logical OR processing capacity resets to corresponding devices in the veneer according to described repositioning information.
Embodiments of the invention also provide a kind of system that realizes one board forced resetting, and it comprises:
Master control borad, business board and system bus
Described master control borad is used for obtaining corresponding repositioning information according to the demand that resets of described each device of business board, and described repositioning information is transferred to the BS device that has the logical OR processing capacity on the described business board by system bus;
Described business board is used for BS device by having the logical OR processing capacity in it according to described repositioning information, and corresponding devices in the described business board is resetted.
The specific embodiments that provides by the invention described above as can be seen, system is transferred to the BS device that has the logical OR processing capacity on the veneer with described repositioning information by system bus; Described BS device with logical OR processing capacity carries out forced resetting according to described repositioning information to corresponding devices in the veneer.Therefore the present invention can be undesired at single board service, but under the situation of clear dog software operate as normal, realize resetting of veneer by system bus, thus the normal operation that can recover single board service; And realize one board forced resetting by system bus, and operate more flexibly, when running into veneer generation unknown failure, do not need the support of board software, just can be neatly to specifying veneer realization forced resetting operate.
Description of drawings
The structural representation of the WDT that provides in the background technology is provided Fig. 1;
Fig. 2 is a system chart of realizing one board forced resetting among first embodiment provided by the invention by system bus;
Fig. 3 is a veneer link connection diagram among first embodiment provided by the invention;
Fig. 4 be among first embodiment provided by the invention on the veneer WDT /the MR pin is by the synoptic diagram in BS device when control on the veneer;
Fig. 5 be among first embodiment provided by the invention on the veneer WDT /the WDI pin is by the synoptic diagram in BS device when control on the veneer;
Fig. 6 is the process flow diagram of the 4th embodiment provided by the invention.
Embodiment
Because the reset pin of the several important pin of WDT or all the other reset circuit devices usually is connected on the device with processing or logic function, and these devices with processing or logic function generally all are the BS devices, all have BSC.These BS devices can be controlled the output of external pin by BSC.Therefore, embodiments of the invention are based on above-mentioned consideration, by the system bus in the system, repositioning information is transferred to described device with processing or logic function, and by described have handle or the BSC control of the device of logic function described have handle or the output of the external pin of the device of logic function, realize the forced resetting of veneer.
First embodiment provided by the invention is a kind of system that realizes one board forced resetting, and its implementation framework comprises as shown in Figure 2: system bus, master control borad and each business board.
Described system bus can be the jtag bus of 1149.1 standard definitions, it also can be other bus, as IPMI (Intelligent Platform Management Interface, IPMI), CAN (Control Area Network, control area net) bus, described system bus can be arranged on the backboard.
Be provided with a plurality of BS devices and ASP (addressable scanning port chip) device in described master control borad and each business board; Wherein said ASP device is connected with groove position ID.Described a plurality of BS device connects into one or more of chains by described system bus.Described system bus comprises five signal wire: TMS (Test ModeSelector, the test pattern selection), TCK (Test Clock, test clock), TDI (Test Data Input, the test data input), TDO (Test Data Output, test data is exported) and TRST (Test ResetInput, test reset input) signal wire.
Provided a plurality of BS devices on the veneer connect into a chain by the JTAG system bus situation as shown in Figure 3, the corresponding pin of each BS device is connected on every signal wire on the described system bus and the business board, is connected with the TMS pin of each BS device as the tms signal line; The tck signal line is connected with the TCK pin of each BS device; The TDI signal wire is connected with the TDI pin of each BS device; The TDO signal wire is connected with the TDO pin of each BS device; The TRST signal wire is connected with the TRST pin of each BS device.
Also be embedded with CPU, storer, test controller chip (TBC) BC on the described master control borad.Store repositioning information etc. in the described storer.Described CPU can call the repositioning information in the storer, and can utilize described reseting data to control described TBC.Described TBC is used to finish also going here and there of repositioning information and changes the functions such as addressing that reach ASP on each veneer.
Signal transitive relation between each components and parts in the system framework is as follows:
When master control borad CPU learnt the business board functional fault, described CPU came to call corresponding repositioning information according to the demand that resets of business board from storer, and sent reset instruction to described TBC according to described repositioning information; Include groove position ID number that appointment need reset in the described reset instruction; Described TBC is according to the groove position of appointment ID number, by described system bus, addressing navigates to the ASP of groove position ID correspondence, and described then TBC is transferred to described repositioning information the BS device that has processing capacity or logic function on the described business board by described system bus.
BSC in the described BS device with processing capacity or logic function exports corresponding reset signal according to described repositioning information.
Comprise the repositioning information that the one or more devices to appointment reset in the described reset signal.When for realize that veneer is imposing a condition or fixed time length under during the hold reset state, also be included in the described repositioning information impose a condition or fixed time length under make the repositioning information of device hold reset state.If desired device is carried out single and reset, can also comprise the repositioning information that single resets to device in the described repositioning information.
By described reset signal, corresponding devices in the veneer is resetted with BS device output of processing capacity or logic function.
In first embodiment provided by the invention as can be seen, because CPU controls the output of the BS device with processing capacity or logic function by the system bus on the backboard, so control ratio is more flexible, can either realize the function that the veneer single resets, also can give the BS device, realize the function of veneer according to specified requirements or fixed time length hold reset state by the reset signal of specified requirements or fixed time length; But also can control resetting of one or more devices on the veneer respectively.Therefore this method is the most direct, and it is also convenient to use.
Second embodiment provided by the invention is the WDT that is arranged on described master control borad and each business board having increased on the basis of described first embodiment.As shown in Figure 4, described WDT /the MR pin connects the BS device that has logic function or processing capacity on the veneer.Implementation process is as follows:
When master control borad CPU learns the business board functional fault, described CPU is according to the demand that resets of business board, from storer, obtain corresponding repositioning information, and, described repositioning information is transferred to the BS device that has processing capacity or logic function on the described business board by described system bus.Associated description among the detailed process and first embodiment is identical, is not described in detail here.
According to described repositioning information, in the described BS device with processing capacity or logic function by its boundary scan cell, the output corresponding signal give WDT /the MR pin; Described WDT produces corresponding reset signal according to the input information of described/MR pin, and by WDT /the RESET pin export to described WDT / each device that the RESET pin is connected, and trigger described each device and reset.
Comprise in the reset signal of being exported: all devices are carried out the repositioning information that single resets.When for realize that veneer is imposing a condition or fixed time length under during the hold reset state, also be included in the described repositioning information impose a condition or fixed time length under make the repositioning information of all device hold reset states.
In a second embodiment, because BS device control WDT /the MR input signal, so can only unify control to the reset signal of output, that is to say and to realize that all devices in the veneer are carried out single to be resetted, or can realize making all devices in the veneer under specified requirements, to keep the reset mode of fixed time length.
The 3rd embodiment provided by the invention is the WDT that is arranged on described master control borad and each business board having increased on the basis of described first embodiment.As shown in Figure 5, described WDT /the WDI pin connects the BS device that has logic function or processing capacity on the veneer, described WDT /the WDO pin connect described WDT /the MR pin; The input signal of described WDT basis/MR pin produces corresponding reset signal, and exports described reset signal by/RESET pin and control resetting of each device on the veneer.Implementation process is as follows:
When master control borad CPU learns the business board functional fault, described CPU is according to the demand that resets of business board, obtain corresponding repositioning information, and described repositioning information is transferred to the BS device that has processing capacity or logic function on the described business board by the system bus on the backboard.Associated description among the specific implementation process and first embodiment is identical, is not described in detail here.
Described BS device with logic function or processing capacity is exported the WDI pin that corresponding signal is given WDT by its boundary scan cell; Described WDT produces corresponding WDO signal according to described WDI signal from WDI pin input, and by/WDO pin export to described WDT /the MR pin; Described WDT produces corresponding reset signal according to the input signal of described/MR pin, and exports to each device that is connected with the RESET pin of described WDT by/RESET pin, and triggers described each device and reset.
As seen in the present embodiment, by system bus repositioning information is transferred to the BS device, and the output of control BS device, make input to WDT /input signal of WDI pin remains unchanged within a certain period of time, when described WDI input signal keeps high level or low level time to surpass the setting of WDT in limited time, cause WDT /low level signal of WDO pin output, with described low level signal input to described WDT /the MR pin; The input signal of described WDT basis/MR pin produces corresponding reset signal, and by/RESET pin export to described WDT / all devices that the RESET pin is connected, and trigger described device and reset.Therefore no matter normally whether the present embodiment veneer, master control borad can both by system bus control WDT /input of WDI pin, as long as control WDI input signal does not produce clear dog signal, just can realize the function that the veneer single resets.
After finishing single and resetting, WDT /the WDO signal of WDO pin output keeps can uprising again after the low level of certain hour, and the saltus step of WDO signal from the low level to the high level is with the WDT zero clearing.Under the situation of the unclear dog of maintenance, WDT can reach the overtime time limit once more since 0 reclocking, at this moment/the WDO pin produces reset signal once more, and WDT is zero clearing and reclocking once more also, and all devices in the veneer can be in reset mode repeatedly like this.
Above-mentioned BS device with logical OR processing capacity is not limited to single BS device with logical OR processing capacity, can be a plurality of BS devices with logical OR processing capacity.When controlling each reset pin, can realize by the link that system bus is linked to be by controlling a plurality of BS devices simultaneously with logical OR processing capacity by a plurality of BS devices with logical OR processing capacity.
The 4th embodiment provided by the invention is a kind of method that realizes one board forced resetting, and its specific implementation process comprises as shown in Figure 6:
Step S101, system disposes corresponding repositioning information according to the demand that resets of each device in the veneer, and described repositioning information is transferred to the BS device with logical OR processing capacity on the veneer by system bus.
Step S102, described BS device with logical OR processing capacity carries out forced resetting according to described repositioning information to corresponding devices in the veneer.
In step S102, there are three kinds of situations:
First kind of situation directly given corresponding devices in the veneer by the BS device according to the corresponding reset signal of described repositioning information output, and triggers described device and reset.This moment, described reset signal comprised: the one or more devices to appointment carry out the repositioning information that single resets, can also be included in impose a condition or fixed time length under make the repositioning information of one or more device hold reset states of appointment.Associated description among its specific implementation process and first embodiment is identical, is not described in detail here.
In this case, control the reset signal of output fully by the BSC in the BS device, therefore can realize that the one or more devices in the veneer are carried out single to be resetted, also can realize making one or more devices in the veneer under specified requirements, to keep the reset mode of fixed time length, thereby can satisfy a lot of special demands, as require the hold reset state to dispel the heat etc.
Second kind of situation, described BS device according to described repositioning information control WDT /input signal of MR pin; Described WDT produces corresponding reset signal according to the input signal of described/MR pin, and by/RESET pin export to described WDT / each device that the RESET pin is connected, and utilize resetting of described RESET reset signal described each device of control.At this moment, described reset signal comprises: all devices in the veneer are carried out the repositioning information that single resets, can also be included in impose a condition or fixed time length under make the repositioning information of all device hold reset states in the veneer.Associated description among its specific implementation process and second embodiment is identical, is not described in detail here.
Under second kind of situation, because BS device control WDT /input signal of MR pin, so can only unify control to the reset signal of output, that is to say and to realize that all devices in the veneer are carried out single to be resetted, or can realize making all devices in the veneer under specified requirements, to keep the reset mode of fixed time length.
The third situation, described BS device according to described repositioning information control WDT /input signal of WDI pin; Described WDT is according to the input signal of described/WDI pin, produces the WDO output signal, and by described/WDO pin export to described WDT /the MR pin; The input signal of described WDT basis/MR pin produces corresponding reset signal, and by/RESET pin export to described WDT / each device that the RESET pin is connected, and the associated description of utilizing described RESET reset signal to control among reset its specific implementation process and the 3rd embodiment of described each device is identical, is not described in detail here.
Under the third situation, BS device control WDT /input signal of WDI pin, just can to all devices in veneer not realize function that single reset as long as control WDI input signal does not produce clear dog signal this moment, in addition, can control the WDI input signal, make all devices in the veneer be in reset mode repeatedly.
The specific embodiments that is provided by the invention described above as can be seen, can be undesired at single board service, but under the situation of clear dog software operate as normal, can realize board resetting by standard system bus, recover the function of regular traffic, thereby improved reliability of products; And on the product of realizing system bus, do not need additionally to increase any hardware.In addition, realize one board forced resetting, operate more flexibly, when running into veneer generation unknown failure, do not need the support of board software by system bus, just can be neatly to specifying veneer realization forced resetting operate.
Obviously, those skilled in the art can carry out various changes and modification to the present invention and not break away from the spirit and scope of the present invention.Like this, if of the present invention these are revised and modification belongs within the scope of claim of the present invention and equivalent technologies thereof, then the present invention also is intended to comprise these changes and modification interior.
Claims (11)
1, a kind of method that realizes one board forced resetting is characterized in that, comprising:
System obtains corresponding repositioning information according to the demand that resets of each device in the veneer, and described repositioning information is transferred to the boundary scan BS device that has the logical OR processing capacity on the veneer by system bus;
Described BS device with logical OR processing capacity resets to corresponding devices in the veneer according to described repositioning information.
2, the method for claim 1 is characterized in that, described BS device with logical OR processing capacity is according to described repositioning information, and the process to corresponding devices in the veneer resets specifically comprises:
Described BS device with logical OR processing capacity is according to described repositioning information, and the corresponding reset signal of output is given corresponding devices in the veneer, and triggers described device and reset.
3, method as claimed in claim 2 is characterized in that, described reset signal comprises:
The repositioning information that one or more devices of appointment are resetted.
4, the method for claim 1 is characterized in that, described BS device with logical OR processing capacity is according to described repositioning information, and corresponding devices in the veneer is carried out the process of forced resetting, specifically comprises:
Described BS device with logical OR processing capacity according to described repositioning information control " house dog " timer WDT /input signal of MR pin;
Described WDT exports corresponding reset signal according to the input signal of described/MR pin, and utilizes resetting of each device on the described reset signal control veneer.
5, method as claimed in claim 4 is characterized in that, described reset signal comprises:
The repositioning information that each device on the veneer is resetted.
6, as claim 3 or 5 described methods, it is characterized in that described reset signal also comprises:
The repositioning information that single resets to the device on the veneer, or, impose a condition or fixed time length under make the repositioning information of the device hold reset state on the veneer.
7, the method for claim 1 is characterized in that, described BS device with logical OR processing capacity is according to described repositioning information, and corresponding devices in the veneer is carried out the process of forced resetting, specifically comprises:
Described BS device with logical OR processing capacity, according to described repositioning information control WDT /input signal of WDI pin;
Described WDT produces corresponding/WDO output signal according to the input signal of described/WDI pin, and utilize described/WDO output signal control described WDT /input signal of MR pin;
The input signal of described WDT basis/MR pin produces corresponding reset signal, and utilizes resetting of each device on the described reset signal control veneer.
8, a kind of system that realizes one board forced resetting is characterized in that, comprising:
Master control borad, business board and system bus;
Described master control borad is used for obtaining corresponding repositioning information according to the demand that resets of described each device of business board, and described repositioning information is transferred to the boundary scan BS device that has the logical OR processing capacity on the described business board by system bus;
Described business board is used for BS device by having the logical OR processing capacity in it according to described repositioning information, and corresponding devices in the described business board is resetted.
9, system as claimed in claim 8 is characterized in that, described business board specifically is used for:
BS device by having the logical OR processing capacity in it is according to described repositioning information, and the corresponding reset signal of output is given corresponding devices in the described business board, and triggers described device and reset.
10, system as claimed in claim 8 or 9 is characterized in that, also comprises: " house dog " timer WDT;
The BS device that has the logical OR processing capacity in the described business board according to described repositioning information control described WDT /input signal of MR pin;
Described WDT produces corresponding reset signal according to the input signal of described/MR pin, and utilizes resetting of each device on the described reset signal control veneer.
11, system as claimed in claim 8 or 9 is characterized in that, also comprises: WDT;
The BS device that has the logical OR processing capacity in the described business board, according to described repositioning information control described WDT /input signal of WDI pin;
Described WDT produces corresponding/WDO output signal according to the input signal of described/WDI pin, and utilize described/WDO output signal control described WDT /input signal of MR pin;
The input signal of described WDT basis/MR pin produces corresponding reset signal, and utilizes resetting of each device on the described reset signal control veneer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2007100803344A CN100465856C (en) | 2007-03-02 | 2007-03-02 | Method and system for realizing one board forced resetting |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2007100803344A CN100465856C (en) | 2007-03-02 | 2007-03-02 | Method and system for realizing one board forced resetting |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101021740A true CN101021740A (en) | 2007-08-22 |
| CN100465856C CN100465856C (en) | 2009-03-04 |
Family
ID=38709530
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB2007100803344A Active CN100465856C (en) | 2007-03-02 | 2007-03-02 | Method and system for realizing one board forced resetting |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN100465856C (en) |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102270500A (en) * | 2011-03-29 | 2011-12-07 | 西安华芯半导体有限公司 | Method for realizing DRAM self reset, and DRAM capable of self reset |
| CN101751368B (en) * | 2009-12-30 | 2013-08-07 | 中兴通讯股份有限公司 | Single-board communication method, device and system |
| CN104908644A (en) * | 2015-05-26 | 2015-09-16 | 北京智视信息科技有限公司 | Monitoring method for remote vehicle networking vehicles |
| CN104932349A (en) * | 2015-05-26 | 2015-09-23 | 北京智视信息科技有限公司 | Internet of Vehicles terminal system used for safety signal transmission |
| CN109933178A (en) * | 2019-01-16 | 2019-06-25 | 浙江众合科技股份有限公司 | The device of board resetting is realized in a kind of train signal system |
| CN111596747A (en) * | 2020-05-21 | 2020-08-28 | 深圳市信锐网科技术有限公司 | Component resetting method, device, equipment and readable storage medium |
| CN113033134A (en) * | 2021-03-18 | 2021-06-25 | 杭州加速科技有限公司 | Multi-service inter-board trigger signal synchronization system, synchronization method and semiconductor test equipment |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4565626B2 (en) * | 2004-11-02 | 2010-10-20 | ルネサスエレクトロニクス株式会社 | LSI with built-in boundary scan circuit |
| CN100403703C (en) * | 2004-12-29 | 2008-07-16 | 华为技术有限公司 | Single board of communication device and control method |
| CN1855066A (en) * | 2005-04-21 | 2006-11-01 | 华为技术有限公司 | Single-board task exception inspecting and processing method |
| CN100426889C (en) * | 2006-08-01 | 2008-10-15 | 华为技术有限公司 | Method of network element reset and system thereof |
-
2007
- 2007-03-02 CN CNB2007100803344A patent/CN100465856C/en active Active
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101751368B (en) * | 2009-12-30 | 2013-08-07 | 中兴通讯股份有限公司 | Single-board communication method, device and system |
| CN102270500A (en) * | 2011-03-29 | 2011-12-07 | 西安华芯半导体有限公司 | Method for realizing DRAM self reset, and DRAM capable of self reset |
| CN104908644A (en) * | 2015-05-26 | 2015-09-16 | 北京智视信息科技有限公司 | Monitoring method for remote vehicle networking vehicles |
| CN104932349A (en) * | 2015-05-26 | 2015-09-23 | 北京智视信息科技有限公司 | Internet of Vehicles terminal system used for safety signal transmission |
| CN104908644B (en) * | 2015-05-26 | 2017-03-08 | 北京智视信息科技有限公司 | Monitoring method for remote vehicle networking vehicles |
| CN104932349B (en) * | 2015-05-26 | 2018-02-16 | 北京智视信息科技有限公司 | Car networking terminal system for secure signal transmission |
| CN109933178A (en) * | 2019-01-16 | 2019-06-25 | 浙江众合科技股份有限公司 | The device of board resetting is realized in a kind of train signal system |
| CN111596747A (en) * | 2020-05-21 | 2020-08-28 | 深圳市信锐网科技术有限公司 | Component resetting method, device, equipment and readable storage medium |
| CN113033134A (en) * | 2021-03-18 | 2021-06-25 | 杭州加速科技有限公司 | Multi-service inter-board trigger signal synchronization system, synchronization method and semiconductor test equipment |
| CN113033134B (en) * | 2021-03-18 | 2021-10-22 | 杭州加速科技有限公司 | Trigger signal synchronization system between multi-service boards |
Also Published As
| Publication number | Publication date |
|---|---|
| CN100465856C (en) | 2009-03-04 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN100465856C (en) | Method and system for realizing one board forced resetting | |
| CN100440805C (en) | Method and system for remote-maintaining JTAG device in ATCA | |
| US7661048B2 (en) | Apparatus and method for embedded boundary scan testing | |
| CN101329385B (en) | Regulation test system and method of on-chip system as well as on-chip system | |
| CN102087621B (en) | Processor device with self-diagnosis function | |
| CN105224345A (en) | A kind of programmable logic device (PLD) remote update system and method thereof | |
| CN101432699A (en) | Apparatus and method for controlling power, clock, and reset during test and debug procedures for a plurality of processor/cores | |
| WO2001053844A1 (en) | Hierarchical test circuit structure for chips with multiple circuit blocks | |
| CN103699112B (en) | Based on avionics Autonomous test Authentication devices and the verification method thereof of I/O signal fault simulation | |
| CN112463243B (en) | Online cascade loading firmware system based on boundary scanning and method thereof | |
| CN103376340A (en) | Adapter plate, a multi-platform serial test system and method | |
| US11680985B2 (en) | Falling clock edge JTAG bus routers | |
| CN102043747A (en) | Method for downloading field programmable gate array (FPGA) logic codes under joint test action group (JTAG) download mode | |
| CN100427964C (en) | Boundary scanning-measuring method for circuit board | |
| CN101738580B (en) | Homogenous multicore processor-oriented testable design method | |
| US20130086441A1 (en) | Dynamically self-reconfigurable daisy-chain of tap controllers | |
| CN1230885C (en) | Fault-telerance method and system of testing chip for boundary scanning | |
| US20110202811A1 (en) | Test access port with address and command capability | |
| CN104156288B (en) | A kind of fault location and software upgrading circuit and its implementation based on JTAG chains | |
| CN113609807B (en) | IP core for replacing logic device to realize JTAG bridge exchange function | |
| CN107122274A (en) | Cpu test system and method based on FPGA reconfiguration techniques | |
| CN101055613A (en) | Chip data output signal protection method and its circuit | |
| CN102645609B (en) | Joint test action group (JTAG) link circuit test device and test method of JTAG chain circuit test device | |
| CN101276285B (en) | Method and system for sintering telecommunications system level | |
| CN101470165A (en) | Microelectronic apparatus and pin arranging method |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant |