CN101014993A - Display device - Google Patents

Display device Download PDF

Info

Publication number
CN101014993A
CN101014993A CNA2005800303520A CN200580030352A CN101014993A CN 101014993 A CN101014993 A CN 101014993A CN A2005800303520 A CNA2005800303520 A CN A2005800303520A CN 200580030352 A CN200580030352 A CN 200580030352A CN 101014993 A CN101014993 A CN 101014993A
Authority
CN
China
Prior art keywords
mentioned
unit
signal
video data
display device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CNA2005800303520A
Other languages
Chinese (zh)
Inventor
池田胜幸
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Publication of CN101014993A publication Critical patent/CN101014993A/en
Pending legal-status Critical Current

Links

Images

Landscapes

  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Liquid Crystal Display Device Control (AREA)
  • Transforming Electric Information Into Light Information (AREA)

Abstract

A display device comprises divide means for dividing display data to be displayed on display means, to generate a plurality of N-serial signals, means for multiplying the serial signals individually by different codes, synthesize means for synthesizing the output signal of the multiply means into serial signals less than the number (N), and restore means for receiving the output signal of the synthesize means to calculate the correlations to the codes thereby to restore the display data. The display means is driven on the basis of the signals restored by the restore means.

Description

Display device
Technical field
The present invention relates to and to pass on the display device of driving of the large-scale display element that carries out high-precision TV etc. with large-capacity data at a high speed.
Background technology
In recent years, the function of TV, notebook computer etc. improves very remarkable, is carrying out the maximization of picture, and high resolving powerization and height become more meticulous.Particularly in the digital high-definition that uses flat-panel screens etc., display device is not only large-scale but also pixel count is extremely many, and the frequency band of its drive signal is very extensive.
Figure 15 is that the block diagram of active array type liquid crystal display as the typical structure of the display device of display element used in expression, and Figure 16 is its sequential chart.
As shown in figure 15, CPU 1801 generates the view data that show according to the indication of main part 1819, and view data is write video memory 1802.And main part 1819 means the main body circuit of the tuner that comprises in the TV and demodulation section herein and comprises DVD player recapiulation etc. and the main part of the input-output unit of computing machine etc.CPU 1801 accepts the signal of main part 1819, by decompression and computing from the compressed image of this picture signal, JPEG and MPEG etc. and dynamic image data etc., thereby generate the view data that show, and be stored in the video memory 1802, rewrite renewal as required successively.
Liquid-crystal controller 1803 generates the necessary various timings of liquid crystal display, is X clock signal 1815, horizontal-drive signal 1814, the vertical synchronizing signal 1818 of X driver 1813, according to coming reads image data, send to the driver (X driver 1813 and Y driver 1807) of liquid crystal display 1808 in addition from the order that video memory 1802 shows.Herein, when the pixel of liquid crystal display 1808 constituted the capable m row of n, X driver 1813 was made of m level X shift register 1804, m combination lock storage 1805 and m DA converter 1806.This m level X shift register 1804, m combination lock storage 1805 and m DA converter 1806 generally are divided into many groups and are integrated on the SIC (semiconductor integrated circuit), and be configured in liquid crystal display 1808 around.
When the pixel of the beginning of liquid-crystal controller 1803 reading displayed frames, produce vertical synchronizing signal 1818, and send to Y driver 1807.Meanwhile, the data on the pixel of the 1st row the 1st row of liquid-crystal controller 1803 from video memory 1802 reading displayed in liquid crystal display 1808 send to the data terminal of latch 1805 as display data signal 1816.Herein, each pixel of display data signal 1816 for example has each 8 of RGB, and they are to transmit as 24 bit parallel data concurrently with 24 transfer paths, and perhaps the transfer rate with 24 times is transmitted after also string is changed.
X shift register 1804 synchronously reads the horizontal-drive signal 1814 that liquid-crystal controller 1803 produces with X clock signal 1815 as shown in figure 16, produces the signal X1 that is used to latch the 1st row view data and latchs (Figure 16 (c)).Making data on the pixel be shown in the 1st row the 1st row be latched to the 1st of latch 1805 by this signal lists.Then, liquid-crystal controller 1803 reads the data that be presented on the next pixel and exports from video memory 1802.The X shift register 1804 of X driver 1813 makes horizontal-drive signal 1814 carry out a displacement, produces the signal X2 be used to latch the 2nd row view data and latchs (Figure 16 (d)), latchs the 1st row the 2nd row view data.
Below, X shift register 1804 makes horizontal-drive signal 1814 displacement successively, and the data that are shown in the 1st row are latched successively.This action is when being sent as parallel data display data signal 1816 according to each pixel by a plurality of transfer paths, video data is read in the latch 1805 concurrently on X clock each time, when being sent out as serial data in addition, read concurrently in the latch 1805 after string and conversion, these all need not to illustrate.
When latch 1,805 1 line data is preserved when finishing, export next horizontal-drive signal 1814 (please note at Figure 16 (a) and (h), among Figure 16 on (a)~(f) and this figure (g)~(k) the sequential yardstick of transverse axis taking place to change.Therefore the horizontal-drive signal 1814 as same signal also shows (h) except (a)), the data that 1806 pairs of DA converters remain in the latch 1805 are carried out the DA conversion, export to Xi of row electrode 1810 (1≤i≤m).Simultaneously, Y driver 1807 is selected signal to the column electrode Y1 of the 1st row output.
Below similarly, all will to select signal to be displaced to the Yj of column electrode 1809 successively when each horizontal-drive signal 1814 occurs individual (on 1≤i≤n) for Y driver 1807.
In the single-point line 1818 of Figure 15 is the figure that 1 pixel portion that has disposed liquid crystal display 1808 by matrix-style is enlarged.Active switch element 1811 passes to pixel electrode 1812 with the output of exporting to Xi DA converter 1806 of row electrode 1810 when having selected Yj of column electrode 1809.And, a DA converter 1806 is placed on the liquid-crystal controller side, also can use simulating signal to transmit data 1816.At this moment, latch 1805 becomes the sampling and the holding circuit of simulation.This method can reduce the quantity of DA converter, be used morely in the past, though but be the DA converter, become setting as long as finally impose on the magnitude of voltage of pixel electrode 1812, can use the digital circuit of pulse-length modulation etc., and do not need sampling and the holding circuit simulated, so follow the densification of LSI, method described herein becomes main flow gradually.
But in the method, owing to use digital signal to send data, so the quantity of signal wire becomes a lot, what for example need 8 * 3 primary colors amounts to 24.In addition, the quantity of information of the required view data of the demonstration of 1 frame becomes this resolution (pixel count) doubly.
And, when the shows signal of the right-hand member of the row time till the shows signal of the left end of exporting next line after liquid-crystal controller 1803 output, also have after the view data output of the next line to picture finishes to the time till the view data that next frame begins delegation most of exporting and be called as (level, vertically) black-out intervals or retrace interval, though in CRT, can not be 0, in liquid crystal display, can be 0.In Figure 16, illustration get during the horizontal flyback sweep of 1 amount of pixels and the situation during the vertical flyback of the amount of 1 row.
Follow the maximization and the high resolving powerization of display body in recent years, the speed of the view data that should pass on by liquid-crystal controller 1803 surpasses gigabits/second.For example other resolution of high definition level is the picture of 1920 * 1080 pixel count when carrying out the demonstration of per second 60 frames, needs the data of 1920 * 1080 * 24 * 60  2.986Gbps (bits per second) to pass on speed.
In addition, shown data are also followed multimedia era and mostly various functions are joined in the main part 1819, preferably liquid crystal display 1808 and main part 1819 are separated into detachable state.According to this requirement installation base plate is divided into polylith, this situation is divided with the single-point line 1817-1817 ' of Figure 15 mostly.It must cause the connecting line between main part 1819 and the liquid crystal display 1808 elongated.
In addition, be accompanied by the high resolving powerization of liquid crystal display 1808, the signal frequency of those circuits uprises, and connects the difficulty that becomes.In addition, it is big that display frame itself also becomes, for example be configured in the picture that surpasses 100 inches around liquid crystal driver (particularly the X driver 1813) in fact can't send data above gigabits/second, by making the video data parallelization and a plurality of circuits being set, obtain the method for the transfer rate that reduces each circuit.But when becoming the rank of high definition, it is very big that this number of, lines becomes, and surpasses 100.
In order to address this problem, as the mode of high-speed data transfer, for example proposed LVDS (Low Voltage Differential Signaling) is used for the technology of the connection (Japan's special permission No. 3086456 communiques (44 hurdle) and Japan's special permission No. 3330359 communiques (46 hurdle)) of display driver.In No. 3349426 communiques of Japan's special permission and No. 3349490 communiques of Japan's special permission etc., owing to this mode also can't be solved fully, so also proposed new method.
But the development of the maximization of nearest display body is very remarkable, and these technology also can't obtain sufficient performance.In order to obtain sufficient noiseproof feature (anti-interference, apply interference), need careful design and adjustment.In addition, in LVDS, because signal level is less, thus must be with digital IC Analog signals, thereby have the big problem of consumed power change.
In addition, for precision transmits signal well, need obtain the impedance for matching terminal, but the quantity of the required line of impedance termination is many, and transmit impedance, so has the problem that power that these terminal resistances consume increases to the degree that can't allow at most also with regard to about 100 ohm.
And then, when dividing installation base plate with the single-point of Figure 15 line 1817-1817 ', need by by long wiring around circuit transmit lot of data at a high speed.Therefore, increase, become obstruction and transmit electromagnetic reason to other electronic equipments or equipment of itself from the radiation electromagnetic field of circuit.During the signal that signal wire in the past carries out transmitted, the amplitude level of receiving end was defined, even guaranteed enough qualities at receiving end, also can't reduce the amplitude level of signal.Promptly be difficult to construct the EMI countermeasure, its result causes the restriction of device design and cost are risen.In addition, except the load to receiving end, also the stray capacitance to circuit drives simultaneously at transmitter side, transmits so need more energy to be used for signal.That is, become the result of the power that increases consumption.
In addition, follow the high speed of transfer of data and physical space that the increase of the wiring quantity that causes need be used to connect up, the design to equipment constitutes very big restriction certainly.
Particularly under the situation of wiring by the movable part of hinge portion etc., because the warpage situation of movable part can make characteristic impedance change, thus produce not matching of impedance according to situation, because cause Signal Degrade in the reflection of joggling part etc.Therefore, the problem that the speed with the data that transmitted is limited or installation method and configuration of components are restricted.In addition, because the number of signals of exchange surpasses 100,, and has the also lower shortcoming of connection reliability so it is higher to carry out the cost of the flexible substrate of this connection and connector.
Summary of the invention
So, the objective of the invention is to, come the high speed transfer approach of data with variety of issue as described above and restriction is improved with unexistent brand-new method in the past, remove these shortcoming and restrictions in the past, realize the higher display device of reliability with low cost.
The display device of one aspect of the present invention is characterised in that this display device has: the display unit that shows video data; Cut apart the video data that is presented on the above-mentioned display unit, be generated as the cutting unit of the individual serial signal of plural N (N is the integer more than 2); The multiplication unit that above-mentioned serial signal is multiplied each other with different sign indicating numbers respectively; The output signal of synthetic above-mentioned multiplication unit synthesizes the synthesis unit of the serial signal that is less than above-mentioned N; Output signal by calculating above-mentioned synthesis unit is relevant with above-mentioned sign indicating number, reduces the reduction unit of above-mentioned video data; And according to the driver element that drives above-mentioned display unit by the signal that above-mentioned reduction unit reduced.
According to this structure of the present invention, owing to having carried out code division multiplexing, the video data that sends display unit to is transmitted, so the required bandwidth of circuit is narrowed down, can realize easily transmitting, can relax the transmission of less transmission lines quantity and the restriction of the desired frequency band of each transfer path.
The display device of one aspect of the present invention is characterised in that, above-mentioned display unit has and is configured to rectangular pixel, shows by the line sequential scanning.
According to said structure of the present invention, can on the large-scale jumbo display device such as demonstration of flat-surface television and notebook computer, implement.
The display device of one aspect of the present invention is characterised in that above-mentioned cutting unit carries out serial output according to every pixel data of cutting apart each pixel according to each pixel.
According to said structure of the present invention, can be with in the past and line output and transmit or carry out and go here and there pixel data that conversion transmits as the serial data of the high speed code division multiplexing by each pixel transmitting, can transmit by less conveyer line way, every the speed of passing on can be reduced in addition, the desired condition of transmission lines can be relaxed.
The display device of one aspect of the present invention is characterised in that above-mentioned cutting unit is the N group with the column split of above-mentioned display unit, according to above-mentioned each group picture element signal is carried out serial output.
According to said structure of the present invention, can utilize code division multiplexing to transmit the pixel data that in the past transmits as serial data at a high speed, can transmit by less conveyer line way, can reduce every the speed of passing in addition, can relax the desired condition of transmission lines.
The display device of one aspect of the present invention is characterised in that this display device has: have the display unit that is configured to rectangular pixel; Be presented at video data on the above-mentioned display unit according to the column split of individual group of plural N (N is the integer more than 2), be generated as the cutting unit of serial signal; The multiplication unit that above-mentioned serial signal is multiplied each other with different sign indicating numbers respectively; The output signal of synthetic above-mentioned multiplication unit synthesizes the synthesis unit of the serial signal that is less than above-mentioned N; Output signal by calculating above-mentioned synthesis unit is relevant with above-mentioned sign indicating number, reduces the reduction unit of above-mentioned video data; The storage unit of the output signal of the above-mentioned reduction unit of temporary transient storage; And the driver element that comes to drive above-mentioned display unit according to the signal of storing by said memory cells according to every row.
According to said structure of the present invention, can temporarily store display message at the receiver side of video data, so then can not use the video data that is stored in this storage unit to show, so can stop the consumed power that reduces circuit of sending of video data as long as the video data that has sent has to change.
The display device of one aspect of the present invention is characterised in that, the group output video data that above-mentioned cutting unit is only rewritten needs.
According to said structure of the present invention, for the pixel data that sends display unit to, the part that can only rewrite needs transmits, even therefore the display image of every frame is static, compare the mode in the past of update image data of passing on all the time, also can significantly reduce this consumed power.
The display device of one aspect of the present invention is characterised in that this display device has: the 1st extended code that produces the sign indicating number that offers above-mentioned multiplication unit produces circuit; And producing the 2nd extended code generation circuit that offers sign indicating number above-mentioned reduction unit, identical with the sign indicating number that offers above-mentioned multiplication unit, above-mentioned the 1st extended code generation circuit produces circuit with above-mentioned the 2nd extended code and obtains synchronously by identical clock signal.
According to said structure of the present invention, can directly obtain to be used for producing the synchronous signal of extended code at receiver side from transmitter side.Therefore, need not to be used to obtain the synchronous special circuit that extended code produces, can simplify synchronous seizure at receiver side.
The display device of one aspect of the present invention is characterised in that this display device has: have and be configured to rectangular pixel, carry out the display unit of display driver by the line sequential scanning; Produce the video data generation unit of video data according to each sweep trace of above-mentioned display unit; The video data that will produce in above-mentioned video data generation unit is assigned to driver element in each pixel of regulation, that be divided into individual group of N (N is the integer more than 2) as driving data; And the detecting unit that detects the different pixel of between adjacent sweep trace video data, only, send video data to above-mentioned driver element from above-mentioned video data generation unit for the group that comprises the pixel that shows the video data different more than 1 with video data shown on nearest sweep trace.
According to said structure of the present invention, as long as be shown on the display device directly over the shown picture of sweep trace and this time will on video data, not have difference between the scan lines displayed, then stop the transmission of video data, so can stop to be used for the action of the circuit that transmission lines and display body drive, can significantly reduce the consumed power of device.Particularly because the video data between the sweep trace relevant stronger, and used 1 sweep trace also to be separated into the structures of many groups, so have very big effect compared with control to every frame.
The display device of one aspect of the present invention is characterised in that, each set of dispense to above-mentioned driver element is used for the multiplexing sign indicating number of sign indicating number, is to be specified which group that sends to above-mentioned driver element by above-mentioned sign indicating number to go from above-mentioned video data generation unit to the transmission of the video data that above-mentioned driver element carries out.
According to said structure of the present invention, undertaken by sign indicating number owing to be used for the addressing of the issue of video data, thus can realize by simple circuit, and can reduce transfer rate, can also strengthen repellence in addition for the obstacles such as distortion on the circuit.The frequency content of the signal that is transmitted is expanded, and for the EMI countermeasure very big effect is arranged also.
The display device of one aspect of the present invention is characterised in that above-mentioned sign indicating number is an orthogonal code.
According to said structure of the present invention, be orthogonal code owing to be used for the sign indicating number of code division multiplexing, so can make the relevant of each intersymbol be entirely zero, can separate reduction to each data fully from the picture signal that is re-used.
The display device of one aspect of the present invention is characterised in that this display device has: the display unit that shows video data; Cut apart the video data that is presented on the above-mentioned display unit, be generated as the cutting unit of the individual serial signal of plural N (N is the integer more than 1); A plurality of multiplication units that above-mentioned serial signal is multiplied each other with different sign indicating numbers respectively; The conversion of signals that above-mentioned multiplication unit is exported is the transmitting element that electromagnetic wave signal sends; Receive the receiving element of above-mentioned electromagnetic wave signal; By calculating relevant with above-mentioned yard of received signal that above-mentioned receiving element receives, reduce the reduction unit of above-mentioned video data; And according to the driver element that drives above-mentioned display unit by the signal that above-mentioned reduction unit reduced.
According to said structure of the present invention, the video data that sends display unit to is transmitted as electromagnetic wave signal by code division multiplexing, so can remove wired variety of issue that is accompanied by the transmission of high speed mass data down in the past fully.In addition,, get final product,, the energy spectrum of signal is concentrated near the wireless frequency, can realize the wireless transmission under the electromagnetic wave easily by suitable selection extended code so transfer path is less owing to expand with multiplexing by sign indicating number.And then, can relax based on the transmission of less transmission lines quantity and the restriction of the desired frequency band of each transfer path.Therefore, by said structure, can utilize electromagnetic wave to realize the wireless penetration of signal transmitting and receiving, because signal transmits in the space, so need not flexible substrate and these wirings of connector, the cost that they caused improves and reliability problems also disappears.In addition, also can avoid following the high speed of the terminal that is used for impedance matching and data transfer rate and the problem of the consumed power that rises.In addition, the layout of wiring and the restriction of component configuration disappear, and can improve the design and use comfort level of electronic installation.Have again, utilize this electromagnetic signal to transmit owing to carry out in the point blank in same device, so, the electromagnetic intensity of radiation can be reduced near the limit as long as guarantee the communication that this distance is interior, so improved the EMI characteristic in essence, be easy to construct countermeasure.
The display device of one aspect of the present invention is characterised in that above-mentioned transmitting element has: synthesize the output signal of above-mentioned multiplication unit, synthesize the synthesis unit of the serial signal that is less than above-mentioned N; Modulate the signal that above-mentioned synthesis unit is exported, be modulated to the modulating unit of the wireless frequency of regulation; And accept to radiate electromagnetic transmitting antenna from the output of above-mentioned modulating unit.
According to said structure of the present invention, because display data signal is re-used, the modulating unit and the antenna element of the quantity by being less than N send, so the negligible amounts of modulating unit and antenna element gets final product, and can suppress the irregular level of the signal of each channel of being re-used less, be easy to implement device.
The display device of one aspect of the present invention is characterised in that above-mentioned transmitting element has: modulate above-mentioned multiplication unit output signal separately, be modulated to a plurality of modulating units of the wireless frequency of regulation; And accept from above-mentioned a plurality of modulating units output separately and radiate electromagnetic a plurality of transmitting antenna.
According to said structure of the present invention, divided display data signal multiply by after the sign indicating number, do not synthesize and directly modulate according to each signal of being cut apart, from different antenna-reflected is electromagnetic wave signal, owing to carry out synthesizing in the space of signal, so do not need the required synthetic circuit of analog addition, utilize SIC (semiconductor integrated circuit) to realize easily.
The display device of one aspect of the present invention is characterised in that, the signal that above-mentioned multiplication unit is exported have be used to radiate energy of electromagnetic field enough wireless frequency composition, this display device has the above-mentioned multiplication unit of reception signal separately and radiates electromagnetic a plurality of transmitting antenna.
According to said structure of the present invention, owing to use the composition that comprises enough wireless frequency energy to be used for the sign indicating number that multiplication unit is taken advantage of, so can in multiplication unit, have the function of modulating unit concurrently, do not need signal is modulated to the modulating unit of wireless frequency, can simplify circuit structure.
The display device of one aspect of the present invention is characterised in that, above-mentioned display unit has and is configured to rectangular pixel, shows by the line sequential scanning.
According to said structure of the present invention, can on the large-scale jumbo display device such as demonstration of flat-surface television and notebook computer, implement.
The display device of one aspect of the present invention is characterised in that above-mentioned cutting unit is cut apart the pixel data step-by-step of each pixel, carries out serial output according to each pixel.
According to said structure of the present invention, can be with in the past and line output and transmit or carry out and go here and there conversion and the pixel data that transmits as the serial data of the high speed code division multiplexing by each pixel transmits, every the speed of passing on can be reduced in addition, the desired condition of electromagnetic transfer path can be relaxed.
The display device of one aspect of the present invention is characterised in that above-mentioned cutting unit is the N group with the column split of above-mentioned display unit, with the picture element signal and the line output of above-mentioned each group.
According to said structure of the present invention, because the row that will show are divided into the N group, so can carry out the control of each group.Particularly the driving circuit of display unit is divided into several groups according to row or row, is installed on the SIC (semiconductor integrated circuit) mostly, so of the present invention structure is very suitable.In addition, can carry out transmission, can reduce every the speed of passing on, can relax the desired condition of electromagnetic transfer path based on electromagnetic code division multiplexing.
The display device of one aspect of the present invention is characterised in that this display device has: have the display unit that is configured to rectangular pixel; Be presented at video data on the above-mentioned display unit according to every column split of individual group of plural N (N is the integer more than 1), and be generated as the cutting unit of serial signal; The multiplication unit that above-mentioned serial signal is multiplied each other with different sign indicating numbers respectively; The output signal of synthetic above-mentioned multiplication unit synthesizes the synthesis unit of the serial signal that is less than above-mentioned N; The conversion of signals that above-mentioned synthesis unit is exported is the transmitting element that electromagnetic wave signal sends; Receive the demodulating unit that above-mentioned electromagnetic wave signal carries out demodulation; Output by calculating above-mentioned demodulating unit is relevant with above-mentioned sign indicating number, reduces the reduction unit of above-mentioned video data; The storage unit of the output signal of the above-mentioned reduction unit of temporary transient storage; And the driver element that comes to drive above-mentioned display unit according to the signal of storing by said memory cells according to every row.
According to said structure of the present invention, owing to have the storage unit of the video data that temporary transient storage reduction unit reduced in the display unit side, so when the video data that is sent before by this storage unit is identical, by the video data in the said memory cells of being stored in that sends before using, thereby can stop the transmission of video data, can reduce the consumed power of device.
The display device of one aspect of the present invention is characterised in that, the group output video data that above-mentioned cutting unit is only rewritten needs.
According to said structure of the present invention, for the pixel data that sends display unit to, the part that can only rewrite needs transmits, even therefore display image is static, compare all the time according to every frame and pass on the mode in the past of update image data, can significantly reduce this consumed power.
The display device of one aspect of the present invention is characterised in that this display device has: the 1st yard generation circuit that produces the sign indicating number that offers above-mentioned multiplication unit; And produce the 2nd yard of offering sign indicating number above-mentioned reduction unit, identical with the sign indicating number that offers above-mentioned multiplication unit and produce circuit, above-mentioned the 1st yard produces circuit and obtains synchronously with identical clock signal with above-mentioned the 2nd yard generation circuit.
According to said structure of the present invention, can directly obtain to be used for producing the synchronous signal of extended code at receiver side from transmitter side.Therefore, need not to be used to obtain the synchronous special circuit that extended code produces, can simplify synchronous seizure at receiver side.
The display device of one aspect of the present invention is characterised in that this display device has: have and be configured to rectangular pixel, carry out the display unit of display driver by the line sequential scanning; Produce the video data generation unit of video data according to each sweep trace of above-mentioned display unit; The conversion of signals that above-mentioned video data generation unit is exported is the transmitting element that electromagnetic wave signal sends; Receive the demodulating unit that above-mentioned electromagnetic wave signal carries out demodulation; Video data that will demodulation in above-mentioned demodulating unit is assigned to driver element in each pixel of regulation, that be divided into N (N is the integer more than 1) group as driving data; And the detecting unit that detects the different pixel of between adjacent sweep trace video data, only, send video data to above-mentioned driver element from above-mentioned video data generation unit for comprising the pixel that shows the video data different more than 1 in interior group with video data shown on nearest sweep trace.
According to said structure of the present invention, as long as be shown on the display device directly over the shown picture of sweep trace and this time will scan lines displayed between, on video data, there is not difference, then stop the transmission of video data, so can stop to be used for the action of the circuit that transmission lines and display body drive, can significantly reduce the consumed power of device.Particularly because the video data between the sweep trace relevant stronger, and used 1 sweep trace also to be separated into the structures of many groups, so have very big effect compared with control to every frame.
The display device of one aspect of the present invention is characterised in that, each set of dispense to above-mentioned driver element is used for the multiplexing sign indicating number of sign indicating number, is to be specified which group that sends to above-mentioned driver element by above-mentioned sign indicating number to go from above-mentioned video data generation unit to the transmission of the video data that above-mentioned driver element carries out.
According to said structure of the present invention, undertaken by sign indicating number owing to be used for the addressing of the issue of video data, thus can realize by simple circuit, and can reduce transfer rate, can also strengthen repellence in addition for the obstacles such as distortion on the circuit.The frequency content of the signal that is transmitted is expanded, and for the EMI countermeasure very big effect is arranged also.
The display device of one aspect of the present invention is characterised in that, above-mentioned sign indicating number is identical PN sign indicating number after orthogonal code, the phase deviation or phase deviation and the identical PN sign indicating number that has been applied in biasing (offset).
According to said structure of the present invention, when the sign indicating number that is used for code division multiplexing was orthogonal code, the relevant of each intersymbol can be entirely zero, so can separate reduction completely to each data from the picture signal that is re-used.In addition, when the sign indicating number that is used for code division multiplexing was the PN serial, even use same code, as long as the code phase difference, then being correlated with just can be very little, so it is multiplexing to use a sign indicating number to carry out, can separate reduction to each data from the picture signal that is re-used.
Description of drawings
Fig. 1 is the block diagram of the major part of expression one embodiment of the present of invention.
Fig. 2 is the block diagram of the multiplexing of expression one embodiment of the present of invention and reduction circuit part thereof.
Fig. 3 is the sequential chart of the action of expression one embodiment of the present of invention.
Fig. 4 is a block diagram of describing the reduction circuit part of an alternative embodiment of the invention in detail.
Fig. 5 is the block diagram of expression another embodiment of the present invention.
Fig. 6 is the block diagram of expression another embodiment of the present invention.
Fig. 7 is the block diagram of the major part of expression another embodiment of the present invention.
Fig. 8 is the block diagram of the multiplexing of expression an alternative embodiment of the invention and reduction circuit part thereof.
Fig. 9 is the sequential chart of the action of expression an alternative embodiment of the invention.
Figure 10 is the block diagram of the major part of expression another embodiment of the present invention.
Figure 11 is the block diagram of the major part of expression another embodiment of the present invention.
Figure 12 is the block diagram of the major part of expression another embodiment of the present invention.
Figure 13 is the block diagram of the major part of expression another embodiment of the present invention.
Figure 14 is the sequential chart of another action of expression one embodiment of the present of invention.
Figure 15 is the block diagram that the display device with liquid crystal display in the past is described.
Figure 16 is the sequential chart that the action of the display device with liquid crystal display in the past is described.
Embodiment
Use the description of drawings embodiments of the present invention below.
[embodiment 1]
Fig. 1 is the figure of major part of the embodiment of expression display device of the present invention.And, in Fig. 1, show for example and use the typical block diagram of active array type liquid crystal display as the display device of display element.
As shown in Figure 1, CPU 101 generates the view data that show according to the indication of main part 131, and writes video memory 102.Main part 131 means the main body circuit of the tuner that comprises in the TV and demodulation section here and comprises DVD player recapiulation etc. and the main part of the input-output unit of computing machine etc.CPU 101 accepts the signal of main part 131, by from the compressed image of this picture signal, JPEG and MPEG etc. and the decompression and the computing of dynamic image data, thereby generate the view data that show, be stored in the video memory 102, rewrite renewal as required successively.
Liquid-crystal controller 103 generates the necessary various timings of liquid crystal display, is X clock signal 115, horizontal-drive signal 114, the vertical synchronizing signal 118 of X driver 113, in addition according to coming the reading displayed data from the order that video memory 102 shows.At this moment, video data is read as position serial data arranged side by side according to each pixel from video memory 102, and as display data signal 116 outputs.
Herein, in main part 131 sides, be provided with correspond respectively to video data everybody mlultiplying circuit 119-1,119-2 ..., 119-N, each mlultiplying circuit 119-1,119-2 ..., 119-N is provided extended code C respectively k(k=1,2 ..., N).And, this display data signal 116 everybody respectively with extended code C k(k=1,2 ..., N) and mlultiplying circuit 119-1,119-2 ..., 119-N multiplies each other, and carries out analog addition by adding circuit 120, sends to liquid crystal display 108 sides as multiplexed signals 122.
Herein, liquid crystal display 108 sides be provided with correspond respectively to video data everybody interlock circuit 121-1,121-2 ..., 121-N, each interlock circuit 121-1,121-2 ..., 121-N is provided extended code C respectively k(k=1,2 ..., N).And, liquid crystal display 108 sides use interlock circuit 121-1,121-2 ..., 121-N calculates respectively and the identical extended code C of extended code that multiply by multiplexed signals 122 at transmitter side k(k=1,2 ..., N) relevant, be reduced to the position serial data arranged side by side of each pixel, and send to latch 105.And the reduction of multiplexed signals 122 also can realize according to the method for using matched filter etc.Under the situation of using matched filter, can simplify synchronizing step with extended code.
When the pixel of liquid crystal display 108 constituted the capable m row of n, X driver 113 was made of m level X shift register 104, m combination lock storage 105 and m DA converter 106.This m level X shift register 104, m combination lock storage 105 and m DA converter 106 generally are divided into many groups and are integrated on the SIC (semiconductor integrated circuit), be configured in liquid crystal display 108 around.
When the pixel of the beginning of liquid-crystal controller 103 reading displayed frames, produce vertical synchronizing signal 118, and send to Y driver 107.Meanwhile, be shown in the 1st row the 1st row pixel data by interlock circuit 121-1,121-2 ..., 121-N is reduced to the parallel data of each pixel, latch in latch 105.When after X clock signal 115 when entering successively, the latch 105 that X shift register 104 is produced read clock at the column direction superior displacement and latch.
In the past, each pixel of display data signal 116 for example has each 8 of RGB, they use 24 transfer paths to transmit as 24 parallel data concurrently, perhaps the transfer rate with 24 times is transmitted after also string is changed, but embodiment according to Fig. 1, this signal is multiplexing by sign indicating number as multiplexed signals 122, so 1 of transfer path gets final product.Certainly, in this example, all of 24 of display data signal 116 are multiplexed with 1, but for example also can carry out multiplexingly, transmit with 3 transfer paths to per 8 of display data signal 116.In this case, also can significantly reduce the transfer path of signal.In addition, the transfer rate of each bit line of display data signal 116 is identical with in the past the situation of having drawn 24 signal line, and unlike and the string conversion under multiplexing be increased to 24 times, this point should be noted.
Fig. 2 is display data signal multiplexing and the reduction thereof that illustrate in greater detail display device of the present invention, be Fig. 1 mlultiplying circuit 119-1,119-2 ..., 119-N, adding circuit 120 and interlock circuit 121-1,121-2 ..., the figure of the example of the part of 121-N.
In Fig. 2, the display data signal 116 that the liquid-crystal controller 103 of Fig. 1 is read has been carried out the position side by side according to each pixel, and exports to terminal 209.Video data everybody by mlultiplying circuit 202-1,202-2 ..., the extended code C that produced of 202-N and extended code generation circuit 201 k(k=1,2 ..., N) multiply each other respectively, simulate addition by adding circuit 203, be sent to liquid crystal display 108 sides of Fig. 1 as multiplexed signals 214.Mlultiplying circuit 202-1,202-2 ..., 202-N be input as the numeral 2 values, if extended code C kAlso be 2 values, then mlultiplying circuit 202-1,202-2 ..., 202-N can be made of anticoincidence circuit.Because adding circuit 203 is output as a plurality of values, so need analog addition.In adding circuit 203, mlultiplying circuit 202-1,202-2 ..., correspondence-1V during the output logic 1 of 202-N, corresponding 1V carries out analog addition during logical zero.
The multiplexed signals 214 that sends liquid crystal display 108 sides to by mlultiplying circuit 206-1,206-2 ..., 206-N produces the circuit 204 identical extended code C of extended code that produced and that use at transmitter side with extended code respectively k(k=1,2 ..., N) multiply each other.These multiplying signals by integrating circuit 207-1,207-2 ..., 207-N integration respectively in 1 symbol section, by decision circuit 208-1,208-2 ..., 208- N decision bits 1 or 0 respectively, export as video data 210, and send to the latch 105 of Fig. 1.
Because mlultiplying circuit 206-1,206-2 ..., one of 206-N be input as multi-valued signal, so can not use anticoincidence circuit, and use the such analog multiplication circuit of equilibrium modulation circuit.In addition, in this part, all processing after the AD conversion can be carried out digitizing, will narrate in the back.
In this embodiment, if at asynchronous use of receiver side and the extended code C that uses at transmitter side kIdentical extended code C k, then at the correct restoring data of receiver side.In the multiplexed communications of in the past use extended code, need be used to obtain the synchronous special circuit that extended code produces at receiver side, but the sending and receiving end is positioned at and directly obtains to be used for synchronous signal from transmitter side under the situation of point blank and get final product as present embodiment.In the present embodiment, use identical chip clock 211, make extended code produce circuit 201,204 with horizontal-drive signal 213 and reset, obtain synchronously.By having this structure, can significantly simplify synchronous seizure.205 pairs of chip clock of frequency dividing circuit 211 are carried out frequency division, send signal according to per 1 symbol section, make integrating circuit 207-1,207-2 ..., 207-N and decision circuit 208-1,208-2 ..., 208-N resets.Chip clock 211 is the clock signals in cycle that are equivalent to 1 chip of extended code, the frequency gets higher of general chip clock 211.Therefore, do not send chip clock 211 and for example make horizontal-drive signal 213 multiplications, can reproduce, perhaps send the clock signal of each such pixel of X clock signal 115 with the unit of PLL etc. in liquid crystal display 108 sides of Fig. 1, in the receiver side multiplication, reproduce.
The single-point line 215-215 ' of Fig. 2 is the boundary of separating main body 131 sides and liquid crystal display 108 sides, by the transmission lines needs length physically of this boundary, and requires good transmission characteristic, so if quantity is difficult to carry out at most.The circuit that is transmitted by this boundary is multiplexed signals 214, chip clock signal 211, horizontal-drive signal 213 etc. in the present embodiment, does not require the bandwidth of broad on each circuit.Therefore, removed the difficulty of implementing, can easily realize originally with less one-tenth.
Fig. 3 is the sequential chart of brief description action of the present invention.This figure (a) illustrates the multiplexing flow process at transmitter side, the reduction flow process of this figure (b) expression receiver side., for for simplicity multiplexing number is described as 3 at this, but in fact extended code length obtains very longly, multiplexing number is measured very greatly.And, in the figure, t bBe the symbol section that transmits 1 code element, t cBe chip period, t b/ t cBe the rate of spread (SF:Spread Factor).1/t in addition cIt is the chip frequency.
The b of Fig. 3 (a) 1, b 2, b 3It is the video data that from video memory 102, reads with liquid-crystal controller 103.C 1, C 2, C 3Be to produce the extended code that circuit 201 is produced by extended code, respectively by mlultiplying circuit 202-01,202-2 ..., 202-N multiply by b 1, b 2, b 3, produce b 1C 1, b 2C 2, b 3C 3Herein, C 1, C 2, C 3And b 1, b 2, b 32 value signals as numeral use logical one and 0 to illustrate.In addition, b 1C 1, b 2C 2, b 3C 3Be correspondence when logical one-1, when logical zero corresponding 1 and carry out multiplied result.Also can consider to get b kAnd C kDistance, make its output corresponding analogue value-1 when logical one, the corresponding analogue value 1 when logical zero.b 1C 1, b 2C 2, b 3C 3Simulate the ground addition by adding circuit 203, output multiplexed signals S.Be S=b 1C 1+ b 2C 2+ b 3C 3, this signal is transmitted to liquid crystal display 108 sides as multiplexed signals 214.
In LCD 108 sides, shown in Fig. 3 (b), multiplexed signals S by mlultiplying circuit 206-1,206-2 ..., 206-N multiply by the extended code C identical with transmitter side respectively 1, C 2, C 3, generate SC 1, SC 2, SC 3, by integrating circuit 207-1,207-2 ..., 207-N is at time t bIn carry out integration respectively.Integral result separately is also shown among this figure (b).Decision circuit 208-1,208-2 ..., 208-N when integral result at threshold level V tBe judged to be logical zero when above, at V tBe judged to be logical one when following, thereby can reduce original display data signal 116.In the figure, because for the schematic processing under the environment that does not have noise fully, so integral result is ± 4, if but abominable in the orthogonality of extended code, perhaps have under the environment of noise, can't carry out this clear and definite distinguishing, so suitably determine V tDistinguish.
In addition, by extended code 1 of multiplexing signal at 1 symbol section t bTime in be transmitted.This be with the situation of in the past using a plurality of transmission lines parallel transfer video datas under the identical speed of transmission of per 1 signal wire.In the explanation of example in the past in the display body of 1920 * 1080 used pixels, RGB is respectively 24 situations of carrying out the transmission of per second 60 frames of 8 totals is example, carry out multiplexing to 24, then everybody is transmitted with the speed of 1920 * 1080 * 60  124.4Mbps, but in fact for multiplexing and expand to SF doubly.
Carry out multiplexing the transmission to 24, separating SF completely at receiver side needs more than 24 at least.Consider this situation, the chip-rate of expansion be above-mentioned SF doubly promptly with the about 3Gcps of identical in the past value, perhaps can be considered to without any effect.
But, compare in the past like that all situations about all transmitting as serial data, in the present embodiment, the desired bandwidth of transfer path is narrower also passable, and design is easy to.Promptly, in existing example, require display data signal at the frequency band very widely till the highest frequency (above-mentioned example, being about 1.5GHz) of the situation of the checkerboard pattern of each point etc., having same transmission characteristic from the DC of the black or white situation of whole image, relative therewith, desired bandwidth is owing to being to have concentrated the major part that transmits required energy up and down in the bandwidth range of center about symbol frequency with the chip frequency at most, so do not need very big ratio bandwidth on transmission lines under the situation of present embodiment.This will significantly relax the desired characteristic of transmission lines, realize easily.In addition, in example in the past, in 1 cycle of about 3GHz, transmit 1, so be easy to be subjected to the interference between the code element.And then, in example in the past, relatively poor for the repellences such as reflection that the bending of transmission lines and erroneous matching etc. cause.
On the other hand, in the present embodiment, owing to compare in the past example, the time that sends 1 is SF times length of example in the past, so even have the obstacle that causes with the reflection of the amount that example was identical etc. in the past, also can significantly relax the interference between code element.In addition, as the multiplexing characteristic of sign indicating number, can be by the distortion of this multi-paths of removal such as RAKE gimmick.
As mentioned above, though the situation of the chip-rate of the sign indicating number on the transfer path and in the past whole serial transfer to pass on clock frequency identical, also can significantly relax the desired specification of transfer path, become and realize easily.
And then in example in the past, when shown displaying contents was specific pattern, display data signal 1816 had very strong frequency spectrum sometimes on specific frequency.This unwanted radiation that produces at slave unit is that the viewpoint of EMI restriction is very disadvantageous, but according to present embodiment, because display data signal 116 is expanded by extended code all the time, so can on specific frequency, not produce stronger frequency spectrum, have from the yet very favourable effect of the viewpoint of EMI countermeasure.In addition, if for example with 3 multiplexed signals circuits according to R, G, B respectively 8 carry out multiplexingly, then 24 display data signal circuits can be kept to 3, it is very high that the chip frequency of each circuit can not become yet, perhaps this be more real.
[embodiment 2]
Fig. 4 is the figure of the major part of expression other embodiment of the present invention, the additive method that is used for being reduced to from multiplexed signals 122 original display data signal 116 among the expression embodiment 1.
In Fig. 4, the multiplexed signals 122 that is input to terminal 301 carries out the AD conversion by AD converter 302, is converted to digital signal.The chip clock that extended code generation circuit 304 is accepted to be input in the terminal 306 produces the extended code identical with transmitter side.CPU 303 calculates being correlated with between multiplexed signals 122 that is converted to digital signal in AD converter 302 and the extended code that produces in extended code generation circuit 304, be reduced to display data signal 116 from multiplexed signals 122, exports to terminal 308.CPU 303 and extended code produce circuit 304 and obtain synchronously by horizontal-drive signal 309.In addition, be 1/SF by frequency dividing circuit 305 with the chip clock signal frequency split, produce the clock signal 307 (X clock signal) of X shift register.
By adopting this structure, can make mimic channel for minimizing, be easy to be installed on the integrated circuit.Even it is 24 multiplexing that AD converter 302 is carried out, need 5 resolution to get final product at most, realize easily.
[embodiment 3]
Fig. 5 is the figure of block diagram of major part of another embodiment of expression display device of the present invention.And the function of frame that is endowed the symbol identical with Fig. 1 is identical with embodiment 1, so omit explanation.
In Fig. 5, X driver 513 is divided into N group, respectively by X shift register 543-1 ..., 543-N, latch 544-1 ..., 544-N, DA converter 545-1 ..., 545-N constitutes.General X driver 513 and Y driver 107 are split into many groups, are accommodated in vertically to connect in the integrated circuit to use.Grouping to the N group can be considered this driver IC unit, also can have many groups in a driver IC.Also can use a plurality of integrated circuit to constitute 1 group in addition on the contrary.In each group of X driver 513 according to each be assembled into interlock circuit 541-1 ..., 541-N and extended code produce circuit 542-1 ..., 542-N.In each group of X driver 513, distributed respectively and respectively organized intrinsic extended code collection S p{ C Pk(p=1,2 ..., N), extended code produce circuit 542-1 ..., 542-N produces this extended code collection that distributes.That is, the extended code of p group produces circuit 542-p and produces sign indicating number collection S pEach yard.Get the relevant design between the extended code collection of each group less.In addition, also also design being correlated with between each yard in the sign indicating number collection less certainly.It is desirable to all being correlated with and all be entirely 0, that is, use the orthogonal code system.
Below in order to illustrate, the p group (p=1,2 ..., N) the q row (q==1,2 ..., n/N) video data be made as D PqD PqHave information, promptly, constitute by multidigit as each 8 of RGB about color and gray scale.Each D PqThe k position be b k
The extended code of X driver 513 sides produce circuit 542-1 ..., 542-N only produces the sign indicating number collection that is assigned to this group, with respect to this, the extended code of transmitter side produces circuit 501 and produces employed all extended code collection as required.Liquid-crystal controller 103 reads the video data that shows from video memory 102, exports to multiplex circuit 503.In multiplex circuit 503, select the extended code collection according to the pixel that shows this video data by X driver 513 drivings of which group, use this extended code set pair display data signal 116 to carry out multiplexing and generation multiplexed signals 122.That is, the display data signal 116 that sends to the X driver 513 of p group is passed through a sign indicating number collection S pCarry out multiplexing.Receiver side at signal is that extended code only produces the extended code of the group of oneself in each group of X driver 513, and the display data signal 116 that sends to other group can't be reduced, so can correctly determine the transmission destination of display data signal 116.In the demonstration of image, relevant bigger between the sweep trace and between the frame, the situation that does not need to upgrade the display data signal 116 that sent last time is a lot.Video data and this video data that is ready for sending before 103 pairs of the liquid-crystal controllers on 1 sweep trace compare, and only the group with the different part of video data are sent video data.In liquid crystal display 108 sides, interlock circuit 541-1 ..., 541-N fails to detect the group of display data signal 116, be judged as and need not to change into display data signal 116, stop to belong to this group X shift register 543-1 ..., 543-N, latch 544-1 ..., 544-N and mouthful DA converter 545-1 ..., the action of 545-N, do not change output, continue the video data of last sweep trace of output.Like this, owing to can stop to send the action of video data to the group that need not to upgrade, so can significantly reduce the consumed power of equipment.
That is,, use extended code addressing to be carried out in the transmission destination of display data signal 116, so can specify the transmission destination of display data signal 116 by changing extended code according to each group by adopting said structure.Therefore,,, stop data and send, can realize low power consumingization for the group that need not to rewrite display data signal 116 by this structure of present embodiment.
In addition, the quantity of the group of X driver 513 (being N) is big more, can at length carry out the control of the transmission of display data signal 116/stop more, and it is big that the effect of power consumptionization also becomes.It is N=n (horizontal pixel count) that N is made as maximum situation.But when N was excessive, code length was elongated, and the operand with multiplexing/reduction increases such compromise selection.
The sending order of display data signal 116 can look like D 11, D 12..., D 1N, D 21, D 22..., D 2N... like that from left to right according to each pixel to every b k(k=1,2 ..) carries out multiplexing, also can be as earlier to D 11, D 21..., D N1Each b 1Carry out multiplexing, then to each b 2Carry out multiplexingly like that carrying out multiplexingly according to every, and send, and after the 1st pixel that be through with, be D the 2nd pixel 22, D 22..., D N2B 1Carry out multiplexing, then to b 2Carry out multiplexing.Each group and everybody are owing to carrying out addressing by extended code, so can at random change sending order.In the former method, though have the advantage that need not sort and can send to the display data signal 116 that reads from video memory 102 since for need not the group of new data more exist no signal during, so that speed is passed in the position is higher.In the latter's method, liquid-crystal controller 103 reads the data of the pixel of each group, must export according to every ordering after the temporary transient storage, but can reduce every the speed of passing on.
[embodiment 4]
Fig. 6 is the figure of explanation an alternative embodiment of the invention, in Fig. 5, be equivalent to X driver 513, interlock circuit 541-1 ..., 541-N, extended code produce circuit 542-1 ..., part of each group of 542-N replaces like that by Fig. 6.And, in Fig. 6, only express one group.
Present embodiment is cut down passing on of display data signal 116 for being correlated with between the frame that uses display image, put frame memory 643 and be sidelong at liquid crystal display 108, when demonstration is static, do not carry out passing on of display data signal 116, use the data that are stored in the frame memory 643.
Part with X driver 513 grades of structure replacing Fig. 5 of Fig. 6 describes below.
In Fig. 5, when the content of video memory 102 is rewritten, liquid-crystal controller 103 uses the extended code collection on the group that is assigned to the pixel with data that demonstration rewrites, on multiplex circuit 503, carry out multiplexingly, send to liquid crystal display 108 sides (terminal 603 of Fig. 6) as multiplexed signals 122.
And liquid-crystal controller 103 has carried out the situation of rewriting by monitoring by the control of 101 pairs of video memory 102 of CPU (video memory 102 write pulse and address bus) thereby can detect by 101 pairs of video memory of CPU 102.In addition, CPU 101 can come to detect the part that needs are rewritten according to every frame according to this Compress softwares compression algorithm in the decompression of MPEG etc.
CPU 101 also can will be able to detected like this rewriting part directly be notified to liquid-crystal controller 103.And, in Fig. 5, omitted the signal path that is used for this.And vertical synchronizing signal 118 and horizontal-drive signal 114 that liquid-crystal controller 103 is produced are synchronous, only send the display data signal 116 of the pixel that rewriting is arranged.
Herein, also can be whenever in video memory 102, there being when rewriting to send display data signal 116, but the general situation that the video memory 102 of CPU 101 is rewritten is compared with needing the timing of video data faster in liquid crystal display 108 sides, so preferably with horizontal-drive signal 114 and vertical synchronizing signal 118 synchronously, just transmission before liquid crystal display 108 needs video data.
In addition, for the addressing by extended code comes all pixels are carried out addressing, need very long extended code.Therefore preferably synchronously send data with synchronizing signal, thereby come the pixel address etc. of the directions X in calculated example such as row address, the group according to timing from synchronizing signal, reduce thus should appointment address size, can utilize the extended code of weak point to move.
Be built in interlock circuit 641 in each groups of X driver 513 of liquid crystal display 108 sides and calculate relevant with the extended code collection that is assigned to this group, and reduce the display data signal 116 that sends to this group, be stored in the frame memory 643.Under the situation that this video data that liquid-crystal controller 103 produces is not sent here, do not update stored in the employed video data in the demonstration of former frame in the frame memory 643, and preserve the data of last time.
Then, controller 602 be input to the chip clock 505 of terminal 606 and input to the horizontal-drive signal 114 of terminal 604,605 respectively and vertical synchronizing signal 118 synchronously, control is regularly carried out the control of latch 644 and DA converter 645 according to the action of liquid crystal display 108 when obtaining extended code to produce circuit 642 synchronous.That is, next the timing that latch 644 is exported according to controller 602 is read the video data on should scan lines displayed and is kept from frame memory 643.Then, when the horizontal-drive signal 114 below having imported, controller 602 starts DA converter 645, shows to liquid crystal display 108 outputting drive voltages according to the data that remain in the latch 644.
In above embodiment, to using the method for frame memory 643 to be illustrated in order to remain on data shown in the previous frame, but when the electric capacity of each pixel by liquid crystal display 108 etc. and when pixel itself has this maintenance function, can omit frame memory 643.
According to the said structure of present embodiment, in display device, can alleviate and comprise all difficulties of very high frequency content in interior high-speed data passes on the transmission of needed video data.Because it is multiplexing to use extended code that signal is carried out, transmit required number of, lines so can reduce.In addition, the contained frequency band of video data is narrowed down, line design is become easy.And then, even be revealed in the demonstration of the picture pattern on the spatial frequency at stronger spectrum peak, owing to come video data is carried out spread spectrum by extended code, so stronger spectrum peak is revealed on the specific frequency.This has significant effect in the EMI countermeasure.And then, owing to can carry out the addressing of data by extended code, thus need not especially addressing means, transmission destination that just can specific data.Thus, can only when displaying contents changes, carry out passing on to the data of liquid crystal display 108, in the reduction of the consumed power of display device, have significant effect from video memory 102.
[embodiment 5]
Fig. 7 is the figure of major part of the embodiment of expression display device of the present invention.And in Fig. 7, example shows uses the typical block diagram of active array type liquid crystal display as the display device of display element.
As shown in Figure 7, CPU 1101 generates the view data that show according to the indication of main part 1131, writes video memory 1102.Main part 1131 is at this main part that means the main body circuit of the tuner that comprises in the TV and demodulation section and comprise the recapiulation etc. of DVD player and input-output unit of computing machine etc.CPU 1101 accepts the signal of main part 1131, by from the compressed image of this picture signal, JPEG and MPEG etc. and the decompression and the computing of dynamic image data, thereby generate the view data that show, be stored in the video memory 1102, rewrite successively as required and upgrade.Liquid-crystal controller 1103 generates the required various timings of liquid crystal display, is chip clock signal 1127, horizontal-drive signal 1114, the vertical synchronizing signal 1118 of extended code, in addition according to reading video data from the order that video memory 1102 shows.At this moment, video data is read as position serial data arranged side by side according to each pixel from video memory 1102, and is output as display data signal 1116.
Herein, in main part 1131 sides, be provided with correspond respectively to video data everybody mlultiplying circuit 1119-1,1119-2 ..., 1119-N, each mlultiplying circuit 1119-1,1119-2 ..., 1119-N is provided extended code C respectively k(k=1,2 ..., N).And, this display data signal 1116 everybody by mlultiplying circuit 1119-1,1119-2 ..., 1119-N respectively with extended code C k(k=1,2 ..., N) multiply each other, simulate addition by adding circuit 1120, modulate by modulation circuit 1123 as multiplexed signals 1122, send to liquid crystal display 1108 sides from transmitting antenna 1125 as electromagnetic wave (electric wave) signal.
Herein, in liquid crystal display 1108 sides, be provided with correspond respectively to video data everybody interlock circuit 1121-1,1121-2 ..., 1121-N, each interlock circuit 1121-1,1121-2 ..., 1121-N is provided extended code C respectively k(k=1,2 ..., N).And in liquid crystal display 1108 sides, the electromagnetic wave signal that is received with receiving antenna 1126 is demodulated into multiplexed signals 1122 by demodulator circuit 1124.Then, by the multiplexed signals 1122 of demodulation interlock circuit 1121-1,1121-2 ..., calculated the extended code C identical respectively among the 1121-N with the extended code that multiplies each other at transmitter side k(k=1,2 ..., N) relevant, be reduced to the position serial data arranged side by side of each pixel, send to latch 1105.And the reduction of multiplexed signals 1122 also can realize with the method for matched filter etc.Under the situation of using matched filter, can simplify synchronizing step with extended code.
Herein, extended code C k(k=1,2 ..., N) be respectively to be called as chip period t cChronomere and the function of time that changes is chosen in and has lower relevant such sign indicating number between the different extended codes and use.That is, with t cFor unit with i C kValue be written as C k(i), get 2 kinds of extended code C arbitrarily k, C k', when calculating by following execution,
R=∑C k(i)C k’(i)。
That is, when carrying out relevant calculating (summation is calculated in 1 symbol section), when k and k ' not simultaneously, set extended code C k, C k' so that the absolute value of R is got the value near zero.And when R=0, we say this extended code C of 2 kinds k, C k' quadrature.If use the extended code C of quadrature k, C k', then at receiver side, multiplexed signals 1122 can separate fully.
When the pixel of liquid crystal display 1108 constituted the capable m row of n, X driver 1113 was made of m level X shift register 1104, m combination lock storage 1105 and m DA converter 1106.This m level X shift register 1104, m combination lock storage 1105 and m DA converter 1106 generally are divided into many groups and are integrated on the SIC (semiconductor integrated circuit), be configured in liquid crystal display 1108 around.Liquid-crystal controller 1103 produces vertical synchronizing signal 1118 and sends to Y driver 1107 when the pixel of the beginning of reading displayed frame.Meanwhile, be shown in the 1st row the 1st row pixel data by interlock circuit 1121-1,1121-2 ..., 1121-N is reduced to the parallel data of each pixel, latch in latch 1105.Next when the X clock signal enters successively, the latch 1105 that X shift register 1104 is produced read in clock at the column direction superior displacement and latch.(production method of X clock signal 1115 will be narrated in the back.)
In the past, according to each pixel, display data signal 1116 for example had each 8 of RGB, and they use 24 transfer paths to transmit concurrently as 24 parallel data, and perhaps the transfer rate with 24 times is transmitted after also string is changed.
On the other hand, according to present embodiment, display data signal 1116 is multiplexing by sign indicating number as multiplexed signals 1122, propagates in the space as electromagnetic wave signal.Certainly, in this example, be 1 to all 24 bit multiplexs, but for example also can be per 8 carry out multiplexingly, use 3 transfer paths, for example use different frequencies to transmit.In this case, the circuit of the generation/reduction of electromagnetic wave signal is become just can realize so greatly.In addition, even all 24 bit multiplexs are 1, the transfer rate on each bit line of display data signal 1116 is also identical with in the past the situation of having drawn 24 signal line, be not as and the string conversion to increase multiplexing down be 24 times, this point please notes.
Fig. 8 be the multiplexing and reduction that illustrates in greater detail the display data signal 1116 among Fig. 7 of display device of the present invention, mlultiplying circuit 1119-1,1119-2 ..., 1119-N, adding circuit 1120 and interlock circuit 1121-1,1121-2 ..., the figure of the example of the part of 1121-N, the production method of X clock signal 1115 also is described.
In Fig. 7, arranged side by side by the position by the display data signal 1116 that liquid-crystal controller 1103 reads according to each pixel, export to the terminal 1209 of Fig. 8.Display data signal 1116 everybody by each mlultiplying circuit 1202-1,1202-2 ..., the extended code C that produced of 1202-N and extended code generation circuit 1201 k(k=1,2 ..., N) multiply each other respectively, by adding circuit 1203 simulation additions, send to modulation circuit 1216 as multiplexed signals 1214, send to liquid crystal display 1108 sides by transmitting antenna 1218 as electromagnetic wave signal.Mlultiplying circuit 1202-1,1202-2 ..., 1202-N be input as the numeral 2 values, if extended code C kAlso be 2 values, then mlultiplying circuit 1202-1,1202-2 ..., 1202-N can be made of anticoincidence circuit.The output of adding circuit 1203 is owing to being many-valued, so need the simulation addition.Mlultiplying circuit 1202-1,1202-2 ..., the output logic of 1202-N is 1 o'clock correspondence-1V, logic is that 0 o'clock corresponding 1V simulates addition.
In liquid crystal display 1108 sides, use receiving antenna 1219 to receive the electromagnetic multiplexed signals 1122 that is sent based on transmitting antenna 1218, reduce multiplexed signals by demodulator circuit 1217.The multiplexed signals that is reduced by each mlultiplying circuit 1206-1,1206-2 ..., that 1206-N and extended code produce circuit 1204 is that produced and at the identical extended code C of extended code of transmitter side use k(k=1,2 ..., N) multiply each other respectively.These signals by integrating circuit 1207-1,1207-2 ..., 1207-N in 1 symbol section by integration respectively, by decision circuit 1208-1,1208-2 ..., 1208-N be judged to be respectively the position 1 or 0, as video data 1210 outputs, send to the latch 1105 of Fig. 7.
Because mlultiplying circuit 1206-1,1206-2 ..., on the 1206-N one is input as multi-valued signal, so can not use anticoincidence circuit, and uses the such analog multiplication circuit of equilibrium modulation circuit.In addition, in this part, the AD conversion all processing in back can be carried out digitizing and handle.
In this embodiment, if receiver side use asynchronously with at the employed extended code C of transmitter side kIdentical extended code C k, then at the correct restoring data of receiver side.In the multiplexed communications of utilizing extended code in the past, need be used to obtain the synchronous special circuit that extended code produces at receiver side, but as present embodiment, the sending and receiving end is positioned under the situation of point blank, is used for synchronous signal as long as directly obtain from transmitter side.Therefore, in the present embodiment, use identical chip clock 1211, produce circuit 1201,1204, obtain synchronously by horizontal-drive signal 1213 extended code that resets.By adopting this structure, can significantly simplify synchronous seizure.1205 pairs of chip clock of frequency dividing circuit 1211 are carried out frequency division, send signal according to each symbol section, with integrating circuit 1207-1,1207-2 ..., 1207-N and decision circuit 1208-1,1208-2 ..., 1208-N resets.At this moment because the output 1212 of frequency dividing circuit 1205 becomes 1 symbol section, so become with X clock signal 1115 with the cycle same-phase, this signal can be used as X clock signal 1115.Chip clock 1211 is the clock signals in cycle that are equivalent to 1 chip of extended code, because the frequency gets higher of general chip clock 1211, so also can not send chip clock 1211, and for example make horizontal-drive signal 1213 multiplications in liquid crystal display 1108 sides, means with PLL etc. are reproduced, perhaps send the clock signal of each such pixel of X clock signal 1115, double at receiver side and reproduce.
Single-point line 1215-1215 ' is the boundary of separating main body 1131 sides and liquid crystal display 1108 sides, and the transmission lines needs length physically by this boundary requires good transmission characteristic, so be difficult to carry out in technology in the past.In the present embodiment, the circuit that transmits by this boundary is chip clock signal 1211, horizontal-drive signal 1213 etc., and separately circuit is not required high speed and broadband.In addition, the display data signal 1116 that requires high-speed wideband is most transmitted by electromagnetic wave, so can remove all difficulties in the past the high-speed data transfer.And then, undertaken multiplexingly by extended code, can not improve transfer rate and transmit.
Fig. 9 is the sequential chart of brief description action of the present invention.This figure (a) illustrates the multiplexing flow process of transmitter side, the flow process of the reduction of this figure (b) expression receiver side.Herein in order to simplify, be 3 to describe with multiplexing quantity, but in fact the extended code length setting must be longer, multiplexing quantity also obtains bigger.And, in the figure, time t bBe the symbol section that transmits 1 code element, time t cBe chip period, t b/ t cBe the rate of spread (SF:Spread Factor).1/t in addition cIt is the chip frequency.
The b of Fig. 9 (a) 1, b 2, b 3It is the video data that from video memory 1102, reads with liquid-crystal controller 1103.C 1, C 2, C 3Be to produce the extended code that circuit 1201 is produced by extended code, respectively by mlultiplying circuit 1202-1,1202-2 ..., 1202-N multiply by b 1, b 2, b 3, produce b 1C 1, b 2C 2, b 3C 3C herein 1, C 2, C 3And b 1, b 2, b 32 value signals as numeral use logical one and 0 to illustrate.In addition, b 1C 1, b 2C 2, b 3C 3Be the corresponding analogue value-1 when logical one, the corresponding analogue value 1 is carried out multiplied result when logical zero.Also can consider to get b kAnd C kDistance, make its output corresponding analogue value-1 when logical one, the corresponding analogue value 1 when logical zero.b 1C 1, b 2C 2, b 3C 3Simulate the ground addition by adding circuit 1203, output S.Be S=b 1C 1+ b 2C 2+ b 3C 3, this signal is transmitted to liquid crystal display 1108 sides by transmitting antenna 1218 after being modulated to multiplexed signals 1214 by modulation circuit 1216.
In liquid crystal display 1108 sides, shown in Fig. 9 (b), the signal that receiving antenna 1219 is received is by demodulator circuit 217 demodulation, this by the multiplexed signals S of demodulation by mlultiplying circuit 1206-1,1206-2 ..., 1206-N multiply by the extended code C identical with transmitter side respectively 1, C 2, C 3, generate SC 1, SC 2, SC 3, by integrating circuit 1207-1,1207-2 ..., 1207-N is at time t bIn carry out integration respectively.Integral result separately is also shown among this figure (b).Decision circuit 1208-1,1208-2 ..., 1208-N when integral result at threshold level V tBe judged to be logical zero when above, at V tBe judged to be logical one when following, thereby can reduce original display data signal 1116.In the figure, owing to be schematic processing under the environment that does not have noise fully, so integral result is ± 4, if it is but abominable in the orthogonality of extended code, perhaps have under the environment of noise, can't carry out this clear and definite distinguishing, so suitably determine threshold level V tDistinguish.
In addition, by extended code 1 of multiplexing signal at 1 symbol section t bTime in be transmitted.This be with the situation of in the past using a plurality of transmission lines parallel transfer display data signal 1116 under the identical speed of transmission of per 1 signal wire.In the explanation of example in the past in the liquid crystal display 1108 of 1920 * 1080 used pixels, RGB is respectively 24 situations of carrying out the transmission of per second 60 frames of 8 totals is example, carry out multiplexing to 24, then everybody is transmitted with the speed of 1920 * 1080 * 60  124.4Mbps, but in fact for multiplexing and expand to SF doubly.For 24 are carried out multiplexing and send, and separate completely at receiver side, SF needs more than 24 at least.
Consider this situation, the chip-rate of expansion be above-mentioned SF doubly promptly with about 3Gcps (chip per second) of identical in the past value, perhaps can be considered to without any effect.Consider the orthogonality and the precision of extended code, need the transmission under the higher cps.But this is good situation when transmitting display data signal 1116 by electromagnetic wave as present embodiment on the contrary.Can increase the degree of freedom that chip-rate is selected, improve the electromagnetic frequency of being radiated in a way, be easier to carry out as electromagnetic transmission.
And then, compare in the past like that all situations about all transmitting as serial data, in the present embodiment, narrower the getting final product of the desired bandwidth of transfer path, design is easy to.Promptly, in existing example, require display data signal 1816 at the frequency band very widely till the highest frequency (above-mentioned example, being about 1.5GHz) of the situation of the checkerboard pattern of each point etc., having same transmission characteristic from the DC of the black or white situation of whole image, relative therewith, the desired bandwidth of present embodiment is owing to being to have concentrated the major part that transmits required energy up and down in the bandwidth range of center about symbol frequency with the chip frequency at most, so do not need very big ratio bandwidth on transmission lines.This will significantly relax the desired characteristic of transmission lines, realize easily.
In addition, in example in the past, in 1 cycle of about 3GHz, transmit 1, thus be easy to be subjected to the interference between the code element, and then the repellence of the reflection that causes for the bending of transfer path and erroneous matching etc. etc. is relatively poor.On the other hand, in the present embodiment, owing to compare in the past example, the time that sends 1 is SF times length of example in the past, so even have the obstacle that causes with the reflection of the amount that example was identical etc. in the past, also can significantly relax the interference between code element.In addition, as the multiplexing characteristic of sign indicating number, can be by the distortion of the multi-path of removals such as RAKE gimmick when spatial transmission.
As mentioned above, though the chip-rate of the sign indicating number on the transfer path be higher than whole serial transfer in the past situation pass on clock frequency, also can significantly relax the desired specification of transfer path, become and realize easily.And then in example in the past, when shown displaying contents was specific pattern, display data signal 1816 had very strong frequency spectrum sometimes on specific frequency.This unwanted radiation that produces at slave unit is that the viewpoint of EMI restriction is very disadvantageous, but according to present embodiment, because display data signal is expanded by extended code all the time, so can on specific frequency, not produce stronger frequency spectrum, have from the yet very favourable effect of the viewpoint of EMI countermeasure.
In addition, as in the past, transmit under the situation of signal, need side by side signal be driven, have the problem in essence that the high more then consumed power of frequency of signal increases more with the stray capacitance of circuit by Wireline.On the other hand, in the present embodiment, because by electromagnetic wave transmitting signal in the space, radiate then easily more as electromagnetic wave so frequency is high more, can have the effect of remarkable minimizing consumed power with the power extraction of transmitter side to the level that receiver side can receive in addition.
[embodiment 6]
Figure 10 is the figure of the major part of expression other embodiment of the present invention, as the structure of the adding circuit shown in Figure 8 1203 among the embodiment 5, modulation circuit 1216 and demodulator circuit 1217, has taked additive method to carry out illustration.In addition, other examples of also having represented the generation method of chip clock and X clock signal.In Figure 10, give duplicate numbers to the part that has an identical function with frame shown in Figure 8, needs if not otherwise specified then omit explanation.
In Figure 10, corresponding to display data signal 1116 each the position and be provided with transmitting antenna 1418-1,1418-2 ..., 1418-N.And, transmitting antenna 1418-1,1418-2 ..., 1418-N respectively by amplifier 1416-1,1416-2 ..., 1416-N and respectively with mlultiplying circuit 1202-1,1202-2 ..., 1202-N connects.
Then, each amplifier 1416-1,1416-2 ..., 1416-N accept respectively mlultiplying circuit 1202-1,1202-2 ..., the signal of 1202-N and amplifying, respectively to transmitting antenna 1418-1,1418-2 ..., the 1418-N power supply.And, amplifier 1416-1,1416-2 ..., 1416-N can have transmitted power is reduced to the function that can guarantee the minimum levels of necessary SN ratio at receiver side.Also can be that transmission level control is carried out on the basis with reception result from receiver side.In addition, mlultiplying circuit 1202-1,1202-2 ... if, the output driving force of 1202-N has surplus, then can omit amplifier 1416-1,1416-2 ..., 1416-N, directly to transmitting antenna 1418-1,1418-2 ..., the 1418-N power supply.
In addition in the present embodiment, on the position of the modulation circuit 1216 of embodiment 5, dispose amplifier 1416-1,1416-2 ..., 1416-N.By the code length of such adjustment extended code, the frequency band of chip frequency setting for expectation used, thereby can make mlultiplying circuit 1202-1,1202-2 ..., 1202-N has the function of modulation circuit 1216 concurrently.When adopting the sort circuit structure, mlultiplying circuit 1202-1,1202-2 ..., the frequency spectrum of the output signal of 1202-N becomes the convolution integral of the frequency spectrum of the video data that is input on the terminal 1209 and extended code.If select extended code well, can be the center then with 1/2 of chip frequency, in the scope of ± chip rate, generate the electromagnetic wave signal of spectrum concentration, can simplify circuit.
And then, compare with embodiment 5, then omitted adding circuit 1120, but the addition of signal carries out in the space, become based on electromagnetic multiplexed signals 1403.At this moment, each transmitting antenna 1418-1,1418-2 ..., 1418-N needs very the wavelength near the chip frequency.When the identical antenna of constant is positioned at point blank, each other can be influential, do not produce the influence that hinders but can not become to the communication between point blank.Each transmitting antenna 1418-1,1418-2 ..., electromagnetic wave signal that 1418-N sent is added in the space, becomes multiplexed signals 1403, receive by receiving antenna 1219.The signal that amplifier 1417 receives receiving antenna 1219 is amplified to the level that needs, pass to mlultiplying circuit 1206-1,1206-2 ..., 1206-N, reduce display data signal 1116 by the action identical with embodiment 5, export to terminal 1210.
Chip clock 1211 offers sign indicating number with clock and produces circuit 1201, produces extended code.1406 pairs of chip clock of frequency dividing circuit 1211 are carried out frequency division, also produce horizontal-drive signal 1213, and this signal is by wired liquid crystal display 1108 sides that send to.Horizontal-drive signal 1213 compares with display data signal 1116 grades, and frequency is enough low, so in addition owing to have only 1 wiring easily.In liquid crystal display 1108 sides, make horizontal-drive signal 1213 multiplications by PLL 1404, produce and chip clock 1405, and send to sign indicating number and produce a circuit 1204, produce the extended code of receiver side at the employed chip clock 1211 same-phase same frequencys of transmitter side.Chip clock 1405 is also passed through frequency dividing circuit 1205 by frequency division, produces X clock signal 1212.X clock signal 1212 also be used for integrating circuit 1207-1,1207-2 ..., the resetting of 1207-N.
By adopting this structure, can reduce the bar number of the line that connects liquid crystal display 1108 sides and main body 1131 sides, so and owing to have at this that signal frequency that transmits in thread path is lower to be realized easily, and can thoroughly solve and become the variety of issue of the high speed of problem mass data in transmitting in the past.
[embodiment 7]
Figure 11 is the figure of block diagram of major part of another embodiment of expression display device of the present invention.And, be endowed the same with the function of the frame of Fig. 7 duplicate numbers with embodiment 5, so omit its explanation.
In Figure 11, X driver 1513 is divided into N group, respectively by X shift register 1543-1 ..., 1543-N, latch 1544-1 ..., 1544-N and DA converter 1545-1 ..., 1545-N constitutes.General X driver 1513 and Y driver 1107 are split into many groups, be accommodated in the integrated circuit, and vertically connection are used.Grouping to the N group can be considered this driver IC unit, also can have many groups in a driver IC.In each group of X driver 1513 according to each be assembled into interlock circuit 1541-1 ..., 1541-N and extended code produce circuit 1542-1 ..., 1542-N.In each group of X driver 1513, distributed respectively and respectively organized intrinsic extended code collection S p{ C Pk(p=1,2 ..., N), extended code produce circuit 1542-1 ..., 1542-N produces this extended code collection that distributes.That is, the extended code of p group produces circuit 1542-p and produces sign indicating number collection S pEach yard.Get the relevant design between the extended code collection of each group less.In addition, also get the relevant design between each yard in the sign indicating number collection less certainly.It is desirable to all and relevant all be entirely 0, that is, use the orthogonal code system.
Below in order to illustrate, establish the p group (p=1,2 ..., N) the q row (q=1,2 ..., n/N) video data be D PqD PqHave information, promptly, constitute by multidigit as each 8 of RGB about color and gray scale.If each D PqThe k position be b k
The extended code of X driver 1513 sides produce circuit 1542-1 ..., 1542-N only produces the sign indicating number collection that is assigned to this group, with respect to this, the extended code of transmitter side produces circuit 1501 and produces employed all extended code collection as required.Liquid-crystal controller 1103 reads the video data that shows from video memory 1102, exports to multiplex circuit 1503.In multiplex circuit 1503, select the extended code collection according to the pixel that shows this video data by X driver 1513 drivings of which group, it is multiplexing to use this extended code set pair display data signal 1116 to carry out, and produces multiplexed signals 1122.That is, the display data signal 1116 that sends to the X driver 1513 of p group is undertaken multiplexing by sign indicating number collection Sp.Receiver side at signal is that extended code only produces the extended code of the group of oneself in each group of X driver 1513, and the display data signal 1116 that sends to other group can't be reduced, so can correctly determine the transmission destination of display data signal 1116.The multiplexed signals 1122 that produces in multiplex circuit 1503 sends to liquid crystal display 1108 sides by transmitting antenna 1125 as electromagnetic wave signal by modulation circuit 1123 and modulated.In liquid crystal display 1108 sides, receive this electromagnetic wave signal by receiving antenna 1126, by demodulator circuit 1124 reduction multiplexed signalss, send to interlock circuit 1541-1 ..., 1541-N.Receiving antenna 1126 and demodulator circuit 1124 can use in each group as Figure 12 aftermentioned jointly, also can special-purpose receiving antenna and demodulator circuit be set by each group.
In the demonstration of image, being correlated with between sweep trace and between the frame is bigger, need not mostly to upgrade to carry out the video data that sends last time.Video data and this video data that is ready for sending before 1103 pairs of the liquid-crystal controllers on 1 the sweep trace compare, and only send video data to the group with the different part of video data.In liquid crystal display 1108 sides, when interlock circuit 1541-1 ..., when 1541-N fails to detect video data, be judged as and need not to change video data, stop X shift register 1543-1 ..., 1543-N, latch 1544-1 ..., 1544-N and DA converter 1545-1 ..., the action of 1545-N, do not change output.
Like this, owing to the transmission action that can stop, so can significantly reduce the consumed power of equipment to the video data of the group that need not to upgrade.That is, by adopting structure as described above, thereby the transmission destination of video data is carried out addressing by extended code according to every group, so by changing extended code, can specify the transmission destination of video data.Thus, can stop data to the group that need not to rewrite video data and send, can realize low power consumingization, the quantity of group (being N) is big more, more can the utmost point carries out the transmission of video data/stop control meticulously, and it is big that the effect of power consumptionization also becomes.When N becomes maximum, be N=n (horizontal pixel count).But when N was excessive, code length was elongated, and the operand with multiplexing/reduction increases such compromise selection.
The sending order of video data can look like D 11, D 12..., D 1N, D 21, D 22..., D 2N... like that from left to right according to each pixel to every b k(k=1,2 ..w, w are the figure places of pixel) carries out multiplexing, also can be as earlier to D 11, D 21..., D N1Each b 1Carry out multiplexing, then to each b 2Carrying out multiplexingly like that carrying out multiplexingly according to every, and send, after the 1st pixel that be through with, is D to the 2nd pixel 22, D 22..., D N2B 1Carry out multiplexing, then to b 2Carry out multiplexing.
At this moment, in the former method, sending D 11, D 12..., D 1NThe time extended code collection that uses be S1={C 1k(k=1,2 ... w), sending D 21, D 22..., D 2NThe time extended code collection that uses be S2={C 2k(k=1,2 ... w), so can not use different extended code collection simultaneously.Relative therewith, in the latter's method, owing to send according to group bit string arranged side by side, so use different a plurality of extended code collection simultaneously.The quantity that among the latter is the concentrated sign indicating number of each yard mostly is that 1 or 2 (per 2 of each pixel walks abreast when sending) get final product.Like this, each group and every owing to carrying out addressing, so can at random change sending order with extended code.In the former method, though have the advantage that need not can send to the video data ordering of reading from video memory, but since for need not the group of new data more exist no signal during, so that speed is passed in the position is higher, and need a lot of extended code quantity.In the latter's method, liquid-crystal controller 1103 reads the data of the pixel of each group, in case must export according to every ordering after the storage, but can reduce every the speed of passing on, and required extended code negligible amounts get final product, is easy to carry out sign indicating number design.The latter's method will describe in detail in embodiment 9.
[embodiment 8]
Figure 12 is the figure of explanation another embodiment of the present invention, can use be equivalent among structure replacing Figure 11 of Figure 12 X driver 1513, interlock circuit 1541-1 ... 1541-N, extended code produce circuit 1542-1 ... the part of each group of 1542-N, receiving antenna 1126 and demodulator circuit 1124.And, in Figure 12, only illustrate 1 group.
In the present embodiment, for being correlated with between the frame that uses display image reduced passing on of display data signal 1116, be sidelong at liquid crystal display 1108 by every group and put frame memory 1643, when demonstration is static, do not carry out passing on of display data signal 1116, use the data that are stored in the frame memory 1643.
X driver 1513 grades with structure replacing Figure 11 of Figure 12 partly describe below.
When video memory 1102 is rewritten, liquid-crystal controller 1103 uses the extended code collection on the group that is assigned to the pixel with data that demonstration rewrites, carry out multiplexingly on multiplex circuit 1503, modulation multiplex signal 1122 sends to liquid crystal display 1108 sides as electromagnetic wave signal.Liquid-crystal controller 1103 has carried out the situation of rewriting by monitoring by the control of 1101 pairs of video memory 1102 of CPU (video memory 1102 write pulse and address bus) thereby can detect by 1101 pairs of video memory of CPU 1102.In addition, CPU 1101 can detect the part that needs are rewritten according to this Compress softwares compression algorithm according to every frame in the decompression of MPEG etc.CPU 1101 also can with can be detected like this rewriting part directly be notified to liquid-crystal controller 1103 and (in Figure 11, omitted the signal path that is used for this.)。Vertical synchronizing signal 1118 and horizontal-drive signal 1114 that liquid-crystal controller 1103 is produced are synchronous, only send the video data of the pixel that rewriting is arranged.Also can be whenever in video memory 1102, there being when rewriting to send video data, but the general situation that the video memory 1102 of CPU 1101 is rewritten is compared with needing the timing of video data faster in liquid crystal display 1108 sides, so preferably with horizontal-drive signal 1114 and vertical synchronizing signal 1118 synchronously, just transmission before liquid crystal display 1108 needs video data.In addition, in order to come all pixels are carried out addressing, need very long extended code by the addressing of using extended code.Therefore preferably by synchronously sending data with synchronizing signal, for example the bases such as pixel address of the directions X in row address, the group are calculated from the timing of synchronizing signal, thereby reduce should appointment address size, can use short extended code to move.
Receive by the multiplexed signals 1122 that electromagnetic wave sent at liquid crystal display 1108 built-in receiving antennas 1126, come demodulation by demodulator circuit 1124, and send to interlock circuit 1641.Interlock circuit 1641 calculating are relevant with the extended code collection of distributing to this group, and reduction sends to the display data signal 1116 of this group, is stored in the frame memory 1643.When this display data signal 1116 that is produced when liquid-crystal controller 1103 did not send over, the employed video data in the demonstration of previous frame that is stored in the frame memory 1643 was not updated, but preserved the data of last time.Controller 1602 be input to the chip clock 1505 in the terminal 1603 and be input to the horizontal-drive signal 1114 of terminal 1604,1605 respectively and vertical synchronizing signal 1118 synchronously, obtain extended code and produce the synchronous of circuit 1642, control is simultaneously regularly moved the control of carrying out latch 1644 and DA converter 1645 according to display body.
That is, latch 1644 timing of being exported according to controller 1602 is read the video data of the next one on should scan lines displayed and is kept from frame memory 1643.When having imported next horizontal-drive signal 1114, controller 1602 starts DA converters 1645, and the data that kept according to latch 1644 show to liquid crystal display 1108 outputting drive voltages.
In above present embodiment, to using the method for frame memory 1643 to be illustrated in order to remain on data shown in the previous frame, but when the electric capacity of each pixel by display body etc. and when pixel itself has this maintenance function, can omit frame memory 1643.
In addition, receiving antenna 1126 and demodulator circuit 1124 can respectively not be 1, can be configured according to each group.If adopt this structure just not need to send the output of demodulator circuit 1124, can install more efficiently by each group of cloth alignment.
According to said structure of the present invention,,, on the low power consumingization of display device, has significant effect so the group that can only rewrite for needs sends display data signal 1116 simply because the transmission destination of display data signal 1116 is expanded a yard addressing.
[embodiment 9]
Figure 13 is the figure of expression an alternative embodiment of the invention, has represented the sending order of display data signal in more detail for example.The sending order of display data signal is equivalent to the situation of the latter's method among the embodiment 7, and Figure 13 is the figure that represents the structure of this transmitter side in more detail.
Liquid-crystal controller 1103 at first reads the D of the row of the video data that is ready for sending liquid crystal display 1108 from video memory 1102 11The data of pixel.The data that read from video memory 1102 are the multidigit information with information of color and gray scale.This information is sent to parallel-to-serial converter 1701-1, by and string be converted to after the serial signal, in mlultiplying circuit 1702-1, produce the extended code C of circuit 1704 generations with the PN sign indicating number 1Multiply each other, 1703-1 modulates by modulation circuit, and 1705-1 sends as electromagnetic wave signal by transmitting antenna.
Then, liquid-crystal controller 1103 postpones 1t cAnd read the D of the row of the video data that is ready for sending liquid crystal display 1108 from video memory 1102 21The data of pixel, send to parallel-to-serial converter 1701-2.Parallel-to-serial converter 170I-2 is with D 21The video data of pixel be converted to serial signal, produce the extended code C of circuit 1704 generations by mlultiplying circuit 1702-2 with the PN sign indicating number after this signal 2Multiply each other, 1703-2 modulates by modulation circuit, and 1705-2 sends as electromagnetic wave signal by transmitting antenna.
Below similarly continue identical action up to D N1Pixel till, and then then D 12, D 22..., D N2, at D NM(wherein M=n/N) locates to finish the data transmission of delegation, and the video data that then carries out next line sends.
The PN sign indicating number produces circuit 1704 and is made of shift register and feedback circuit 1706.Feedback circuit 1706 is got the distance of output (tap) of the suitable level of shift register, feeds back to the elementary of shift register.According to the obtain manner of tap, the combination that remains on the data in the shift register can be got except being that maximum number zero (when promptly using the shift register of s level, is 2 entirely s-1).
In the embodiment of Figure 13, owing to from identical shift register, obtain each extended code, so these extended codes are the t that has been shifted each other cThe identical pattern of integral multiple.The sign indicating number that produces so as can be known is called as M sequence or PN sequence, and white related function is 2 when homophase (τ=0) s-1, other are-1 all, become the characteristic quite similar with white noise.According to the such structure of present embodiment, employed extended code gets final product so sign indicating number generation circuit is 1 owing to using the different sign indicating number collection of the identical only phase place of pattern.And if the PN sign indicating number produces by shift register, so from the code fetches at different levels of shift register, then can take out the different sign indicating number collection of phase place, can simplify circuit.
Then use the summary of the sequential chart explanation action of Figure 14.And, be endowed the chip clock number in the most descending of this figure in order to be easy to following content is described.
Below, with reference to the moment time, use this chip clock number, for example when the forward position of expression moment chip clock number 5, be called t CsThe forward position.With the situation of Fig. 9 similarly, t among the figure bDuring being 1 code element, t cIt is the chip clock cycle.For convenience of explanation, with the code length of extended code be 7, multiplexing number is that 3 situation is that example describes, but in the enforcement of reality, uses longer sign indicating number, multiplexing number also should be bigger.C 1, C 2, C 3Be to be 7 PN sequence as the length that extended code is used, by each t cCarry out phase deviation.Herein, t b=7t c
Liquid-crystal controller 1103 reads D 11Up to t C1Till the beginning, send data to parallel-to-serial converter 1701-1.Parallel-to-serial converter 1701-1 is from D 11The position 1 the beginning export as serial data in order.The D of Figure 14 11Expression is from position b 1Begin every through t bAnd the situation of output.Be t C1To t C7Be b 1(b in this example 1=1), from t C8To t C14Be b 2(b in this example 2=0) every in order 7t, cUpgrade and send data.
From t C1To t C7Between, promptly parallel-to-serial converter 1701-1 is sending b 1During, liquid-crystal controller 1103 reads D 21, send data to parallel-to-serial converter 1701-2, be converted to serial data.D 21From t C8Rise promptly from the 2nd code element by each 7t cOutput b 1(b in this example 1=1), b 2(b in this example 2=0) ....Similarly, D 31Transmission from the 3rd code element promptly from t C15Beginning.At D 21And string conversion beginning before 1 symbol section and D 31And 2 symbol section before the string conversion beginning are not for to carry out during the null of any transmission.
These signals multiply by extended code C by mlultiplying circuit 1702-1,1702-2,1702-3 respectively 1, C 2, C 3, output C 1D 11, C 2D 21, C 3D 31The multiplication of this moment makes the corresponding analogue value-1 of extended code and video data logical one, the corresponding analogue value 1 of logical zero is carried out as mentioned above.
In Figure 14, compare D 21Row represent with logical value by last row, and compare C 1D 11Row by under row represent with the analogue value.In addition, multiply by the analogue value 0 during not sending the null of data.S has been addition C 1D 11, C 2D 21, C 3D 31Multiplexed signals, in Figure 13,, as long as consider the electromagnetic intensity in space owing in the space, carry out the addition of signal.
c 1, c 2, c 3Be respectively with C 1, C 2, C 3Logical value performance make the mark of analogue value mark into.Multiplexed signals S is in order to calculate and C 1, C 2, C 3Relevant, respectively with c 1, c 2, c 3Multiply each other, calculate Sc 1, Sc 2, Sc 3Σ Sc 1, Σ Sc 2, Σ Sc 3Be to play 7t constantly from this cTill aggregate-value.At each t bStronger relevant of (having applied the part of shade in Figure 14) expression during during this time end can be judged the position of reception.That is, when for positive bigger value, be logical value 0, when for negative bigger value, be logical value 1.In addition, become when not sending the null of signal and be roughly 0 value.For example in the part of null2001, aggregate-value 2002 is 0.When using the PN sequence as this extended code, relevant during owing to the chip phase skew not exclusively is zero, so how much comprise error.Therefore, code length need be obtained longlyer, improve the countermeasure of the rate of spread etc.In addition, also have by the PN sign indicating number of setovering slightly and obtain balance, thereby guarantee the method for orthogonality.At this moment, the interlock circuit of adding circuit and receiver side and mlultiplying circuit need correctly to carry out the performance of computing amount of bias.In addition, also can not use the PN sign indicating number, but use the sign indicating number collection that has orthogonality fully.
1103 of liquid-crystal controllers send display data signal 1116 to the group that needs update displayed data-signal 1116.For the group that need not to send display data signal 1116, send null.At receiver side, if can receive null, then needn't upgrade the display data signal 1116 of this group as can be known, so whether need to upgrade by receiving the beginning part of each group, just can judging.In the time needn't upgrading, the video data before using stops the action of unwanted circuit.Thus, can significantly reduce the consumed power of display device.
In the present embodiment, as video memory 1102, promptly storing 1 with frame memory is that prerequisite describes more than the picture, but in the TV signal of NTSC etc., may not necessarily need frame memory.This moment is as video memory, as long as have the line memory buffer of 1~2 sweep trace, detect the part that needs renewal, then can be as present embodiment, can carry out not necessarily the action of passing on according to from left to right scanning sequency, at this moment, owing to can use being correlated with between the sweep trace to omit unwanted passing on, so on the low-powerization of display device, have effect.
As mentioned above,, in display device, comprise very high frequency content, all difficulties in the transmission of the video data that the data that can alleviate needs high speed are passed on according to these said structures of the present invention.Because can multiplexed signals, so can reduce the required number of, lines of transmission by extended code.In addition, the contained frequency band of video data is narrowed down, becoming is easy to line design.And then, even be revealed in the demonstration of the picture pattern on the spatial frequency of shown image at stronger spectrum peak, owing to come video data is carried out spread spectrum by extended code, so stronger spectrum peak is revealed on the specific frequency, this has significant effect aspect EMI countermeasure.And then, owing to can carry out the addressing of data by extended code, thus need not especially addressing means, transmission destination that just can specific data.Thus, can only when demonstration changes, carry out passing on to the data of display body, in the reduction of the consumed power of display device, have significant effect from video memory.
And, in the above-described embodiment, display device with large-scale TV is that example is illustrated, but is not limited to above-mentioned embodiment, for example also can be applied to and being connected of the display body of notebook computer and the electronic equipment of mobile phone etc. etc. widely in the purposes.

Claims (23)

1. a display device is characterized in that, this display device has:
The display unit that shows video data;
Cut apart the video data that is presented on the above-mentioned display unit, be generated as the cutting unit of the individual serial signal of plural N (N is the integer more than 2);
The multiplication unit that above-mentioned serial signal is multiplied each other with different sign indicating numbers respectively;
The output signal of synthetic above-mentioned multiplication unit synthesizes the synthesis unit of the serial signal that is less than above-mentioned N;
Output signal by calculating above-mentioned synthesis unit is relevant with above-mentioned sign indicating number, reduces the reduction unit of above-mentioned video data; And
According to the driver element that drives above-mentioned display unit by the signal that above-mentioned reduction unit reduced.
2. display device according to claim 1 is characterized in that, above-mentioned display unit has and is configured to rectangular pixel, shows by the line sequential scanning.
3. display device according to claim 1 and 2 is characterized in that, above-mentioned cutting unit is according to every pixel data of cutting apart each pixel, and carries out serial output according to each pixel.
4. display device according to claim 1 and 2 is characterized in that, above-mentioned cutting unit is the N group with the column split of above-mentioned display unit, according to above-mentioned each group picture element signal is carried out serial output.
5. a display device is characterized in that, this display device has:
Has the display unit that is configured to rectangular pixel;
Be presented at video data on the above-mentioned display unit according to every column split of individual group of plural N (N is the integer more than 2), be generated as the cutting unit of serial signal;
The multiplication unit that above-mentioned serial signal is multiplied each other with different sign indicating numbers respectively;
The output signal of synthetic above-mentioned multiplication unit synthesizes the synthesis unit of the serial signal that is less than above-mentioned N;
Output signal by calculating above-mentioned synthesis unit is relevant with above-mentioned sign indicating number, thereby reduces the reduction unit of above-mentioned video data;
The storage unit of the output signal of the above-mentioned reduction unit of temporary transient storage; And
Come to drive the driver element of above-mentioned display unit according to every row according to the signal of storing by said memory cells.
6. display device according to claim 5 is characterized in that, the group output video data that above-mentioned cutting unit is only rewritten needs.
7. according to each described display device of claim 1 to 6, it is characterized in that this display device has:
The 1st extended code that generation offers the sign indicating number of above-mentioned multiplication unit produces circuit; And
The 2nd extended code that generation offers sign indicating number above-mentioned reduction unit, identical with the sign indicating number that offers above-mentioned multiplication unit produces circuit,
Above-mentioned the 1st extended code produces circuit and produces circuit by identical clock signal acquisition synchronously with above-mentioned the 2nd extended code.
8. a display device is characterized in that, this display device has:
Have and be configured to rectangular pixel, carry out the display unit of display driver by the line sequential scanning;
Produce the video data generation unit of video data according to each sweep trace of above-mentioned display unit;
The video data that will produce in above-mentioned video data generation unit is assigned to driver element in each pixel of regulation, that be divided into individual group of N (N is the integer more than 2) as driving data; And
The detecting unit of the pixel that detection video data between adjacent sweep trace is different,
Only, send video data to above-mentioned driver element from above-mentioned video data generation unit for the group that comprises the pixel that shows the video data different more than 1 with video data shown on nearest sweep trace.
9. display device according to claim 8, it is characterized in that, each set of dispense to above-mentioned driver element is used for the multiplexing sign indicating number of sign indicating number, is to be specified which group that sends to above-mentioned driver element by above-mentioned sign indicating number to go from above-mentioned video data generation unit to the transmission of the video data that above-mentioned driver element carries out.
10. according to each described display device of claim 1 to 9, it is characterized in that above-mentioned sign indicating number is an orthogonal code.
11. a display device is characterized in that, this display device has:
The display unit that shows video data;
Cut apart the video data that is presented on the above-mentioned display unit, be generated as the cutting unit of the individual serial signal of plural N (N is the integer more than 1);
A plurality of multiplication units that above-mentioned serial signal is multiplied each other with different sign indicating numbers respectively;
The conversion of signals that above-mentioned multiplication unit is exported is the transmitting element that electromagnetic wave signal sends;
Receive the receiving element of above-mentioned electromagnetic wave signal;
By calculating relevant with above-mentioned yard of received signal that above-mentioned receiving element receives, reduce the reduction unit of above-mentioned video data; And
According to the driver element that drives above-mentioned display unit by the signal that above-mentioned reduction unit reduced.
12. display device according to claim 11 is characterized in that, above-mentioned transmitting element has:
The output signal of synthetic above-mentioned multiplication unit synthesizes the synthesis unit of the serial signal that is less than above-mentioned N;
Modulate the signal that above-mentioned synthesis unit is exported, be modulated to the modulating unit of the wireless frequency of regulation; And
Acceptance is radiated electromagnetic transmitting antenna from the output of above-mentioned modulating unit.
13. display device according to claim 11 is characterized in that, above-mentioned transmitting element has:
Modulate above-mentioned multiplication unit output signal separately, be modulated to a plurality of modulating units of the wireless frequency of regulation; And
Acceptance is radiated electromagnetic a plurality of transmitting antenna from the output separately of above-mentioned a plurality of modulating units.
14. display device according to claim 11, it is characterized in that, the signal that above-mentioned multiplication unit is exported have be used to radiate energy of electromagnetic field enough wireless frequency composition, this display device has the above-mentioned multiplication unit of reception signal separately and radiates electromagnetic a plurality of transmitting antenna.
15., it is characterized in that above-mentioned display unit has and is configured to rectangular pixel, shows by the line sequential scanning according to each described display device in the claim 11 to 14.
16., it is characterized in that above-mentioned cutting unit is cut apart the pixel data step-by-step of each pixel according to each described display device in the claim 11 to 15, carry out serial output according to each pixel.
17., it is characterized in that above-mentioned cutting unit is the N group with the column split of above-mentioned display unit, with the picture element signal and the line output of above-mentioned each group according to each described display device in the claim 11 to 15.
18. a display device is characterized in that, this display device has:
Has the display unit that is configured to rectangular pixel;
Be presented at video data on the above-mentioned display unit according to every column split of individual group of plural N (N is the integer more than 1), and be generated as the cutting unit of serial signal;
The multiplication unit that above-mentioned serial signal is multiplied each other with different sign indicating numbers respectively;
The output signal of synthetic above-mentioned multiplication unit synthesizes the synthesis unit of the serial signal that is less than above-mentioned N;
The conversion of signals that above-mentioned synthesis unit is exported is the transmitting element that electromagnetic wave signal sends;
Receive the demodulating unit that above-mentioned electromagnetic wave signal carries out demodulation;
Output by calculating above-mentioned demodulating unit is relevant with above-mentioned sign indicating number, reduces the reduction unit of above-mentioned video data;
The storage unit of the output signal of the above-mentioned reduction unit of temporary transient storage; And
Come to drive the driver element of above-mentioned display unit according to every row according to the signal of storing by said memory cells.
19. display device according to claim 18 is characterized in that, the group output video data that above-mentioned cutting unit is only rewritten needs.
20., it is characterized in that this display device has according to each described display device in the claim 11 to 19:
Generation offers the 1st yard generation circuit of the sign indicating number of above-mentioned multiplication unit; And
Generation offers the 2nd yard generation circuit of sign indicating number above-mentioned reduction unit, identical with the sign indicating number that offers above-mentioned multiplication unit,
Above-mentioned the 1st yard generation circuit obtains with identical clock signal with above-mentioned the 2nd yard generation circuit synchronously.
21. a display device is characterized in that, this display device has:
Have and be configured to rectangular pixel, carry out the display unit of display driver by the line sequential scanning;
Produce the video data generation unit of video data according to each sweep trace of above-mentioned display unit;
The conversion of signals that above-mentioned video data generation unit is exported is the transmitting element that electromagnetic wave signal sends;
Receive the demodulating unit that above-mentioned electromagnetic wave signal carries out demodulation;
Video data that will demodulation in above-mentioned demodulating unit is assigned to driver element in each pixel of regulation, that be divided into individual group of N (N is the integer more than 1) as driving data; And
The detecting unit of the pixel that detection video data between adjacent sweep trace is different,
Only, send video data to above-mentioned driver element from above-mentioned video data generation unit for the group that comprises the pixel that shows the video data different more than 1 with video data shown on nearest sweep trace.
22. display device according to claim 21, it is characterized in that, each set of dispense to above-mentioned driver element is used for the multiplexing sign indicating number of sign indicating number, is to be specified which group that sends to above-mentioned driver element by above-mentioned sign indicating number to go from above-mentioned video data generation unit to the transmission of the video data that above-mentioned driver element carries out.
23., it is characterized in that above-mentioned sign indicating number is identical PN sign indicating number after orthogonal code, the phase deviation or phase deviation and the identical PN sign indicating number that has been applied in biasing according to each described display device in the claim 11 to 22.
CNA2005800303520A 2004-09-09 2005-09-07 Display device Pending CN101014993A (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP261983/2004 2004-09-09
JP2004261983A JP3894211B2 (en) 2004-09-09 2004-09-09 Display device
JP261984/2004 2004-09-09

Publications (1)

Publication Number Publication Date
CN101014993A true CN101014993A (en) 2007-08-08

Family

ID=36158234

Family Applications (1)

Application Number Title Priority Date Filing Date
CNA2005800303520A Pending CN101014993A (en) 2004-09-09 2005-09-07 Display device

Country Status (2)

Country Link
JP (1) JP3894211B2 (en)
CN (1) CN101014993A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107819542A (en) * 2017-11-09 2018-03-20 陕西外号信息技术有限公司 A kind of optical label sharing method and equipment based on code division multiplexing

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107819542A (en) * 2017-11-09 2018-03-20 陕西外号信息技术有限公司 A kind of optical label sharing method and equipment based on code division multiplexing
CN107819542B (en) * 2017-11-09 2019-06-21 陕西外号信息技术有限公司 A kind of optical label sharing method and equipment based on code division multiplexing

Also Published As

Publication number Publication date
JP2006078720A (en) 2006-03-23
JP3894211B2 (en) 2007-03-14

Similar Documents

Publication Publication Date Title
CN100498443C (en) Liquid crystal display device and a method for driving the same
CN100543523C (en) Liquid Crystal Display And Method For Driving
CN100541599C (en) Method and apparatus by plurality of transmission lines transmission data
CN101303841B (en) Liquid crystal display device
CN106409202A (en) Semiconductor device, semiconductor device module, display panel driver and display module
CN104751811A (en) Display device and method for driving the same
KR20140090761A (en) Display driving circuit and method of transferring data in display driving circuit
CN102290024A (en) Method for recovering pixel clocks based on internal display port interface and display device using the same
CN105096795A (en) Display driver integrated circuit and mobile deivce and apparatus including the same
CN106416159A (en) Analog behavior modeling for 3-phase signaling
CN101625849B (en) Image processing apparatus and method
CN101675414A (en) Modulation apparatus and image display apparatus
EP1796072A1 (en) Display device
CN101458906B (en) Liquid crystal display
KR20210097890A (en) Source Driver IC, Display Device Including The Same, and Method for Operating Display Device
JP4265619B2 (en) Display device and control method of display device
CN101014993A (en) Display device
CN1323506C (en) Serial data regenerating circuit and regenerating method
JP2005204221A (en) Electronic apparatus
CN101561998A (en) Method and device for processing data of liquid crystal display
JP4281780B2 (en) Display device and control method of display device
CN205265822U (en) Image processing system
CN103186248A (en) Remote management system and remote management method thereof
US7782287B2 (en) Data accessing interface having multiplex output module and sequential input module between memory and source to save routing space and power and related method thereof
JP2008293044A (en) Display device and method for controlling display device

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C02 Deemed withdrawal of patent application after publication (patent law 2001)
WD01 Invention patent application deemed withdrawn after publication