CN101008923A - Segmentation and paging data storage space management method facing heterogeneous polynuclear system - Google Patents

Segmentation and paging data storage space management method facing heterogeneous polynuclear system Download PDF

Info

Publication number
CN101008923A
CN101008923A CNA2007100669326A CN200710066932A CN101008923A CN 101008923 A CN101008923 A CN 101008923A CN A2007100669326 A CNA2007100669326 A CN A2007100669326A CN 200710066932 A CN200710066932 A CN 200710066932A CN 101008923 A CN101008923 A CN 101008923A
Authority
CN
China
Prior art keywords
section
address
segment
segment table
program
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CNA2007100669326A
Other languages
Chinese (zh)
Inventor
陈天洲
黄振宝
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Zhejiang University ZJU
Original Assignee
Zhejiang University ZJU
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Zhejiang University ZJU filed Critical Zhejiang University ZJU
Priority to CNA2007100669326A priority Critical patent/CN101008923A/en
Publication of CN101008923A publication Critical patent/CN101008923A/en
Pending legal-status Critical Current

Links

Images

Abstract

This invention discloses one section memory space management method facing abnormal multi-nuclear system, which adopts program and computer memory space design as one section structure composed of several sections, wherein, each program operation keeps self section list and uses list to record operation memory usage space; main process nuclear in abnormal system responds for total program operation for one list to realize system operation and its section list for integral management.

Description

Sectional type memory space management towards heterogeneous multi-core system
Technical field
The present invention relates to the computer operating system field, relate in particular to a kind of sectional type memory space management towards heterogeneous multi-core system.
Background technology
Storage space management is the important component part of operating system, and it is in charge of the storer of computer system.Storer can be divided into primary memory (abbreviation main memory) and supplementary storage (being called for short auxilliary depositing) two classes.
Two parts in the general branch of the storage space of primary memory: a part is a system region, deposit operation system and some standard subroutines, routine etc.; Another part is the user area, deposits user's program and data etc.Storage administration mainly is that the user area in the primary memory is managed.
Computer system often will deposit the program of a plurality of operations simultaneously in primary memory, and the position of these programs in primary memory can not be known in advance, so the user can not use specific address when coding after adopting the multiprogramming designing technique.Address normally, the indicated address of address portion in the instruction of modern computer, logical address can be from 0 open numbering.The user is by the logical address coding.In the time will packing program into computing machine, at first, operating system will be distributed a suitable primary memory space for it.Because logical address is often inconsistent with the specific address of the primary memory space that is assigned to, and the processor execution command is undertaken by specific address, so must convert logical address to true storeroom that specific address just can obtain information.The work that logical address is converted to specific address claims address translation.
During a plurality of operation shared main storage, must protect program in the primary memory and data, and transfer rationally and effectively, to reach the efficient of giving full play to primary memory.
Program for the convenience of the user, be not subjected to the restriction of primary memory actual capacity when making user written program, can adopt certain technology " expansion " main memory capacity, can use to obtain the primary memory space bigger than actual capacity.
In a word, the purpose of storage administration is the efficient that will make things convenient for the user as much as possible and improve primary memory.Specifically, storage administration has following four functions.
1) distribution in primary memory space and deallocation
In the time of will packing operation into main memory, must mode according to the rules file an application, specifically distribute by storage administration to operating system.Storage administration is provided with the distribution condition of a charting storage space, find out enough clear area distribution condition according to the requirement of the application universe by the operating position in certain strategy analyzing stored space and can not satisfy application during requirement, then allow the applicant be in the state of waiting for main memory resource, when enough primary memory spaces are arranged, reallocate to him.
When certain operation in the primary memory was withdrawn or initiatively given back main memory resource, storage administration will be regained its shared all or part of storage space, made them become clear area (also crying the free zone), at this moment also will revise the relevant item of form.The work of regaining storage area also claims " deallocation ".
2) the primary memory space shares
Sharing of primary memory space in order to improve the interest rate efficient of the primary memory space, the implication that two aspects are arranged is shared in so-called primary memory space:
● the shared main storage resource.Adopt the multiprogramming designing technique to make several programs enter primary memory simultaneously, take the storage space of some separately, use a primary memory jointly.
● some zone of shared main storage.When several operations have common program segment or data, program segment that can these are common or deposit data in certain storage area, when each operation is carried out all addressable they.
3) memory protection
System program is not only arranged in the primary memory, and also have the program of some roads user job.Some roads program phase mutual interference in the main memory must be protected program in the main memory and data.Usually provide defencive function by hardware, software cooperates to be realized.In the time will visiting a certain unit of main memory, whether allow visit by hardware check, if allow then to carry out, interrupt otherwise produce, handle accordingly by operating system.
The most basic safeguard measure is to stipulate that each road program can only visit those zones that belong to it or the information in the access public domain, but should be limited public visit, and in general, a program has following three kinds of situations when carrying out:
● not only readable but also can write to this year in the main storage region to one's name;
● to allowing Sharing Information in the public domain or obtaining spendable other user's information, readable and inaccurate modification;
● the information of using not obtaining the authorization, neither readablely can not write again.
4) expansion in primary memory space
Under the support of computer hardware, the software and hardware cooperation can assign to supplementary storages such as disk to use as the school extension of primary memory.When a large-scale program will be packed main memory into, can be earlier the primary memory of packing into of a part wherein, remainder leaves on the disk, when needing during if program is carried out with the information in main memory not, adopt soverlay technique that it is called in main memory by operating system, like this, also need consider the capacity of the actual primary memory space when user programs, just he can use enough primary memory the same.The expansion of this primary memory space has made things convenient for the user widely, they can be removed from the amount of programming consider numerous and diverse covering problem.
Along with rapid development of computer technology, emerge increasing self-defining Computer Architecture in built-in field, this has just impelled the particular demands to the accumulator space management of the operating system of this type of Computer Architecture.
Traditional memory space management adopts the allocation management method of continuous space, and it is simple that this implementation has implementation, and way to manage clearly waits advantage.But problems such as memory headroom fragment in use appear in this management method easily, and especially for embedded system, memory device spaces such as internal memory are limited, so how effectively to use these limited spaces just to seem very important.
Summary of the invention
The object of the present invention is to provide a kind of sectional type memory space management towards heterogeneous multi-core system.
The technical scheme that technical solution problem of the present invention is adopted is:
1) segmental structure of program
Be programmed to a kind of segmented structure, be made up of plurality of sections, be made up of a main memory program segment, plurality of sub program array segment and work section, each section all begins addressing from " 0 ", and has complete logical meaning; Address between section and the section is discontinuous, and the address is continuous in the section;
2) space of storage space size is divided
In the segmented storage management, address structure is that the user is visible, and promptly the user knows how logical address is divided into segment number and unit number, the user is when program design, the maximum length of each section is subjected to the restriction of address structure, and further, the maximum hop counts that allow in each program also are restricted.At this, the section location structure of use is: segment number accounts for 3, and unit number accounts for 13, and operation just can divide 8 sections at most, and every section length can reach the 8K byte;
3) address translation of segmentation storage administration and memory protection
When carrying out memory allocation, for each user job that enters main memory is set up a segment table, each section can come record with a segment table in the situation of main memory, and it points out the start address and the length of each segmentation in the primary memory; The segmentation storage management system comprises a schedule work simultaneously, and the segment table of these operations is registered, and each operation has an entry in schedule work; When carrying out, operation can convert logical address to specific address by segment table; Because each operation all has the segment table of oneself, address translation should be undertaken by segment table separately, thereby realizes the protection to each job storage space;
The management method of 4) segment management system
Be responsible for the segment table content that operates in the operation on each process nuclear is carried out unified management by the main process nuclear in the heterogeneous polynuclear; Operation bring into operation on other auxiliary kernels all by registering the segment table of this operation to main nuclear application, thereby realize the unified management of schedule work and segment table thereof.
The useful effect that the present invention has is: by realize the virtual memory method of sectional type under the heterogeneous multi-core architecture.Can allow computer system move a plurality of operation processes and shared memory cell with a slice.Simultaneously program in the storer and data are protected, each operation can be on a plurality of process nuclear each self-operating, rational management.Help making full use of the resource of storer.
Description of drawings
Fig. 1 is the segmental structure of program.
Fig. 2 is the general format of segment table and schedule work.
Fig. 3 is the address translation and the memory protection process flow diagram of segmentation storage administration.
Specific implementation method
Segmented storage management is to be that unit carries out storage allocation with the section, provides the logical address of following form: segment number+unit number for this reason
1) segmental structure of program
Be programmed to a kind of segmented structure, be made up of plurality of sections, for example be made up of a main memory program segment, plurality of sub program array segment and work section, each section all begins addressing from " 0 ", and has complete logical meaning.Address between section and the section is discontinuous, and the address is continuous in the section.As shown in Figure 1, available symbols form in the user program (section of pointing out name and inlet) is called one section function, and program defines a segment number for each section name when compiling or compilation again.
2) space of storage space size is divided
In the segmented storage management, address structure is that the user is visible, and promptly the user knows how logical address is divided into segment number and unit number, the user is when program design, the maximum length of each section is subjected to the restriction of address structure, and further, the maximum hop counts that allow in each program also are restricted.At this, the section location structure that we use is: segment number accounts for 3, and unit number accounts for 13, and operation just can divide 8 sections at most, and every section length can reach the 8K byte.
The realization of segmented storage management can be continuous primary memory space of each section distribution of operation based on the variable partition storage administration, and can be discontinuous between each section.When carrying out storage allocation, should be each user job that enters main memory and set up a segment table, each section can come record with a segment table in the situation of main memory, and it points out the start address and the length of each segmentation in the primary memory.The segmentation storage management system comprises a schedule work simultaneously, and the segment table of these operations is registered, and each operation has an entry in schedule work.The general format of schedule work and segment table as shown in Figure 2.
3) address translation of segmentation storage administration and memory protection
When carrying out memory allocation, for each user job that enters main memory is set up a segment table, each section can come record with a segment table in the situation of main memory, and it points out the start address and the length of each segmentation in the primary memory.The segmentation storage management system comprises a schedule work simultaneously, and the segment table of these operations is registered, and each operation has an entry in schedule work.When carrying out, operation can convert logical address to specific address by segment table.Because each operation all has the segment table of oneself, address translation should be undertaken by segment table separately, thereby realizes the protection to each job storage space.
As shown in Figure 3, in fact segment table entry (STE) has played the effect of plot/limit for length's register.When carrying out, operation can convert logical address to specific address by segment table.Because each operation all has the segment table of oneself, address translation should be undertaken by segment table separately.It is such to be similar to paging memory, and partitioned file also is provided with a segment table control register, is used for depositing current segment table origin and the length that takies the operation of processor.
Operation at first obtains the start address and the segment table length of segment table by the segment table control register.Segment number in the programmed logic address obtains the start address and the limit for length of this section from segment table then, is undertaken by comparer that an address is superimposed as last specific address in the section after the judgement of address out of range and in the logical address.
The management method of 4) segment management system
Be responsible for the segment table content that operates in the operation on each process nuclear is carried out unified management by the main process nuclear in the heterogeneous polynuclear.Operation bring into operation on other auxiliary kernels all by registering the segment table of this operation to main nuclear application, thereby realize the unified management of schedule work and segment table thereof.

Claims (1)

1. sectional type memory space management towards heterogeneous multi-core system is characterized in that:
1) segmental structure of program
Be programmed to a kind of segmented structure, be made up of plurality of sections, be made up of a main memory program segment, plurality of sub program array segment and work section, each section all begins addressing from " 0 ", and has complete logical meaning; Address between section and the section is discontinuous, and the address is continuous in the section;
2) space of storage space size is divided
In the segmented storage management, address structure is that the user is visible, and promptly the user knows how logical address is divided into segment number and unit number, the user is when program design, the maximum length of each section is subjected to the restriction of address structure, and further, the maximum hop counts that allow in each program also are restricted.At this, the section location structure of use is: segment number accounts for 3, and unit number accounts for 13, and operation just can divide 8 sections at most, and every section length can reach the 8K byte;
3) address translation of segmentation storage administration and memory protection
When carrying out memory allocation, for each user job that enters main memory is set up a segment table, each section can come record with a segment table in the situation of main memory, and it points out the start address and the length of each segmentation in the primary memory; The segmentation storage management system comprises a schedule work simultaneously, and the segment table of these operations is registered, and each operation has an entry in schedule work; When carrying out, operation can convert logical address to specific address by segment table; Because each operation all has the segment table of oneself, address translation should be undertaken by segment table separately, thereby realizes the protection to each job storage space;
The management method of 4) segment management system
Be responsible for the segment table content that operates in the operation on each process nuclear is carried out unified management by the main process nuclear in the heterogeneous polynuclear; Operation bring into operation on other auxiliary kernels all by registering the segment table of this operation to main nuclear application, thereby realize the unified management of schedule work and segment table thereof.
CNA2007100669326A 2007-01-26 2007-01-26 Segmentation and paging data storage space management method facing heterogeneous polynuclear system Pending CN101008923A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CNA2007100669326A CN101008923A (en) 2007-01-26 2007-01-26 Segmentation and paging data storage space management method facing heterogeneous polynuclear system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CNA2007100669326A CN101008923A (en) 2007-01-26 2007-01-26 Segmentation and paging data storage space management method facing heterogeneous polynuclear system

Publications (1)

Publication Number Publication Date
CN101008923A true CN101008923A (en) 2007-08-01

Family

ID=38697363

Family Applications (1)

Application Number Title Priority Date Filing Date
CNA2007100669326A Pending CN101008923A (en) 2007-01-26 2007-01-26 Segmentation and paging data storage space management method facing heterogeneous polynuclear system

Country Status (1)

Country Link
CN (1) CN101008923A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103207808A (en) * 2012-01-13 2013-07-17 百度在线网络技术(北京)有限公司 Processing method and device in multi-core system
WO2015035901A1 (en) * 2013-09-10 2015-03-19 华为技术有限公司 Method and device for determining program performance interference model
WO2015100674A1 (en) * 2013-12-31 2015-07-09 华为技术有限公司 Data migration method, device and processor
CN109783220A (en) * 2017-11-10 2019-05-21 上海寒武纪信息科技有限公司 Memory allocation method, device, computer system and storage medium
CN109791524A (en) * 2016-10-04 2019-05-21 罗伯特·博世有限公司 Method and apparatus for protecting working storage
CN114637466A (en) * 2022-03-03 2022-06-17 深圳大学 Data read-write behavior presumption method and device, storage medium and electronic equipment

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103207808A (en) * 2012-01-13 2013-07-17 百度在线网络技术(北京)有限公司 Processing method and device in multi-core system
WO2015035901A1 (en) * 2013-09-10 2015-03-19 华为技术有限公司 Method and device for determining program performance interference model
US10430312B2 (en) 2013-09-10 2019-10-01 Huawei Technologies Co., Ltd. Method and device for determining program performance interference model
WO2015100674A1 (en) * 2013-12-31 2015-07-09 华为技术有限公司 Data migration method, device and processor
CN109791524A (en) * 2016-10-04 2019-05-21 罗伯特·博世有限公司 Method and apparatus for protecting working storage
CN109791524B (en) * 2016-10-04 2023-11-07 罗伯特·博世有限公司 Method and device for protecting a working memory
CN109783220A (en) * 2017-11-10 2019-05-21 上海寒武纪信息科技有限公司 Memory allocation method, device, computer system and storage medium
CN109783220B (en) * 2017-11-10 2020-12-11 安徽寒武纪信息科技有限公司 Memory allocation method, device, computer system and storage medium
CN114637466A (en) * 2022-03-03 2022-06-17 深圳大学 Data read-write behavior presumption method and device, storage medium and electronic equipment
CN114637466B (en) * 2022-03-03 2022-11-11 深圳大学 Data read-write behavior presumption method and device, storage medium and electronic equipment

Similar Documents

Publication Publication Date Title
CN101261577B (en) Microprocessor and method for storing data in microprocessor
CN101149688B (en) Virtualization system, internal memory managing method
CN100555247C (en) Justice at multinuclear/multiline procedure processor high speed buffer memory is shared
US8156302B2 (en) Integrating data from symmetric and asymmetric memory
JP4738038B2 (en) Memory card
Jung et al. Memorage: Emerging persistent RAM based malleable main memory and storage architecture
CN101403992B (en) Method, apparatus and system for implementing remote internal memory exchange
TW201403321A (en) Dynamic bank mode addressing for memory access
CN101008923A (en) Segmentation and paging data storage space management method facing heterogeneous polynuclear system
CN101008922A (en) Segmentation and paging data storage space management method facing heterogeneous polynuclear system
CN101630276A (en) High-efficiency memory pool access method
KR20200123850A (en) Hybrid memory system
CN102971727A (en) Recording dirty information in software distributed shared memory systems
CN103019955A (en) Memory management method based on application of PCRAM (phase change random access memory) main memory
US5875487A (en) System and method for providing efficient shared memory in a virtual memory system
EP0747827B1 (en) System and method for providing shared memory in a multi-tasking environment
CN101866320A (en) Data management method and flash memory storage system and controller using the same
CN101013404A (en) Heterogeneous multi-core system-oriented management method of paging memory space
Wu et al. DWARM: A wear-aware memory management scheme for in-memory file systems
CN101375257B (en) Cache locking without interference from normal allocation
Chen et al. Refinery swap: An efficient swap mechanism for hybrid DRAM–NVM systems
Lee et al. VM-aware flush mechanism for mitigating inter-VM I/O interference
CN100390755C (en) Computer micro system structure comprising explicit high-speed buffer storage
CN102169418A (en) Resource limited equipment and data access method
Carter et al. Impulse: Memory system support for scientific applications

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C02 Deemed withdrawal of patent application after publication (patent law 2001)
WD01 Invention patent application deemed withdrawn after publication