CN101004991A - Method for producing plasma display screen - Google Patents
Method for producing plasma display screen Download PDFInfo
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- CN101004991A CN101004991A CN 200610023507 CN200610023507A CN101004991A CN 101004991 A CN101004991 A CN 101004991A CN 200610023507 CN200610023507 CN 200610023507 CN 200610023507 A CN200610023507 A CN 200610023507A CN 101004991 A CN101004991 A CN 101004991A
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Abstract
The method includes following steps: preparing motherboard with multiple array areas; coating film on each array areas, which are spaced out a certain distance with scribing lines, and then patternizing the film so as to form film pattern; scribing step along scribing lines by using array area as a unit. Using silk-screen printing photographic plate, the method sets up thin film on array areas except warning regions between array areas. Using laser to etch array areas selectively, the method reduces etching area so as to raise production efficiency.
Description
Technical field
The invention relates to the technology of plasma panel manufacture method, especially about the manufacture method of a kind of plasma panel that can enhance productivity.
Background technology
(Plasma Display Panel: be to utilize when the ultraviolet ray that gas discharge took place activates fluorophor following abbreviation " PDP "), fluorophor can send the principle of visible light and the display unit made to plasma panel.(Cathode Ray Tube:CRT) compares with the leonard's tube that still occupies the display device leading position up to now, and PDP has thinner thickness and advantage in light weight and that can embody the large-scale picture of high definition.PDP is made of a plurality of discharge cell that is arranged in matrix (matrix) form, and a discharge cell is exactly a pixel of picture.
Discharge cell on original 3 electrode AC creeping discharge type PDP is made of following components: comprise the set upper plate of keeping the scan electrode in the electrode pair and keeping electrode on the upper substrate; Comprise be set on the lower basal plate with the lower plate of keeping the data electrode that electrode pair intersects; Between upper plate and lower plate, form the spaced walls of discharge space.
PDP with this structure by data electrode and keep subtend discharge between the electrode selected after, keep discharge according to the surface discharge of keeping between the electrode pair.And keep the mode that ultraviolet ray that discharge the time taken place makes light-emitting phosphor by utilization, visible light is transmitted into the outside, unit.Like this, discharge cell just can regulate keep discharge during, and then embody gray scale, thisly arrange the formed PDP in back by discharge cell with the matrix form and demonstrate image thereby make.
The scan electrode of keeping electrode pair of this class PDP and keep electrode and constituted by transparency electrode, a lateral edges that is arranged on transparency electrode and the width bus electrode narrower respectively than transparency electrode.Transparency electrode normally is arranged on the upper substrate with tin indium oxide (Indium Tin Oxide:ITO).Bus electrode is that the metal with good conductivity is arranged on the transparency electrode, so that reduce by the caused voltage decline of high impedance transparency electrode situation.
Fig. 1 a to Fig. 1 c is the manufacture method sectional drawing that is included in original scan electrode respectively and keeps the transparency electrode on the electrode.
At first, as shown in Figure 1a, plated transparent conductivity material 2 with sputter film plating process such as (sputtering) on the upper substrate 1.On the upper substrate 1 that is provided with this transparent conductivity material 2, shown in Fig. 1 b, through utilizing photolithography (photolithography) technology of template (mask) to be provided with photoresist (photoresist) figure 4.And the mode by etching (etch) technology of utilizing photoresist figure 4 is come etching transparent conductivity material 2 shown in Fig. 1 c, is provided with transparency electrode 6.
Equally, original transparency electrode 6 also utilizes template that the photoresist figure 4 that forms by photolithography technology is carried out etching.Photolithography technology comprises many technologies such as exposure technology, video picture technology and striping (strip) technology, manufacturing process complexity.Therefore, laser etching method has been proposed in the hope of the manufacturing process of simplifying transparency electrode with reduce cost of manufacture since recently.
Fig. 2 a and Fig. 2 b are the manufacture method sectional drawings that utilizes the transparency electrode of laser etching method manufacturing.
Shown in Fig. 2 a, on upper substrate 1, plated transparent conductivity material 2 by sputter film plating process such as (sputtering).Shown in Fig. 2 b, transparent conductivity material 2 is carried out etching by the laser beam that takes place in the laser irradiating part 8.Therefore, shown in Fig. 2 c, transparency electrode 6 just has been set on the upper substrate 1.
In this case, because laser irradiating part 8 utilizes laser beam that the transparent conductivity material 2 that is positioned at light-emitting zone is carried out etching and formed transparency electrode, and the transparent conductivity material 2 that will be positioned at non-luminous region eliminates fully.So need many times that the transparent conductivity material 2 that is positioned at non-luminous region is eliminated fully, thereby exist the low problem of production efficiency.
Summary of the invention
Purpose of the present invention is exactly in order to address the above problem, and a kind of manufacture method of the relevant plasma panel that can enhance productivity is provided.
To achieve these goals, the manufacture method of plasma panel of the present invention comprises following step: the step of making the motherboard that is provided with a plurality of array regions; The motherboard (motherboard) of above-mentioned each array region go up with scribing (scribing) line spaced apart and plate film after, on film, carry out etching (patterning) thereby the step of formation film pattern; With above-mentioned a plurality of array regions is unit, above-mentioned motherboard is carried out the step of scribing along above-mentioned scribe line.
The spacing distance that the centre is provided with between the film pattern of above-mentioned mutual correspondence of above-mentioned scribe line at least will be at 5mm, and above-mentioned spacing distance is 5-10mm.
The step that forms above-mentioned film pattern comprises following two steps again: carry out the step of conductive material plated film with above-mentioned scribe line on the motherboard of above-mentioned each array region with keeping at a certain distance away; With the above-mentioned conductive material of laser beam etching and form the step of conductive pattern.
The step that forms above-mentioned film pattern also comprises following two steps: on the motherboard of above-mentioned each array region, carry out the step of transparent conductivity material plated film with above-mentioned scribe line with keeping at a certain distance away; With the above-mentioned transparent conductivity material of laser beam etching and form the step that each keeps the transparency electrode on the electrode pair.
Effect of the present invention:
As mentioned above, utilize silk-screen printing photographic plate that film is arranged on other zones the warning region between array region based on the manufacture method of the present invention's plasma panel, promptly on the motherboard of array region.Because this film utilizes laser to be etched on the array region selectively, so the etching area has reduced, production efficiency has also just improved.
For further specifying above-mentioned purpose of the present invention, design feature and effect, the present invention is described in detail below with reference to accompanying drawing.
Description of drawings
Fig. 1 a to Fig. 1 c is the sectional drawing that shows the manufacture method of original plasma panel top electrode.
Fig. 2 a to Fig. 2 c utilizes other embodiment to show the sectional drawing of the manufacture method of original plasma panel electrode.
Fig. 3 is the sectional drawing based on the present invention's plasma panel.
Fig. 4 is the flow chart of plasma panel manufacture method shown in Figure 3.
Fig. 5 a to Fig. 5 c is the sectional drawing based on the present invention's plasma panel electrode manufacturing method.
Fig. 6 a is the oblique view that embodies silk-screen printing photographic plate (screen mask) shown in Fig. 5 a, and Fig. 6 b is the oblique view of top motherboard shown among the displayed map 5a simultaneously.
The symbol description of major part in the accompanying drawing:
1,42: substrate 48,52: lure electrics layer
50: diaphragm 54: spaced walls
56: luminescent coating X: address electrode
Y: scan electrode Z: keep electrode
Embodiment
Below just the embodiment of the manufacture method of plasma panel of the present invention is elaborated with reference to Fig. 3 to Fig. 6 b in the accompanying drawing.
Fig. 3 is the sectional drawing based on the present invention's plasma panel.
With reference to Fig. 3, be provided with the scan electrode Y that is positioned on the upper substrate 40 and keep electrode Z and be positioned at address electrode X on the lower basal plate 42 based on the present invention's PDP discharge cell.
Scan electrode Y and keep electrode Z and comprise transparency electrode 44Y, 44Z respectively and be set on the lateral edges of transparency electrode 44Y, 44Z and width bus electrode 46Y, the 46Z narrower than transparency electrode 44Y, 44Z.Transparency electrode 44Y, 44Z are arranged on the upper substrate 40 with tin indium oxide (Indium Tin Oxide:ITO) usually. Bus electrode 46Y, 46Z are arranged on transparency electrode 44Y, the 44Z by the metal of good conductivity, have the effect that voltage that minimizing causes by high impedance transparency electrode 44Y, 44Z descends.
Be coated with top on the upper substrate 40 of electrode Z and lure electrics layer 48 and diaphragm 50 being arranged side by side scan electrode Y and keeping.Top lures the wall electric charge that is producing when gathering plasma discharge on the electrics layer 48.Diaphragm 50 can prevent the damage of the sputter that top lures electrics layer 48 not to be subjected to plasma discharge to be produced, and can improve the release rate of 2 electronics simultaneously.Diaphragm 50 is made with magnesium oxide (MgO) usually.
The lower basal plate 42 that is provided with data electrode X is provided with the bottom and lures electrics layer 52 and spaced walls 54, and the bottom lures on the surface of electrics layer 52 and spaced walls 54 and is being coated with fluorophor 56.The direction that is provided with that direction and scan electrode Y is set and keeps electrode Z of data electrode X intersects.Spaced walls 54 is set up in parallel with data electrode X, and ultraviolet ray and the visible light that is produced that can prevent to discharge revealed to adjacent discharge cell.It is UV-activated that fluorophor 56 is produced during by plasma discharge, sends a kind of in redness of the skin or complexion, green or the blue visible rays.On/be injected into the inert gas that is used for gas discharge in the discharge space between lower basal plate 40,42 and the spaced walls 54.
Fig. 4 is the sectional drawing of plasma panel manufacture method shown among Fig. 3.
The S11 step, the top motherboard that includes a plurality of top array zone of other upper plates of the making identical or big or small enough installations of size.
The S12 step is provided with transparency electrode on each top array zone of this top motherboard.
The S13 step is provided with the bus electrode of the impedance composition be used for reducing transparency electrode on this transparency electrode.
S14, the S15 step, therefore, transparency electrode and bus electrode have formed keeps electrode pair.Be provided with on the top motherboard of keeping electrode pair, be disposed with and lure electrics layer and diaphragm.
The S16 step, thus the making of a plurality of upper plates finished by the mode of the top motherboard that is provided with diaphragm being carried out scribing along scribe line.
The S17 step on the other hand, is made the identical or big or small bottom motherboard that including of other lower plates of a plurality of lower array zone at least enough is set of size.
The S18 step, each lower array zone of this bottom motherboard is provided with data electrode.
S19 step, this data electrode are provided with the electrics layer that lures that gathers the wall electric charge.
The S20 step, the spaced walls that this lures electrics layer to be provided with to be used for dividing a plurality of discharge cells.
The S21 step, spaced walls with lure electrics layer on be that unit is provided with relevant fluorophor with R, G, B discharge cell.
The S22 step, the bottom motherboard that is provided with fluorophor is finished the making of a plurality of lower plates by the mode of carrying out scribing along scribe line.
The S23 step utilizes adhesive that lower plate and upper plate are glued together then, just finishes the making of plasma panel.
On the other hand, have at least one to be to make in transparency electrode, bus electrode and the data electrode according to the manufacture method shown in Fig. 5 a to Fig. 5 c.Here just be that example describes with the transparency electrode.
Shown in Fig. 5 a, motherboard 60 tops arranged side by side silk-screen printing photographic plate 68.This silk-screen printing photographic plate 68 is provided with the conductive material of prevention shown in 5a and Fig. 6 a, for example the blacked-out areas S1 that passes through of ITO class transparent conductivity material and the graphics field S2 that passes through for conductive material.At this moment, graphics field S2 is the array region of each upper plate or lower plate, and blacked-out areas S1 is corresponding with the scribe line (SCL) between adjacent upper plate or the adjacent lower plate.Have the above Rack (d) of 5mm at least with the corresponding blacked-out areas S1 of scribe line (SCL), for example have the width of 5mm-10mm.
Through the conductive material 62 of graphics field S2 on this silk-screen printing photographic plate (the screen mask) 68, shown in Fig. 6 b, other zones that are plated in selectively except that warning region are on the array region of motherboard 60.At this moment, the centre is provided with the spacing distance d that has the above for example 5mm-10mm of 5mm between the conductive material 62 of mutual correspondence of scribe line (SCL) at least.
Shown in Fig. 5 b, the laser institute etching that this conductive material 62 is generated by laser irradiating part 72.At this moment, because 62 of conductive materials are carried out plated film selectively on array region, thus can reduce on the warning region by the etch period of the conductive material of plated film, and then improve productivity.Simultaneously, rely on the etching technics that utilizes laser to carry out, shown in Fig. 5 c, electrode 70 just has been set on the light-emitting zone.
Those of ordinary skill in the art will be appreciated that, above embodiment is used for illustrating the present invention, and be not to be used as limitation of the invention, as long as in connotation scope of the present invention, all will drop in the scope of claims of the present invention variation, the modification of the above embodiment.
Claims (5)
1, a kind of manufacture method of plasma panel is characterized in that comprising following composition step:
Manufacturing is provided with the step of the motherboard of a plurality of array regions;
On the motherboard of above-mentioned each array region with scribe line after the spaced apart and coating upper film, thereby on film, carry out the step that etching forms film pattern;
With above-mentioned a plurality of array regions is unit, above-mentioned motherboard is carried out the step of scribing along above-mentioned scribe line.
2, the manufacture method of plasma panel as claimed in claim 1 is characterized in that:
The spacing distance that above-mentioned centre is provided with between the film pattern of mutual correspondence of above-mentioned scribe line at least will be at 5mm.
3, the manufacture method of plasma panel as claimed in claim 2 is characterized in that:
Above-mentioned spacing distance is 5-10mm.
4, the manufacture method of plasma panel as claimed in claim 1 is characterized in that:
The step that forms above-mentioned film pattern comprises following two steps again:
With above-mentioned scribe line interval one distance, on the motherboard of above-mentioned each array region, carry out the step of conductive material plated film;
With the above-mentioned conductive material of laser beam etching and form the step of conductive pattern.
5, the manufacture method of plasma panel as claimed in claim 4 is characterized in that:
The step that forms above-mentioned film pattern also comprises following two steps:
On the motherboard of above-mentioned each array region,, carry out the step of transparent conductivity material plated film with above-mentioned scribe line interval one distance;
With the above-mentioned transparent conductivity material of laser beam etching and form the step that each keeps the transparency electrode of electrode pair.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200610023507 CN101004991A (en) | 2006-01-20 | 2006-01-20 | Method for producing plasma display screen |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200610023507 CN101004991A (en) | 2006-01-20 | 2006-01-20 | Method for producing plasma display screen |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN101004991A true CN101004991A (en) | 2007-07-25 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 200610023507 Pending CN101004991A (en) | 2006-01-20 | 2006-01-20 | Method for producing plasma display screen |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109696779A (en) * | 2018-12-27 | 2019-04-30 | 张家港康得新光电材料有限公司 | Optics module mother matrix, optics module and preparation method |
-
2006
- 2006-01-20 CN CN 200610023507 patent/CN101004991A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109696779A (en) * | 2018-12-27 | 2019-04-30 | 张家港康得新光电材料有限公司 | Optics module mother matrix, optics module and preparation method |
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