KR100730069B1 - Method Of Fabricating Plasma Display Panel - Google Patents

Abstract

The present invention relates to a method of manufacturing a plasma display panel that can improve productivity.

A method of manufacturing a plasma display panel according to the present invention includes the steps of: providing a mother substrate for providing a plurality of array regions; Forming a thin film pattern by coating a thin film on the mother substrate in the array area at a predetermined distance from the scribing line and then patterning the thin film; And scribing the mother substrate along the scribing line for each of the plurality of array regions.

Description

Manufacturing Method of Plasma Display Panel {Method Of Fabricating Plasma Display Panel}             

1A to 1C are cross-sectional views illustrating an electrode manufacturing method of a conventional plasma display panel.

2A to 2C are cross-sectional views illustrating another embodiment of an electrode manufacturing method of a conventional plasma display panel.

3 is a cross-sectional view showing a plasma display panel according to the present invention.

4 is a flowchart illustrating a method of manufacturing the plasma display panel shown in FIG. 3.

5A to 5C are cross-sectional views illustrating an electrode manufacturing method of the plasma display panel according to the present invention.

FIG. 6A is a perspective view illustrating the screen mask illustrated in FIG. 5A, and FIG. 6B is a perspective view illustrating the upper mother substrate illustrated in FIG. 5A.

<Description of Symbols for Main Parts of Drawings>

1,42 substrate 48,52 dielectric layer

50: shield 54: bulkhead

56 phosphor layer X: address electrode

Y: scan electrode Z: sustain electrode

The present invention relates to a method of manufacturing a plasma display panel, and more particularly, to a method of manufacturing a plasma display panel that can improve productivity.

Plasma Display Panel (hereinafter referred to as "PDP") is a display device using visible light generated from a phosphor when ultraviolet light generated by gas discharge excites the phosphor. PDP is thinner and lighter than Cathode Ray Tube (CRT), which has been the mainstay of display means, and has the advantage of being able to realize high definition large screen. PDP is composed of a plurality of discharge cells arranged in a matrix form, one discharge cell constitutes a pixel of the screen.

A discharge cell of a conventional three-electrode AC surface discharge type PDP has a lower plate including a scan electrode and a sustain electrode of a sustain electrode pair formed on an upper substrate, and a lower electrode including a data electrode formed to intersect the sustain electrode pair on a lower substrate. And a partition wall that provides a discharge space between the upper plate and the lower plate.

The PDP of this structure is selected by the counter discharge between the data electrode and the sustain electrode, and then maintains the discharge by the surface discharge between the pair of sustain electrodes. As the phosphor emits light by ultraviolet rays generated during the sustain discharge, visible light is emitted outside the cell. As a result, the discharge cells adjust the period during which the discharge is maintained to implement gray scale, and the PDP in which the discharge cells are arranged in a matrix form displays an image.

Each of the scan electrode and the sustain electrode of the sustain electrode pair of the PDP includes a transparent electrode and a bus electrode formed at one edge of the transparent electrode and having a line width smaller than that of the transparent electrode. The transparent electrode is usually formed on the upper substrate with indium tin oxide (ITO). The bus electrode is formed of a highly conductive metal on the transparent electrode to reduce the voltage drop caused by the transparent electrode having high resistance.

1A to 1C are cross-sectional views illustrating a method of manufacturing a transparent electrode included in each of a conventional scan electrode and a sustain electrode.

First, the transparent conductive material 2 is deposited on the upper substrate 1 as shown in FIG. 1A through a deposition method such as sputtering. On the upper substrate 1 on which the transparent conductive material 2 is formed, a photoresist pattern 4 is formed as shown in FIG. 1B by a photolithography process using a mask. As the transparent conductive material 2 is etched by the etching process using the photoresist pattern 4, the transparent electrode 6 is formed as shown in FIG. 1C.

As described above, the conventional transparent electrode 6 patterns the photoresist pattern 4 formed by the photolithography process with a mask. The photolithography process includes many processes such as an exposure process, a developing process, and a stripping process, which makes the manufacturing process complicated. Accordingly, in recent years, a laser patterning method has been proposed in order to reduce manufacturing costs by simplifying a manufacturing process when forming a transparent electrode.

2A and 2B are cross-sectional views illustrating a method of manufacturing a transparent electrode formed by a laser patterning method.

As illustrated in FIG. 2A, the transparent conductive material 2 is deposited on the upper substrate 1 through a deposition method such as sputtering. This transparent conductive material 2 is patterned by a laser beam generated by the laser irradiation section 8 as shown in Fig. 2B. Accordingly, as shown in FIG. 2C, the transparent electrode 6 is formed on the upper substrate 1.

In this case, the laser irradiator 8 forms a transparent electrode by patterning the transparent conductive material 2 positioned in the emission region using a laser beam, while completely removing the transparent conductive material 2 positioned in the non-light emitting region. Done. Accordingly, since it takes a long time to completely remove the transparent conductive material 2 located in the non-light emitting area, there is a problem that productivity is lowered.

Accordingly, an object of the present invention relates to a method of manufacturing a plasma display panel that can improve productivity.

In order to achieve the above object, a method of manufacturing a plasma display panel according to the present invention comprises the steps of providing a mother substrate for providing a plurality of array regions; Forming a thin film pattern by coating a thin film on the mother substrate in the array area at a predetermined distance from the scribing line and then patterning the thin film; And scribing the mother substrate along the scribing line for each of the plurality of array regions.

The separation distance between the thin film patterns facing each other with the scribing line may be at least 5 mm or more.

The separation distance is characterized in that 5 ~ 10mm.

The forming of the thin film pattern may include depositing a conductive material spaced apart from the scribing line by a predetermined distance on the mother substrate of each array region; And patterning the conductive material with a laser beam to form a conductive pattern.

The forming of the thin film pattern may include depositing a transparent conductive material spaced apart from the scribing line by a predetermined distance on the mother substrate of each array region; And patterning the transparent conductive material with a laser beam to form a transparent electrode of each of the sustain electrode pairs.

Other objects and features of the present invention in addition to the above objects will become apparent from the description of the embodiments with reference to the accompanying drawings.

Hereinafter, exemplary embodiments of the present invention will be described with reference to FIGS. 3 to 6B.

3 is a cross-sectional view showing a plasma display panel according to the present invention.

Referring to FIG. 3, a discharge cell of a PDP according to the present invention includes a scan electrode Y and a sustain electrode Z formed on an upper substrate 40, and an address electrode X formed on a lower substrate 42. ).

Each of the scan electrodes Y and the sustain electrodes Z has a line width smaller than that of the transparent electrodes 44Y and 44Z and the transparent electrodes 44Y and 44Z, and is formed at one edge of the transparent electrodes 44Y and 44Z. Electrodes 46Y and 46Z. The transparent electrodes 44Y and 44Z are usually formed on the upper substrate 40 by indium tin oxide (ITO). The bus electrodes 46Y and 46Z are formed of a high conductivity metal on the transparent electrodes 44Y and 44Z, thereby reducing the voltage drop caused by the transparent electrodes 44Y and 44Z having high resistance.

The upper dielectric layer 48 and the passivation layer 50 are stacked on the upper substrate 40 having the scan electrode Y and the sustain electrode Z side by side. Wall charges generated during plasma discharge are accumulated in the upper dielectric layer 48. The passivation layer 50 prevents damage to the upper dielectric layer 48 due to sputtering generated during plasma discharge and increases emission efficiency of secondary electrons. As the protective film 50, magnesium oxide (MgO) is usually used.

The lower dielectric layer 52 and the partition wall 54 are formed on the lower substrate 42 on which the data electrode X is formed, and the phosphor 56 is coated on the surfaces of the lower dielectric layer 52 and the partition wall 54. The data electrode X is formed in a direction crossing the scan electrode Y and the sustain electrode Z. The partition wall 54 is formed in parallel with the data electrode X to prevent ultraviolet rays and visible light generated by the discharge from leaking to the adjacent discharge cells. The phosphor 56 is excited by ultraviolet rays generated during plasma discharge to generate visible light of any one of red, green, and blue. Inert gas for gas discharge is injected into the discharge space provided between the upper and lower substrates 40 and 42 and the partition wall 54.

4 is a cross-sectional view illustrating a method of manufacturing the plasma display panel illustrated in FIG. 3.

An upper mother substrate having a plurality of upper array regions is provided to provide a top plate having the same size or at least one size. (Step S11) A transparent electrode is formed on each upper array region of the upper mother substrate. A bus electrode is formed on the transparent electrode to reduce the resistance of the transparent electrode (step S13). Thus, a sustain electrode pair consisting of the transparent electrode and the bus electrode is formed. A dielectric layer and a passivation layer are sequentially formed on the upper mother substrate on which the sustain electrode pairs are formed (steps S14 and S15). A plurality of top plates are completed by scribing the upper mother substrate on which the protection layer is formed along the scribing line. step)

Meanwhile, a lower mother substrate having a plurality of lower array regions is provided to provide lower substrates having the same size or at least one size (step S17). A data electrode is formed on each lower array region of the lower mother substrate. (Step S18) A dielectric layer in which wall charges are accumulated is formed on the data electrode. (Step S19) A partition wall is formed on the dielectric layer to separate a plurality of discharge cells. (Step S20) R is formed on the partition wall and the dielectric layer. Corresponding phosphors are formed for each of the G and B discharge cells. (Step S21) A plurality of lower plates are completed by scribing the lower mother substrate on which the phosphor is formed along the scribing line.

The lower panel and the upper panel are bonded together using a bonding agent to complete the plasma display panel.

Meanwhile, at least one of the transparent electrode, the bus electrode, and the data electrode is formed by the manufacturing method shown in FIGS. 5A to 5C. Here, the transparent electrode will be described as an example.

As shown in FIG. 5A, the screen mask 68 is aligned on the mother substrate 60. 5A and 6A, the screen mask 68 includes a blocking region S1 for blocking the passage of a conductive material, for example, a transparent conductive material such as ITO, and a pattern region S2 for passing the conductive material. ). In this case, the pattern region S2 is an array region of each upper plate or lower plate, and the blocking region S1 corresponds to the scribing line SCL between adjacent upper plates or adjacent lower plates. The blocking region S1 corresponding to the scribing line SCL is formed to have a predetermined width d of at least 5 mm or more, for example, 5 mm to 10 mm.

The conductive material 62 passing through the pattern region S2 of the screen mask 68 is selectively deposited on the remaining region except the boundary region, that is, the array region of the mother substrate 60, as shown in FIG. 6B. . At this time, the conductive materials 62 facing each other with the scribing line SCL therebetween have a separation distance d of at least 5 mm, for example, 5 mm to 10 mm.

This conductive material 62 is patterned as shown in FIG. 5B by the laser generated by the laser irradiation section 72. At this time, since the conductive material 62 is selectively deposited only in the array region, the time taken for patterning the conductive material deposited in the boundary region can be reduced, thereby improving productivity. The electrode 70 is formed on the light emitting region as shown in FIG. 5C by a patterning process using a laser.

As described above, according to the method of manufacturing the plasma display panel according to the present invention, a thin film is formed on the mother substrate of the remaining region, ie, the array region except for the boundary region between the array regions using a screen mask. When the thin film is patterned with a laser, only the array area is selectively patterned, thereby reducing the patterning area and improving productivity.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

Claims (5)

Providing a mother substrate for providing a plurality of array regions; Forming a thin film pattern by applying a thin film spaced apart from a scribing line on the mother substrate in each array region and patterning the thin film; Scribing the mother substrate along the scribing line for each of the plurality of array regions; The thin film pattern is a method of manufacturing a plasma display panel, characterized in that any one of a transparent electrode, a bus electrode, a data electrode. delete The method of claim 1, And a separation distance between the thin film patterns facing each other with the scribing line therebetween is 5 to 10 mm. The method of claim 1, Forming the thin film pattern is Depositing a conductive material spaced apart from the scribing line on the mother substrate of each array region; And patterning the conductive material with a laser beam to form a conductive pattern. The method of claim 1, Forming the thin film pattern is Depositing a transparent conductive material spaced apart from the scribing line on the mother substrate in each array region; And patterning the transparent conductive material with a laser beam to form a transparent electrode of each of the sustain electrode pairs.

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