CN100591482C - Method for determining abrasive time in chemical mechanical polishing process - Google Patents
Method for determining abrasive time in chemical mechanical polishing process Download PDFInfo
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- CN100591482C CN100591482C CN200710047057A CN200710047057A CN100591482C CN 100591482 C CN100591482 C CN 100591482C CN 200710047057 A CN200710047057 A CN 200710047057A CN 200710047057 A CN200710047057 A CN 200710047057A CN 100591482 C CN100591482 C CN 100591482C
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Abstract
The invention provides a method for determining grinding time in a chemical-mechanical polishing process. In the method, the grinding time is fed back to a device for chemical-mechanical polishing through an automatic processing system; the automatic processing system determines the grinding time of next batch of silicon chips through grinding parameters of a plurality of batches of the latest silicon chips of the polishing device; the grinding parameters comprise respective grinding time of the latest m batches of the silicon chips, grinding rate Rt of latest detection, and average grinding rate Rm of the latest m batches of the silicon chips; and the grinding time is corrected through a specific value of Rt to Rm. The method for determining the grinding time in the chemical-mechanical polishing process considers change and difference of the grinding rate of a CMP stand every day, and corrects the grinding time by using a correction coefficient Rt/Rm, so the time determined by the method is more precise.
Description
Technical field
The invention belongs to the chip manufacturing field, relate to CMP process, relate in particular to the method for determining milling time in a kind of CMP process.
Background technology
The silicon chip manufacturing relates to the deposit and the growth technique of film, and forms device and the required repeatedly graphic making of intraconnection structure afterwards.Advanced IC needs at least 6 layers or more metal wiring layer, is separated by inter-level dielectric (inter-layer-dielectric is called for short ILD) between every layer.Set up device architecture and multiple layer inner connection wiring meeting forms step very naturally between layer.The irregular silicon chip surface that occurs in this production process has been described in surface undulation.When the number of plies increases, the surface undulation of silicon chip will more remarkable, and acceptable step covers and the gap filling is vital for the yield rate and the long-term reliability of chip.
Since the mid-90 in 20th century, chemical-mechanical planarization (Chemical MechanicalPlanarization is called for short CMP) becomes the main planarization that realizes the multiple layer metal technology.CMP is also referred to as chemically mechanical polishing or polishing usually, and its silicon wafer polishing field in optical mirror slip polishing and silicon chip production has been used a lot of years.In the later stage eighties 20th century, IBM has developed the CMP technology, and is applied in the manufacturing process planarization to semi-conductor silicon chip.
The CMP technology is a kind of surface global planarization, and it comes the planarization silicon chip surface by the relative motion between silicon chip and the rubbing head, between silicon chip and rubbing head abrasive material is arranged, and exerts pressure simultaneously.
Yet, exist weak point in the existing CMP process.In the existing CMP process, polissoir feeds back to the polissoir milling time at the milling time of every batch of silicon chip by automated processing system (APC system) and finishes this process of lapping.The time that the abrasive parameters of APC system by the last consignment of product decides the next group product to obtain; Usually, a collection of silicon chip is 25.Described APC system by above-mentioned polissoir recently the abrasive parameters of some batches of silicon chips determine the milling time of next group silicon chip; Described abrasive parameters comprise nearest m criticize separately milling time T (n), T (n-1) of silicon chip, T (n-2) ..., T (n-m+1), wherein T (n) be the n milling time of criticizing silicon chip, be nearest a collection of silicon chip milling time, be the milling time of last batch of silicon chip, T (n-m+1) criticizes the milling time of silicon chip for m reciprocal.
Computing formula is: the milling time T of next part silicon chip (n+1)=T (n) * i+T (n-1) * i* (1-i)+T (n-2) * i* (1-i)
2+ ... + T (n-m+1) * i* (1-i)
M-1, i＜1 wherein, m 〉=2, n＞m, m and n are integer.
This computational methods have been ignored the variation and the difference of CMP board grinding rate every day, if the grinding rate of board is big than usual, what then corresponding milling time just should be suitable reduces; Especially when same series products did not grind in a lot of days, this feedback is inaccuracy more.
Summary of the invention
The purpose of this invention is to provide a kind of method that can more accurately determine to determine in the CMP process milling time.
To achieve these goals, the invention provides the method for determining milling time in a kind of CMP process, milling time described in this method is fed back to the equipment that is used for chemically mechanical polishing by automated processing system; Described automated processing system is determined the milling time of next group silicon chip by the abrasive parameters of the nearest some batches of silicon chips of above-mentioned polissoir; This method may further comprise the steps:
A, obtain nearest m criticize separately milling time T (n), T (n-1) of silicon chip, T (n-2) ..., T (n-m+1), wherein T (n), T (n-1), T (n-2) ..., T (n-m+1) criticizes silicon chip milling time separately for nearest m, wherein T (n) be the n milling time of criticizing silicon chip, be nearest a collection of silicon chip milling time, be the milling time of last batch of silicon chip, T (n-m+1) criticizes the milling time of silicon chip for m reciprocal;
B, according to described in the steps A recently m criticize separately milling time T (n), T (n-1) of silicon chip, T (n-2) ..., T (n-m+1) determines the fuzzy milling time T1 of next group silicon chip;
C, obtain the last detected grinding rate Rt, recently m criticizes the average grinding rate Rm of silicon chip, calculates correction factor K, correction factor K is in the scope of [Rt/Rm-0.3, Rt/Rm+0.3];
D, determine milling time T (the n+1)=T1/K of next group silicon chip;
Wherein, n＞m, m and n are integer.
As a preferred embodiment of the present invention, described fuzzy milling time T1=T (n) * i+T (n-1) * i* (1-i)+T (n-2) * i* (1-i)
2+ ... + T (n-m+1) * i* (1-i)
M-1, wherein, 0.5≤i＜1, m 〉=3.
As a preferred embodiment of the present invention, among the step C, Rt/Rm-0.2≤K≤Rt/Rm+0.2.
As a preferred embodiment of the present invention, among the step C, Rt/Rm-0.1≤K≤Rt/Rm+0.1.
As a preferred embodiment of the present invention, among the step C, K=Rt/Rm.
As a preferred embodiment of the present invention, in described relational expression, 0.6≤i≤0.9.
As a preferred embodiment of the present invention, in described relational expression, i=0.8.
As a preferred embodiment of the present invention, in described relational expression, 5≤m≤100.
As a preferred embodiment of the present invention, in described relational expression, 15≤m≤30.As a preferred embodiment of the present invention, in described relational expression, m=20.
In another embodiment of the invention: determine the method for milling time in a kind of CMP process, milling time described in this method is fed back to the equipment that is used for chemically mechanical polishing by automated processing system; Described automated processing system is determined the milling time of next group silicon chip by the abrasive parameters of the nearest some batches of silicon chips of above-mentioned polissoir; Described abrasive parameters comprise nearest m criticize separately milling time T (n), T (n-1) of silicon chip, T (n-2) ..., T (n-m+1), wherein T (n) be the n milling time of criticizing silicon chip, be nearest a collection of silicon chip milling time, be the milling time of last batch of silicon chip, T (n-m+1) criticizes the milling time of silicon chip for m reciprocal; Described abrasive parameters also comprises the last detected grinding rate Rt, m criticizes the average grinding rate Rm of silicon chip recently; The milling time T of described next part silicon chip (n+1)=[T (n) * i+T (n-1) * i* (1-i)+T (n-2) * i* (1-i)
2+ ... + T (n-m+1) * i* (1-i)
M-1]/(Rt/Rm), 0.5≤i＜1 wherein, m 〉=3, n＞m, m and n are integer.
Compared with prior art, the method of in CMP process, determining milling time that the present invention discloses, the variation and the difference of CMP board grinding rate every day have been considered, use correction factor Rt/Rm, be that the last detected grinding rate Rt comes the align hone time with the ratio that nearest m criticizes the average grinding rate Rm of silicon chip, the time that this method is determined will be more accurate.
Description of drawings
Fig. 1 is the flow chart that the present invention determines the milling time method.
The specific embodiment
Below in conjunction with drawings and Examples the present invention is done concrete introduction.
The present invention has introduced the method for determining milling time in a kind of CMP process, and milling time described in this method is fed back to the equipment that is used for chemically mechanical polishing by automated processing system; Described automated processing system is determined the milling time of next group silicon chip by the abrasive parameters of the nearest some batches of silicon chips of above-mentioned polissoir.Above-mentioned abrasive parameters comprise nearest m criticize separately milling time T (n), T (n-1) of silicon chip, T (n-2) ..., T (n-m+1), wherein T (n), T (n-1), T (n-2) ..., T (n-m+1) criticizes silicon chip milling time separately for nearest m, wherein T (n) be the n milling time of criticizing silicon chip, be nearest a collection of silicon chip milling time, be the milling time of last batch of silicon chip, T (n-m+1) criticizes the milling time of silicon chip for m reciprocal; Owing to consider the variation and the difference of CMP board grinding rate every day, described abrasive parameters also comprises the last detected grinding rate Rt, m criticizes the average grinding rate Rm of silicon chip recently.
See also Fig. 1, the present invention determines that the method for milling time may further comprise the steps:
A, obtain nearest m criticize separately milling time T (n), T (n-1) of silicon chip, T (n-2) ..., T (n-m+1), wherein T (n), T (n-1), T (n-2) ..., T (n-m+1) criticizes silicon chip milling time separately for nearest m, wherein T (n) be the n milling time of criticizing silicon chip, be nearest a collection of silicon chip milling time, be the milling time of last batch of silicon chip, T (n-m+1) criticizes the milling time of silicon chip for m reciprocal;
B, according to described in the steps A recently m criticize separately milling time T (n), T (n-1) of silicon chip, T (n-2) ..., T (n-m+1) determines the fuzzy milling time T1 of next group silicon chip; T1=T (n) * i+T (n-1) * i* (1-i)+T (n-2) * i* (1-i)
2+ ... + T (n-m+1) * i* (1-i)
M-1, wherein, 0.5≤i＜1, m 〉=3, n＞m, m and n are integer;
C, obtain the last detected grinding rate Rt, recently m criticizes the average grinding rate Rm of silicon chip, calculates correction factor K, correction factor K gets a value in [Rt/Rm-0.3, Rt/Rm+0.3], optimum is got Rt/Rm;
D, determine milling time T (the n+1)=T1/K of next group silicon chip, i.e. T (n+1)=[T (n) * i+T (n-1) * i* (1-i)+T (n-2) * i* (1-i)
2+ ... + T (n-m+1) * i* (1-i)
M-1]/(Rt/Rm).
When the value of K greater than 1 the time, milling time (=T1/K) turn down than common milling time T1, guarantee that the time that the present invention determines is more accurate; On the contrary, when the value of K less than 1 the time, (=milling time T1 that T1/K) will be more common transfers big milling time.
In addition, for making definite time accurate, correction factor K is at [Rt/Rm-0.2, Rt/Rm+0.2] even in [Rt/Rm-0.1, Rt/Rm+0.1] middle value; 0.6≤i≤0.9, optimum gets 0.8; M is in [5,100] value, and preferred span is [15,30], and optimal value is 20.
Embodiment one
In the present embodiment, the parameter value in the above-mentioned relation formula is: m=20, i=0.8, K=Rt/Rm.
Determine the method for milling time in a kind of CMP process, milling time described in this method is given the equipment that is used for chemically mechanical polishing by the APC system feedback; Described APC system by above-mentioned polissoir recently the abrasive parameters of some batches of silicon chips determine the milling time of next group silicon chip.Above-mentioned abrasive parameters comprise separately milling time T (n), T (n-1) of nearest 20 batches of silicon chips, T (n-2) ..., T (n-19), wherein T (n) be the n milling time of criticizing silicon chip, be nearest a collection of silicon chip milling time, be the milling time of last batch of silicon chip, T (n-19) is the milling time of the 20th batch of silicon chip reciprocal; Because consider the variation and the difference of CMP board grinding rate every day, described abrasive parameters also comprises the average grinding rate R of the last detected grinding rate Rt, nearest 20 batches of silicon chips
20
The present invention determines that the method for milling time may further comprise the steps:
Steps A, obtain separately milling time T (n), T (n-1) of nearest 20 batches of silicon chips, T (n-2) ..., T (n-19), wherein T (n), T (n-1), T (n-2) ..., T (n-19) is preceding 20 batches of silicon chips milling times separately, wherein T (n) is that n criticizes the milling time of silicon chip, the i.e. milling time of a collection of recently (last batch) silicon chip, and T (n-19) is the milling time of the 20th batch of silicon chip reciprocal;
Step B, according to separately milling time T (n), T (n-1) of nearest 20 batches of silicon chips described in the steps A, T (n-2) ..., T (n-19) determines the fuzzy milling time T1 of next group silicon chip; T1=T (n) * 0.8+T (n-1) * 0.8* (1-0.8)+T (n-2) * 0.8* (1-0.8)
2+ ... + T (n-19) * 0.8* (1-0.8)
19, wherein, n is an integer, n＞19;
Step C, obtain the average grinding rate R of the last detected grinding rate Rt, nearest 20 batches of silicon chips
20, calculate correction factor K, correction factor K=Rt/R
20
Step D, determine milling time T (the n+1)=T1/K of next group silicon chip, i.e. T (n+1)=[T (n) * 0.8+T (n-1) * 0.8* (1-0.8)+T (n-2) * 0.8* (1-0.8)
2+ ... + T (n-19) * 0.8* (1-0.8)
19]/(Rt/R
20).
Certainly, above-mentioned parameter only is the parameter in the one embodiment of the invention, and the scope that the present invention protected is not restricted to the scope of above-mentioned parameter.As, correction factor K can be at [Rt/R
20-0.3, Rt/R
20+ 0.3] in the scope, as K=Rt/R
20-0.2 or K=Rt/R
20-0.1 or K=Rt/R
20+ 0.1 or K=Rt/R
20+ 0.2; M can be for greater than other values of 3, as m=5 or m=15 or m=30 or m=50 or m=100 or m=120; I can select [0.5,1) other values, as i=0.5 or i=0.5 or i=0.6 or i=0.7 or i=0.75 or i=0.85 or i=0.9.
Embodiment two
The difference of present embodiment and embodiment one is that in the present embodiment, the parameter value in the above-mentioned relation formula is: m=30, i=0.75, K=Rt/R
30Thereby, the milling time T of next group silicon chip (n+1)=[T (n) * 0.75+T (n-1) * 0.75* (1-0.75)+T (n-2) * 0.75* (1-0.75)
2+ ... + T (n-29) * 0.75* (1-0.75)
29]/(Rt/R
30).
Above embodiment is the unrestricted technical scheme of the present invention in order to explanation only.As, determine that the fuzzy milling time T1 of next group silicon chip can adopt other modes.Any modification or partial replacement that does not break away from spirit and scope of the invention all should be encompassed in the middle of the claim scope of the present invention.
Claims (11)
1, determine the method for milling time in a kind of CMP process, milling time described in this method is fed back to the equipment that is used for chemically mechanical polishing by automated processing system; Described automated processing system is determined the milling time of next group silicon chip by the abrasive parameters of the nearest some batches of silicon chips of above-mentioned polissoir; It is characterized in that this method may further comprise the steps:
A, obtain nearest m criticize separately milling time T (n), T (n-1) of silicon chip, T (n-2) ..., T (n-m+1), wherein T (n), T (n-1), T (n-2) ..., T (n-m+1) criticizes silicon chip milling time separately for nearest m, wherein T (n) be the n milling time of criticizing silicon chip, be nearest a collection of silicon chip milling time, be the milling time of last batch of silicon chip, T (n-m+1) criticizes the milling time of silicon chip for m reciprocal;
B, according to described in the steps A recently m criticize separately milling time T (n), T (n-1) of silicon chip, T (n-2) ..., T (n-m+1) determines the fuzzy milling time T1 of next group silicon chip;
C, obtain the last detected grinding rate Rt, recently m criticizes the average grinding rate Rm of silicon chip, calculates correction factor K, correction factor K is in the scope of [Rt/Rm-0.3, Rt/Rm+0.3];
D, determine milling time T (the n+1)=T1/K of next group silicon chip;
Wherein, n＞m, m and n are integer.
2, determine the method for milling time according to claim 1, it is characterized in that described fuzzy milling time T1=T (n)
*I+T (n-1)
*i
*(1-i)+T (n-2)
*i
*(1-i)
2+ ...+T (n-m+1)
*i
*(1-i) m
-1, wherein, 0.5≤i＜1, m 〉=3.
3, determine the method for milling time according to claim 1, it is characterized in that, among the step C, Rt/Rm-0.2≤K≤Rt/Rm+0.2.
4, as the method for definite milling time as described in the claim 3, it is characterized in that, among the step C, Rt/Rm-0.1≤K≤Rt/Rm+0.1.
5, as the method for definite milling time as described in the claim 4, it is characterized in that, among the step C, K=Rt/Rm.
6, as the method for definite milling time as described in the claim 2, it is characterized in that, in described relational expression, 0.6≤i≤0.9.
7, as the method for definite milling time as described in the claim 6, it is characterized in that, in described relational expression, i=0.8.
8, as the method for definite milling time as described in claim 1 or 2 or 3 or 4 or 5, it is characterized in that, in described relational expression, 5≤m≤100.
9, as the method for definite milling time as described in the claim 8, it is characterized in that, in described relational expression, 15≤m≤30.
10, as the method for definite milling time as described in the claim 9, it is characterized in that, in described relational expression, m=20.
11, determine the method for milling time in a kind of CMP process, milling time described in this method is fed back to the equipment that is used for chemically mechanical polishing by automated processing system;
Described automated processing system is determined the milling time of next group silicon chip by the abrasive parameters of the nearest some batches of silicon chips of above-mentioned polissoir;
Described abrasive parameters comprise nearest m criticize separately milling time T (n), T (n-1) of silicon chip, T (n-2) ..., T (n-m+1), wherein T (n) be the n milling time of criticizing silicon chip, be nearest a collection of silicon chip milling time, be the milling time of last batch of silicon chip, T (n-m+1) criticizes the milling time of silicon chip for m reciprocal;
It is characterized in that:
Described abrasive parameters also comprises the last detected grinding rate Rt, m criticizes the average grinding rate Rm of silicon chip recently;
The milling time T of described next part silicon chip (n+1)=[T (n)
*I+T (n-1)
*i
*(1-i)+T (n-2)
*i
*(1-i)
2+ ...+T (n-m+1)
*i
*(1-i)
M-1]/(Rt/Rm), 0.5≤i＜1 wherein, m 〉=3, n＞m, m and n are integer.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN200710047057A CN100591482C (en) | 2007-10-16 | 2007-10-16 | Method for determining abrasive time in chemical mechanical polishing process |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN200710047057A CN100591482C (en) | 2007-10-16 | 2007-10-16 | Method for determining abrasive time in chemical mechanical polishing process |
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| CN100591482C true CN100591482C (en) | 2010-02-24 |
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Families Citing this family (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102029572B (en) * | 2009-09-25 | 2012-05-30 | 中芯国际集成电路制造(上海)有限公司 | Control method of CMP (chemical mechanical polishing) time |
| CN102039558B (en) * | 2009-10-23 | 2014-01-08 | 无锡华润上华科技有限公司 | Method for controlling grinding process |
| CN102054738B (en) * | 2009-10-30 | 2012-08-29 | 无锡华润上华半导体有限公司 | Control method for shallow groove isolation step height |
| TWI492288B (en) * | 2010-02-11 | 2015-07-11 | 聯華電子股份有限公司 | Method for controling polishing wafer |
| CN102189469B (en) * | 2010-03-11 | 2013-04-10 | 中芯国际集成电路制造(上海)有限公司 | Method for dynamically adjusting time limit of chemically-mechanical polishing |
| CN102380815A (en) * | 2010-09-01 | 2012-03-21 | 无锡华润上华半导体有限公司 | Chemical mechanical grinding method and chemical mechanical grinding system |
| CN111229679B (en) * | 2020-01-21 | 2021-09-17 | 北京北方华创微电子装备有限公司 | Control method and control device of wafer cleaning equipment and wafer cleaning equipment |
| CN111599665A (en) * | 2020-04-28 | 2020-08-28 | 杭州中欣晶圆半导体股份有限公司 | Method for adjusting silicon wafer grinding time in chemical mechanical polishing process |
| CN115609469B (en) * | 2022-11-30 | 2023-04-28 | 合肥晶合集成电路股份有限公司 | Grinding time correction method, system and isolation structure manufacturing method |
| CN116442112B (en) * | 2023-06-16 | 2023-10-03 | 合肥晶合集成电路股份有限公司 | Wafer grinding control method, system, device, equipment and storage medium |
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