CN100587972C - Photovoltaic cell - Google Patents

Photovoltaic cell Download PDF

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Publication number
CN100587972C
CN100587972C CN 200710300371 CN200710300371A CN100587972C CN 100587972 C CN100587972 C CN 100587972C CN 200710300371 CN200710300371 CN 200710300371 CN 200710300371 A CN200710300371 A CN 200710300371A CN 100587972 C CN100587972 C CN 100587972C
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porous
electrode
semiconductor layer
layer
photocell
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CN101241940A (en
Inventor
M·杜尔
G·内尔斯
A·亚素达
Y·苏朱基
K·诺达
M·莫鲁卡
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Sony Deutschland GmbH
Sony Corp
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Sony International Europe GmbH
Sony Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G9/00—Electrolytic capacitors, rectifiers, detectors, switching devices, light-sensitive or temperature-sensitive devices; Processes of their manufacture
    • H01G9/20—Light-sensitive devices
    • H01G9/2027—Light-sensitive devices comprising an oxide semiconductor electrode
    • H01G9/2031—Light-sensitive devices comprising an oxide semiconductor electrode comprising titanium oxide, e.g. TiO2
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G9/00—Electrolytic capacitors, rectifiers, detectors, switching devices, light-sensitive or temperature-sensitive devices; Processes of their manufacture
    • H01G9/20—Light-sensitive devices
    • H01G9/2059—Light-sensitive devices comprising an organic dye as the active light absorbing material, e.g. adsorbed on an electrode or dissolved in solution
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/542—Dye sensitized solar cells

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  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Hybrid Cells (AREA)

Abstract

The invention provides a photoelectric cell, the fabricating method and the usage. Specifically, the invention relates to the photoelectric cell, comprising: a first matrix and a first electrode on the first matrix, which optimally chosen is in a layer form to cover the first matrix and more optimally chosen is in a transparent electric conduction oxide layer form, or a first metallic foil takes the first matrix and the first electrode, a porous semiconductor layer, which is a photosensitive layer on the first electrode, a porous gap layer on the porous semiconductor layer, which takes the second electrode of a counter-electrode which is on the porous gap layer and is physically contacted with the porous gap layer, wherein, the second electrode optimally chosen is in a layer form to coverthe porous gap layer, a second matrix on the second electrode, wherein, the porous semiconductor layer has a first clearance space formed by holes of the porous semiconductor layer, and the porous gaplayer has a second clearance space formed by holes of the porous gap layer, wherein, the first and the second clearance spaces are in fluid contact and are filled with an electrolyte, and the porousgap layer locating on one side is physically contacted with the second electrode, moreover the porous gap layers locating on another side is physically contacted with in with the porous semiconductorlayer.

Description

Photocell
Technical field
The present invention relates to a kind of photocell, make the photronic method of this kind, and the purposes of this battery.
Background technology
Monocrystalline solar cells demonstrates the energy conversion efficiency up to about 25%.When silicone based crystal no longer is a monocrystalline, but during polycrystalline, its peak efficiency is about 18%, and when containing amorphous silicon, its efficient is about 12%.But,, manufacture also quite expensive even when being the amorphous silicon form based on the solar cell of silicon.Therefore, developed the substitute based on the mixture of organic compound and territory organic compound and inorganic compound, the solar cell of latter's pattern usually is called the mixed type solar battery by people.It is more cheap that organic and mixed type solar battery has been proved its manufacturing, even but compare with amorphous silicon battery, as if it only have lower efficient.Because its potential Inherent advantage cost for example in light weight, large-area preparation is low, belong to environment-friendly material or prepare on flexible substrate, verified organic device efficiently technically with commercial can be useful " plastic solar cell (plastic solar cell) ".Based on dye sensitized nano crystal body titanium dioxide (porous TiO 2) semiconductor and the liquid phase oxidation latest developments of reducing on the electrolytical solar cell show that organic material might have high-energy conversion efficiency (B.O-Regan and M.
Figure C20071030037100051
Nature 353 (1991,737)).
Since as photoelectric device efficiently (B.O ' Regan and M.
Figure C20071030037100052
On seeing; WO 91/16719) announce first since, based on making nanocrystal TiO by molecule dyeing 2(DSSC DSSC) has caused concern highly to the photoelectrochemical cell of sensitization.In the ongoing research, a part is the application feasibility of this battery of research on flexible parent metal, and the feasibility of making flexible solar battery thus.
DSSC is based on being attached to the netted semiconductor grain of nanoporous, for example TiO 2Dye molecule in the optical excitation of electronics.Electronics can be injected in the semi-conductive conduction band, and if charge recombination be suppressed, electronics can be collected in wherein on one of electrode so, and dye molecule is regenerated on counterelectrode by the charge-conduction medium.Active porous semiconductor layer with have only fragmentary research separating of counterelectrode up to now.The standard method that addresses this problem up to now is to use at interval paper tinsel, this at interval paper tinsel and be placed on the next door of active porous layer by for example plastics manufacturing, as Fig. 1 a) shown in.Yet, up to now, this does not bring gratifying result, because Gou Zao solar cell is highly pressure-sensitive by this way, and especially when being pressed on the counterelectrode, cause many short circuits, caused counterelectrode to be crushed on the active layer thus or vice versa.In addition, interval of the prior art paper tinsel shutoff otherwise also can be used for the area of charge transfer process, so this area just can not be used for active layer.Recently, people more and more pay close attention to flexible dye-sensitized solar battery.Up to the present, flexible dye-sensitized solar battery also disposes the interval paper tinsel that is arranged on active porous layer next door usually.Moreover this flexible dye-sensitized solar battery is to pressure and bending height sensitivity, because any in these two kinds of influences all may cause counterelectrode finally to electrically contact with first electrode, thereby causes short circuit once more.When solar cell expanded to certain area, this problem will be more serious.
Summary of the invention
Therefore, the purpose of this invention is to provide and a kind of one of electrode is wherein gone up the less sensitive modified model solar cell of applied pressure.In addition, the present invention also aims to provide a kind of electrode bending insensitive modified model solar cell to solar cell.And, the present invention also aims to provide a kind of solar cell, to compare with the conventional solar cell of constructing according to prior art, this battery does not show so much short circuit.
All these purposes solve by a kind of photocell, this photocell comprises first base material and first electrode on described first base material, preferred its form with layer covers described first base material, more preferably it is the including transparent conducting oxide layer form, perhaps first metal forming is as first base material and first electrode
-porous semiconductor layer, it is the photoactivate layer on described first electrode,
-porous wall on described porous semiconductor layer,
-as second electrode of counterelectrode, it is also physics contact with it on described porous wall, and described second electrode preferably covers described porous wall with the form of layer,
-second base material on described second electrode,
Wherein said porous semiconductor layer has first clearance space that the hole by described porous semiconductor layer forms, and described porous wall has second clearance space that the hole by the porous wall forms, wherein said first and second clearance spaces fluid each other connect and are filled electrolyte, and the described porous wall that wherein is positioned on the side contacts with the described second electrode physics, and the wherein said porous wall that is positioned on the opposite side contacts with described porous semiconductor layer physics.
In one embodiment, the described porous wall that is positioned on the whole area of a side contacts with the described second electrode physics, and the described porous wall that wherein is positioned on the whole area of opposite side contacts with described porous semiconductor layer physics.
In one embodiment, except second clearance space, there is not electrolytical void volume between described porous wall and described second electrode.
Preferably, described porous wall is by the optically transparent material manufacturing of semiconductor or electric insulation.
In one embodiment, described porous wall has the hole of hole dimension at 5nm～100 mu m ranges, and preferred hole dimension is 5nm～1 μ m, more preferably 5nm～500nm, most preferably 10nm～100nm.
In one embodiment, described porous wall is that to have average diameter be 10nm～100 μ m, the paper tinsel in the hole of preferred 10nm～1 μ m.
In another embodiment, described porous wall is by the particle manufacturing, and this particle is of a size of 1nm to＜1 μ m, preferred 1nm～500nm, more preferably 1nm～300nm, further preferred 1nm～200nm, most preferably 10nm～100nm.
In one embodiment, described particle is semiconductor grain or insulator particle, and wherein, preferred described semiconductor or insulator particle are by being selected from following material or combination of materials manufacturing: TiO 2, SnO 2, Sb 2O 5, CdTe, CdSe, CdS, ZnO, Nb 2O 5, ZrO 2, CeO 2, WO 3, SiO 2, Al 2O 3, CuAlO 2, SrTiO 3, SrCu 2O 2, SiO 2(preferred silica or bead), the for example crosslinked silicones of heat resistant polymer, crosslinked polystyrene, crosslinked acrylic resin, melamine formaldehyde resin, aromatic polyamide resin, polyimide resin, polyamide-imide resin, crosslinked polyethers, metal carbonate, for example magnesium carbonate, calcium carbonate, metal sulfate is calcium sulfate, barium sulfate for example.
In one embodiment, described porous semiconductor layer is through dye sensitization, and described porous wall is without dye sensitization.
Preferably, described porous wall covers described porous semiconductor layer on the whole area of described porous semiconductor layer, thereby with described porous semiconductor layer and the described second electrode electric insulation.
In one embodiment, described battery does not contain any interval body, for example be arranged between described first electrode and described second electrode, with described porous semiconductor layer and the described second electrode electric insulation and with the interval paper tinsel of the adjacent setting of described porous semiconductor layer.
Preferably, described battery comprises the described porous wall as unique interval body, so that described porous semiconductor layer and the described second electrode electric insulation.
In one embodiment, pore size distribution that described porous wall is had or monodispersity hole dimension in 5nm～100 mu m ranges, preferred 5nm～1 μ m, more preferably 5nm～500nm, most preferably 10nm～100nm.
In one embodiment, the particle size distribution that described particle had of described porous wall or monodispersity hole dimension in scope from 1nm to＜1 μ m, preferred 1nm～500nm, more preferably 1nm～300nm, further preferred 1nm～200nm, most preferably 10nm～100nm.
Preferably, described porous wall has the thickness of 100nm～100 μ m, the thickness of preferred 1 μ m～10 μ m.
In one embodiment, described porous wall covers a part of area of described porous semiconductor layer, do not cover the remainder area of described porous semiconductor layer, the area that wherein said porous semiconductor layer is capped is greater than 50% of the whole area of described porous semiconductor layer.
In one embodiment, in the described porous semiconductor layer ratio of gap size and hole dimension in 1～1000 scope, preferred 10～100.
Preferably, described porous wall is made by being selected from silk screen printing, blade coating, ink jet printing, drop coating (drop casting), rotary coating, spraying, static self assembly successively, stripping technology (lift-off process), mineralising and anodised method.
In one embodiment, first metal forming is used to replace described first base material and described first electrode, wherein said second electrode is translucent metal level, for example translucent platinum layer, and wherein said battery is included as described second base material of transparent base, and wherein between described second base material and described second electrode, randomly has transparent conductive oxide.
Also can solve purpose of the present invention by the method according to assembled battery of the present invention, the method comprising the steps of:
A)：
A) provide first base material and first electrode thereon, first metal forming perhaps be provided,
B) on the product of step a), promptly on described first electrode or described first metal forming, apply porous semiconductor layer, perhaps on the product of step a), promptly on described first electrode or described first metal forming, apply the semiconductor barrier layer, on described semiconductor barrier layer, apply porous semiconductor layer then
C) at＞300 ℃ temperature sintering step b) product,
D) the described porous semiconductor layer of dye sensitization in the product of step c), and fill it with electrolyte,
B): this step and steps A) separate and carry out:
A ') provide second base material and second electrode thereon, perhaps provide second metal forming, only in steps A) in when first metal forming is not provided, described second metal forming just is provided,
B ') at step a ') product on, promptly on described second electrode or second metal forming, apply porous semiconductor layer,
C ') product drying steps b '),
D ') porous semiconductor layer of product usefulness electrolyte filling step c '),
C): completing steps A) and the B) step implemented of back:
A ") by through sintering, dye sensitization and with electrolyte filling step d) porous semiconductor layer and drying, with electrolyte filling step d ') porous semiconductor layer, make A) with B) product contact, wherein these layers are that physics contacts each other.
By in photocell, using the porous wall to prevent between the semiconductor photoactive layer of described battery and counterelectrode, to be short-circuited, and/or solving purpose of the present invention with the semiconductor photoactive layer of described battery and counterelectrode are insulated from each other, porous wall described here is as defined above.
Term used herein " active layer " refers to the layer that participates in light absorption, separation of charge and charge transfer process in photocell.This term can exchange with " photosensitive " and use herein.In many cases, this photosensitive layer is exactly photosensitive porous layer, the photosensitive porous semiconductor layer of more specifically saying so.
In this article, if the face of electrode contacts with layer, electrode is called as and layer " physics contacts " so.Preferably, the meaning of this term is that electrode itself is a stratiform, for example is including transparent conducting oxide layer or metal level, and another layer (for example porous wall) of one of this laminar surface contact and position are thereon.In fact, this setting can be described as position two-layer lamination thereon each other.In some embodiments, electrode also can be a metal forming as first or second electrode.
Term used herein " clearance space (interstitial space) " is meant the space of setting up and forming by the hole in the porous layer.This clearance space is interconnected porous network basically.If do not have physical barriers in the middle of two clearance spaces, and be present in a fluid (for example gas or liquid) in the clearance space and can move into another clearance space, two clearance spaces being carried so here are called as each other " fluid connection ".In other words, two clearance spaces communicate with each other, and in clearance space chemical substance (for example solvent molecule or electrolyte) move the restriction only spread, and be not subjected to the restriction of any solid-state physics barrier.
Term used herein " electrolytical void volume " is meant by the occupied any cumulative volume of the electrolyte that is non-clearance space (bulk volume).
Term used herein " gap size " is meant that the surface of photosensitive porous layer to the distance (for example seeing accompanying drawing 1a) of counterelectrode and b)).Photosensitive porous layer or photosensitive porous semiconductor layer can be regarded as having formed the part of photoactive electrode.
In this article, when term " sintering " was used to describe the porous particle layer, it for example was meant following or plurality of processes is carried out that the semiconductor grain layer is heat-treated step: by the formation of sintering-bridged bond, wherein primary granule can be identical the formation of perforated web and the contact that further smoothly increases particle in hole.As general rule, in any sintering process according to the present invention, be applied to temperature＞300 ℃ of semiconductor layer.
" sintering " of semiconductor layer is different with " drying " herein." drying " like this relates generally to liquid component or the material/solid of eliminating any low boiling temperature of preexist in semiconductor layer, for example solvent.Usually, such " drying " occurs in＜250 ℃ of temperature.
Basic ideas of the present invention are that the porous wall has been created insulation barrier effectively between counterelectrode and first electrode or photosensitive layer, the porous wall directly contacts with counterelectrode simultaneously, thereby do not allow to form cumulative volume or slit volume between porous wall and counterelectrode, because this slit volume and then will cause makes battery produce presser sensor for the pressure that is applied on counterelectrode or the preceding electrode.
Sometimes, in this application, mention " the whole area " of layer, it is covered by another layer or contacts with another layer.This term used herein is meant on this laminar surface that comes in contact and the area of parallel with it imaginary plane.In other words, this layer is regarded as seeming to have smooth flat as its surface, and term " whole area " is meant the area of this smooth flat.If have only one " part " of " part " or " whole area " to be capped or to be touched, this typically refers to a part of area on this imaginary plane.The meaning of statement used herein " area that described porous semiconductor layer is capped is greater than 50% of the whole area of porous semiconductor layer " is meant: 50% of the lip-deep imaginary plane area of porous semiconductor layer is capped.Therefore, except as otherwise noted, otherwise " whole area " or " area " typically refer to the area of this imaginary plane, rather than the real surface of the porous semiconductor layer of high surface area/porous wall amasss to refer to may have more because of its particle characteristics.
Term used herein " heat-resistant polymer " is meant the polymer that keeps dimensional stability under the influence of heat.Preferably, the polymer of indication can keep dimensional stability in the temperature range of photocell operating temperature.More preferably, " heat-resistant polymer " be up to and comprise the polymer that keeps dimensional stability in 80 ℃ the temperature range.
When using in this article, the particle with the size from 1nm to＜1 mu m range is also sometimes referred to as " nano particle ".
The semiconductor of porous wall or insulator particle can be by forenamed any semiconductor or insulating materials, or the combined preparation of any forenamed material.Equally, more than one particle can be arranged, thus, they can be by the various particles of different semiconductors or insulating material preparation or have the particle of core shell structure.The nano particle of this core shell structure is known by those skilled in the art.
In battery assembly method according to the present invention, step C) comprise steps A) and product B) make interlayer.This interlayer process quilt those skilled in the art know, and for example makes the physics contact and for example by clamping they are fixed together or for example use glue or glass cement that they are sealed each other of two products, implements interlayer thus.
Photocell used herein is dye sensitization, also is known as DSSC (DSSC) sometimes.
Operable base material is a transparent base according to the present invention, glass for example, and plastics are as polymethyl methacrylate (PMMA) etc.Base material can be rigidity or flexibility.Those skilled in the art know and have various flexible parent metals.Operable flexible parent metal for example is following base material, but is not limited to them: PETG (PET), PEN (PEN), polyether sulfone (PES), polymethyl methacrylate (PMMA), polyimides (kapton), polyether-ether-ketone (PEEK), Polyetherimide (PEI), OHP (overhead transparencies (transparency that cat head distillates)), metal forming such as titanium foil, platinum foil, aluminium foil, stainless steel.
According to electrode used in the present invention is to be applied to laminated metal electrode on the base material and/or transparent conductive oxide (TCO) for example conductivity ITO (indium tin oxide) or FTO (fluorine tin-oxide) or ATO (antimony tin oxide) or zinc oxide (ZnO).Under the situation of flexible solar battery, thus one or other base material and apply thereon electrode layer and can be had enough rigidity and can replace as the metal forming of supporting base material and having desired conductivity simultaneously.If flexible solar battery is the DSSC from back illuminated, so preceding electrode and base material are formed by aforesaid metal forming, and another electrode be only combine by semi-transparent metal layer (such as using platinum) or with transparent conductive oxide form, other transparent base is placed on it.The schematic diagram of the DSSC of this backside illuminated as shown in Figure 4.
On base material or electrode, apply porous layer, a lot of methods arranged such as porous semiconductor layer, for example silk screen printing, blade coating, ink jet printing, drop coating, rotary coating, spraying, assembling successively, stripping technology and anode oxidation method, all these is well-known to those skilled in the art.
" for the porous semiconductor layer of photoactivate layer " as herein described is the semiconductor grain layer that participates in light absorption, separation of charge and charge transfer process.Usually, it is to be made by the semiconductor grain that material well-known to those skilled in the art or combination of materials are made.The very clear various semiconductor grains of those skilled in the art all can be used to make this type of photosensitive porous semiconductor layer.This material for example is but is not limited to: TiO 2, SnO 2, Sb 2O 5, CdTe, CdSe, CdS, ZnO, Nb 2O 5, ZrO 2, CeO 2, WO 3, SiO 2, Al 2O 3, CuAlO 2, SrTiO 3And SrCu 2O 2
The inventor is surprised to find that by not using the interval paper tinsel of conventional prior art, the lotus of can powering separates and the photosensitive area of transfer process can be enlarged effectively, and the frequency of short circuit has simultaneously been effectively reduced.According to the present invention, realized above-mentioned purpose by having the non-photosensitivity layer and being used as the photosensitive layer and the insulator of counterelectrode and/or the porous wall of separator.The inventor has been found that the use of this porous wall has can be made DSSC be in operation to have the advantage of lower short circuit probability.
The short circuit failure rate that the flexible optoelectronic pond that comprises this porous wall of making is produced is 0%, and does not have the flexible optoelectronic pond of this porous wall because failure rate 〉=50% that short circuit causes.
Fig. 1 (b) is the sketch of general thought.It has utilized such material, this material (i) is on the whole area or major part of the whole area of active porous layer or major part and/or counterelectrode, guarantee that the electricity between photosensitive porous layer and the counterelectrode separates, and the ion in the electrolyte is moved freely between photosensitive porous layer and counterelectrode.This task can utilize channelled porous material to finish, and this material can be fully or filled slit (being the area between photosensitive layer and the counterelectrode surface) between two electrodes in major part.Hole dimension must have the order of magnitude of gap size or less than this slit between two electrodes.For example, if single interchannel distance greater than the evolving path by the slit, this extra distance may produce passive influence to the performance of battery so, particularly it can cause the short-circuit current density and the fill factor, curve factor of diffusion-restricted battery.
As an example, have been found that the material that satisfies all these requirements is nanoporous TiO 2Nanoporous TiO 2Usually guarantee good electrical contact between individual particle at the temperature sintering that surpasses 400 ℃.When on counterelectrode, applying nanoporous TiO 2And when contacting with particle formation favorable mechanical at a lower temperature, this TiO 2Layer can form with active porous layer and directly contact, and does not have electric current to flow between active porous layer and counterelectrode via porous material.Voidage in order to ensure material is enough high, promptly has enough interface channels between active porous layer and counterelectrode, adds organic material usually in nano particle.Left space has then determined the voidage of porous layer behind the high-temp combustion organic material.Under the situation of K cryogenic treatment porous wall, can use not contain organic TiO 2Suspension, and its voidage only by the particle size of nano particle and reunion degree but not high sintering temperature regulate.
Description of drawings
Refer now to accompanying drawing, wherein
Accompanying drawing 1 has shown the photocell that uses the normal space paper tinsel, and (Fig. 1 is a) with according to the comparison of the embodiment of the photocell (Fig. 1 b and 1c) of use porous wall of the present invention.As can be seen, use the photocell of standard room parting between active porous layer and electrode, to have void volume, and do not have this void volume in the photocell of the present invention, thereby make battery reduce the susceptibility of pressure influence.The nano particle diameter of porous wall is with wherein the nano particle diameter of photosensitive porous layer can identical (Fig. 1 c) or difference (Fig. 1 b).All holes all have been full of electrolyte.
Fig. 2 has shown the J-V-characteristic of the battery of the battery that uses the standard room parting and porous wall used according to the invention.
Fig. 3 has shown the battery that uses paper tinsel at interval and according to the photoelectric parameter of battery of the present invention.
Fig. 4 has shown the schematic diagram of the DSSC (DSSC) of the back illuminated with porous wall.
Fig. 5 has shown the schematic diagram according to the flexible battery of the use normal space paper tinsel of prior art, and flexible battery is subjected to outside pressure here.Cause the contact between semiconductor photoactive layer and the electrode (circle) to cause short circuit owing to exerting pressure, thereby cause that flexible battery lost efficacy.
Fig. 6 has shown the J-V-characteristic of the battery of the battery (wherein photosensitive porous layer partly is spaced apart the battery that paper tinsel covers) that uses the standard room parting and porous wall used according to the invention.
Fig. 7 has shown the photoelectric parameter that uses at interval the battery of paper tinsel (" standard room parting ") (wherein photosensitive porous layer partly is spaced apart the battery that paper tinsel covers, (" photosensitive porous layer 1/4 covered by the standard room parting ")) and promptly use the battery of porous wall according to battery of the present invention.
Embodiment
Further describe the present invention referring now to following examples, these embodiment just provide explanation, rather than will limit the present invention.
Embodiment 1
Use TiO 2As an example, TiO 2The building-up process of suspension is as follows: the acetic acidreaction of isopropyl titanate (IV) and same molar.Add the water postprecipitation and go out white solid.It is disperseed and is added nitric acid again in solution.Heated solution is to finish solation.In the titanium pressure vessel of sealing, implemented hydro-thermal synthetic 6 hours then at 190 ℃.Bath-sonicated is adjusted TiO 2Content, and add 1-propyl alcohol and ethanol, finish synthetic thus.
The assembling of DSSC with porous sept is as follows: go up at FTO (at about 100nm on glass) and form the thick whole TiO of 30nm 2The barrier layer.The thick porous layer of 10 μ m that semiconductor grain constitutes was screen printed on the barrier layer and 450 ℃ of following sintering half an hour.By self assembly, and red dye molecules (N3 is two-TBA) from ethanol (0.3mM) solution, is adsorbed onto on the particle, and porous layer is filled and contains I -/ I 3-as the electrolyte of redox couple (15mM).By the water base TiO of blade coating 2Suspension applies porous TiO on the reflection platinum electrode at back 2Wall.This porous wall obtains having about 5 μ m thickness 150 ℃ of dryings.This counterelectrode is also filled by above-mentioned described electrolyte, then directly by interlayer on active porous layer.
Fig. 2 and Fig. 3 show corresponding J-V-characteristic and photoelectric parameter respectively.Use standard room parting and porous sept to obtain almost same efficient, but described porous sept have the advantage of eliminating the short circuit possibility at the DSSC run duration.Because the nano-porous materials of Shi Yonging is opaque in this case, obtain lower slightly short-circuit current density so observe.Therefore, can not captive light when for the first time passing active porous layer lose mainly due to scattering process, and under the situation of using the standard room parting, this part light can be reflected by counterelectrode and pass photosensitive porous layer for the second time.
Yet further advantage is nanoporous TiO 2Optical characteristics can adjust by particle size and reunion degree.Low degree of aggregation and granule have caused hyaline membrane.Under the situation of the DSSC of back illuminated, transparent porous wall has more superiority (Fig. 4).
Embodiment 2
TiO 2Synthesizing of suspension with embodiment 1 described process.
The assembling of DSSC with porous sept is as follows: the process identical with embodiment 1 deferred on barrier layer, the preparation of porous layer and absorbing dye (dyeadsorption).Utilization is based on the mixture of poly(ethylene oxide) (3wt%), propylene carbonate and ethylene carbonate and with I 3 -/ I -Gel-form solid polymer electrolyte as redox couple permeates this porous layer; I 3 -Concentration is 15mM, and the ratio of propylene carbonate and ethylene carbonate equals 1.
By the water base TiO of blade coating 2Suspension applies porous TiO on back reflection platinum electrode 2Wall.The porous wall is 150 ℃ of dryings, and the result makes this wall have the thickness that is about 2 μ m.This counterelectrode is also filled by above-mentioned described electrolyte, then directly by interlayer on active porous layer.The thick paper tinsel of 2 μ m is used as the standard room parting.
Fig. 6 and Fig. 7 have shown corresponding J-V-characteristic and photoelectric parameter respectively.Use standard room parting and porous sept acquisition efficient much at one.In 1/4 battery that is covered by the standard room interlayer of active porous area, efficient has rapid decline, causes current efficiency also like this thus.
Fig. 6 has shown the J-V-characteristic of the battery of the battery (photosensitive porous layer partly is spaced apart the battery that paper tinsel covers) that uses the standard room parting and porous wall used according to the invention.
Fig. 7 has shown the battery (battery that wherein photosensitive porous layer is partly covered by photosensitive porous layer) that uses paper tinsel at interval and the photoelectric parameter of battery according to the present invention.
Disclosed feature of the present invention can separately or be carried out combination in any and realized various version of the present invention in specification, claim and/or the accompanying drawing.

Claims (22)

1. photocell, it comprises:
-the first base material and first electrode on described first base material, perhaps first metal forming is as first base material and first electrode,
-porous semiconductor layer, it is the photoactivate layer on described first electrode,
-porous wall on described porous semiconductor layer,
-as second electrode of counterelectrode, it is also physics contact with it on described porous wall, and described second electrode covers described porous wall,
-second base material on described second electrode,
Wherein said porous semiconductor layer has first clearance space that the hole by described porous semiconductor layer forms, and described porous wall has second clearance space that the hole by described porous wall forms, wherein said first and second clearance spaces fluid each other contact and are filled electrolyte, and the described porous layer wall that wherein is positioned on the side contacts with the described second electrode physics, and the wherein said porous wall that is positioned on the opposite side contacts with described porous semiconductor layer physics.
2. according to the described photocell of claim 1, the described porous wall that wherein is positioned on the whole area of a side contacts with the described second electrode physics, and the described porous wall that wherein is positioned on the whole area of opposite side contacts with described porous semiconductor layer physics.
3. according to any one described photocell among the claim 1-2, wherein, except described second clearance space, between described porous wall and described second electrode, there is not electrolytical void volume.
4. according to the described photocell of claim 1, wherein, described porous wall is by the optically transparent material manufacturing of semiconductor or electric insulation.
5. according to the described photocell of claim 1, wherein said porous wall has the hole of hole dimension at 5nm～100 mu m ranges.
6. according to the described photocell of claim 1, wherein said porous wall is to have the paper tinsel that average diameter is the hole of 10nm～100 μ m.
7. according to the described photocell of claim 1, wherein said porous wall is by the particle manufacturing, and described particle has the size from 1nm to＜1 μ m.
8. according to the described photocell of claim 7, wherein said particle is semiconductor grain or insulator particle.
9. described according to Claim 8 photocell, wherein said semiconductor or insulator particle are to make TiO by being selected from following material or combination of materials 2, SnO 2, Sb 2O 5, CdTe, CdSe, CdS, ZnO, Nb 2O 5, ZrO 2, CeO 2, WO 3, SiO 2, Al 2O 3, CuAlO 2, SrTiO 3, SrCu 2O 2, SiO 2, heat-resistant polymer, metal carbonate, metal sulfate.
10. according to the described photocell of claim 1, wherein said porous semiconductor layer is through dye sensitization, and described porous wall is without dye sensitization.
11. according to the described photocell of claim 1, wherein said porous wall covers described porous semiconductor layer on the whole area of described porous semiconductor layer, thereby with described porous semiconductor layer and the described second electrode electric insulation.
12. according to the described photocell of claim 1, wherein said battery do not contain be arranged on described first and described second electrode between, with described porous semiconductor layer and the described second electrode electric insulation and with any interval body of the adjacent setting of described porous semiconductor layer.
13. according to the described photocell of claim 1, wherein said battery comprises the described porous wall as unique interval body, so that described porous semiconductor layer and the described second electrode electric insulation.
14. according to the described photocell of claim 5, pore size distribution that wherein said porous wall is had or monodispersity hole dimension are in 5nm～100 mu m ranges.
15. according to the described photocell of claim 7, the particle size distribution that described particle had of wherein said porous wall or monodispersity hole dimension are in the scope from 1nm to＜1 μ m.
16. according to the described photocell of aforementioned claim 1, wherein said porous wall has the thickness of 100nm～100 μ m.
17. according to the described photocell of claim 1, wherein said porous wall covers a part of area of described porous semiconductor layer, do not cover the remainder area of described porous semiconductor layer, and the area that wherein said porous semiconductor layer is capped is greater than 50% of the whole area of described porous semiconductor layer.
18. according to the described photocell of claim 1, the ratio of gap size and hole dimension is in 1～1000 scope in the wherein said porous wall.
19. according to the described photocell of claim 1, wherein said porous wall is by being selected from the manufacturings of silk screen printing, blade coating, ink jet printing, drop coating, rotary coating, spraying, static self assembly successively, hoisting, mineralising and anodised method.
20. according to the described photocell of claim 1, wherein first metal forming is used to replace described first base material and described first electrode, wherein said second electrode is translucent metal level, and wherein said battery is included as described second base material of transparent base, and wherein between described second base material and described second electrode, randomly has transparent conductive oxide.
21., comprise step according to any one photronic assemble method among the claim 1-20:
A)：
A) provide first base material and first electrode thereon, first metal forming perhaps be provided,
B) on the product of step a), promptly on described first electrode or described first metal forming, apply porous semiconductor layer, perhaps on the product of step a), promptly on described first electrode or described first metal forming, apply the semiconductor barrier layer, on described semiconductor barrier layer, apply porous semiconductor layer then
C) at＞300 ℃ temperature sintering step b) product,
D) dye sensitization is at the described porous semiconductor layer of the product of step c), and fills it with electrolyte,
B): this step and steps A) separate and carry out:
A ') provide second base material and second electrode thereon, perhaps provide second metal forming, only in steps A) in when first metal forming is not provided, described second metal forming just is provided,
B ') at step a ') product on, promptly on described second electrode or second metal forming, apply porous semiconductor layer,
C ') product drying steps b '),
D ') porous semiconductor layer of product usefulness electrolyte filling step c '),
C): completing steps A) and the B) step implemented of back:
A ") porous semiconductor layer by the step d) of filling and drying, the steps d of filling with electrolyte through sintering, dye sensitization with electrolyte ') porous semiconductor layer, make A) with B) product contact, these layers are that physics contacts each other.
22. the purposes of porous wall in photocell, be used to prevent between the semiconductor photoactive layer of described battery and counterelectrode, be short-circuited, and/or making the semiconductor photoactive layer of described battery and counterelectrode insulated from each other, wherein said porous wall is any one defined porous wall among the claim 1-20.
CN 200710300371 2006-12-22 2007-12-21 Photovoltaic cell Expired - Fee Related CN100587972C (en)

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EP06026773.9 2006-12-22
EP07002646.3 2007-02-07

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CN102194577B (en) * 2010-03-10 2013-02-06 北京大学 Solar cell and method for making same
CN102194999A (en) * 2010-03-10 2011-09-21 北京大学 Composite solar battery
CN102456480A (en) * 2010-10-20 2012-05-16 财团法人工业技术研究院 Solar cell structure
KR20130006561A (en) * 2011-07-08 2013-01-17 현대자동차주식회사 Solid electrolyte of type porous film and dye-sensitized solar cell having the same, and its manufacturing method
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