Summary of the invention
The object of the invention is to provide a kind of TD-SCDMA signal generation apparatus and calibration steps thereof, and this device can solve the problems referred to above that prior art equipment exists, and can be used for the TD-SCDMA network planning, the network optimization and testing of equipment work flexibly.
Device of the present invention is by the liquid crystal display and the Keysheet module configuration parameter of accepting the user of self configuration, and perhaps the PC that connects operation LMT Local Maintenance Terminal (LMT) software by serial communication port receives user's configuration parameter.Described configuration parameter comprises that for example signal source type, mode of operation promptly export code channel power that the TD-SCDMA signal still is CW signal, descending synchronous code, the maximum gross power of output, each channel and channel code etc.Produce the CW signal if desired, the direct control hardware of the processor in the device produces; Produce the TD-SCDMA signal if desired, then the base band algorithm by processor operation in the device imitates TD-SCDMA base station or terminal, carry out TD-SCDMA physical layer spread spectrum and operations such as scrambling, power weightings, calculate data to be sent and offer the hardware transmission.
This signal generation apparatus comprises logic module, upconverter, DA transducer, IF amplification filtering module, frequency mixer, RF amplification filtering module, power detector, processor, constant-temperature crystal oscillator (OCXO), temperature sensing module, voltage controller (DAC), phase-locked loop (PLL), local oscillator (LO), communication serial port, it is characterized in that:
The baseband I that the logic module receiving processor calculates, Q data, and baseband I, Q data in real time be converted to the desired form of digital upconverter; Logic module can be according to the position of the user configured system delay parameter and second transfer point, export 5 milliseconds of time slot transceiving switch-over control signals, control IF amplification filtering module and RF amplification filtering module, this time slot transceiving switch-over control signal also is output to the signal generation apparatus outside; Logic module can also be under user's control, to the internal system clock count, processor calculates in preset time inside and outside clock and internal clocking count difference according to this value, through adjust the control voltage of constant-temperature crystal oscillator after the Filtering Processing by voltage controller, till the internal clocking precision meets the demands;
Upconverter is used for I, Q data are carried out interpolation, filtering, upconversion process, converts I, Q Data Base band signal to digital medium-frequency signal;
The DA transducer is used for digital medium-frequency signal is converted to analog if signal;
IF amplification filtering module is used for analog if signal is carried out amplification filtering, exports to frequency mixer then;
Frequency mixer is used for analog if signal is carried out rf modulations, produces radiofrequency signal;
RF amplification filtering module outputs to antenna after the radiofrequency signal amplification filtering with frequency mixer output;
Power detector is used for the descending pilot frequency time slot of RF amplification filtering module output, the radiofrequency signal or the CW radiofrequency signal of uplink pilot time slot are carried out detection, and the picked up signal power data is also passed to processor;
Constant-temperature crystal oscillator produces the internal clocking reference signal of standard, is used to regulate the output signal of phase-locked loop and local oscillator;
Local oscillator is used to produce local radiofrequency signal, is used for the rf modulations of frequency mixer;
Phase-locked loop is used to produce system's reference clock signal;
The temperature sensing module is used to detect the temperature of constant-temperature crystal oscillator, and sends temperature data to processor, so that carry out temperature-compensating;
Voltage controller is used for according to processor instruction, produces control voltage to regulate the output clock reference frequency of constant-temperature crystal oscillator;
Communication serial port is used to receive input command and output execution result from external terminal;
Processor is used to control the operation of whole signal generation apparatus, and carries out calculating such as spread spectrum, scrambling according to user configuration, obtains baseband I, the Q data send to logic module.
Above-mentioned signal generation apparatus further comprises liquid crystal display and Keysheet module, is used for directly to device input operation order, parameter and its operating state of demonstration.
The calibration steps of signal generation apparatus of the present invention comprises:
This device is carried out the calibration of power that the continuous wave emitted power is calibrated, carried out the TD-SCDMA signal;
This device is carried out clock alignment;
This device has adopted the transmitting power detecting circuit, and inside has been adopted the Feedback of Power loop to carry out automatic transmitted power and regulated.
In order to guarantee the accuracy of output signal power, dispatch from the factory or can carry out the calibration of power when using.Concrete power calibrating method is: when signal generation apparatus of the present invention was launched the TD-SCDMA signal as the base station signal source, the yield value when the expection power of record DwPTS is consistent with real output also was kept in the device, forms checking list; When signal generation apparatus of the present invention as terminal signaling source emission TD-SCDMA signal the time, the yield value when the expection power of record UpPTS is consistent with real output also is kept in the device and frequency point information forms checking list simultaneously; When emission continuous wave signal the time, the yield value when record expection power is consistent with real output also is kept in the device and frequency point information forms checking list simultaneously.In actual the use, be that CW signal or information such as TD-SCDMA signal, expection power are inquired about the gain of above-mentioned checking list to obtain expecting according to frequency point information, the signal type of required generation signal, control system produces the signal that meets the demands.The gain here can be the gain of control intermediate frequency output, also can be the gain of control radio frequency.Signal generation apparatus of the present invention adopts the control to intermediate-frequency gain.
For overcome device aging and at various temperatures the power precision meet the demands, signal generation apparatus of the present invention has adopted the Feedback of Power ring.When this signal generation apparatus is launched the TD-SCDMA signal as the base station signal source, carry out power detection by signal and obtain real output descending DwPTS, compare through filtering and expection transmitting power, determine to increase or reduce transmitting power then; When this signal generation apparatus is used as the terminal signaling source with emission TD-SCDMA signal, be to obtain real output by the UpPTS signal is carried out power detection, compare through filtering and expection transmitting power, determine to increase or reduce transmitting power then; When this signal generation apparatus is used to launch continuous wave signal, be to carry out power detection by signal to obtain real output to whole 5ms, compare through filtering and expection transmitting power, determine to increase or reduce transmitting power then.
In order to overcome the problem of aging of clock, signal generation apparatus of the present invention has clock input and output mouth, not only can export the internal clocking that this device uses, and can and external perimysium reference clock source compare, to calibrate the internal clocking of this device.The user is by LMT tranmitting data register calibration command, this signal generation apparatus calculates the poor of local within a certain period of time internal clocking counting and outside input standard time clock counting, regulate this device constant-temperature crystal oscillator control voltage according to this difference then, till the difference between the two meets the demands.After error met the demands, this device was automatically preserved the control magnitude of voltage of constant-temperature crystal oscillator, and time standby this control magnitude of voltage that next time starts is regulated constant-temperature crystal oscillator.
TD-SCDMA is the TDD standard, the problem that exists the time slot transmitting-receiving to switch.Cross minor issue in order to solve transmitting power, be convenient to that external power amplifier increases transmitting power or external instrument is tested, this device has been exported 5ms time slot transmitting-receiving control signal.
Embodiment
Below in conjunction with accompanying drawing, the structure and the calibration steps of signal generation apparatus of the present invention is elaborated.
Fig. 1 represents the structure of signal generation apparatus of the present invention.Device comprises described in the figure: logic module, upconverter, DA transducer, IF amplification filtering module, frequency mixer, RF amplification filtering module, power detector, processor, constant-temperature crystal oscillator (OCXO), temperature sensing module, voltage controller (DAC), phase-locked loop (PLL), local oscillator (LO), communication serial port.
The present invention is used for the signal generation apparatus of TD-SCDMA system by liquid crystal display of this machine and Keysheet module, perhaps receive user's configuration parameter by LMT Local Maintenance Terminal (LMT), for example select the delivery channel corresponding parameters, this device is under the control of processor then, calculate corresponding IQ data and be saved in the logic module, calculate the output gross power of expection simultaneously, obtain the intermediate-frequency gain that needs are provided with, regulate intermediate frequency amplification filtering module according to calibration of power table.Logic module converts baseband I Q data in real time to satisfy the digital up converter call format form, send to digital up converter and carry out processing such as interpolation, filtering, up-conversion, after the digital-to-analogue conversion through the DA transducer, the output analog if signal, under the control of the time slot transceiving switch-over control signal that logic module is sent, through intermediate frequency amplification/filtering, radio frequency mixing, radio frequency amplification/filtering, finally satisfy the TD-SCDMA signal or the continuous wave signal of TD-SCDMA wave point requirement by the antenna emission.LMT can use the serial port terminal, also can possess operation terminal-emulation software realization on the PC of serial port.Wherein the time slot transceiving switch-over control signal of logic module generation also outputs to outside apparatus of the present invention, uses for the external radio frequency power amplification device.In addition, system provides clock input and output interface, is convenient to carry out equipment clock calibration or synchronous.
In order to guarantee the accuracy of output signal power, can carry out the calibration of power to signal generation apparatus of the present invention at any time.Concrete power calibrating method is the yield value when record expection power is consistent with real output automatically or manually and is kept in the device, forms checking list.The annexation of capability correction process apparatus of the present invention shown in Figure 2 and auxiliary equipment, the communication serial port of apparatus of the present invention connects LMT, radiofrequency signal output and introduces canonical reference frequency spectrograph, internal clocking are connected to frequency spectrograph with reference to output external clock port after by power meter probe and attenuator among the figure.The method of capability correction specifically comprises step:
Step 1, signal generation apparatus powers on, normal operation;
Step 2 is in the propagation model revision working method of LMT Local Maintenance Terminal (LMT) signalization generating means for the output continuous wave signal;
Step 3 is provided with the minimum frequency that the radiofrequency signal centre frequency is the signal generation apparatus working frequency range;
Step 4 is adjusted parameter by LMT, and actual output gross power is set, and it is initially set to the minimum power point of capability correction scope;
Step 5 after processor is received this order in the device, is provided with the gain of IF amplification filtering module;
Step 6, the actual output radiofrequency signal performance number of observing the frequency spectrograph test;
Step 7 surpasses predetermined value if the result departs from selected performance number;
Step 8 is by LMT input calibration deviate;
Step 9, processor is according to the gain of this regulated value fine setting IF amplification filtering module;
Step 10, step 6 to nine above repeating falls into the acceptable error scope up to this power precision;
Step 11, according to the transmitting power step value of preliminary election, for example 0.1dB proofreaies and correct the every other power points of base station signal transmitting power scope, carry out above-mentioned steps four to step 10, till all power points finish according to given step value calibration in power bracket;
Step 12, according to the centre frequency step value of preliminary election, it is other all frequencies of signal generation apparatus radio frequency band that centre frequency is set, and carries out above-mentioned steps three to step 11, till finishing all frequency calibrations;
Step 13, by the LMT input command, the signalization generating means is operated in the test pattern of simulation base station, adjusts parameter by LMT, and the minimum power point of downlink signal power correcting range in the downlink time slots is set;
Step 14 after processor is received this order in the device, is provided with the gain of IF amplification filtering module;
Step 15, the performance number of observing the actual output of frequency spectrograph descending pilot frequency time slot;
Step 10 six surpasses predetermined value if the result departs from selected performance number;
Step 10 seven is by LMT input calibration deviate;
Step 10 eight, processor is according to the gain of this regulated value fine setting IF amplification filtering module;
Step 10 nine, step 15 falls into the acceptable error scope to step 10 eight up to descending pilot frequency time slot real output precision above repeating;
Step 2 ten, transmitting power step value according to preliminary election, 0.1dB for example, every other power points to base station signal downlink signal transmissions power bracket is proofreaied and correct, carry out above-mentioned steps 13 to step 10 nine, till all power points finish according to given step value calibration in power bracket;
Step 2 11, by the LMT input command, the signalization generating means is operated in emulation TD-SCDMA terminal pattern, adjusts parameter by LMT, and it is the minimum power point of uplink time slot signal power correcting range that uplink pilot time slot signal power predetermined value is set;
Step 2 12 after processor is received this order in the device, is provided with the gain of IF amplification filtering module;
Step 2 13, the actual output radiofrequency signal performance number of observing frequency spectrograph testing uplink pilot frequency time slot signal;
Step 2 14 surpasses predetermined value if the result departs from selected performance number;
Step 2 15 is by LMT input calibration deviate;
Step 2 16, processor is according to the gain of this regulated value fine setting IF amplification filtering module;
Step 2 17, step 2 13 falls into the acceptable error scope to step 2 16 up to uplink pilot time slot output power signal precision above repeating;
Step 2 18, according to the transmitting power step value in the uplink time slot of preliminary election, 0.1dB for example, every other power points to terminal signaling uplink pilot time slot transmitting power scope is proofreaied and correct, carry out above-mentioned steps 21 to step 2 17, till all power points finish according to given step value calibration in uplink pilot time slot signal power scope;
Step 2 19 finishes the calibration of power by the LMT input command, and signal generation apparatus is saved in calibration result in the logic module.
Above-mentioned calibration of power work can cooperate signal generation apparatus of the present invention automatically to carry out by the LMT Software that operates on the PC.
In order to prevent that signal generation apparatus internal clocking of the present invention is aging, this device has external clock reference signal input port and internal clocking reference signal output port, and the logic module in this device can compare internal clocking reference signal and the external perimysium reference clock source that phase-locked loop is handled.Error is bigger if comparative result shows the internal clocking reference signal, and error signal is used for adjusting the control voltage of constant-temperature crystal oscillator by processor, till the error of the internal clocking reference signal of this device meets the demands.Figure 3 shows that the annexation schematic diagram of apparatus of the present invention and servicing unit in the clock alignment process, LMT is connected to the communication serial port of apparatus of the present invention among the figure, the clock reference signal input of apparatus of the present invention is connected to the standard time clock reference source.Clock alignment comprises concrete steps:
Step 1, signal generation apparatus power on and normally move;
Step 2 will insert the external clock of described signal generation apparatus with reference to the input port from the external clock reference signal of standard time clock reference source;
Step 3 is carried out the automatic calibration command of clock by LMT;
Step 4, logic module is counted inner clock reference signal in the section at the fixed time, and the count value that processor reads this count value and reference clock compares, and calculates error amount;
Step 5, if error amount meets the demands, processor reports automatic calibration success message to give LMT, jumps to step 8;
Step 6, if error is bigger, processor jumps to step 4 to transfer the control voltage of device constant-temperature crystal oscillator through filtered difference;
Step 7, if in the given time, the error clock does not satisfy requirement, processor reports automatic calibration failed message to give LMT;
Step 8, if calibrate successfully, the user stops the clock alignment order by LMT input, the clock alignment storage that obtains in signal generation apparatus.
Through behind the above-mentioned clock correction, the magnitude of voltage of crystal oscillator when working on power, signal generation apparatus can be set according to new corrected value.
When testing,, select to obtain required test parameter by the liquid crystal display and the Keysheet module of apparatus of the present invention.The automatic regulatory function of signal generation apparatus of the present invention by calibration of power ring with transmission power adjustment on selected power points.This power is adjusted in automatically and is used under the different operating state differently, and detailed process comprises:
Be set to launch under the operating state of continuous wave at signal generation apparatus: processor calculates the theoretical output power value of continuous wave signal that test needs according to the configuration parameter of input; Processor regularly the readout power wave detector to the continuous wave radiofrequency signal in the detecting circuit data that the average power of each 5ms time period is converted to, obtain the real output value of continuous wave radiofrequency signal by numerical filtering; Processor compares continuous wave radiofrequency signal real output value and theoretical output power value, if difference in error range, is not carried out the power adjustment; Otherwise adjust the power output gain according to difference, if real output is bigger than theoretical power output, the gain that then increases IF amplification filtering module is with the reduction real output, otherwise the gain of increase IF amplification filtering module is to improve real output;
Signal generation apparatus is set to launch under the operating state of TD-SCDMA down link signal: processor calculates the theoretical output power value of descending pilot frequency time slot according to the configuration parameter of input; The detecting circuit data that processor readout power wave detector is converted to radio frequency descending pilot frequency time slot signal mean value in downlink time slots obtain the real output value of descending pilot frequency time slot signal by numerical filtering; Processor compares descending pilot frequency time slot signal real output value and theoretical output power value, if difference in error range, is not carried out the power adjustment; Otherwise adjust the power output gain according to difference, if real output is bigger than theoretical power output, the gain that then increases IF amplification filtering module is with the reduction real output, otherwise the gain of increase IF amplification filtering module is to improve real output;
Signal generation apparatus is set to launch under the operating state of TD-SCDMA uplink signal: processor calculates the uplink pilot time slot signal theory output power value that test needs according to the configuration parameter of input; The detecting circuit data that processor readout power wave detector is converted to the uplink pilot time slot signal averaging in uplink time slot obtain the real output value of uplink pilot time slot signal by numerical filtering; Processor compares uplink pilot time slot signal real output value and theoretical output power value, if difference in error range, is not carried out the power adjustment; Otherwise adjust the power output gain according to difference, if real output is bigger than theoretical power output, the gain that then increases IF amplification filtering module is with the reduction real output, otherwise the gain of increase IF amplification filtering module is to improve real output.
Adopt the TD-SCDMA signal generation apparatus of above-mentioned implementation method, not only can emulation TD-SCDMA base station, and can emulation terminal; Can set up various TD-SCDMA physical channels flexibly; The power precision height that transmits, stability is good, is better than the agreement set quota; Solve the problem of aging of instrument, guaranteed permanent convenient use of instrument.