CN100585844C - The circuit board overlapping construction of tool embedded semi-conductor element - Google Patents
The circuit board overlapping construction of tool embedded semi-conductor element Download PDFInfo
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- CN100585844C CN100585844C CN200710139839A CN200710139839A CN100585844C CN 100585844 C CN100585844 C CN 100585844C CN 200710139839 A CN200710139839 A CN 200710139839A CN 200710139839 A CN200710139839 A CN 200710139839A CN 100585844 C CN100585844 C CN 100585844C
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04105—Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/19—Manufacturing methods of high density interconnect preforms
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32135—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/32145—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1515—Shape
- H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
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- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
The invention discloses a kind of circuit board overlapping construction of tool embedded semi-conductor element, comprise at least two circuit boards, respectively this circuit board surface has line layer and at least one opening, in this opening, be embedded with semiconductor element, this semiconductor element has a plurality of electronic padses, and this line layer has a plurality of conductive structures and electric connection pad, makes the conductive structure of this line layer electrically connect the electronic pads of this semiconductor element; And at least one adhesion layer, be folded between this at least two circuit board, the position that corresponds to this electric connection pad in this adhesion layer is provided with electric conducting material, makes the electric connection pad of this at least two circuit board be able to form path by this electric conducting material, and then the electric connection between the forming circuit plate.
Description
Technical field
The present invention relates to a kind of circuit board overlapping construction of tool embedded semi-conductor element, refer to a kind of structure that semiconductor element splices into it multilayer circuit board again that in circuit board, is embedded with especially.
Background technology
Light littleization of electronic product has been the trend of electronic industry development now, and the downsizing of making along with electronic product, and being embedded in for the semiconductor element of various difference in functionalitys then has on the circuit board towards more highdensity demand.Therefore, for using above-mentioned demand, and on the chip bearing member (for example substrate or lead frame) of single packaging part, connect the semiconductor chip of putting and being electrically connected with more than at least two, and the mode of putting that connects between chip and bearing part is that semiconductor chip is upwards spliced on bearing part one by one, electrically connects with bonding wire again.
See also Fig. 1, be United States Patent (USP) the 5th, 323, the generalized section of No. 060 multi-chip semiconductor package 1, be one first semiconductor chip 12a to be connect place on the circuit board 11, and by the first bonding wire 13a to be electrically connected to this circuit board 11, and adopt stack manner (stacked) so that one second semiconductor chip 12b interval, one glue-line 14 is stacked on this first semiconductor chip 12a, and the material of this glue-line 14 is generally epoxy glue (epoxy) or adhesive tape (tape), is electrically connected to this circuit board 11 by one second bonding wire 13b more afterwards.But, the bonding wire processing procedure (wire bonding) of this first semiconductor chip 12a needs to finish earlier before this second semiconductor chip 12b piles up to carry out, that is the glutinous crystalline substance of each layer chip (die bonding) processing procedure and bonding wire processing procedure all need carry out respectively, thereby increase extra process complexity; Moreover, because this first semiconductor chip 12a, the glue-line 14 and the second semiconductor chip 12b are that order upwards is stacked on this circuit board 11 one by one, and for preventing that effectively second semiconductor chip 12b touching is to the first bonding wire 13a, these glue-line 14 thickness must increase to more than the bank height of this first bonding wire 13a, so, not only increase the integral thickness of the semiconductor package part 1 of this multicore sheet, and be unfavorable for the lightening of semiconductor device, simultaneously because of the integral thickness of this glue-line 14 evenly control be difficult for, even cause this second semiconductor chip 12b touching to contact bad problems such as generation short circuit with this second bonding wire 13b to the first bonding wire 13a or this first bonding wire 13a.
Electronic product is under integrated trend again, improving the function of use of electronic product, and reduces the height of electronic product, satisfies semiconductor element is embedded among the loading plate, can be active element or passive component and be embedded in the semiconductor element of circuit board.As shown in Figure 2, for existing semiconductor element is embedded into structural representation in a circuit board, be formed with at least one opening 200 in a loading plate 20 upper surfaces, this opening 200 is in order to semiconductor element 21 to be installed, and this semiconductor element 21 has an acting surface 21a, and this acting surface 21a has a plurality of electronic padses 212, go up formation one dielectric layer 22 in the acting surface 21a of these loading plate 20 upper surfaces and this semiconductor element 21, and on this dielectric layer 22, form a line layer 23, and this line layer 23 has the electronic pads 212 of a plurality of conductive structures 231 to connect this semiconductor element 21, increase a layer mode according to this and form multilayer line layer and dielectric layer, thereby to constitute a multilayer circuit board.
So in above-mentioned processing procedure, because the electrical functionality that single loading plate 20 is embedded into single semiconductor element 21 is limited, if the electrical functionality that will increase this loading plate 20 then must increase the quantity of this semiconductor element 21, so then must on this loading plate 20, offer a plurality of openings 200, can't enlarge but the area of this loading plate 20 is limited, thereby limit the expansion and the development of loading plate 20 electrical functionality.
Therefore, how providing a kind of can be embedded into semiconductor element in circuit board, strengthens its electrical demand and function simultaneously, the real problem of desiring most ardently solution at present that become.
Summary of the invention
The shortcoming of prior art in view of the above, main purpose of the present invention provides a kind of circuit board overlapping construction of tool embedded semi-conductor element, be the circuit board overlapping construction that forms the tool embedded semi-conductor element in the pressing mode, thereby must simplify processing procedure and reduce cost.
Another purpose of the present invention is at the circuit board overlapping construction that a kind of tool embedded semi-conductor element is provided, and is improved whole electrical demand and function.
For reaching above-mentioned and other purpose, the circuit board overlapping construction of tool embedded semi-conductor element provided by the present invention, comprise: at least two circuit boards, respectively this circuit board surface is formed with line layer and at least one opening, embedded semi-conductor element in this opening, this semiconductor element has a plurality of electronic padses, and this line layer has a plurality of conductive structures and electric connection pad, makes the conductive structure of this line layer electrically connect the electronic pads of this semiconductor element; And at least one adhesion layer, be folded between at least two circuit boards, the position that corresponds to this electric connection pad in this adhesion layer is provided with electric conducting material, makes the electric connection pad between at least two circuit boards be able to form path by this electric conducting material, and then the electric connection between the forming circuit plate.
This circuit board is printed circuit board (PCB) or IC base plate for packaging, in this adhesion layer with respect to the electric connection pad position of two circuit boards, form perforate earlier, and in this perforate, form the glue material or soldering tin material (solder) electric conducting material of etc.ing of metal-containing material, wherein this metal material is formed one of group by copper (Cu), tin (Sn), silver (Ag), nickel (Ni), golden (Au), nickel/gold (Ni/Au) and nickel/palladium/gold (Ni/Pd/Au); This adhesion layer is folded between two circuit boards and carries out pressure programming, electrically connects the relative electric connection pad of two circuit boards by the electric conducting material in this adhesion layer and forms path, thereby make two circuit boards reach electric connection.
The surface that this circuit board is not formed with adhesion layer can form an insulating protective layer, and this insulation protection laminar surface has a plurality of perforates, in order to expose the electric connection pad of this line layer.
Or can form a circuit layer reinforced structure in the surface that this circuit board is not formed with adhesion layer; and be formed with a plurality of conductive structures in this circuit layer reinforced structure to be electrically connected to this line layer; and be formed with electric connection pad in this circuit layer reinforced structure surface; has an insulating protective layer in this circuit layer reinforced structure surface again; and this insulation protection laminar surface has a plurality of perforates, in order to expose the electric connection pad of this circuit layer reinforced structure.
In addition, on the electric connection pad on the surface of this circuit board, can be formed with conductive projection again, this conductive projection is as one of copper (Cu), tin (Sn), silver (Ag), nickel (Ni), gold (Au), nickel/gold (Ni/Au) and composition group of nickel/palladium/gold (Ni/Pd/Au) institute, for a circuit board utilized this conductive projection also interval tool electric conducting material adhesion layer and with another circuit board electric connection.
In addition, in the present invention can this circuit board that is embedded with semiconductor chip wherein the electric connection pad on a surface be formed with conductive projection, and only be electric connection pad on another surface, be docked to the conductive projection of another circuit board with electric connection pad with a circuit board surface, and between two circuit boards, insert and put the adhesion layer of tool electric conducting material, and then be able to this structure and be stacked into the multilayer circuit plate structure continuously.
Therefore, the carrying plate structure that is embedded with semiconductor element of the present invention, be to form a plurality of circuit boards by respective process earlier, utilize the circuit board overlapping construction of pressing operation again with quick formation tool embedded semi-conductor element, use and shorten the multilayer circuit board processing procedure time and be beneficial to a large amount of productions, and can increase whole electrical demand and function, simplify processing procedure simultaneously and reduce cost.
Description of drawings
Fig. 1 is a United States Patent (USP) the 5th, 323, the multi-chip semiconductor package generalized section of No. 060 stacked semiconductor chips;
Fig. 2 is the board structure of circuit schematic diagram of existing embedded semi-conductor element;
Fig. 3 A and Fig. 3 B are view sub-anatomy and the combination cross-sectional schematic that the circuit board overlapping construction first of tool embedded semi-conductor element of the present invention is implemented;
Fig. 4 is the second enforcement cross-sectional schematic of the circuit board overlapping construction of tool embedded semi-conductor element of the present invention;
Fig. 5 is the 3rd an enforcement cross-sectional schematic of the circuit board overlapping construction of tool embedded semi-conductor element of the present invention; And
Fig. 6 is the 4th an enforcement cross-sectional schematic of the circuit board overlapping construction of tool embedded semi-conductor element of the present invention.
The component symbol explanation
1 semiconductor package part
12a first semiconductor chip
12b second semiconductor chip
13a first bonding wire
13b second bonding wire
14 glue-lines
11,30,30 ', 30 " circuit board
23,31,362 line layers
22,361 dielectric layers
330,340 perforates
200,303 openings
20 loading plates
21,32 semiconductor elements
212,321 electronic padses
The 21a acting surface
231,311,363 conductive structures
312,364 electric connection pads
331 electric conducting materials
33 adhesion layers
34 insulating protective layers
35 conductive projections
36 circuit layer reinforced structures
Embodiment
Below by particular specific embodiment explanation embodiments of the present invention, those skilled in the art can understand other advantage of the present invention and effect easily by the content that this specification disclosed.
First embodiment
See also Fig. 3 A and Fig. 3 B, be first embodiment of the circuit board overlapping construction of tool embedded semi-conductor element of the present invention; It provides at least two for example to be the circuit board 30 of printed circuit board (PCB) or IC base plate for packaging, these circuit board 30 surfaces have line layer 31, and this circuit board 30 be formed with at least one run through the surface open 303, with embedded semi-conductor element 32 in this opening 303, wherein this semiconductor element 32 can be CPU or internal memory (DRAM, SRAM, active element such as SDRAM), or as electric capacity (capacitors), resistance (resistor) or inductance passive components such as (inductors), this semiconductor element 32 has a plurality of electronic padses 321 again, and this line layer 31 has the electronic pads 321 that a plurality of conductive structures 311 electrically connect this semiconductor element 32, and this line layer 31 has a plurality of electric connection pads 312 again; At least one adhesion layer 33, be formed between at least two circuit boards 30, the position that corresponds to the electric connection pad 312 of this at least two circuit board 30 in this adhesion layer 33 is provided with electric conducting material 331, make the electric connection pad 312 of this two circuit board 30 be able to form path, and then two circuit boards 30 are electrically connected by this electric conducting material 331.
This adhesion layer 33 is to form perforate 330 earlier, and this perforate 330 is with respect to electric connection pad 312 positions of two circuit boards 30, in this perforate 330, fill the glue material or the soldering tin material electric conducting materials 331 such as (solder) of metal-containing material again, wherein this metal material is formed one of group by copper (Cu), tin (Sn), silver (Ag), nickel (Ni), gold (Au), nickel/gold (Ni/Au) and nickel/palladium/gold (Ni/Pd/Au), thereby has electric conducting material 331 for the adhesion layer 33 that forms current path to constitute one.
See also Fig. 3 B, can be by being folded between two circuit boards 30 with adhesion layer 33 with this tool electric conducting material 331 as pressure programming, two circuit boards 30 are combined into one by adhesion layer 33, and electrically connect the electric connection pad 312 of two circuit boards 30, and then constitute the electric connection of two circuit boards 30 by the electric conducting material in the adhesion layer 33 331.
In addition; the surface that this circuit board 30 is not formed with adhesion layer 33 can form an insulating protective layer 34; and these insulating protective layer 34 surfaces have a plurality of perforates 340; in order to the electric connection pad 312 that exposes this line layer 31, then can form other conductive structure (not expression in graphic) in addition again in these electric connection pad 312 surfaces to electrically connect with external electronic.
Second embodiment
See also Fig. 4, the second embodiment schematic diagram for the circuit board overlapping construction of tool embedded semi-conductor element of the present invention, not existing together with last embodiment is that electric connection pad 312 surfaces at circuit board 30 are formed with conductive projection 35, this conductive projection 35 is copper (Cu), tin (Sn), silver (Ag), nickel (Ni), gold (Au), nickel/gold (Ni/Au) and nickel/palladium/gold (Ni/Pd/Au) are formed one of group, with by the electric conducting material 331 in these conductive projection 35 these adhesion layers 33 of extruding, make electric connection pad 312 surfaces of these electric conducting material 331 tight contacts at another circuit board 30.
The 3rd embodiment
See also Fig. 5; the 3rd embodiment schematic diagram for the circuit board overlapping construction of tool embedded semi-conductor element of the present invention; be in surface that this circuit board 30 be not formed with adhesion layer 33 different with previous embodiment is formed with circuit layer reinforced structure 36; this circuit layer reinforced structure 36 includes dielectric layer 361; be formed at the line layer 362 on this dielectric layer 361; and be formed at conductive structure 363 in this dielectric layer 361; and this conductive structure 363 is electrically connected to the line layer 31 of this circuit board 30; these circuit layer reinforced structure 36 surfaces are formed with electric connection pad 364 again; and form an insulating protective layer 34 in these circuit layer reinforced structure 36 surfaces; these insulating protective layer 34 surfaces have a plurality of perforates 340, in order to the electric connection pad 364 that exposes this circuit layer reinforced structure 36.
The 4th embodiment
See also Fig. 6, the 4th embodiment schematic diagram for the circuit board overlapping construction of tool embedded semi-conductor element of the present invention, be in the adhesion layer that make a plurality of circuit boards by tool electric conducting material different with previous embodiment continues to splice, thereby to constitute a multilayer circuit plate structure; It is that electric connection pad 312 in circuit board 30 surfaces is formed with conductive projection 35, this electric connection pad 312 is only exposed on another surface, the conductive projection 35 on the electric connection pad 312 on these circuit board 30 surfaces being spliced, and between two circuit boards 30,30 ', insert and put the adhesion layer 33 of tool electric conducting material 331 to the electric connection pad 312 on another circuit board 30 ' surface; Again on this circuit board 30 ' more at interval the adhesion layer 33 of a tool electric conducting material 331 with another circuit board 30 that splices ", the rest may be inferred, thus to be stacked into the multilayer circuit plate structure continuously.
In addition; in this circuit board 30 and 30 " line layer 31 of outmost surface can form an insulating protective layer 34 again; and these insulating protective layer 34 surfaces have the electric connection pad 312 of a plurality of perforates 340 to expose this line layer 31, and these electric connection pad 312 surfaces then can form other conductive structure (expression in graphic) again to electrically connect with external electronic.
Therefore, the circuit board overlapping construction of tool embedded semi-conductor element of the present invention, be to be formed with corresponding electric connection pad or conductive projection at least two circuit board surfaces, and in this circuit board, be embedded with semiconductor element, and between at least two circuit boards, insert and put the adhesion layer of a tool electric conducting material, this electric conducting material is arranged in this adhesion layer electric connection pad position that should circuit board, when the adhesion layer of this tool electric conducting material is folded between two circuit boards and carries out pressing, electric conducting material in this adhesion layer promptly contacts with the electric connection pad of two circuit boards and form path at least, thereby electrically connect a plurality of circuit boards that splice and be embedded into semiconductor element in this circuit board, and can simplify processing procedure and strengthen integrally-built electrical demand and function, in addition, and can form a plurality of circuit boards by respective process earlier, utilize the pressing operation with quick formation circuit board overlapping construction again, use and shorten the multilayer circuit board processing procedure time and be beneficial to a large amount of productions.
But, above-described specific embodiment, only release characteristics of the present invention and effect in order to example, but not in order to limit the category of implementing of the present invention, do not breaking away under above-mentioned spirit of the present invention and the technology category, the disclosed content of any utilization and the equivalence finished changes and modify, the scope that all still should be claims contains.
Claims (12)
1. the circuit board overlapping construction of a tool embedded semi-conductor element comprises:
At least two circuit boards, respectively this circuit board surface has line layer and at least one opening, in this opening, be embedded with semiconductor element, this semiconductor element has a plurality of electronic padses, and this line layer has a plurality of conductive structures and electric connection pad, makes the conductive structure of this line layer electrically connect the electronic pads of this semiconductor element; And
At least one adhesion layer, be formed between at least two circuit boards, the position that corresponds to this electric connection pad in this adhesion layer has electric conducting material, makes the electric connection pad of this at least two circuit board pass through this electric conducting material with the formation path, thereby forms the electric connection between circuit board.
2. the circuit board overlapping construction of tool embedded semi-conductor element according to claim 1, wherein, the electric connection pad surface replica Cheng Youyi conductive projection of this circuit board.
3. the circuit board overlapping construction of tool embedded semi-conductor element according to claim 2, wherein, this conductive projection is formed one of group by copper, tin, silver, nickel, gold, nickel/gold and nickel/palladium/gold.
4. the circuit board overlapping construction of tool embedded semi-conductor element according to claim 1, wherein, the opening of this circuit board runs through this circuit board surface.
5. the circuit board overlapping construction of tool embedded semi-conductor element according to claim 1, wherein, this semiconductor element is active element and a passive component wherein.
6. the circuit board overlapping construction of tool embedded semi-conductor element according to claim 1; wherein; the surface that this circuit board is not formed with adhesion layer forms an insulating protective layer, and this insulation protection laminar surface is formed with a plurality of perforates, to expose the electric connection pad of this line layer.
7. the circuit board overlapping construction of tool embedded semi-conductor element according to claim 1, wherein, the surface that this circuit board is not formed with adhesion layer is formed with the circuit layer reinforced structure, and be formed with a plurality of conductive structures in this circuit layer reinforced structure being electrically connected to this line layer, and be formed with electric connection pad in this circuit layer reinforced structure surface.
8. the circuit board overlapping construction of tool embedded semi-conductor element according to claim 7 wherein, is formed with an insulating protective layer on this circuit layer reinforced structure, and this insulation protection laminar surface has a plurality of perforates, to expose the electric connection pad of this circuit layer reinforced structure.
9. the circuit board overlapping construction of tool embedded semi-conductor element according to claim 7, wherein, this circuit layer reinforced structure includes dielectric layer, is formed at the line layer on this dielectric layer, and is formed at the conductive structure in this dielectric layer.
10. the circuit board overlapping construction of tool embedded semi-conductor element according to claim 1, wherein, this electric conducting material is wherein one of the glue material of metal-containing material and a soldering tin material.
11. the circuit board overlapping construction of tool embedded semi-conductor element according to claim 10, wherein, this metal material is formed one of group by copper, tin, silver, nickel, gold, nickel/gold and nickel/palladium/gold.
12. the circuit board overlapping construction of tool embedded semi-conductor element according to claim 1, wherein, this adhesion layer is formed with perforate, and this perforate is with respect to the electric connection pad position of at least two circuit boards, with filled conductive material in this perforate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN200710139839A CN100585844C (en) | 2007-08-02 | 2007-08-02 | The circuit board overlapping construction of tool embedded semi-conductor element |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN200710139839A CN100585844C (en) | 2007-08-02 | 2007-08-02 | The circuit board overlapping construction of tool embedded semi-conductor element |
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| Publication Number | Publication Date |
|---|---|
| CN101359640A CN101359640A (en) | 2009-02-04 |
| CN100585844C true CN100585844C (en) | 2010-01-27 |
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| TWI632376B (en) * | 2016-05-31 | 2018-08-11 | 巨擘科技股份有限公司 | Probe card device |
| CN110165442B (en) * | 2018-02-12 | 2020-11-03 | 泰达电子股份有限公司 | Metal block welding column combination and power module applying same |
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