CN100581269C

CN100581269C - Displaying device and video signal wall therewith

Info

Publication number: CN100581269C
Application number: CN200410059437A
Authority: CN
Inventors: 杨忠义; 何朝庆
Original assignee: Delta Optoelectronics Inc
Current assignee: Delta Electronics Inc; Delta Optoelectronics Inc
Priority date: 2004-06-22
Filing date: 2004-06-22
Publication date: 2010-01-13
Anticipated expiration: 2024-06-22
Also published as: CN1713735A

Abstract

The invention features a technique that transmits video signal by using differential digital signal to next display unit. The A/D converter in traditional circuit structure can not provide material- enabling signal, and the video amplifying chip providing material-enabling signal has some problem in resolution and time delay. The invention solves the problem above.

Description

Display unit and video information wall with this display unit

Technical field

The video information wall that the present invention relates to a kind of display unit and have this display unit, particularly relate to a kind of with differential digital signal transmission of video signal to the display unit of next display unit and video information wall with this display unit.

Background technology

In recent years, because the size of indivedual display unit has arrived the development limit,, show that wall (Display Wall) and video information wall (Video Wall) have been widely used in large-scale exhibition hall and public place at large-scale demonstration demand.Video information wall be with several display unit merge arrange and wherein each display unit choose the maximum picture that corresponding part viewing area is enlarged into this display unit according to its position of arranging, merge and arrange the common complete input video signal that shows of all display unit of back.

Because video information wall is a majority display unit to be merged to arrange show a common video signal source, often faces two display unit mutually with computer digit video signal terminal such as DVI terminal serial connection between display unit, with the video signal of number format transmission from the output of video signal source.Yet (Data Enable, DE) signal is so that transmit data because the number format transmission must use so-called data activation.For producing above-described data enable signal, known its application circuit framework of display unit that is applied in video information wall is very complicated.

Seeing also shown in Figure 1ly, is the application sketch of the existing known video information wall of a typical case, comprises a video signal source 100 and most individual identical display unit (Display Cube) 110,120,130 and 140 video information walls of being formed in this system.A video signal is sent in video signal source 100, this video signal can be computer simulation video signal (Analog RGB), minimum transition differential wave (Transition MinimizedDifferential Signaling, beneath abbreviation TMDS) or videl signal (Video) etc.In this example, this video information wall comprises four identical display unit 110,120,130 and 140 altogether.Display unit 110 is selected one of them input video signal source by an input module 113, and the video signal display frame that is provided according to this signal source.And export the input module 123 of display unit 120 to the transmission of differential digital form through the input video signal that differential digital output module (TMDS Output) 115 will be selected.This display unit 120 is then according to the video signal display frame of this differential digital form.And the video signal transmission of this differential digital form is exported to the display unit 130 of next stage by its differential digital output module (TMDS Output) 125.

In like manner, display unit 130 is again according to the video signal display frame of the differential digital form that is received, and this video signal is passed to the display unit 140 of next stage.Utilize this transfer mode, four display unit in video information wall can receive the video signal that video signal source 100 is sent.And each display unit is again according to its position of arranging, and the part picture (being original picture 1/4 size in this example) of choosing correspondence position in the video pictures that it received is amplified to the full frame size of display unit.As picture mosaic, four display unit picture displayed can be risked the complete picture of the video signal correspondence of sending in video signal source 100 thus, and this picture has been enlarged into four times big.

See also shown in Figure 2ly, be a kind of internal circuit calcspar of existing known display unit.This display unit comprises that 230, selector switches of 220, Video Decoders of 210, differential digital signal receivers of an analog/digital converter (A/D Converter) (TMDS Receiver) (Video Decoder) 235, first video amplify 250 and second videos of 240, differential digital signal transmitting apparatus of chip (Scalcr) (TMDS Transmitter) and amplify chips (Scaler) 260.

This analog/digital converter 210, differential digital signal receiver 220 are imported computer mould analog signal (Analog RGB), differential digital signal (TMDS) and videl signal (Video) in order to receive respectively with Video Decoder 230.Wherein, selector switch 235 is in order to select analog/digital converter 210 and differential digital signal receiver 220 both one of them synchronous sequence signals of being exported.This output synchronous sequence signal comprises a time pulse signal (CLK), a horizontal synchronization signal (H-Sync), a vertical synchronizing signal (V-Sync), still comprises data activation (DataEnable, DE) signal for the differential digital signal receiver.Then be sent to the computer video input port (G-Port) 242 that first video amplifies chip 240 via selector switch 235 selected synchronous sequence signals.The synchronous sequence signal that Video Decoder 230 is exported then is connected directly to the video input port (V-Port) 244 that first video amplifies chip 240.

First video amplifies that chip 240 is inner select one of them videl signal of computer videos input ports 242 and video input port 244 to handle after, show that by one output port (D-Port) 246 exports the processed video signal to differential digital signal transmitting apparatus 250 simultaneously and amplify chip 260 with video.And differential digital signal transmitting apparatus 250 is in order to transfer to videl signal the display unit of next stage.Video amplifies the zone that chip 260 then can be chosen corresponding required demonstration according to the position that display unit is arranged, and amplifies the display element (not illustrating) that shows to display unit.

As shown in Figure 2, existing known its inside of display unit comprises that altogether two videos amplify chips (Scaler), and wherein this video amplifies chip and also is called sometimes at generic-document and scans transducer (ScanConverter).In the design of side circuit, above-mentioned display unit replaces two above-mentioned videos with high speed programmable logic array (FPGA) sometimes and amplifies chip.No matter be that video amplifies chip, scans transducer or high speed programmable logic array, its function is identical under this application architecture.Simultaneously, in order to receive and transmission differential numeral (Differential Signaling, " DS ") the differential digital signal transmitting apparatus 250 and differential digital signal receiver 220 of video signal of form, can be minimum transition differential wave (TMDS) or low-voltage differential signal (Low Voltage Differential Signaling, beneath abbreviation LVDS).No matter but with TMDS or LVDS transmission signals, differential digital signal transmitting apparatus 250 all needs a data activation, and (Data Enable, DE) signal can operate.

Yet industry generally can obtain and be applied to the analog/digital conversion element of Video processing at present, the for example AD9884 of Analog Device Inc. or the ICS1531 of Integrated Circuit System Inc. or the TDA8752 of Philips, it is as analog/digital converter among Fig. 2 210, and the synchronous sequence signal of its output does not comprise the data enable signal.And other input video corresponding circuits, as differential digital signal and videl signal, then all exportable data enable signal.Just because the synchronous sequence signal of analog/digital converter output does not comprise the data enable signal, therefore, again will be after needs first video amplification chip 240 is handled the videl signal that receives via showing that output port (D-Port) 246 produces the new one group of synchronous sequence signal that comprises the data enable signal.

As its circuit framework of display unit of above-mentioned Fig. 2, be a very complicated design, must be controlled and be set because there are two videos to amplify chip in this system.Generally speaking, amplify the videl signal of the demonstration output port output of chip by video, its resolution is fixed, and for example is the 1024X768 picture element.For videl signal greater than this resolution, for example be the 1280X1024 picture element, be to amplify chip through video will desire just to export after the display image compression and transfer to next display unit.Therefore, after amplifying the chip processing through first video, thereafter the received videl signal of all display unit, all be resolution (1024X768) after overcompression but not the resolution (1280X1024) of video signal source output video signal originally, this result causes the last whole sacrifice that shows image quality.

Display unit shown in Figure 2, its another shortcoming is that the Video processing of video amplification chip has a time of delay, through series signal serial connection, under the videl signal of dynamic menu, might find out the different shape of the picture that produces this time of delay (Artifact) in different display unit.

This shows, above-mentioned existing display unit and video information wall with this display unit structure with use, obviously still have inconvenience and defective, and demand urgently further being improved.In order to solve the problem that display unit and video information wall exist, relevant manufacturer there's no one who doesn't or isn't seeks solution painstakingly, but do not see always that for a long time suitable design finished by development, and common product does not have appropriate structure to address the above problem, and this obviously is the problem that the anxious desire of relevant dealer solves.

Because above-mentioned existing display unit and have the defective that the video information wall of this display unit exists, the inventor is based on being engaged in this type of product design manufacturing abundant for many years practical experience and professional knowledge thereof, and the utilization of cooperation scientific principle, actively studied innovation, in the hope of display unit of founding a kind of new structure and video information wall with this display unit, expose a kind of new circuit framework, can simplify its circuit framework of traditional display unit, can solve simultaneously and the disappearance of improving above-mentioned display unit and video information wall, make it have more practicality.Through constantly research, design, and after studying sample and improvement repeatedly, create the present invention who has practical value finally.

Summary of the invention

The objective of the invention is to, overcome the defective that existing display unit exists, and provide a kind of display unit of new structure, technical problem to be solved is to make display unit of the present invention add a data enable signal generator, and the synchronous sequence signal that can solve analog/digital converter output does not comprise the problem of data enable signal.In addition, framework of the present invention, do not need to amplify chip as another traditional video, therefore, can avoid in the conventional architectures through after the processing of video amplification chip, thereafter the received videl signal of all display unit all is resolution after overcompression but not the problem of the resolution of video signal source output video signal originally.Therefore, can the influential whole situation that shows image quality.In addition, do not have problem time of delay of amplifying the Video processing of chip in the conventional architectures through video yet, and can avoid different display unit to find out the problem of the different shape of the picture that produces this time of delay (Artifact), thereby be suitable for practicality more.

Another object of the present invention is to, overcome the defective that existing video information wall with this display unit exists, and provide a kind of video information wall of new structure with this display unit, technical problem to be solved is to make display unit of the present invention add a data enable signal generator, and the synchronous sequence signal that can solve analog/digital converter output does not comprise the problem of data enable signal.In addition, framework of the present invention, do not need to amplify chip as another traditional video, therefore, can avoid in the conventional architectures through after the processing of video amplification chip, thereafter the received videl signal of all display unit all is resolution after overcompression but not the problem of the resolution of video signal source output video signal originally.Therefore, can the influential whole situation that shows image quality.In addition, do not have problem time of delay of amplifying the Video processing of chip in the conventional architectures through video yet, and can avoid different display unit to find out the problem of the different shape of the picture that produces this time of delay (Artifact), thereby be suitable for practicality more.

A further object of the present invention is, overcome the defective that existing display unit exists, and provide a kind of display unit of new structure, technical problem to be solved is to make display unit of the present invention increase a video signal process of frequency multiplication device newly, then promote the image quality of videl signal, and the videl signal of subsequent transmission is unified the color space is RGB.Therefore, after can avoiding in the conventional architectures amplifying chip and handling through video, the received videl signal of all display unit thereafter all is resolution after overcompression but not the problem of the resolution of video signal source output video signal originally.In addition, do not have problem time of delay of amplifying the Video processing of chip in the conventional architectures through video yet, and can avoid different display unit to find out the problem of the different shape of the picture that produces this time of delay (Artifact), thereby be suitable for practicality more.

An also purpose of the present invention is, overcome the defective that existing display unit exists, and provide a kind of display unit of new structure, technical problem to be solved is that each included assembly of display unit of the present invention is controlled by a microcontroller (MICRO-CONTROLLER), this microcontroller also couples an internal memory, and this internal memory is in order to store the detailed data of each clock signal.For the computer simulation input signal, when the sequential format of input signal has been determined, microcontroller reads the relevant detailed data of this clock signal from internal memory, and controls the operation of each assembly, comprises that control data enable signal generator produces the data enable signal.Therefore, after can avoiding in the conventional architectures amplifying chip and handling through video, the received videl signal of all display unit thereafter all is resolution after overcompression but not the problem of the resolution of video signal source output video signal originally.In addition, do not have problem time of delay of amplifying the Video processing of chip in the conventional architectures through video yet, and can avoid different display unit to find out the problem of the different shape of the picture that produces this time of delay (Artifact), thereby be suitable for practicality more.

The object of the invention to solve the technical problems realizes by the following technical solutions.A kind of display unit according to the present invention proposes is applicable to a video information wall, and it comprises: an analog/digital converter, in order to receiving an analog video signal, and export one first shows signal and one first demonstration clock signal according to this; One differential digital signal receiver in order to receiving a differential digital signal, and is exported one second shows signal and one second according to this and is shown clock signal; One data enable signal generator connects this analog/digital converter, first shows clock signal in order to this that receives that this analog/digital converter exports, and output according to this has one the 3rd of a data actuating signal and shows clock signal; One selector switch, input connect this data enable signal generator and this differential digital signal receiver, in order to select this second show clock signal, the 3rd show clock signal one of them, and export one the 4th according to this and show clock signal; One differential digital signal transmitting apparatus is connected to the output of this selector switch and analog/digital converter, shows clock signal in order to transmit the 4th, and optionally transmit this first shows signal and this second shows signal one of them; And one video amplify chip, show clock signal in order to receive the 4th, and optionally receive this first shows signal and this second shows signal one of them, and according to this as the shown picture of this display unit.

The object of the invention to solve the technical problems also can be applied to the following technical measures to achieve further.

Aforesaid display unit, wherein more comprise a Video Decoder, in order to receive a videl signal, and export one the 3rd shows signal and the 5th according to this and show clock signal, wherein the 5th shows that clock signal is sent to this selector switch, this selector switch then according to this second show clock signal, the 3rd show clock signal and the 5th show clock signal one of them, and export the 4th demonstration clock signal according to this.

Aforesaid display unit wherein more comprises: a Video Decoder, in order to receiving a videl signal, and export a video signal switching signal and a video signal clock signal according to this; One video signal process of frequency multiplication device, be connected to this Video Decoder, in order to receive this video signal switching signal and this video signal clock signal, and after this video signal switching signal carried out a video signal process of frequency multiplication, be converted to one the 4th shows signal and the 6th and show clock signal, wherein the 6th shows that clock signal is sent to this selector switch, this selector switch then according to this second show clock signal, the 3rd show clock signal and the 6th show clock signal one of them, and export the 4th demonstration clock signal according to this.

Aforesaid display unit, wherein said video signal process of frequency multiplication are to have this video signal switching signal of one first color space form, to be converted to the 4th shows signal with one second color space form.

Aforesaid display unit, this video signal switching signal that wherein has this first color space form are one to have the videl signal of alternate-line scanning, and the 4th shows signal of this second color space form is one to have the videl signal that scans line by line.

Aforesaid display unit, wherein this first color space form is a yuv format.

Aforesaid display unit, wherein this second color space form is a rgb format.

Aforesaid display unit, wherein more comprise a microcontroller, be couple to this data enable signal generator, this microcontroller is in order to receive this analog video signal, and judge the sequential form of back according to this according to this analog video signal, control this data enable signal generator and produce this data actuating signal.

Aforesaid display unit, wherein more comprise an internal memory, be couple to this microcontroller, after this microcontroller receives this analog video signal, judge this sequential format of this analog video signal according to this according to the stored data of this internal memory, and according in this internal memory corresponding to most sequential setup parameters of this sequential format, control this data enable signal generator and produce this data actuating signal.

Aforesaid display unit, wherein said differential digital signal be a minimum transition differential wave (Transition Minimized Differential Signaling, TMDS).

Aforesaid display unit, wherein said differential digital signal be a low-voltage differential signal (LowVoltage Differential Signaling, LVDS).

The object of the invention to solve the technical problems also adopts following technical scheme to realize.A kind of display unit according to the present invention proposes is applicable to a video information wall, and it comprises: an analog/digital converter, in order to receiving an analog video signal, and export according to this one first shows signal with have a data actuating signal one first show clock signal; One differential digital signal receiver in order to receiving a differential digital signal, and is exported one second shows signal and one second according to this and is shown clock signal; One selector switch, input connect this analog/digital converter and this differential digital signal receiver, in order to select this first show clock signal with this second show clock signal one of them, and export one the 3rd demonstration clock signal according to this; One differential digital signal transmitting apparatus is connected to the output of this selector switch and analog/digital converter, shows clock signal in order to transmit the 3rd, and optionally transmit this first shows signal and this second shows signal one of them; And one video amplify chip, show clock signal in order to receive the 3rd, and optionally receive this first shows signal and this second shows signal one of them, and according to this as the shown picture of this display unit.

Aforesaid display unit, wherein more comprise a Video Decoder, in order to receive a videl signal, and export one the 3rd shows signal and the 4th according to this and show clock signal, wherein the 4th shows that clock signal is sent to this selector switch, this selector switch then according to this first show clock signal, this second show clock signal and the 4th show clock signal one of them, and export the 3rd demonstration clock signal according to this.

Aforesaid display unit wherein more comprises: a Video Decoder, in order to receiving a videl signal, and export a video signal switching signal and a video signal clock signal according to this; One video signal process of frequency multiplication device, be connected to this Video Decoder, in order to receive this video signal switching signal and this video signal clock signal, and after this video signal switching signal carried out a video signal process of frequency multiplication, be converted to one the 4th shows signal and the 5th and show clock signal, wherein the 5th shows that clock signal is sent to this selector switch, this selector switch then according to this first show clock signal, this second show clock signal and the 5th show clock signal one of them, and export the 3rd demonstration clock signal according to this.

Aforesaid display unit, wherein this first color space form is a yuv format.

Aforesaid display unit, wherein this second color space form is a rgb format.

Aforesaid display unit, wherein it more comprises a microcontroller, is couple to this analog/digital converter, and this microcontroller is in order to receive this analog video signal, and judge the sequential form of back according to this according to this analog video signal, control this analog/digital converter and produce this data actuating signal.

Aforesaid display unit, wherein more comprise an internal memory, be couple to this microcontroller, after this microcontroller receives this analog video signal, judge this sequential format of this analog video signal according to this according to the stored data of this internal memory, and according in this internal memory corresponding to most sequential setup parameters of this sequential format, control this analog/digital converter and produce this data actuating signal.

The object of the invention to solve the technical problems also adopts following technical scheme to realize.A kind of video information wall according to the present invention's proposition, it has most display unit, wherein those display unit connect with series system, and each this display unit has a differential digital signal receiver and a differential digital signal transmitting apparatus, this differential digital signal receiver, in order to receive the differential digital signal that this display unit transmitted of adjacent with it upper level, and transmit this display unit that this differential digital signal is given next stage via this differential digital signal transmitting apparatus, wherein first display unit of the display unit of those series connection more comprises: an analog/digital converter, in order to receiving an analog video signal, and export one first shows signal and one first according to this and show clock signal; One data enable signal generator connects this analog/digital converter, first shows clock signal in order to this that receives that this analog/digital converter exports, and output according to this has one second of a data actuating signal and shows clock signal; One selector switch, input connects this differential digital signal receiver of this data enable signal generator and this first display unit, in order to select this second to show a clock pulse signal that clock signal or this differential digital signal that is received by this differential digital signal receiver had both one of them, and export one the 3rd according to this and show clock signal, and this differential digital signal transmitting apparatus of this first display unit is connected to the output of this selector switch, show clock signal in order to transmit the 3rd, and optionally transmit this shows signal that this differential digital signal of this first display unit had and this first shows signal one of them and be sent to this display unit of next stage; And one video amplify chip, show clock signal in order to receive the 3rd, and optionally receive this shows signal that this differential digital signal had and this first shows signal one of them, and according to this as the shown picture of this first display unit.

Aforesaid video information wall, wherein more comprise a Video Decoder, in order to receive a videl signal, and export one the 3rd shows signal and the 4th according to this and show clock signal, wherein the 4th shows that clock signal is sent to this selector switch, this selector switch then according to this second show this clock signal that clock signal or this differential digital signal that is received by this differential digital signal receiver had, with the 4th show clock signal one of them, and export the 3rd according to this and show clock signal.

Aforesaid video information wall wherein more comprises: a Video Decoder, in order to receiving a videl signal, and export a video signal switching signal and a video signal clock signal according to this; One video signal process of frequency multiplication device, be connected to this Video Decoder, in order to receive this video signal switching signal and this video signal clock signal, and after this video signal switching signal carried out a video signal process of frequency multiplication, be converted to one the 3rd shows signal and the 5th and show clock signal, wherein the 5th shows that clock signal is sent to this selector switch, this selector switch then second shows this clock signal that clock signal or this differential digital signal that is received by this differential digital signal receiver are had according to this, with the 5th show clock signal one of them, and export the 3rd according to this and show clock signal.

Aforesaid video information wall, wherein said video signal process of frequency multiplication are to have this video signal switching signal of one first color space form, to be converted to the 3rd shows signal with one second color space form.

Aforesaid video information wall, this video signal switching signal that wherein has this first color space form are one to have the videl signal of alternate-line scanning, and the 3rd shows signal of this second color space form is one to have the videl signal that scans line by line.

Aforesaid video information wall, wherein this first color space form is a yuv format.

Aforesaid video information wall, wherein this second color space form is a rgb format.

Aforesaid video information wall, wherein more comprise a microcontroller, be couple to this data enable signal generator, this microcontroller is in order to receive this analog video signal, and judge the sequential form of back according to this according to this analog video signal, control this data enable signal generator and produce this data actuating signal.

Aforesaid video information wall, wherein more comprise an internal memory, be couple to this microcontroller, after this microcontroller receives this analog video signal, judge this sequential format of this analog video signal according to this according to the stored data of this internal memory, and according in this internal memory corresponding to most sequential setup parameters of this sequential format, control this data enable signal generator and produce this data actuating signal.

Aforesaid video information wall, wherein said differential digital signal be a minimum transition differential wave (Transition Minimized Differential Signaling, TMDS).

Aforesaid video information wall, wherein said differential digital signal be a low-voltage differential signal (LowVoltage Differential Signaling, LVDS).

The object of the invention to solve the technical problems also adopts following technical scheme to realize.A kind of video information wall according to the present invention's proposition, it has most display unit, wherein those display unit connect with series system, and each this display unit has a differential digital signal receiver and a differential digital signal transmitting apparatus, this differential digital signal receiver, in order to receive the differential digital signal that this display unit transmitted of adjacent with it upper level, and transmit this display unit that this differential digital signal is given next stage via this differential digital signal transmitting apparatus, wherein first display unit of the display unit of those series connection more comprises: an analog/digital converter, in order to receiving an analog video signal, and output according to this has one first shows signal and one first demonstration clock signal of a data actuating signal; One selector switch, input connects this differential digital signal receiver of this analog/digital converter and this first display unit, in order to select this first to show a clock pulse signal that clock signal or this differential digital signal that is received by this differential digital signal receiver had both one of them, and export one second according to this and show clock signal, and this differential digital signal transmitting apparatus of this first display unit is connected to the output of this selector switch, second show clock signal in order to transmit this, and optionally transmit this shows signal that this differential digital signal of this first display unit had and this first shows signal one of them and be sent to this display unit of next stage; And one video amplify chip, in order to receive this second demonstration clock signal, and optionally receive this shows signal that this differential digital signal had and this first shows signal one of them, and according to this as the shown picture of this first display unit.

Aforesaid video information wall, wherein more comprise a Video Decoder, in order to receive a videl signal, and export one second shows signal and the 3rd according to this and show clock signal, wherein the 3rd shows that clock signal is sent to this selector switch, this selector switch then according to this first show this clock signal that clock signal or this differential digital signal that is received by this differential digital signal receiver had, with the 3rd show clock signal one of them, and export this according to this and second show clock signal.

Aforesaid video information wall wherein more comprises: a Video Decoder, in order to receiving a videl signal, and export a video signal switching signal and a video signal clock signal according to this; One video signal process of frequency multiplication device, be connected to this Video Decoder, in order to receive this video signal switching signal and this video signal clock signal, and after this video signal switching signal carried out a video signal process of frequency multiplication, be converted to one the 3rd shows signal and the 4th and show clock signal, wherein the 4th shows that clock signal is sent to this selector switch, this selector switch then first shows this clock signal that clock signal or this differential digital signal that is received by this differential digital signal receiver are had according to this, with the 4th show clock signal one of them, and export this according to this and second show clock signal.

Aforesaid video information wall, wherein said video signal process of frequency multiplication are to have this video signal switching signal of one first color space form, to be converted to the 3rd shows signal with second color space form.

Aforesaid video information wall, wherein more comprise a microcontroller, be couple to this analog/digital converter, this microcontroller is in order to receive this analog video signal, and judge the sequential form of back according to this according to this analog video signal, control this analog/digital converter and produce this data actuating signal.

Aforesaid video information wall, wherein more comprise an internal memory, be couple to this microcontroller, after this microcontroller receives this analog video signal, judge this sequential format of this analog video signal according to this according to the stored data of this internal memory, and according in this internal memory corresponding to most sequential setup parameters of this sequential format, control this analog/digital converter and produce this data actuating signal.

The present invention compared with prior art has tangible advantage and beneficial effect.By above technical scheme as can be known, in order to reach aforementioned goal of the invention, major technique of the present invention thes contents are as follows:

For reaching above-mentioned goal of the invention, the video information wall that the present invention proposes a kind of display unit and has this display unit.In this display unit, because added a data enable signal generator, the synchronous sequence signal that can solve analog/digital converter output does not comprise the problem of data enable signal.In addition, framework of the present invention, do not need to amplify chip as another traditional video, therefore, can avoid in the conventional architectures through after the processing of video amplification chip, thereafter the received videl signal of all display unit all is resolution after overcompression but not the problem of the resolution of video signal source output video signal originally.Therefore, can the influential whole situation that shows image quality.In addition, do not have problem time of delay of amplifying the Video processing of chip in the conventional architectures through video yet, and can avoid different display unit to find out the problem of the different shape of the picture that produces this time of delay (Artifact).

And select among the embodiment one, newly-increased in addition video signal process of frequency multiplication device then promotes the image quality of videl signal, and the videl signal of subsequent transmission is unified the color space is RGB.

In addition, in the above-described embodiments, each included element of this display unit is controlled by a microcontroller (MICRO-CONTROLLER), and this microcontroller also couples an internal memory, and this internal memory is in order to store the detailed data of each clock signal.For the computer simulation input signal, when the sequential format of input signal has been determined, microcontroller reads the relevant detailed data of this clock signal from internal memory, and controls the operation of each element, comprises that control data enable signal generator produces the data enable signal.

For reaching above-mentioned goal of the invention, the present invention also proposes a kind of analog/digital converter in order to reception analog video signal, and exports one first shows signal and one first demonstration clock signal according to this.In order to a differential digital signal receiver of reception differential digital signal, and export one second shows signal and one second demonstration clock signal according to this.A data enable signal generator that connects analog/digital converter first shows clock signal in order to what receive that analog/digital converter exports, and output according to this has one the 3rd of a data actuating signal and shows clock signal.A selector switch that connects data enable signal generator and differential digital signal receiver, in order to select second show clock signal, the 3rd show clock signal one of them, and export one the 4th demonstration clock signal according to this.Be connected to a differential digital signal transmitting apparatus of selector switch, show clock signal in order to transmit the 4th, and optionally transmit first shows signal and second shows signal one of them; And one show that in order to receive the 4th the video of clock signal amplifies chip, optionally receive first shows signal and second shows signal one of them, and according to this as the shown picture of display unit.

Above-mentioned display unit, wherein more comprise one in order to receive the Video Decoder of a videl signal, and export one the 3rd shows signal and the 5th according to this and show clock signal, wherein the 5th shows that clock signal is sent to selector switch, selector switch then according to second show clock signal, the 3rd show clock signal and the 5th show clock signal one of them, export the 4th demonstration clock signal according to this.

More comprise in the above-mentioned display unit: one in order to receive the Video Decoder of a videl signal, exports a video signal switching signal and a video signal clock signal according to this; An and video signal process of frequency multiplication device that is connected to Video Decoder, in order to receiving video switching signal and video signal clock signal, and after the video signal switching signal carried out the video signal process of frequency multiplication, be converted to one the 4th shows signal and the 6th and show clock signal, wherein the 6th shows that clock signal is sent to selector switch, selector switch then according to second show clock signal, the 3rd show clock signal and the 6th show clock signal one of them, export the 4th demonstration clock signal according to this.

Video signal process of frequency multiplication in the above-mentioned display unit is the 4th shows signal that has second color space form with having the video signal switching signal of one first color space form, being converted to.And the video signal switching signal that wherein has first color space form is one to have the videl signal of alternate-line scanning, and the 4th shows signal of second color space form is one to have the videl signal that scans line by line.At this first color space form is yuv format; Second color space form is a rgb format.

In the above-mentioned display unit, it comprises that more one is couple to the microcontroller of data enable signal generator, in order to reception analog video signal, and judge the sequential form of back according to the analog video signal according to this, control data enable signal generator produces data actuating signal.And comprise that one is couple to the internal memory of microcontroller, after microcontroller receives the analog video signal, judge the sequential format of analog video signal according to this according to the stored data of internal memory, and according in the internal memory corresponding to most sequential setup parameters of sequential format, control data enable signal generator produces data actuating signal.

Above-mentioned display unit, wherein the differential digital signal is a minimum transition differential wave (Transition Minimized Differential Signaling, TMDS) or a low-voltage differential signal (Low Voltage Differential Signaling, LVDS).

The present invention provides a kind of video information wall again, it has most display unit, wherein these display unit connect with series system, and each display unit has a differential digital signal receiver and a differential digital signal transmitting apparatus, the differential digital signal receiver, in order to receive the differential digital signal that display unit transmitted of adjacent with it upper level, and via the display unit of differential digital signal transmitting apparatus transmission differential digital signal to next stage, wherein first display unit of the display unit of these series connection more comprises above-mentioned described display unit provided by the present invention.

The present invention provides a kind of display unit that is applicable to a video information wall again, comprising: an analog/digital converter in order to reception analog video signal, and export one first shows signal and one first demonstration clock signal according to this with a data actuating signal.In order to a differential digital signal receiver of reception differential digital signal, and export one second shows signal and one second demonstration clock signal according to this.A selector switch that connects analog/digital converter and differential digital signal receiver, in order to select first show the clock signal and the second demonstration clock signal one of them, and export one the 3rd demonstration clock signal according to this.Be connected to a differential digital signal transmitting apparatus of selector switch, show clock signal in order to transmit the 3rd, and optionally transmit first shows signal and second shows signal one of them; And one show that in order to receive the 3rd the video of clock signal amplifies chip, optionally receive first shows signal and second shows signal one of them, and according to this as the shown picture of display unit.

Above-mentioned display unit, wherein more comprise one in order to receive the Video Decoder of a videl signal, and export one the 3rd shows signal and the 4th according to this and show clock signal, wherein the 4th shows that clock signal is sent to selector switch, selector switch then according to first show clock signal, second show clock signal and the 4th show clock signal one of them, export the 3rd demonstration clock signal according to this.

More comprise in the above-mentioned display unit: one in order to receive the Video Decoder of a videl signal, exports a video signal switching signal and a video signal clock signal according to this; An and video signal process of frequency multiplication device that is connected to Video Decoder, in order to receiving video switching signal and video signal clock signal, and after the video signal switching signal carried out the video signal process of frequency multiplication, be converted to one the 4th shows signal and the 5th and show clock signal, wherein the 5th shows that clock signal is sent to selector switch, selector switch then according to first show clock signal, second show clock signal and the 5th show clock signal one of them, export the 3rd demonstration clock signal according to this.

Video signal process of frequency multiplication in the above-mentioned display unit is the 4th shows signal that has one second color space form with having the video signal switching signal of one first color space form, being converted to.And the video signal switching signal that wherein has first color space form is one to have the videl signal of alternate-line scanning, and the 4th shows signal of second color space form is one to have the videl signal that scans line by line.At this first color space form is yuv format; Second color space form is a rgb format.

Comprise more in the above-mentioned display unit that one is couple to the microcontroller of analog/digital converter, in order to reception analog video signal, and judge the sequential form of back according to the analog video signal according to this, the control analog/digital converter produces data actuating signal.And comprise that one is couple to the internal memory of microcontroller, after microcontroller receives the analog video signal, judge the sequential format of analog video signal according to this according to the stored data of internal memory, and according in the internal memory corresponding to most sequential setup parameters of sequential format, the control analog/digital converter produces data actuating signal.

The present invention also provides a kind of video information wall, have most display unit, wherein these display unit connect with series system, and each display unit has a differential digital signal receiver and a differential digital signal transmitting apparatus, the differential digital signal receiver, in order to receive the differential digital signal that display unit transmitted of adjacent with it upper level, and via the display unit of differential digital signal transmitting apparatus transmission differential digital signal to next stage, wherein first display unit of the display unit of these series connection more comprises above-mentioned described display unit provided by the present invention.

The present invention also proposes a kind of chromacoder that is applicable to a display unit, wherein display unit is in order to receive an analog video signal, this chromacoder is to comprise: an analog/digital converter in order to reception analog video signal, and export one first shows signal and one first demonstration clock signal according to this.An and data enable signal generator, connect analog/digital converter, in order to receive the first demonstration clock signal that analog/digital converter is exported, and output according to this has one second demonstration clock signal of a data actuating signal, wherein the data enable signal produces device and receives most the time sequence parameters about the sequential format of analog video signal simultaneously, and data actuating signal is to show that according to first a clock pulse signal, horizontal-drive signal and a vertical synchronizing signal of clock signal and most the time sequence parameters about a sequential form of analog video signal produce.

Above-mentioned chromacoder, more comprise a microcontroller and an internal memory, microcontroller is couple to data enable signal generator and internal memory, in order to receive the analog video signal and to discern a sequential form of analog video signal, microcontroller is obtained most time sequence parameters of relevant sequential format and is transmitted these most time sequence parameters to data enable signal generator from internal memory simultaneously, and data enable signal generator also produces data actuating signal according to this.

In the above-mentioned chromacoder, its data actuating signal be with by a horizontal enable signal with in be embedded to the compound signal that a vertical enable signal of horizontal enable signal is formed, wherein horizontal enable signal is according to first clock signal that shows clock signal and horizontal-drive signal and about most timing sequence generating of horizontal-drive signal, and vertical enable signal is produced by horizontal enable signal and most individual parameters about vertical synchronizing signal.

The present invention also proposes a kind of video information wall in addition, has most display unit, wherein has at least a display unit to have above-mentioned chromacoder in order to receive the analog video signal.

The present invention is applied to the display unit that video information wall has chromacoder because of employing, complexity that therefore can simplified system, and reduce time of delay, and the sequential format of video signal source output need not compressed, so resolution can not change.

Via as can be known above-mentioned, the video information wall that the invention relates to a kind of display unit and have this display unit, and be meant especially with the technology of differential digital signal transmission of video signal to next display unit.Because of the analog/digital converter in the traditional circuit framework does not provide the data enable signal, and the video that the data enable signal is provided amplifies chip problems such as resolution and time of delay, therefore the invention provides a kind of chromacoder, with a kind of display unit, and the video information wall with this display unit or chromacoder replaces the line architecture that tradition is used video amplification chip, with the simplified system complexity, and can solve problems such as resolution and time of delay.

In sum, the display unit of special construction of the present invention and video information wall with this display unit, it has added a data enable signal generator in display unit, and the synchronous sequence signal that can solve analog/digital converter output does not comprise the problem of data enable signal.In addition, framework of the present invention, do not need to amplify chip as another traditional video, therefore, can avoid in the conventional architectures through after the processing of video amplification chip, thereafter the received videl signal of all display unit all is resolution after overcompression but not the problem of the resolution of video signal source output video signal originally.Therefore, can the influential whole situation that shows image quality.In addition, do not have problem time of delay of amplifying the Video processing of chip in the conventional architectures through video yet, and can avoid different display unit to find out the problem of the different shape of the picture that produces this time of delay (Artifact), thereby be suitable for practicality more.

The display unit of special construction of the present invention and the video information wall with this display unit, its display unit increases a video signal process of frequency multiplication device newly, then can promote the image quality of videl signal, and the videl signal of subsequent transmission is unified the color space is RGB.Therefore, after can avoiding in the conventional architectures amplifying chip and handling through video, the received videl signal of all display unit thereafter all is resolution after overcompression but not the problem of the resolution of video signal source output video signal originally.In addition, do not have problem time of delay of amplifying the Video processing of chip in the conventional architectures through video yet, and can avoid different display unit to find out the problem of the different shape of the picture that produces this time of delay (Artifact), thereby be suitable for practicality more.

The display unit of special construction of the present invention and video information wall with this display unit, each included assembly of its display unit is controlled by a microcontroller (MICRO-CONTROLLER), this microcontroller also couples an internal memory, and this internal memory is in order to store the detailed data of each clock signal.For the computer simulation input signal, when the sequential format of input signal has been determined, microcontroller reads the relevant detailed data of this clock signal from internal memory, and controls the operation of each assembly, comprises that control data enable signal generator produces the data enable signal.Therefore, after can avoiding in the conventional architectures amplifying chip and handling through video, the received videl signal of all display unit thereafter all is resolution after overcompression but not the problem of the resolution of video signal source output video signal originally.In addition, do not have problem time of delay of amplifying the Video processing of chip in the conventional architectures through video yet, and can avoid different display unit to find out the problem of the different shape of the picture that produces this time of delay (Artifact), thereby be suitable for practicality more.

The display unit of special construction of the present invention and video information wall with this display unit, it has above-mentioned many advantages and practical value, and in like product, do not see have similar structural design to publish or use and really genus innovation, no matter it all has bigger improvement on apparatus structure or function, have large improvement technically, and produced handy and practical effect, and more existing display unit and video information wall have the multinomial effect of enhancement, thereby be suitable for practicality more, and have the extensive value of industry, really be a novelty, progressive, practical new design.

Above-mentioned explanation only is the general introduction of technical solution of the present invention, for can clearer understanding technological means of the present invention, and can be implemented according to the content of specification, and for above-mentioned and other purposes, feature and advantage of the present invention can be become apparent, below especially exemplified by going out a preferred embodiment, and conjunction with figs., be described in detail as follows.

Description of drawings

Fig. 1 is the schematic diagram of the simplification application circuit framework of video information wall.

Fig. 2 is the circuit block diagram that has traditional display unit now.

Fig. 3 is the circuit block diagram according to the display unit of a preferred embodiment of the present invention.

Fig. 4 is the circuit block diagram of the display unit of another preferred embodiment according to the present invention.

Fig. 5 is according in the embodiment of the invention, the circuit diagram that increases data enable signal generator after in order to the analog/digital converter that receives an input computer mould analog signal newly that is proposed.

Fig. 6 is the diagram schematic diagram of clock signal of the data enable signal generator of one embodiment of the invention.

Fig. 7 is the sequential schematic diagram of video data enable signal and horizontal-drive signal, vertical synchronizing signal.

Fig. 8 is the flow chart that a data actuating signal produces.

100: video signal source 110,120,130,140: display unit

113,123,133,143: the input module of display unit

115,125,135,145: the differential digital signal output module of display unit

210: analog/digital converter 220: the differential digital signal receiver

230: Video Decoder 235: selector switch

240: video amplifies chip 242: computer video input port

244: video input port 246: show output port

250: differential digital signal transmitting apparatus 260: video amplifies chip

310: analog/digital converter 320: the differential digital signal receiver

330: Video Decoder 315: data enable signal generator

335: selector switch 340: video signal process of frequency multiplication device

350: differential digital signal transmitting apparatus 360: video amplifies chip

370: internal memory 380: microcontroller

410: the analog/digital converter of tool data enable signal

420: differential digital signal receiver 430: Video Decoder

435: selector switch 440: video signal process of frequency multiplication device

450: differential digital signal transmitting apparatus 460: video amplifies chip

470: internal memory 480: microcontroller

515: data enable signal generator 510: analog/digital converter

520: microprocessor 530: internal memory

610: horizontal-drive signal (H-Sync) 620: vertical synchronizing signal (V-Sync)

630: horizontal data enable signal (H_DE) 640: vertical data enable signal (V_DE)

710: horizontal-drive signal (H-Sync) 720: vertical synchronizing signal (V-Sync)

730: data actuating signal (DE) 740:V_Blank district

Embodiment

Reach technological means and the effect that predetermined goal of the invention is taked for further setting forth the present invention, below in conjunction with accompanying drawing and preferred embodiment, display unit that foundation the present invention is proposed and its embodiment of video information wall, structure, feature and effect thereof with this display unit, describe in detail as after.

In one embodiment of this invention, the video information wall that proposes a kind of display unit and have this display unit.In the display unit of this embodiment, because added a data enable signal generator, the synchronous sequence signal that can solve analog/digital converter output does not comprise the problem of data enable signal.And in the framework of the present invention, do not need to amplify chip as another traditional video, video as shown in Figure 2 amplifies chip 240, therefore, can avoid in the conventional architectures through after the processing of video amplification chip, thereafter the received videl signal of all display unit all is resolution after overcompression but not the problem of the resolution of video signal source output video signal originally.Therefore, can the influential whole situation that shows image quality.In addition, do not have problem time of delay of amplifying the Video processing of chip in the conventional architectures through video yet, and can avoid different display unit to find out the problem of the different shape of the picture that produces this time of delay (Artifact).

And select among the embodiment one, newly-increased in addition video signal process of frequency multiplication device then can promote the image quality of videl signal, and the videl signal of subsequent transmission is unified the color space is RGB.

In addition, in one embodiment of this invention, each included element of this display unit is controlled by a microcontroller (MICRO-CONTROLLER), and this microcontroller also couples an internal memory, and this internal memory is in order to store the detailed data of each clock signal.For the computer simulation input signal, when the sequential format of input signal has been discerned when determining, microcontroller reads the relevant detailed data of this clock signal from internal memory, and controls the operation of each element, comprises that control data enable signal generator produces the data enable signal.That is to say, after microcontroller receives video signal, judge the sequential format of analog video signal according to this according to the stored data of internal memory, and according in the internal memory corresponding to most sequential setup parameters of sequential format, control data enable signal generator produces data actuating signal.

To illustrate in detail at various embodiments of the invention below.

Seeing also shown in Figure 3ly, is the schematic diagram according to the simplification application circuit framework of a kind of video information wall of a preferred embodiment of the present invention.This circuit framework comprises an analog/digital converter 310, differential digital signal receiver (TMDS Receiver) 320 and Video Decoders (VideoDecoder) 330, respectively in order to receive an input computer mould analog signal (Analog RGB), differential digital signal (TMDS) and videl signal (Video).Synchronous sequence signal in analog/digital converter 310 outputs comprises a time pulse signal (CLK), a horizontal synchronization signal (H-Sync) and a vertical synchronizing signal (V-Sync) signal.This synchronous sequence signal through data enable signal generator 315 produce data enable signals (Data Enable, DE) after, deliver to the input of selector switch 335 in the lump.

In an embodiment of the present invention, can add a video signal process of frequency multiplication device (De-Interlacer) 340 behind Video Decoder 330, its function is for carrying out the video signal process of frequency multiplication.Through after the video signal process of frequency multiplication, convert line by line the videl signal of original alternate-line scanning (Interlace) to scan (Progressive) videl signal.In addition, its another function is for changing into RGB with the color space (ColorSpace) by YUV simultaneously.

The synchronous sequence signal of 335 selections of selector switch after one of them is handled according to computer simulation video signal, differential digital signal (TMDS), videl signal (Video) exported an above-mentioned signal amplifies chip 360 to differential digital signal transmitting apparatus (TMDS Transmiter) 350 and video input at output.Wherein differential digital signal transmitting apparatus 350 is in order to transfer to videl signal next display unit, and video amplifies chip 360 and then can choose corresponding viewing area and amplify the display element (not illustrating among the figure) that shows to display unit according to the position that display unit is arranged.

As previously mentioned, because add data enable signal generator 315, the synchronous sequence signal that can solve analog/digital converter output does not comprise the problem of data enable signal.Among the selection embodiment in addition,, then can promote the image quality of videl signal, and the videl signal of subsequent transmission is unified the color space is RGB because add video signal process of frequency multiplication device 340.Also as previously mentioned, each element in this system is by 380 controls of a microcontroller (MICRO-CONTROLLER), and this microcontroller also couples an internal memory 370.This internal memory 370 is in order to store the detailed data of each clock signal.For example for the computer simulation input signal, when the sequential format of input signal has been discerned when determining, microcontroller reads the relevant detailed data of clock signal from internal memory, and control data enable signal generator 315 produces the data enable signals.

Circuit block diagram as shown in Figure 3 is clear as can be known, can save as the video among Fig. 2 and amplify chip 1.So significantly simplified the complexity of system design, and amplify chip one owing to save video, the sequential format of video signal source output video signal (comprising its resolution) is to be held and the consistent sequential format in former video signal source in all display unit transmittance processs, just transmits after can't being compressed at high-resolution input video.In addition, also amplify chip one, reduced the time of delay that signal is handled, improve signal serial connection through a sequence owing to save video, under the videl signal of dynamic menu, may find out the different shape of the picture that produces this time of delay (Artifact) in different display unit.

The dealer of nearest association area, proposition itself gets final product the analog/digital converter of supply data activation output signal, for example THC7216 of the TDA8754 of Philips or THinc.Use the analog/digital converter of this kind a new generation, circuit block diagram shown in Figure 3 can further be reduced to Fig. 4.See also shown in Figure 4, the circuit block diagram of another embodiment that discloses for the present invention, compare with circuit block diagram shown in Figure 3, Fig. 4 removes the data enable signal generator 315 among Fig. 3, the data enable signal that directly uses analog/digital converter 410 oneself to produce.Other parts are then identical with accompanying drawing 3.Comprise the analog/digital converter 410 of a tool data enable signal, differential digital signal receiver (TMDS Receiver) 420 and Video Decoders (VideoDecoder) 430 as the circuit framework of Fig. 4, respectively in order to receive an input computer mould analog signal (Analog RGB), differential digital signal (TMDS) and videl signal (Video).The synchronous sequence signal of analog/digital converter 410 output of tool data enable signal comprise a time pulse signal (CLK), a horizontal synchronization signal (H-Sync), vertical synchronizing signal (V-Sync) signal and data enable signal (DataEnable, DE).

In an embodiment of the present invention, can add a video signal process of frequency multiplication device (De-Interlacer) 440 behind Video Decoder 430, its function is for carrying out the video signal process of frequency multiplication.Through after the video signal process of frequency multiplication, convert line by line the videl signal of original alternate-line scanning (Interlace) to scan (Progressive) videl signal.In addition, its another function is for changing into RGB with the color space (ColorSpace) by YUV simultaneously.

The synchronous sequence signal of 435 selections of selector switch after one of them is handled according to computer simulation video signal, differential digital signal (TMDS), videl signal (Video) exported an above-mentioned signal amplifies chip 460 to differential digital signal transmitting apparatus (TMDS Transmiter) 450 and video input at output.Wherein differential digital signal transmitting apparatus 450 transfers to next display unit in order to will select one of the back videl signal, and video amplifies chip 460 and then can choose corresponding viewing area and amplify the display element (not illustrating among the figure) that shows to display unit according to the position that display unit is arranged.Each element in this system is by 480 controls of a microcontroller (MICRO-CONTROLLER), and this microcontroller also couples an internal memory 470.This internal memory 470 is in order to store the detailed data of each clock signal.

And in the embodiment of the invention according to Fig. 3, proposed in order to receive one the input computer mould analog signal (Analog RGB) analog/digital converter 310 after, newly-increased data enable signal generator 315, handle the synchronous sequence signal of output later at analog/digital converter 310, produce data enable signals (DE) through data enable signal generator 315, its detailed circuit diagram please refer to shown in Figure 5.

Seeing also shown in Figure 5ly, is according in the embodiment of the invention, the circuit diagram that increases data enable signal generator after in order to the analog/digital converter that receives an input computer mould analog signal newly that is proposed.This data enable signal generator 515 is the clock signals (CLK) that receive analog/digital converter 510 outputs), horizontal-drive signal (H_Sync)) with vertical synchronizing signal (V_Sync), and produce data enable signal (DE) according to this.In addition, microprocessor 520 is couple to data enable signal generator 515, and is couple to an internal memory 530, and this internal memory 530 stores the detail parameters that comprises all sequential signals (Timings).The input timing form of the video signal that microprocessor 520 shows according to the institute desire is obtained the detail parameters of relevant this input timing form, control and setting data enable signal generator 515 according to this from internal memory 530.At this moment, clock signal, horizontal-drive signal and the vertical synchronizing signal of detail parameters data that data enable signal generator 515 promptly provides according to microprocessor 520 and analog/digital converter 510 outputs produce the data enable signal.Data enable signal generator can be implemented with a high speed programmable logic array (FPGA) or coincidence counter (for example IC of 74F269 model) on real the work.And the detail parameters data how data enable signal generator 515 provides according to microprocessor 520 and clock signal, horizontal-drive signal and the vertical synchronizing signal of analog/digital converter 510 outputs, produce the data enable signal, then please refer to the embodiment among Fig. 6 and Fig. 7.And how data enable signal generator 515 produces the data enable signal, then please refer to the flow process of Fig. 8, be familiar with this skill person when flow process according to this with select for use element to produce this data actuating signal.

Seeing also shown in Figure 6ly, is the schematic diagram of a display timing generator signal.For the data enable signal is described, please refer to shown in Figure 6ly, 610 is a horizontal-drive signal (H-Sync), and 620 is a vertical synchronizing signal (V-Sync), and 630 is a horizontal data enable signal (H_DE), and 640 is a vertical data enable signal (V_DE).Wherein, the periodicity of this horizontal-drive signal 610 is horizontal cycle (H_Total) number, and unit is clock pulse (CLK).Horizontal data enable signal 630 falls behind 610 most clock pulse cycles of horizontal-drive signal, and these clock pulse cycles fall behind (H_Left) expression with a level, and its unit is clock pulse (CLK).Therefore, the effective video width of horizontal data enable signal (H_DE) (Active VideoWidth) is a horizontal width (H_Width) number, and its unit is clock pulse (CLK).And the cycle of vertical synchronizing signal 620 is vertical cycle (V_Total), and unit is scan line (Line).The vertical data enable signal falls behind most scan lines of vertical synchronizing signal, these scan lines vertically fall behind (V_Top) expression with one, unit is scan line (Line), the effective video width of its vertical data enable signal (V_DE) (Active Video Width) is a vertical height (V_Height), and unit is scan line (Line).

In one embodiment of the invention, be that vertical data enable signal (V_DE) is embedded in the horizontal data enable signal (H_DE), and replace with a data actuating signal (DE).In order to reach this purpose, see also shown in Figure 7ly, be the sequential schematic diagram of video data enable signal and horizontal-drive signal, vertical synchronizing signal.Wherein, 710 is a horizontal-drive signal (H-Sync), and 720 is a vertical synchronizing signal (V-Sync), and 730 is a data actuating signal (DE).Above-mentioned the vertical data enable signal is embedded in the horizontal data enable signal, be that horizontal data enable signal (H_DE) (is referred to as the V_Blank district in the narthex (Front-Porch) and back porch (Back-Porch) zone of vertical synchronizing signal, as 740 among the figure), the horizontal data enable signal is covered (promptly in the V_Blank district, DE is maintained low signal always).Data actuating signal like this promptly is loaded with and closes is the relevent information of vertical data activation and horizontal data activation.This data actuating signal is the data actuating signal described in the embodiment of the invention (DE).As previously mentioned, illustrated microprocessor 520 and the internal memory 530 thereof of Fig. 5.This internal memory 530 has promptly stored the detail parameters (as above-mentioned H_Total, V_Total, H_Left, H_Width, V_Top, V_Height or the like) of the sequential signal (Timings) of the video signal that all desires show.

Seeing also shown in Figure 8ly, is the flow chart how the data enable signal generator of one embodiment of the invention produces the data enable signal.At first,,, receive time sequence parameter and enabling signal, produce the data enable signal so that start from microprocessor according to aforementioned as step 805.Then, in step 810, the setting data enable signal is the state of a logic low (Low).In step 820, receive a vertical synchronizing signal (V-Sync), then begin counting and postpone V_Top horizontal synchronizing cycle, shown in step 830.Then in step 840, set a vertical bar counter.Afterwards, in

step

850 and 860, after the reception horizontal-drive signal, produce a data actuating signal.Then, as step 870, this vertical bar counter value adds one.Then, judge via step 880 whether the value of this vertical bar counter equals vertical height (V_Height) again, if, then get back to step 820, receive vertical synchronizing signal again, if not, then get back to step 850, receive next horizontal-drive signal.

And the generation data actuating signal in step 860 is then finished by many steps, comprises step 864, and counting and delay level fall behind (H_Left) individual clock pulse cycle.Then, as step 866, the setting data enable signal is logic high (High).Then, as step 868, counting also postpones several clock pulse (CLK) of horizontal width (H_Width).Then as step 869, the setting data enable signal is logic low (LOW).

Technology described in the embodiments of the invention can be applicable to show the display unit in wall (Display Wall) and the video information wall (Video Wall), and is meant especially with the technology of differential signal transmission videl signal to next display unit.Wherein said differential signal transmission (DifferentialSignaling) is not limited to TMDS (Transition Minimized DifferentialSignaling), also is applicable to LVDS (Low Voltage Differential Signaling).Because comprise that with its feature of differential signal transmission digital video (DataEnable, DE), and traditional analog/digital converter that is applied to the videl signal processing does not provide the data enable signal to strong dependence data enable signal.Therefore technical spirit of the present invention is that promptly generation or application data enable signal are in analog/digital converter.

Sum up the above, feature of the present invention comprises at least, for the analog/digital converter that the data enable signal is not provided, produce the data enable signal with a data enable signal generator, transmit the usefulness of differential digital signal for differential digital signal transmitting apparatus (DS Transmiter).When promptly providing the data enable signal, then directly use the data enable signal to transmit the usefulness of differential digital signal for the differential digital signal transmitting apparatus for analog/digital converter itself.And videl signal then adds the image quality that video signal process of frequency multiplication device promotes videl signal, and is RGB with the videl signal conversion color space of transmission.

Because above two features can significantly be simplified the existing known display unit line architecture that is applied to video information wall according to the line architecture of technical solution of the present invention.Its advantage comprises the system line framework of simplifying display unit at least, reduces the problem of design.For the input signal source of all resolution, keep under the former sequential format (Timing) and be passed to another display unit, that is to say that all display unit in the video information wall all can receive and the consistent high resolution pictures of former input information source sequential format.For high-resolution input picture, the image quality of this video information wall is better than known video information wall.In addition, can improve existing known application circuit framework and have a time of delay because video amplifies the Video processing of chip, signal serial connection through a sequence, under the videl signal of dynamic menu, might find out the different shape of the picture that produces this time of delay (Artifact) in different display unit.

The above, it only is preferred embodiment of the present invention, be not that the present invention is done any pro forma restriction, though the present invention discloses as above with preferred embodiment, yet be not in order to limit the present invention, any those skilled in the art, in not breaking away from the technical solution of the present invention scope, when the technology contents that can utilize above-mentioned announcement is made a little change or is modified to the equivalent embodiment of equivalent variations, in every case be the content that does not break away from technical solution of the present invention, according to technical spirit of the present invention to any simple modification that above embodiment did, equivalent variations and modification all still belong in the scope of technical solution of the present invention.

Claims

1, a kind of display unit is applicable to a video information wall, it is characterized in that it comprises:

One analog/digital converter in order to receiving an analog video signal, and is exported one first shows signal and one first according to this and is shown clock signal;

One differential digital signal receiver in order to receiving a differential digital signal, and is exported one second shows signal and one second according to this and is shown clock signal;

One data enable signal generator connects this analog/digital converter, first shows clock signal in order to this that receives that this analog/digital converter exports, and output according to this has one the 3rd of a data actuating signal and shows clock signal;

One selector switch, input connect this data enable signal generator and this differential digital signal receiver, in order to select this second show clock signal, the 3rd show clock signal one of them, and export one the 4th according to this and show clock signal;

One differential digital signal transmitting apparatus is connected to the output of this selector switch and analog/digital converter, shows clock signal in order to transmit the 4th, and optionally transmit this first shows signal and this second shows signal one of them; And

One video amplifies chip, shows clock signal in order to receive the 4th, and optionally receive this first shows signal and this second shows signal one of them, and according to this as the shown picture of this display unit.

2, display unit according to claim 1, it is characterized in that wherein more comprising a Video Decoder, in order to receive a videl signal, and export one the 3rd shows signal and the 5th according to this and show clock signal, wherein the 5th shows that clock signal is sent to this selector switch, this selector switch then according to this second show clock signal, the 3rd show clock signal and the 5th show clock signal one of them, and export the 4th demonstration clock signal according to this.

3, display unit according to claim 1 is characterized in that wherein more comprising:

One Video Decoder in order to receiving a videl signal, and is exported a video signal switching signal and a video signal clock signal according to this;

One video signal process of frequency multiplication device, be connected to this Video Decoder, in order to receive this video signal switching signal and this video signal clock signal, and after this video signal switching signal carried out a video signal process of frequency multiplication, be converted to one the 4th shows signal and the 6th and show clock signal, wherein the 6th shows that clock signal is sent to this selector switch, this selector switch then according to this second show clock signal, the 3rd show clock signal and the 6th show clock signal one of them, and export the 4th demonstration clock signal according to this.

4, display unit according to claim 3 is characterized in that wherein said video signal process of frequency multiplication is to have this video signal switching signal of one first color space form, to be converted to the 4th shows signal with one second color space form.

5, display unit according to claim 4, this video signal switching signal that it is characterized in that wherein having this first color space form is one to have the videl signal of alternate-line scanning, and the 4th shows signal of this second color space form is one to have the videl signal that scans line by line.

6, display unit according to claim 4 is characterized in that wherein this first color space form is a yuv format.

7, display unit according to claim 4 is characterized in that wherein this second color space form is a rgb format.

8, display unit according to claim 1, it is characterized in that wherein more comprising a microcontroller, be couple to this data enable signal generator, this microcontroller is in order to receive this analog video signal, and judge the sequential form of back according to this according to this analog video signal, control this data enable signal generator and produce this data actuating signal.

9, display unit according to claim 8, it is characterized in that wherein more comprising an internal memory, be couple to this microcontroller, after this microcontroller receives this analog video signal, judge this sequential format of this analog video signal according to this according to the stored data of this internal memory, and according in this internal memory corresponding to most sequential setup parameters of this sequential format, control this data enable signal generator and produce this data actuating signal.

10, display unit according to claim 1, it is characterized in that wherein said differential digital signal be a minimum transition differential wave (Transition Minimized DifferentialSignaling, TMDS).

11, display unit according to claim 1, it is characterized in that wherein said differential digital signal be a low-voltage differential signal (Low Voltage Differential Signaling, LVDS).

12, a kind of display unit is applicable to a video information wall, it is characterized in that it comprises:

One analog/digital converter, in order to receiving an analog video signal, and export according to this one first shows signal with have a data actuating signal one first show clock signal;

One selector switch, input connect this analog/digital converter and this differential digital signal receiver, in order to select this first show clock signal with this second show clock signal one of them, and export one the 3rd demonstration clock signal according to this;

One differential digital signal transmitting apparatus is connected to the output of this selector switch and analog/digital converter, shows clock signal in order to transmit the 3rd, and optionally transmit this first shows signal and this second shows signal one of them; And

One video amplifies chip, shows clock signal in order to receive the 3rd, and optionally receive this first shows signal and this second shows signal one of them, and according to this as the shown picture of this display unit.

13, display unit according to claim 12, it is characterized in that wherein more comprising a Video Decoder, in order to receive a videl signal, and export one the 3rd shows signal and the 4th according to this and show clock signal, wherein the 4th shows that clock signal is sent to this selector switch, this selector switch then according to this first show clock signal, this second show clock signal and the 4th show clock signal one of them, and export the 3rd demonstration clock signal according to this.

14, display unit according to claim 12 is characterized in that wherein more comprising:

One video signal process of frequency multiplication device, be connected to this Video Decoder, in order to receive this video signal switching signal and this video signal clock signal, and after this video signal switching signal carried out a video signal process of frequency multiplication, be converted to one the 4th shows signal and the 5th and show clock signal, wherein the 5th shows that clock signal is sent to this selector switch, this selector switch then according to this first show clock signal, this second show clock signal and the 5th show clock signal one of them, and export the 3rd demonstration clock signal according to this.

15, display unit according to claim 14 is characterized in that wherein said video signal process of frequency multiplication is to have this video signal switching signal of one first color space form, to be converted to the 4th shows signal with one second color space form.

16, display unit according to claim 15, this video signal switching signal that it is characterized in that wherein having this first color space form is one to have the videl signal of alternate-line scanning, and the 4th shows signal of this second color space form is one to have the videl signal that scans line by line.

17, display unit according to claim 15 is characterized in that wherein this first color space form is a yuv format.

18, display unit according to claim 15 is characterized in that wherein this second color space form is a rgb format.

19, display unit according to claim 12, it is characterized in that wherein more comprising a microcontroller, be couple to this analog/digital converter, this microcontroller is in order to receive this analog video signal, and judge the sequential form of back according to this according to this analog video signal, control this analog/digital converter and produce this data actuating signal.

20, display unit according to claim 19, it is characterized in that wherein more comprising an internal memory, be couple to this microcontroller, after this microcontroller receives this analog video signal, judge this sequential format of this analog video signal according to this according to the stored data of this internal memory, and according in this internal memory corresponding to most sequential setup parameters of this sequential format, control this analog/digital converter and produce this data actuating signal.

21, display unit according to claim 12, it is characterized in that wherein said differential digital signal be a minimum transition differential wave (Transition Minimized DifferentialSignaling, TMDS).

22, display unit according to claim 12, it is characterized in that wherein said differential digital signal be a low-voltage differential signal (Low Voltage Differential Signaling, LVDS).

23, a kind of video information wall, it is characterized in that it has most display unit, wherein those display unit connect with series system, and each this display unit has a differential digital signal receiver and a differential digital signal transmitting apparatus, this differential digital signal receiver, in order to receive the differential digital signal that this display unit transmitted of adjacent with it upper level, and transmit this display unit that this differential digital signal is given next stage via this differential digital signal transmitting apparatus, wherein first display unit of the display unit of those series connection more comprises:

One data enable signal generator connects this analog/digital converter, first shows clock signal in order to this that receives that this analog/digital converter exports, and output according to this has one second of a data actuating signal and shows clock signal;

One selector switch, input connects this differential digital signal receiver of this data enable signal generator and this first display unit, in order to select this second to show a clock pulse signal that clock signal or this differential digital signal that is received by this differential digital signal receiver had both one of them, and export one the 3rd according to this and show clock signal, and this differential digital signal transmitting apparatus of this first display unit is connected to the output of this selector switch, show clock signal in order to transmit the 3rd, and optionally transmit this shows signal that this differential digital signal of this first display unit had and this first shows signal one of them and be sent to this display unit of next stage; And

One video amplifies chip, shows clock signal in order to receive the 3rd, and optionally receive this shows signal that this differential digital signal had and this first shows signal one of them, and according to this as the shown picture of this first display unit.

24, video information wall according to claim 23, it is characterized in that wherein this first display unit more comprises a Video Decoder, in order to receive a videl signal, and export one the 3rd shows signal and the 4th according to this and show clock signal, wherein the 4th shows that clock signal is sent to this selector switch, this selector switch then second shows this clock signal that clock signal or this differential digital signal that is received by this differential digital signal receiver are had according to this, with the 4th show clock signal one of them, and export the 3rd according to this and show clock signal.

25, video information wall according to claim 23 is characterized in that wherein this first display unit more comprises:

One video signal process of frequency multiplication device, be connected to this Video Decoder, in order to receive this video signal switching signal and this video signal clock signal, and after this video signal switching signal carried out a video signal process of frequency multiplication, be converted to one the 3rd shows signal and the 5th and show clock signal, wherein the 5th shows that clock signal is sent to this selector switch, this selector switch then second shows this clock signal that clock signal or this differential digital signal that is received by this differential digital signal receiver are had according to this, with the 5th show clock signal one of them, and export the 3rd according to this and show clock signal.

26, video information wall according to claim 25 is characterized in that wherein said video signal process of frequency multiplication is to have this video signal switching signal of one first color space form, to be converted to the 3rd shows signal with one second color space form.

27, video information wall according to claim 26, this video signal switching signal that it is characterized in that wherein having this first color space form is one to have the videl signal of alternate-line scanning, and the 4th shows signal of this second color space form is one to have the videl signal that scans line by line.

28, video information wall according to claim 26 is characterized in that wherein this first color space form is a yuv format.

29, video information wall according to claim 26 is characterized in that wherein this second color space form is a rgb format.

30, video information wall according to claim 23, it is characterized in that wherein this first display unit more comprises a microcontroller, be couple to this data enable signal generator, this microcontroller is in order to receive this analog video signal, and judge the sequential form of back according to this according to this analog video signal, control this data enable signal generator and produce this data actuating signal.

31, video information wall according to claim 30, it is characterized in that wherein this first display unit more comprises an internal memory, be couple to this microcontroller, after this microcontroller receives this analog video signal, judge this sequential format of this analog video signal according to this according to the stored data of this internal memory, and according in this internal memory corresponding to most sequential setup parameters of this sequential format, control this data enable signal generator and produce this data actuating signal.

32, video information wall according to claim 23, it is characterized in that wherein said differential digital signal be a minimum transition differential wave (Transition Minimized DifferentialSignaling, TMDS).

33, video information wall according to claim 23, it is characterized in that wherein said differential digital signal be a low-voltage differential signal (Low Voltage Differential Signaling, LVDS).

34, a kind of video information wall, it is characterized in that it has most display unit, wherein those display unit connect with series system, and each this display unit has a differential digital signal receiver and a differential digital signal transmitting apparatus, this differential digital signal receiver, in order to receive the differential digital signal that this display unit transmitted of adjacent with it upper level, and transmit this display unit that this differential digital signal is given next stage via this differential digital signal transmitting apparatus, wherein first display unit of the display unit of those series connection more comprises:

One analog/digital converter, in order to receiving an analog video signal, and output according to this has one first shows signal and one first demonstration clock signal of a data actuating signal;

One selector switch, input connects this differential digital signal receiver of this analog/digital converter and this first display unit, in order to select this first to show a clock pulse signal that clock signal or this differential digital signal that is received by this differential digital signal receiver had both one of them, and export one second according to this and show clock signal, and this differential digital signal transmitting apparatus of this first display unit is connected to the output of this selector switch, second show clock signal in order to transmit this, and optionally transmit this shows signal that this differential digital signal of this first display unit had and this first shows signal one of them and be sent to this display unit of next stage; And

One video amplifies chip, second shows clock signal in order to receive this, and optionally receive this shows signal that this differential digital signal had and this first shows signal one of them, and according to this as the shown picture of this first display unit.

35, video information wall according to claim 34, it is characterized in that wherein this first display unit more comprises a Video Decoder, in order to receive a videl signal, and export one second shows signal and the 3rd according to this and show clock signal, wherein the 3rd shows that clock signal is sent to this selector switch, this selector switch then first shows this clock signal that clock signal or this differential digital signal that is received by this differential digital signal receiver are had according to this, with the 3rd show clock signal one of them, and export this according to this and second show clock signal.

36, video information wall according to claim 34 is characterized in that wherein this first display unit more comprises:

One video signal process of frequency multiplication device, be connected to this Video Decoder, in order to receive this video signal switching signal and this video signal clock signal, and after this video signal switching signal carried out a video signal process of frequency multiplication, be converted to one the 3rd shows signal and the 4th and show clock signal, wherein the 4th shows that clock signal is sent to this selector switch, this selector switch then first shows this clock signal that clock signal or this differential digital signal that is received by this differential digital signal receiver are had according to this, with the 4th show clock signal one of them, and export this according to this and second show clock signal.

37, video information wall according to claim 36 is characterized in that wherein said video signal process of frequency multiplication is to have this video signal switching signal of one first color space form, to be converted to the 3rd shows signal with second color space form.

38, according to the described video information wall of claim 37, this video signal switching signal that it is characterized in that wherein having this first color space form is one to have the videl signal of alternate-line scanning, and the 3rd shows signal of this second color space form is one to have the videl signal that scans line by line.

39,, it is characterized in that wherein this first color space form is a yuv format according to the described video information wall of claim 37.

40,, it is characterized in that wherein this second color space form is a rgb format according to the described video information wall of claim 37.

41, video information wall according to claim 34, it is characterized in that wherein this first display unit more comprises a microcontroller, be couple to this analog/digital converter, this microcontroller is in order to receive this analog video signal, and judge the sequential form of back according to this according to this analog video signal, control this analog/digital converter and produce this data actuating signal.

42, according to the described video information wall of claim 41, it is characterized in that wherein this first display unit more comprises an internal memory, be couple to this microcontroller, after this microcontroller receives this analog video signal, judge this sequential format of this analog video signal according to this according to the stored data of this internal memory, and according in this internal memory corresponding to most sequential setup parameters of this sequential format, control this analog/digital converter and produce this data actuating signal.

43, video information wall according to claim 34, it is characterized in that wherein said differential digital signal be a minimum transition differential wave (Transition Minimized DifferentialSignaling, TMDS).

44, video information wall according to claim 34, it is characterized in that wherein said differential digital signal be a low-voltage differential signal (Low Voltage Differential Signaling, LVDS).