CN100578448C - Method for starting chip type system and starting device - Google Patents
Method for starting chip type system and starting device Download PDFInfo
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- CN100578448C CN100578448C CN200610171203A CN200610171203A CN100578448C CN 100578448 C CN100578448 C CN 100578448C CN 200610171203 A CN200610171203 A CN 200610171203A CN 200610171203 A CN200610171203 A CN 200610171203A CN 100578448 C CN100578448 C CN 100578448C
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Abstract
The invention discloses a method for starting a system-on-chip, comprising the following steps of: firstly, judging whether the system-on-chip is connected with a computer system through a communication link; if not, judging whether a nonvolatile storage in the system-on-chip is provided with an initial flag signal; if yes, reading the update information stored in the nonvolatile storage in response to the initial flag signal and setting a first register in the system-on-chip according to the update information.
Description
Technical field
The present invention is relevant for a kind of chip type system (System On Chip, SOC) startup method, and particularly can come relevant for a kind of that (Read Only Memory ROM) carries out the startup method of debug (Debug) to ROM (read-only memory) via nonvolatile memory (Non-Volatile) storer.
Background technology
Conventional core chip system (System On Chip, SOC) be provided with more ROM (read-only memory) (ReadOnly Memory, ROM), in order to the storage set information.When system boot, conventional core chip system comes a plurality of registers (Register) in the conventional core chip system are carried out setting value according to the set information in the ROM (read-only memory), to finish the operation to conventional core chip system boot.Yet conventional core chip system has some shortcomings.
Because the set information that is stored in the ROM (read-only memory) needs to be recorded in the ROM (read-only memory) in the lump when chip type system is made, and the set information in the ROM (read-only memory) can't be made amendment after the chip type system manufacturing is finished.So, when set information in the chip type system manufacturing finishes back discovery ROM (read-only memory) or procedure code have flaw, often can only solve the problem that it has flaw, and will make the chip type system that finishes and scrap by making set information or the procedure code that chip type system revises in the ROM (read-only memory) again.So, will make that the cost of conventional core chip system is higher because of needing often to make again.
In addition, when in case the specification of the peripheral hardware that cooperates with chip type system, brand or capacity are considered to desire to change because of other are commercial temporarily, conventional core chip system also can only cooperate with the peripheral hardware of different size, brand or capacity by making again and the set information of amendment record in ROM (read-only memory).So, conventional core chip system has more the flexibly shortcoming of compatible various peripheral hardwares.
Summary of the invention
In view of this, the present invention is providing a kind of chip type system (System On Chip exactly, SOC) startup method and computer system medium, it is higher and can't flexibly be compatible to the problem of its peripheral hardware that it can improve the cost of conventional core chip system effectively.
Propose a kind of startup method of chip type system according to the present invention, comprise following step.At first, judge whether chip type system is connected via communication link with computer system, if not, carry out next step.Then, judge whether non-volatile (Non-Volatile) storer in the chip type system has the start mark signal, if carry out next step.Afterwards, read the update information that is stored in the nonvolatile memory in response to the start mark signal, and come in the setting chip formula system corresponding first register (Register) according to update information, wherein this step (a) also comprises and judges whether this chip type system is connected via a communication link with a computer system, if, carry out the following step: enter a control interface pattern, via the instruction that a control interface pattern provides this chip type system is carried out operation simulation, to simulate the correction numerical value of this first register in response to this computer system; Set this start mark signal; The correction numerical value that reaches with this first register is stored in this nonvolatile memory as this update information.
Propose a kind of starter gear of chip type system according to the present invention, this starter gear comprises: be used to judge the device whether this chip type system and a computer system be connected via a communication link; Be used for judging the device that whether has an initial marking signal in this chip type system one nonvolatile memory; Be used for reading a update information that is stored in this nonvolatile memory and the device of setting one first corresponding in this chip type system register according to this update information in response to this start mark signal; Be used to the control interface pattern that enters, come this chip type system is carried out the device of operation simulation with the correction numerical value of simulating this first register with the instruction that provides via a control interface pattern in response to this computer system; Be used to set the device of this start mark signal; And be used for being stored in as this update information the device of this nonvolatile memory with the correction numerical value of this first register, if the wherein described judged result that is used to judge the device whether this chip type system and a computer system be connected via a communication link is not for, then describedly be used for judging that the device that whether has an initial marking signal in this chip type system one nonvolatile memory judges, if this judged result is for being, then described being used for read a update information that is stored in this nonvolatile memory in response to this start mark signal, and operate according to the device that this update information is set in this chip type system one first corresponding register, if the wherein described judged result that is used to judge the device whether this chip type system and a computer system be connected via a communication link is for being, then describedly be used to enter a control interface pattern, come this chip type system is carried out the device of operation simulation with the correction numerical value of simulating this first register with the instruction that provides via a control interface pattern in response to this computer system, the described device that is used to set this start mark signal, and described being used for operate as the device that this update information is stored in this nonvolatile memory with the correction numerical value of this first register.
For foregoing of the present invention can be become apparent, a preferred embodiment cited below particularly, and conjunction with figs. are described in detail as follows:
Description of drawings
Fig. 1 represents to use the chip type system of startup method of chip type system of the embodiment of the invention and the calcspar of computer system.
Fig. 2 represents the process flow diagram according to the startup method of the chip type system of the embodiment of the invention.
The main element symbol description
110: chip type system
112: processor
114: ROM (read-only memory)
116: nonvolatile memory
120: communicate to connect
130: computer system
202-208: operation steps
Embodiment
Please refer to Fig. 1, the chip type system of the startup method of the chip type system of its expression application embodiment of the invention and the calcspar of computer system.Chip type system 110 comprises processor 112, ROM (read-only memory) (Read Only Memory, ROM) 114 and non-volatile (Non-Volatile) storer 116.ROM (read-only memory) 114 is in order to store many batches of registers (Register) information (not shown), and when chip type system 110 starts, processor 112 comes a plurality of registers in the chip type system 110 are set according to register information.
First register information corresponding with first register is wrong in because of ROM (read-only memory) 114 when causing chip type system 110 operation exceptions when chip type system 110, the user is connected to computer system 130 via communicating to connect 120 with chip type system 110, and it is communicated with each other via a control interface.And the user more provides instruction that chip type system 110 is controlled and operation simulation from computer system 130 via control interface, finding out the preferred values of first register information, and it is stored in the nonvolatile memory 116 of chip type system 110 as update information.So, during chip type system 110 starts backward, it comes first register is set according to the update information in the nonvolatile memory 116, so, can solve the problem of chip type system 110 because of the wrong operation exception of first register information effectively.
The ROM (read-only memory) 114 of present embodiment for example is the computer media that has an operational order collection of chip type system 110.When start, processor 112 is carried out the startup method of chip type system 110 according to the operational order collection in the ROM (read-only memory) 114, it carries out corresponding operation in order to the instruction that provides in response to computer system 130, and comes first register of correspondence is set in order to the update information in the reading non-volatile storage 116.
Each operation steps of the startup method of present embodiment chip type system 110 as shown in Figure 2.Please refer to Fig. 2, its expression is according to the process flow diagram of the startup method of the chip type system of the embodiment of the invention.At first, as step 202, processor 112 judges whether chip type system 110 is connected via communicating to connect 120 with computer system 130.If not, execution in step 204, processor 112 judges whether have the start mark signal in the nonvolatile memory 116.If, execution in step 206, processor 112 reads the update information that is stored in the nonvolatile memory 116 in response to the start mark signal, and according to this first corresponding in the chip type system 110 register is set.
The control interface of present embodiment supports multiple user from ordering (User Defined) instruction, and the user can provide user's self-ordered instruction to chip type system 110 via the control interface of computer system 130, controls with the operation to it.Next, enumerating Information and the function thereof that a plurality of user's self-ordered instructions in the present embodiment are comprised explains.
Control interface is for example supported the address read instruction fetch, comprises the destination address hurdle, wherein has destination address.In the present embodiment, the address read instruction fetch for example is R.When the user desired to read the corresponding register information of destination address BFC00600 with 32 (Bit), the user was via control interface Input Address reading command: R bfc00600.Processor 112 reads the information of register corresponding with destination address bfc00600 in the chip type system 110 in response to the address read instruction fetch.
Control interface for example supports that register writes instruction, comprises hurdle, target location and writing information hurdle, wherein has destination address respectively and desires to write the writing information of the register corresponding with destination address.The register of present embodiment writes instruction and for example has two kinds of forms, and in order to difference 32 positions of write-once and 8 positions, its instruction for example is W and B respectively.When user's desire write 32 registers that correspond to from destination address BFC00600 with the writing information 01234567 of 8 carries, the user imported via control interface: W bfc00600 01234567.Processor 112 writes the writing information 01234567 that instructs above-mentioned 8 carries in response to register and writes in 32 registers corresponding with destination address BFC00600-BFC0061F.
When user's desire write 8 registers that correspond to from destination address BFC00600 with 8 carry information 67, the user imported via control interface: B bfc00600 00000067.Processor 112 writes the writing information 67 that instructs above-mentioned 8 carries in response to this register and writes in 8 registers corresponding with destination address BFC00600-BFC00607.In the chip type system 110 of present embodiment, each register for example is 1 bit register.
Control interface for example supports the address to change instruction, comprises the change address field, wherein has the change address information.In the present embodiment, change instruction in address for example is J.When user's desire changed destination address BFC00600 for change address BFF00600, the user imported via control interface:
J?bff00600。Processor 112 comes the register corresponding with destination address BFF00600 in the access chip type system 110 in order to change instruction in response to the address.
Control interface is for example supported initial setting command, and the initial setting command of present embodiment for example is C.When user's desire was carried out initial setting to nonvolatile memory 116, the user imported via control interface: C.Processor 112 comes nonvolatile memory 116 is carried out initial setting in response to initial setting command, and removes a storage block in the nonvolatile memory 116, and in wherein setting the start mark signal.
Control interface for example supports that storer writes instruction, and it has hurdle, target location and update information hurdle, wherein has destination address respectively and desires to write the update information of the register of target address information correspondence therewith.The storer of present embodiment writes instruction and for example has two kinds of forms, and in order to difference 32 positions of write-once and 8 positions, its instruction for example is F and X respectively.When user's desire with update information 01234567 write non-volatile memory 116 of destination address BFC00600 and 8 carries in the time, the user imports via control interface: F bfc00600 01234567.Processor 112 writes in update information 01234567 write non-volatile memory 116 of instruction with above-mentioned destination address BFC00600 and 8 carries in response to storer.
When user's desire with update information 67 write non-volatile memories 116 of destination address BFC00600 and 8 carries in the time, the user imports via control interface: X bfc 00,600 00000067.Processor 112 writes in update information 67 write non-volatile memories 116 of instruction with above-mentioned destination address BFC00600 and 8 carries in response to storer.
Control interface for example supports a storage address to change instruction, comprises the change address field, wherein has the change address information.In the present embodiment, storage address change instruction for example is K.When user's desire storage change destination address BFC00600 instructed in non-volatile note body 116 for the address change of changing address BFF00600, the user imported via control interface: K bff00600.Processor 112 changes instruction in response to storage address and comes the memory address change to instruct in nonvolatile memory 116.
Control interface for example supports to stop setting command, and in the present embodiment, stopping setting command for example is E.When the user desired to set the end mark signal in nonvolatile memory 116, the user imported via control interface: E.Processor 112 is set the end mark signal in response to stopping setting command in nonvolatile memory 116.
For example be essentially update information from start mark signal to the information between the end mark signal in the nonvolatile memory 116.During chip type system 110 start backward, when processor 112 is carried out its step 204 of startup method, judge in the nonvolatile memory 116 to have the start mark signal.Then processor 112 is carried out the step 206 of its startup method, comes in the reading non-volatile storage 116 from the start mark signal to the update information between the end mark signal, and according to this first corresponding in the chip type system 110 register is set.
Control interface is for example supported idsplay order, and in the present embodiment, stopping setting command for example is T.When the user learnt update information in the nonvolatile memory 116, the user imported via control interface: T.Processor 112 shows in the nonvolatile memory 116 from initial information between the end mark signal in the output unit of computer system 130 in response to idsplay order.In the present embodiment, output unit for example is a display (Display).
In the present embodiment, control interface for example is console function (Console Function), for example is serial port (RS-232) and communicate to connect 120.
When the startup method of the chip type system of present embodiment and computer system medium thereof can the arbitrary register information in ROM (read-only memory) make a mistake, find out the preferred values of corresponding register via computer system and with the supported user's self-ordered instruction of control interface between chip type system, and it is stored in the nonvolatile memory of chip type system as update information.So, when chip type system start next time, it can come the register of correspondence is set via the update information in the nonvolatile memory.So, the startup method of the chip type system of present embodiment and computer system medium thereof can solve effectively conventional core chip system easily because of the information of register in the ROM (read-only memory) can't revise cause its cost higher, can't do to revise and cause its peripheral hardware problem that can't flexibly be compatible to different size along with the peripheral hardware specification that cooperates, can repeat and to revise register information, cost in the ROM (read-only memory) lower and can flexibly be compatible to the advantage of the peripheral hardware of different size along with the difference of peripheral hardware specification and have in fact.
In sum, though the present invention with preferred embodiment openly as above, so it is not in order to limit the present invention.Those of ordinary skill under any in the technical field under the situation that does not break away from the spirit and scope of the present invention, can carry out various changes and modification.Therefore, protection scope of the present invention is as the criterion with the scope of the claim that proposed.
Claims (19)
1. the startup method of a chip type system comprises:
(a) judge whether this chip type system is connected via a communication link with a computer system, if not, execution in step (b);
(b) judge whether have an initial marking signal in this chip type system in the nonvolatile memory, if, execution in step (c); And
(c) read a update information that is stored in this nonvolatile memory in response to this start mark signal, and set one first corresponding in this chip type system register according to this update information,
Wherein this step (a) also comprises judging whether this chip type system is connected via a communication link with a computer system, if carry out the following step:
Enter a control interface pattern, via the instruction that a control interface pattern provides this chip type system is carried out operation simulation, to simulate the correction numerical value of this first register in response to this computer system;
Set this start mark signal; And
Correction numerical value with this first register is stored in this nonvolatile memory as this update information.
2. startup method as claimed in claim 1, wherein this control interface pattern is supported an address read instruction fetch, this address read instruction fetch comprises one first destination address, and this chip type system is in order to read the information of this first register corresponding with this first destination address in response to this address read instruction fetch.
3. startup method as claimed in claim 1, wherein this control interface pattern supports a register to write instruction, this chip type system writes detecting information to this first register in order to write instruction in response to this register, so that this chip type system is carried out operation simulation.
4. startup method as claimed in claim 2, wherein this control interface pattern supports an address to change instruction, this chip type system is one second destination address in order to change this first destination address in response to this address change instruction, and this second destination address corresponds to one second register in this chip type system.
5. startup method as claimed in claim 1, wherein this control interface pattern is supported an initial setting command, and this chip type system is in order to remove the information of a storage block in this nonvolatile memory and to set this start mark signal in response to this initial setting command.
6. startup method as claimed in claim 2, wherein this control interface pattern supports a memorizer information to write instruction, this chip type system writes a storage block in order to write instruction in response to this memorizer information with this update information and this first destination address.
7. startup method as claimed in claim 1, wherein this control interface pattern supports a storage address to change instruction, this chip type system writes a storage block in order to change instruction in response to this storage address with this address change instruction.
8. startup method as claimed in claim 1, wherein this control interface pattern supports one to stop setting command, this chip type system is set an end mark signal in order to stop setting command in response to this in a storage block.
9. startup method as claimed in claim 1, wherein this control interface pattern is supported an idsplay order, this chip type system is in order to show this update information in response to this idsplay order.
10. the starter gear of a chip type system, this starter gear comprises:
Be used to judge the device whether this chip type system and a computer system be connected via a communication link;
Be used for judging the device that whether has an initial marking signal in this chip type system one nonvolatile memory;
Be used for reading a update information that is stored in this nonvolatile memory and the device of setting one first corresponding in this chip type system register according to this update information in response to this start mark signal;
Be used to the control interface pattern that enters, come this chip type system is carried out the device of operation simulation with the correction numerical value of simulating this first register with the instruction that provides via a control interface pattern in response to this computer system;
Be used to set the device of this start mark signal; And
Be used for being stored in the device of this nonvolatile memory as this update information with the correction numerical value of this first register,
If wherein described the determination result is NO for judging the device whether this chip formula system and a computer system be connected via a communication link; Then described for judging that the device that whether has an initial marking signal in this chip formula system one nonvolatile memory judges; If this judged result is yes; Then described for reading the update information that is stored in this nonvolatile memory in response to this start mark signal and operating according to the device that this update information is set one first corresponding in this chip formula system register
If the wherein described judged result that is used to judge the device whether this chip type system and a computer system be connected via a communication link is for being, then describedly be used to enter a control interface pattern, come this chip type system is carried out the device of operation simulation with the correction numerical value of simulating this first register with the instruction that provides via a control interface pattern in response to this computer system, the described device that is used to set this start mark signal, and described being used for operate as the device that this update information is stored in this nonvolatile memory with the correction numerical value of this first register.
11. the starter gear of chip type system as claimed in claim 10, wherein this control interface pattern is supported an address read instruction fetch, this address read instruction fetch comprises one first destination address, and this chip type system is in order to read the information of this first register corresponding with this first destination address in response to this address read instruction fetch.
12. the starter gear of chip type system as claimed in claim 10, wherein this control interface pattern supports a register to write instruction, this chip type system writes detecting information to this first register in order to write instruction in response to this register, so that this chip type system is carried out operation simulation.
13. the starter gear of chip type system as claimed in claim 11, wherein this control interface pattern supports an address to change instruction, this chip type system is one second destination address in order to the numerical value that changes this first destination address in response to this address change instruction, and this second destination address corresponds to one second register in this chip type system.
14. the starter gear of chip type system as claimed in claim 10, wherein this control interface pattern is supported an initial setting command, and this chip type system is in order to remove the information of a storage block in this nonvolatile memory and to set this start mark signal in response to this initial setting command.
15. the starter gear of chip type system as claimed in claim 11, wherein this control interface pattern supports a memorizer information to write instruction, and this chip type system writes a storage block in order to write instruction in response to this memorizer information with this update information and this first destination address.
16. the starter gear of chip type system as claimed in claim 10, wherein this control interface pattern supports a storage address to change instruction, and this chip type system writes a storage block in order to change instruction in response to this storage address with this address change instruction.
17. the starter gear of chip type system as claimed in claim 10, wherein this control interface pattern supports one to stop setting command, and this chip type system is set an end mark signal in order to stop setting command in response to this in a storage block.
18. the starter gear of chip type system as claimed in claim 10, wherein this control interface pattern is supported an idsplay order, and this chip type system is in order to show this update information in response to this idsplay order.
19. the starter gear of chip type system as claimed in claim 10, wherein the information between this computer system and this chip type system is transmitted mutually via a serial port.
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| Application Number | Priority Date | Filing Date | Title |
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| CN200610171203A CN100578448C (en) | 2006-12-21 | 2006-12-21 | Method for starting chip type system and starting device |
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| Application Number | Priority Date | Filing Date | Title |
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| CN200610171203A CN100578448C (en) | 2006-12-21 | 2006-12-21 | Method for starting chip type system and starting device |
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| CN101206578A CN101206578A (en) | 2008-06-25 |
| CN100578448C true CN100578448C (en) | 2010-01-06 |
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| CN200610171203A Expired - Fee Related CN100578448C (en) | 2006-12-21 | 2006-12-21 | Method for starting chip type system and starting device |
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| CN101770388A (en) * | 2009-01-06 | 2010-07-07 | 华为技术有限公司 | Method and device for obtaining chip code information |
| CN101930373B (en) * | 2009-06-19 | 2013-08-07 | 中兴通讯股份有限公司 | Method and device for starting system on chip |
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