CN100573702C - A kind of random access memory and method of supplying power to thereof - Google Patents
A kind of random access memory and method of supplying power to thereof Download PDFInfo
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- CN100573702C CN100573702C CNB2008101184702A CN200810118470A CN100573702C CN 100573702 C CN100573702 C CN 100573702C CN B2008101184702 A CNB2008101184702 A CN B2008101184702A CN 200810118470 A CN200810118470 A CN 200810118470A CN 100573702 C CN100573702 C CN 100573702C
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Abstract
The invention provides a kind of random access memory and method of supplying power to thereof.Described random access memory comprises voltage generating module, and described voltage generating module is used for outer power voltage is promoted, and the voltage after promoting is offered memory array in the described random access memory.According to the present invention, can effectively improve the stability of random access memory under deep submicron process and the sub-micro technology.
Description
Technical field
The present invention relates to reservoir designs, particularly a kind of random access memory and method of supplying power to thereof.
Background technology
Random access memory not only can be to designating unit writing information but also can be from the designating unit sense information, and with reference to Fig. 1, it is made of logic control circuit and memory array, and described logic control circuit and memory array are by identical outer power voltage Vdd power supply.The read-write and the inner hiding refreshes of logic control circuit control random access memory comprise clock control circuit, address decoding circuitry, input/output control circuit etc.; Memory array comprises storage unit (cell) array and sense amplifier (SA), and described memory cell array is the array that is made of a plurality of storage unit.
Fig. 2 is the inner structure synoptic diagram of memory array.With reference to Fig. 2, comprise a plurality of storage unit (only illustrating among the figure) in the described memory array, b1 and b1_b are respectively the bit line and the paratope line thereof of storage unit, their inverse values each other in read-write operation, through after the precharge, both are Vpre by voltage; W1 is a word line, when word line is effective storage unit is carried out read-write operation.
Usually, in order to improve the reading speed of random access memory, b1 and b1_b are gone up the initial voltage difference that forms amplify through sense amplifier and come sense data.Initial voltage difference between b1 and the b1_b is shared generation by electric charge takes place, and sense amplifier is amplified to Vdd with initial voltage difference then, becomes output signal.Input signal also will through sense amplifier with data by the voltage difference on b1 and the b1_b with charge storage to storage unit.Fig. 3 is the synoptic diagram that memory cell capacitor and bit line capacitance generation electric charge are shared.With reference to Fig. 3, effective when word line, when promptly switch cut out, two capacitor C 1, C2 carried out reconfiguring of electric charge.
Prior art provides identical supply voltage Vdd to logic control circuit and memory array, and when read-write operation, the voltage of b1 and b1_b is the highest can only to reach Vdd, and the reading of memory array amplifies that voltage is the highest also can only to reach Vdd.And semiconductor technology has entered deep-submicron and sub-micro stage, and the process of integrated circuit is more and more littler, and the supply voltage that provides also reduces thereupon.
In realizing process of the present invention, what the inventor found supply voltage is decreased to that I haven't seen you for ages causes: the data hold time of (1) storage unit shortens; (2) initial voltage difference on bit line and the paratope line reduces; (3) sensitivity of sense amplifier reduces.These all can cause the stability of random access memory to reduce.
Therefore, the stability that how to improve random access memory under deep submicron process and the sub-micro technology just becomes the technical matters that needs to be resolved hurrily.
Summary of the invention
Technical matters to be solved by this invention provides a kind of random access memory and method of supplying power to thereof, to improve the stability of random access memory under deep submicron process and the sub-micro technology.
For solving the problems of the technologies described above, it is as follows to the invention provides technical scheme:
A kind of random access memory comprises voltage generating module, and described voltage generating module is used for outer power voltage is promoted, and the voltage after promoting is offered memory array in the described random access memory.
Above-mentioned random access memory, wherein, described voltage generating module is the high voltage electricity pump, described high voltage electricity pump is used for the substrate bias voltage of the voltage after promoting as the PMOS pipe of the PMOS pipe of the memory cell array of described memory array and the sense amplifier in the described memory array, and
With the supply voltage of the voltage after promoting as described memory cell array and described sense amplifier.
Above-mentioned random access memory wherein, comprises high voltage electricity pump and voltage adjuster in the described voltage generating module; Described high voltage electricity pump is used for outer power voltage is promoted, with the substrate bias voltage of the voltage after promoting as the PMOS pipe of the PMOS pipe of the memory cell array in the described memory array and the sense amplifier in the described memory array; Described voltage adjuster is used for outer power voltage is promoted, with the supply voltage of the voltage after promoting as described memory cell array and described sense amplifier.
Above-mentioned random access memory, wherein, the NMOS pipe of the sense amplifier in the NMOS of the memory cell array in described memory array pipe and the described memory array provides the substrate bias voltage by the logic control circuit in the random access memory; Described voltage generating module is used for the supply voltage of the voltage after promoting as described memory cell array and described sense amplifier.
A kind of method of supplying power to of random access memory wherein, is provided with voltage generating module in described random access memory, by described voltage generating module outer power voltage is promoted, and the voltage after will promoting offers the memory array in the described random access memory.
Above-mentioned method, wherein, described voltage generating module is the high voltage electricity pump, and the voltage after will being promoted by described high voltage electricity pump is as the substrate bias voltage of the PMOS pipe of the sense amplifier in the PMOS of the memory cell array in described memory array pipe and the described memory array, and
With the supply voltage of the voltage after promoting as described memory cell array and described sense amplifier.
Above-mentioned method wherein, comprises high voltage electricity pump and voltage adjuster in the described voltage generating module; By described high voltage electricity pump outer power voltage is promoted, and the voltage after will promoting is as the substrate bias voltage of the PMOS pipe of the sense amplifier in the PMOS of the memory cell array in described memory array pipe and the described memory array; By described voltage adjuster outer power voltage is promoted, and the voltage after will promoting is as the supply voltage of described memory cell array and described sense amplifier.
Above-mentioned method wherein, provides the substrate bias voltage by the logic control circuit in the random access memory for the NMOS pipe of the sense amplifier in the NMOS of the memory cell array in described memory array pipe and the described memory array; Voltage after will being promoted by described voltage generating module is as the supply voltage of described memory cell array and described sense amplifier.
The present invention is by being provided with voltage generating module in the random access memory under deep submicron process and sub-micro technology, by described voltage generating module outer power voltage is promoted, and the voltage after will promoting offers the memory array in the described random access memory, so, improved the supply voltage of memory array.The rising of the supply voltage of memory array can bring following beneficial effect: (1) has improved the charge storing unit memory space, thereby its data hold time is increased; (2) improve initial voltage difference on bit line and the paratope line (or claiming margin of operation), helped the work of sense amplifier; (3) improved the sensitivity of sense amplifier.These all can increase the stability of random access memory.And, voltage transformation module is set in random access memory, can too much not increase the power consumption of whole random access memory, also can not cause the change of external system.
Description of drawings
Fig. 1 is the structural representation of the random access memory of prior art;
Fig. 2 is the inner structure synoptic diagram of memory array in the prior art;
Fig. 3 is memory cell capacitor and the shared synoptic diagram of bit line capacitance generation electric charge in the prior art;
Fig. 4 is the structural representation of the random access memory of the embodiment of the invention one;
Fig. 5 is the structural representation of the random access memory of the embodiment of the invention two;
Fig. 6 is the structural representation of the random access memory of the embodiment of the invention three.
Embodiment
Key of the present invention is: in the random access memory under deep submicron process and sub-micro technology voltage generating module is set, by described voltage generating module outer power voltage is promoted, the voltage after promoting is offered memory array in the described random access memory.
For making the purpose, technical solutions and advantages of the present invention clearer, describe the present invention below in conjunction with the accompanying drawings and the specific embodiments.
Embodiment one
With reference to Fig. 4, mainly comprise in the random access memory of this embodiment: logic control circuit 41, memory array 42, high voltage electricity pump 43, voltage adjuster 44 comprise memory cell array and sense amplifier (figure does not show) in the memory array 42.Wherein, be logic control circuit 41, high voltage electricity pump 43, voltage adjuster 44 power supplies by outer power voltage Vdd.43 couples of Vdd of high voltage electricity pump change, and produce the voltage vcc s be higher than Vdd, and with the Vccs that the produces substrate bias voltage as the PMOS pipe of the PMOS pipe of described memory cell array and described sense amplifier; 44 couples of Vdd of voltage adjuster change, and produce the voltage vcc be higher than Vdd, and with the Vcc that the produces supply voltage as described memory cell array and described sense amplifier.
Need to prove that how high voltage electricity pump and voltage adjuster promote voltage and be converted to prior art, do not give unnecessary details here.
Embodiment two
With reference to Fig. 5, mainly comprise in the random access memory of this embodiment: logic control circuit 51, memory array 52, high voltage electricity pump 53,54 comprise memory cell array and sense amplifier (figure does not show) in the memory array 52.Wherein, be logic control circuit 51,53,54 power supplies of high voltage electricity pump by outer power voltage Vdd.53 couples of Vdd of high voltage electricity pump change, and produce the voltage vcc s be higher than Vdd, and with the Vccs that the produces substrate bias voltage as the PMOS pipe of the PMOS pipe of described memory cell array and described sense amplifier; 54 couples of Vdd of high voltage electricity pump change, and produce the voltage vcc be higher than Vdd, and with the Vcc that the produces supply voltage as described memory cell array and described sense amplifier.
In embodiment two, include two high voltage electricity pumps, it also can be realized by independent high voltage electricity pump, promptly outer power voltage is promoted by this independent high voltage electricity pump, with the voltage after promoting both as the supply voltage of described memory cell array and described sense amplifier, again as the substrate bias voltage of the PMOS pipe of the PMOS pipe of described memory cell array and described sense amplifier.
From with the description of the foregoing description as can be known, Vccs is produced by the high voltage electricity pump, and this is because Vccs no current demand (in order to improve the stability of PMOS substrate); And Vcc has certain demand to electric current, so Vcc both can also can be produced by voltage adjuster by the generation of high voltage electricity pump.
Embodiment three
With reference to Fig. 6, mainly comprise in the random access memory of this embodiment: logic control circuit 61, memory array 62, voltage generating module 63 comprise memory cell array and sense amplifier (figure does not show) in the memory array 62.Wherein, be logic control circuit 61, voltage generating module 63 power supplies by outer power voltage Vdd.63 couples of Vdd of voltage generating module change, and produce the voltage vcc be higher than Vdd, and with the Vcc that the produces supply voltage as described memory cell array and described sense amplifier.In the present embodiment, what adopt in memory cell array and the sense amplifier is NMOS pipe, and the voltage that provides for the substrate of described NMOS pipe need be through above-mentioned lifting conversion, but directly provides low-voltage by logic control circuit 61 for it.
The embodiment of the invention is by being provided with voltage generating module in the random access memory under deep submicron process and sub-micro technology, by described voltage generating module outer power voltage is promoted, and the voltage after will promoting offers the memory array in the described random access memory, so, improved the supply voltage of memory array.The rising of the supply voltage of memory array can bring following beneficial effect: (1) has improved the charge storing unit memory space, thereby its data hold time is increased; (2) improve initial voltage difference on bit line and the paratope line (or claiming margin of operation), helped the work of sense amplifier; (3) improved the sensitivity of sense amplifier.These all can increase the stability of random access memory.And, voltage transformation module is set in random access memory, can too much not increase the power consumption of whole random access memory, also can not cause the change of external system.
Should be noted that at last, above embodiment is only unrestricted in order to technical scheme of the present invention to be described, those of ordinary skill in the art is to be understood that, can make amendment or be equal to replacement technical scheme of the present invention, and not breaking away from the spiritual scope of technical solution of the present invention, it all should be encompassed in the middle of the claim scope of the present invention.
Claims (6)
1. a random access memory is characterized in that, comprises voltage generating module, and described voltage generating module is used for outer power voltage is promoted, and the voltage after promoting is offered memory array in the described random access memory, wherein:
Described voltage generating module is the high voltage electricity pump, described high voltage electricity pump is used for the substrate bias voltage of the voltage after promoting as the PMOS pipe of the PMOS pipe of the memory cell array of described memory array and the sense amplifier in the described memory array, and
With the supply voltage of the voltage after promoting as described memory cell array and described sense amplifier.
2. a random access memory is characterized in that, comprises voltage generating module, and described voltage generating module is used for outer power voltage is promoted, and the voltage after promoting is offered memory array in the described random access memory, wherein:
Comprise high voltage electricity pump and voltage adjuster in the described voltage generating module;
Described high voltage electricity pump is used for outer power voltage is promoted, with the substrate bias voltage of the voltage after promoting as the PMOS pipe of the PMOS pipe of the memory cell array in the described memory array and the sense amplifier in the described memory array;
Described voltage adjuster is used for outer power voltage is promoted, with the supply voltage of the voltage after promoting as described memory cell array and described sense amplifier.
3. a random access memory is characterized in that, comprises voltage generating module, and described voltage generating module is used for outer power voltage is promoted, and the voltage after promoting is offered memory array in the described random access memory, wherein:
The NMOS pipe of the memory cell array in the described memory array and the NMOS pipe of the sense amplifier in the described memory array provide the substrate bias voltage by the logic control circuit in the random access memory;
Described voltage generating module is used for the supply voltage of the voltage after promoting as described memory cell array and described sense amplifier.
4. the method for supplying power to of a random access memory, it is characterized in that, in described random access memory, voltage generating module is set, outer power voltage is promoted by described voltage generating module, and the voltage after will promoting offers the memory array in the described random access memory, wherein:
Described voltage generating module is the high voltage electricity pump;
Voltage after will being promoted by described high voltage electricity pump is as the substrate bias voltage of the PMOS pipe of the PMOS pipe of the memory cell array in the described memory array and the sense amplifier in the described memory array, and
With the supply voltage of the voltage after promoting as described memory cell array and described sense amplifier.
5. the method for supplying power to of a random access memory, it is characterized in that, in described random access memory, voltage generating module is set, outer power voltage is promoted by described voltage generating module, and the voltage after will promoting offers the memory array in the described random access memory, wherein:
Comprise high voltage electricity pump and voltage adjuster in the described voltage generating module;
By described high voltage electricity pump outer power voltage is promoted, and the voltage after will promoting is as the substrate bias voltage of the PMOS pipe of the sense amplifier in the PMOS of the memory cell array in described memory array pipe and the described memory array;
By described voltage adjuster outer power voltage is promoted, and the voltage after will promoting is as the supply voltage of described memory cell array and described sense amplifier.
6. the method for supplying power to of a random access memory, it is characterized in that, in described random access memory, voltage generating module is set, outer power voltage is promoted by described voltage generating module, and the voltage after will promoting offers the memory array in the described random access memory, wherein:
Provide the substrate bias voltage by the logic control circuit in the random access memory for the NMOS pipe of the sense amplifier in the NMOS of the memory cell array in described memory array pipe and the described memory array;
Voltage after will being promoted by described voltage generating module is as the supply voltage of described memory cell array and described sense amplifier.
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