CN100565846C - A kind of manufacture method and TFT thereof of liquid crystal indicator finish substrate - Google Patents
A kind of manufacture method and TFT thereof of liquid crystal indicator finish substrate Download PDFInfo
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- CN100565846C CN100565846C CNB2008100349619A CN200810034961A CN100565846C CN 100565846 C CN100565846 C CN 100565846C CN B2008100349619 A CNB2008100349619 A CN B2008100349619A CN 200810034961 A CN200810034961 A CN 200810034961A CN 100565846 C CN100565846 C CN 100565846C
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Abstract
The manufacture method and the TFT thereof that the present invention relates to a kind of liquid crystal indicator finish substrate; this manufacture method is utilized the overlapping junction of many gray-level masks interlayer circuit in the electrostatic protection loop; etching is removed insulating barrier and the semiconductor layer between the two metal layers, makes the direct superimposed electrical connection of this place's two metal layers.This spline structure and manufacture method make in the second metal level film forming, will be directly and the metal interconnected and shared same current potential of ground floor, and share the electrostatic charge of accumulation each other mutually, prevented in electric discharge phenomena between the double layer of metal up and down.Shifted to an earlier date the time that effective electrostatic defending forms.
Description
Technical field
The present invention relates to a kind of semiconductor element and manufacture method, the manufacture method and the TFT that relate in particular to thin-film transistor LCD device finish substrate, and this TFT finishes substrate and is provided with a plurality of display panels unit.
Background technology
(liquid crystal display is a kind of flat-panel screens that is widely used most at present LCD) to LCD, has low-power consumption, external form is thin, in light weight and feature such as low driving voltage.Liquid crystal display device module mainly is made of display panels and backlight module.Wherein, display panels normally is made of thin-film transistor array base-plate (TFT substrate), color filter film substrate (CF substrate) and the liquid crystal layer that is arranged between the two.And backlight module is in order to provide above-mentioned display panels required area source, so that LCD MODULE reaches the effect of demonstration.The TFT substrate can be divided into viewing area (display Area) and peripheral circuit (peripheral circuit area), wherein the viewing area comprises a plurality of sub-pixel unit of arranging with array structure, and each sub-pixel unit comprises one or more thin-film transistor and the pixel electrode that is attached thereto.In addition, be provided with multi-strip scanning line and data wire in peripheral circuit and viewing area, wherein the thin-film transistor of each pixel cell is controlled by corresponding scanning line and data wire.
Display panels usually can be because external factor, for example continuous process operations and carrying or environmental change etc., and in panel, produce the phenomenon of accumulation of static electricity.Because glass itself is megohmite insulant, unless therefore suitable discharge channel is arranged, electrostatic charge can rest on the substrate table always.Thus, just possible because of static discharge after electrostatic charge runs up to some, and cause circuit or thin-film transistor itself on the TFT substrate to be destroyed.Measure as electrostatic discharge protective how solves the charged problem of substrate, is particularly very important problem in the middle of the large scale liquid crystal panel processing procedure of liquid crystal panel manufacture process.
As shown in Figure 1, be in the known technology when making array base palte electrostatic defending measure a kind of.As shown in the figure, be a kind of wire structures that the thin-film transistor pixel of array base palte is carried out electrical detection, also can play the effect of pre-antistatic simultaneously.Concrete mode is for utilizing many test circuit lines (first, second data short-circuit line 1,2, first, second gate short line 3,4) connects the gate wirings of odd number bar, the gate wirings of even number bar, the data wiring of odd number bar, the data wiring of even number bar respectively, and input (arraytest pad) input test signal by test circuit, again with contactless electric light module as signal receiving end, whether working properly to judge thin-film transistor.The circuitry lines difference gate wirings in parallel of these test usefulness and the odd number and the even number bar of data wiring can be shared the influence that static brings to a certain extent, reduce the generation of electrostatic breakdown.The electrostatic defending aspect, such circuit board will be removed after cutting off, and therefore such measure lacks the electrostatic defending effect to the processing procedure after the array stage; Even in the array stage, these p-wires since will with gate line and data wire cross-over connection, need be made in different layers does not go up, therefore conducting each other needs just can finish after the punching ITO metal film forming afterwards to the end, that is to say, in the end before one processing procedure ITO film forming, the array processes processing procedure is in complete unshielded state for electrostatic breakdown.
As shown in Figure 2, be in the known technology when making array base palte the another kind of electrostatic defending measure.As shown in the figure, between effective viewing area of array base palte and peripheral circuit, place inner antistatic ring (inner shortring) 20 or outside antistatic ring (out short ring), by two reverse diode structures the static that occurs in regional area is dredged in the middle of the whole front panel loop, to reduce the probability that electrostatic breakdown takes place.But this safeguard procedures also have its defective, because it is to come work by two reverse transistors, therefore its electrostatic defending must just can come into force after transistorized overall structure is finished, that is to say, similar to preceding a kind of process technique, in the whole array processing procedure before ITO metal film forming, this structure can not prevent the generation of electrostatic breakdown.
As shown in Figure 3, be in the known technology when making array base palte electrostatic defending measure a kind of.As shown in the figure, the end of scan line and data wire is made into sharp-pointed shape, and place an interdigitated electrode structure metal tape 5 in the terminal opposite position of scan line or data wire, comb shape metal tape 5 is generally taked the mode of floating, the broach end of metal tape 5 also is made into sharp-pointed shape, and relative in the sharp-pointed end of scan line or data wire.The effect that end is made into sharp shape is can be with the electrostatic charge that exists on the glass substrate, and the effect by the place, tip is easy to discharge discharges electrostatic charge on glass substrate, thereby reaches the effect of electrostatic discharge protective.Its further way be to place semi-conductive substrate 6 to replace original dielectric film at two most advanced and sophisticated opposite positions, increase the conducting electric current with this, improve discharge effect.But such protection mode also has its shortcoming, is exactly two bad controls of the distance between the tip, and distance too long-range guided missile causes the discharge difficulty, loses protection effect, and the short circuit between the distribution too closely can take place distance, and causes the bad of panel.
Summary of the invention
The manufacture method TFT that technical problem to be solved by this invention provides a kind of new display unit finishes substrate; utilize many gray level masks exposure technique; make the metal in the circumferential perimeter loop of panel become interconnection structure earlier to form, effectively increase the electrostatic protection in the liquid crystal indicator manufacture process.
The present invention is the manufacture method that solves the problems of the technologies described above the liquid crystal indicator that adopts, and its TFT substrate manufacture step comprises:
One glass substrate is provided, is provided with a plurality of display panels unit and panel periphery zone,
Deposition one the first metal layer and etch the first metal interconnected figure on glass substrate, this figure comprise the first metal layer signal wiring and the electrostatic protection cabling that always extends to corresponding panel periphery in the display panels unit,
Depositing insulating layer and semiconductor layer successively on this interconnection graph, and be coated with first photoresist layer,
This first photoresist layer is carried out many GTG exposures; the electrostatic protection cabling in panel periphery zone and/or the first metal layer signal wiring will be exposed fully with the zone of the overlapping interconnection of the second metal level distribution; and the photoresist that the semiconductor island of thin-film transistor zone covers has first height; the photoresist that other zones cover except that above-mentioned has second height; first height is greater than second height
With above-mentioned first photoresist layer pattern as mask, etch away the electrostatic protection cabling will with the semiconductor and the insulating barrier in the zone of the overlapping interconnection of data wire, form interlayer interconnection district,
Remove the second height photoresist, simultaneously the first height photoresist thinned,
As mask, etch away the semiconductor layer of the second height photoresist covering originally with remaining photoresist, remove remaining photoresist then,
Deposit second metal level, the district directly is electrically connected with the first metal layer in described interlayer interconnection, and etches the second metal interconnected figure.
As one of execution mode, described electrostatic protection cabling can be filled the post of by the short bar cabling that is arranged at the peripheral test circuit region, and its making step comprises:
One glass substrate is provided, is provided with a plurality of display panels unit and peripheral test circuit region,
On glass substrate, deposit a first metal layer and etch the first metal interconnected figure, this figure comprises first, second data short bar cabling that will be connected with data wiring in the gate wirings that always extends to corresponding peripheral test circuit region in the display panels unit and the test circuit district
Depositing insulating layer and semiconductor layer successively on this interconnection graph, and be coated with first photoresist layer,
This first photoresist layer is carried out many GTG exposures, make test circuit district inner grid distribution will want the zone of overlapping interconnection to be exposed fully with overlapping zone that is electrically connected of data wiring and two-layer short bar with the overlapping zone that is electrically connected of grid shortening bar, data short bar, and the photoresist that the semiconductor island of thin-film transistor zone covers has first height, the photoresist that other zones cover except that above-mentioned has second height, first height is greater than second height
With above-mentioned first photoresist layer pattern as mask, etch away test circuit district inner grid distribution will with the overlapping zone that is electrically connected of grid shortening bar and, the data short bar will want the semiconductor and the insulating barrier in the zone of overlapping interconnection with the overlapping regional two-layer short bar that is electrically connected of data wiring, form interlayer interconnection district
Remove the second height photoresist, simultaneously the first height photoresist thinned,
As mask, etch away the semiconductor layer of the second height photoresist covering originally with remaining photoresist, remove remaining photoresist then,
Deposit second metal level, the district directly is electrically connected with the first metal layer in described interlayer interconnection, and etching the second metal interconnected figure, this figure comprises data wiring and first, second grid shortening bar cabling that always extends to corresponding peripheral test circuit region in the display panels unit.
Described first, second data short bar cabling is electrically connected with the data wiring of odd number bar and even number bar respectively, and described first, second grid shortening bar cabling is electrically connected with the gate wirings of odd number bar and even number bar respectively.
The short bar cabling of each panel on the described TFT substrate is connected to array test pad group separately; and the array test pad group of each panel can be independent of each other, also can be to use auxiliary with protecting distribution that the calibrating terminal of the array test pad group of different panels on all TFT substrates is connected to each other in order.
And as another kind of execution mode, described electrostatic protection cabling is a network-like the first metal layer cabling, and it is interconnected to network-like and is connected with gate wirings, the data wiring of each panel, and its making step comprises:
One glass substrate is provided, is provided with a plurality of display panels unit and panel periphery zone,
On glass substrate, deposit a first metal layer and etch the first metal interconnected figure; this figure comprises network-like electrostatic protection cabling in the gate wirings that always extends to corresponding panel periphery in the display panels unit and the panel periphery zone; the gate wirings that extends to corresponding panel periphery is communicated with network-like electrostatic protection cabling
Depositing insulating layer and semiconductor layer successively on this interconnection graph, and be coated with first photoresist layer,
This first photoresist layer is carried out many GTG exposures; the electrostatic protection cabling will be exposed fully with the zone of the overlapping interconnection of data wire; and the photoresist that the semiconductor island of thin-film transistor zone covers is by having first height; the photoresist that other zones cover except that above-mentioned has second height; first height is greater than second height
With above-mentioned first photoresist layer pattern as mask, etch away the electrostatic protection cabling will with the semiconductor and the insulating barrier in the zone of the overlapping interconnection of data wire, form interlayer interconnection district,
Remove the second height photoresist, simultaneously the first height photoresist thinned,
As mask, etch away the semiconductor layer of the second height photoresist covering originally with remaining photoresist, remove remaining photoresist then,
Deposit second metal level; the district directly is electrically connected with the first metal layer in described interlayer interconnection; and etching the second metal interconnected figure, this figure comprises the data wiring that extends to corresponding panel periphery zone always and directly be electrically connected with network-like electrostatic protection cabling in the display panels unit.
The portion of terminal of gate wirings described in the said method and data wiring preferably is respectively arranged with the electrostatic protection ring.
The present invention provides a kind of TFT of liquid crystal indicator to finish substrate simultaneously, comprising:
One glass substrate is provided with a plurality of display panels unit and panel periphery zone,
In first, second metal level in display panels unit and panel periphery zone, be respectively arranged with signal wiring and electrostatic protection cabling; at the electrostatic protection cabling of interlayer with extend to panel periphery regional signal distribution overlapping insulating barrier and semiconductor layer are not set between the two, and direct superimposed electrical connection.
Described electrostatic protection cabling can be filled the post of by the short bar cabling that is arranged at the peripheral test circuit region; described TFT finishes substrate and is provided with a plurality of display panels unit and peripheral test circuit region, be provided with in this peripheral test circuit region respectively with direct superimposed first, second grid shortening bar cabling that is electrically connected of the gate wirings interlayer of odd number bar and even number bar and respectively with direct superimposed first, second data short bar cabling that is electrically connected of the data wiring interlayer of odd number bar and even number bar.
The short bar cabling of each panel on the described TFT substrate is connected to array test pad group separately, and further its structure can be that the array test pad group of each panel is independently of one another; Also can be with the protection distribution calibrating terminal of the array test pad group of different panels on all TFT substrates to be connected to each other in order by auxiliary.
Further, can be provided with the electrostatic protection ring respectively in the portion of terminal of described gate wirings and data wiring in the said structure.
As another kind of frame mode; described electrostatic protection cabling also can be a network-like the first metal layer cabling; it is interconnected to network-like and is connected with the gate wirings of each panel, and with direct superimposed electrical connection of the data wiring interlayer of each panel.
Liquid crystal indicator and manufacture method based on said structure; the TFT substrate of liquid crystal indicator of the present invention is in manufacturing process; as long as after second layer metal deposition; just can form the electrostatic protection loop; when in the panel generation of static electricity being arranged; can be by these electrostatic protections with up and down conducting of distribution; and diffuse in the whole front panel loop of corresponding line; reach the effect of electrostatic protection, make deposition second layer metal layer after the ITO layer, play the effect that can reach electrostatic protection between the contact hole operation equally.
And can fill the post of the electrostatic protection cabling by the short bar cabling of peripheral test circuit region as a kind of execution mode; this structure has been utilized the peripheral test circuit of TFT substrate; make its effect of playing the static short distribution simultaneously, saved the special-purpose distribution of electrostatic protection.And it is auxiliary when using with protecting distribution the interconnected in order structure of calibrating terminal of the array test pad group of different panels on all TFT substrates, make in generation of static electricity moment, to greatest extent the electrostatic charge of part is diffused in the middle of the big glass substrate of monoblock; Array test can all use same set of probe simultaneously, has saved operation and cost.
As another kind of frame mode, the electrostatic protection cabling is a network-like the first metal layer cabling, interconnects and is connected with each gate wirings, data wiring.Such structure; in array processing procedure second layer metal film forming, promptly walk all levels panel metallic(return) circuit conductings together of bundle of lines equally by this network-like metal level; the electrostatic charge that regional area is produced is diffused in the metallic(return) circuit of monolithic glass substrate levels to greatest extent; prevent electrostatic charge accumulation and electrostatic breakdown takes place, be applicable to that some do not need to be provided with the electrostatic protection of the TFT substrate of test circuit.
Further; in said structure and the manufacture method after the portion of terminal of signal wiring is provided with the electrostatic protection ring respectively; finish at the array processing procedure, after the panel cutting; still can use the electrostatic defending ring in the panel to protect static, reach the purpose of in all processing procedure operations, all protecting static.
In a word, electrostatic breakdown phenomenon majority is because up and down the electrostatic charge that accumulates between the double layer of metal is too much, punctures the coupling capacitance between the metal up and down and causes short circuit between the different metal layer or the open circuit between the same metal level.The liquid crystal indicator that the above-mentioned manufacture method of foundation makes, after the interconnection structure of ground floor metal forms, insulating barrier on the ground floor metal is carried out the GTG exposure, ground floor metal (data wire short bar cabling, gate wirings) will be exposed with the zone that second layer metal (data wiring, grid shortening bar cabling) overlaps; In the time of the second layer metal film forming, will be directly and the metal interconnected and shared same current potential of ground floor, and share the electrostatic charge of accumulation each other mutually, prevented in electric discharge phenomena between the double layer of metal up and down.
This patent is characterised in that, can the electrostatic defending measure be come into force in the array process stage (during deposition data wire metal level) of thin-film transistor array base-plate, has avoided the generation of this stage electrostatic breakdown phenomenon effectively.
Description of drawings
For above-mentioned purpose of the present invention, feature and advantage can be become apparent, below in conjunction with accompanying drawing the specific embodiment of the present invention is elaborated, wherein:
Fig. 1 be in the known technology when making array base palte electrostatic defending measure a kind of;
Fig. 2 be in the known technology when making array base palte the another kind of electrostatic defending measure;
Fig. 3 be in the known technology when making array base palte the another kind of electrostatic defending measure;
Fig. 4 finishes one of structural representation of substrate for TFT of the present invention;
Fig. 5 finishes the step schematic diagram of manufacture of substrates for TFT of the present invention, and wherein A is the schematic cross-section at A place (being short bar cabling and the superimposed junction of data wire interlayer) among Fig. 3, and A ' is the interface schematic diagram at display panels transistor channel place;
Fig. 6 finishes the structural representation of substrate embodiment 3 for TFT of the present invention;
Fig. 7 finishes the structural representation of substrate embodiment 4 for TFT of the present invention.
Among the figure:
1,2. first, second data short bar cabling
3,4. first, second grid shortening bar cabling
5. comb shape metal tape 6. Semiconductor substrate
20. antistatic ring 29. panel lines of cut
30. it is auxiliary with protection distribution 31. array test pad groups
32. total array test pad group 33. network-like electrostatic protection cablings
37. glass substrate 38. the first metal layers (gate metal layer)
39. gate insulation layer 40. semiconductor layers
41. photoresist layer 42. silicon nitride dielectric layers
Embodiment
Embodiment 1
A kind of manufacture method of liquid crystal indicator, its TFT substrate manufacture step comprises:
One glass substrate 37 is provided, be provided with a plurality of display panels unit and peripheral test circuit region, on glass substrate 37, deposit a first metal layer 38 and etch the first metal interconnected figure, this figure comprises first, second data short bar cabling 1,2 that will be connected with data wiring in the gate wirings that always extends to corresponding peripheral test circuit region in the display panels unit and the test circuit district
Depositing insulating layer 39 and semiconductor layer 40 successively on this interconnection graph, and be coated with first photoresist layer 41,
This first photoresist layer 41 is carried out many GTG exposures, make test circuit district inner grid distribution will want the zone of overlapping interconnection to be exposed fully with data wiring 1,2 overlapping zones that are electrically connected and two-layer short bar with grid shortening bar 3, the 4 overlapping zones that are electrically connected, data short bar, and the photoresist 41 that the semiconductor island of thin-film transistor zone covers has first height, the photoresist 41 that other zones cover except that above-mentioned has second height, first height is greater than second height
With above-mentioned first photoresist layer pattern as mask, what etch away test circuit district inner grid distribution will will want the semiconductor and the insulating barrier in the zone of overlapping interconnection with overlapping zone that is electrically connected of data wiring and two-layer short bar with grid shortening bar 3, the 4 overlapping zones that are electrically connected, data short bar 1,2, form interlayer interconnection district
Remove the second height photoresist 41, simultaneously the first height photoresist 41 thinned,
As mask, etch away the semiconductor layer 40 that the second height photoresist 41 originally covers with remaining photoresist 41, remove remaining photoresist 41 then,
Deposit second metal level, the district directly is electrically connected with the first metal layer 38 in described interlayer interconnection, and etching the second metal interconnected figure, this figure comprises data wiring and first, second grid shortening bar cabling 3,4 that always extends to corresponding peripheral test circuit region in the display panels unit.
This first, second data short bar cabling 1,2 is electrically connected with the data wiring of odd number bar and even number bar respectively, and this first, second grid shortening bar cabling 3,4 is electrically connected with the gate wirings of odd number bar and even number bar respectively.
The short bar cabling of each panel on the described TFT substrate is connected to array test pad group 31 separately, and the array test pad group 31 of each panel is independently of one another.
The TFT of a kind of liquid crystal indicator that the while present embodiment provides finishes substrate; be provided with a plurality of display panels unit and peripheral test circuit region (referring to Fig. 4); the short bar cabling that is arranged at the peripheral test circuit region is simultaneously as the electrostatic protection cabling, be provided with in this peripheral test circuit region respectively with direct superimposed first, second grid shortening bar cabling 3,4 that is electrically connected of the gate wirings interlayer of odd number bar and even number bar and respectively with direct superimposed first, second data short bar cabling 1,2 that is electrically connected of the data wiring interlayer of odd number bar and even number bar.First, second grid shortening bar cabling 3,4 of each panel and first, second data short bar cabling 1,2 are connected to the array test pad group 31 of this panel respectively.And the array test pad group 31 of each panel is independently of one another.
When in the panel generation of static electricity being arranged, can pass through the conducting up and down of these short bar cablings, and diffuse in the whole front panel loop of corresponding line.
Embodiment 2
A kind of manufacture method and TFT of liquid crystal indicator finish substrate, and outside its method, structure were substantially the same manner as Example 1, also the portion of terminal at gate wirings and data wiring was provided with electrostatic protection ring 20 respectively.Realize electrostatic defending in the panel after whole array processing procedures finish by the transistorized conducting effects of Guard in these electrostatic protection rings 20; finish at the array processing procedure; after the panel cutting; still can use the electrostatic defending ring 20 in the panel to protect static, reach the purpose of in all processing procedure operations, all protecting static.
Embodiment 3
A kind of manufacture method and TFT of liquid crystal indicator finish substrate; outside its method, structure are substantially the same manner as Example 1; short bar cabling 1,2,3,4 is connected to the array test pad 31 of each panel respectively; and by auxiliary with protecting distribution 30 that the calibrating terminal of the array test pad group of different panels on all TFT substrates is connected to each other in order, and be linked to total array test pad group 32.
Like this, can be in generation of static electricity moment, to greatest extent the electrostatic charge of part is diffused in the middle of the big glass substrate of monoblock; Simultaneously, because the array test structure that interconnects between this panel can make the array test of different product all use same set of probe, save the expense of probe exploitation, and can shorten the time-histories of product development to a great extent.
Embodiment 4
A kind of manufacture method of liquid crystal indicator, its TFT substrate manufacture step comprises:
One glass substrate 37 is provided, is provided with a plurality of display panels unit and panel periphery zone,
On glass substrate 37, deposit a first metal layer 38 and etch the first metal interconnected figure; this figure comprises network-like electrostatic protection cabling 33 in the gate wirings that always extends to corresponding panel periphery in the display panels unit and the panel periphery zone; the gate wirings that extends to corresponding panel periphery is communicated with network-like electrostatic protection cabling 33
Depositing insulating layer 39 and semiconductor layer 40 successively on this interconnection graph; and be coated with first photoresist layer 41; this first photoresist layer 41 is carried out many GTG exposures; electrostatic protection cabling 33 will be exposed fully with the zone of the overlapping interconnection of data wire; and the photoresist 41 that the semiconductor island of thin-film transistor zone covers is by having first height; the photoresist 41 that other zones cover except that above-mentioned has second height, and first height is greater than second height
With above-mentioned first photoresist layer pattern as mask, etch away electrostatic protection cabling 33 will with the semiconductor 40 and the insulating barrier 39 in the zone of the overlapping interconnection of data wire, form interlayer interconnection district,
Remove the second height photoresist 41, simultaneously the first height photoresist 41 thinned,
As mask, etch away the semiconductor layer 40 of the second height photoresist, 41 coverings originally with remaining photoresist, remove remaining photoresist 41 then,
Deposit second metal level; the district directly is electrically connected with the first metal layer 38 in described interlayer interconnection; and etching the second metal interconnected figure, this figure comprises the data wiring that extends to corresponding panel periphery zone always and directly be electrically connected with network-like electrostatic protection cabling 33 in the display panels unit.
The TFT of a kind of liquid crystal indicator that the while present embodiment provides finishes substrate; be provided with a plurality of display panels unit and panel periphery zone; in the panel periphery zone, be provided with a network-like the first metal layer cabling 33 as the electrostatic protection cabling; it is interconnected to network-like and is connected with the gate wirings of each panel, and the data wiring of each panel extends to panel periphery and insulating barrier, semiconductor layer be not set and direct superimposed the electrical connection with network-like electrostatic protection cabling 33 overlappings.
Such structure, can can be in array processing procedure second layer metal film forming by network-like metal routing 33 all levels panel metallic(return) circuit conductings together, the electrostatic charge that regional area is produced is diffused in the metallic(return) circuit of monolithic glass substrate levels to greatest extent, prevents the electrostatic charge accumulation and the generation electrostatic breakdown.
Claims (13)
1. the manufacture method of a liquid crystal indicator, its TFT substrate manufacture step comprises:
One glass substrate is provided, is provided with a plurality of display panels unit and panel periphery zone,
Deposition one the first metal layer and etch the first metal interconnected figure on glass substrate, this figure comprise the first metal layer signal wiring and the electrostatic protection cabling that always extends to corresponding panel periphery in the display panels unit,
Depositing insulating layer and semiconductor layer successively on this interconnection graph, and be coated with first photoresist layer,
This first photoresist layer is carried out many GTG exposures; the electrostatic protection cabling in panel periphery zone and/or the first metal layer signal wiring will be exposed fully with the zone of the overlapping interconnection of the second metal level distribution; and the photoresist that the semiconductor island of thin-film transistor zone covers has first height; the photoresist that other zones cover except that above-mentioned has second height; first height is greater than second height
With above-mentioned first photoresist layer pattern as mask, etch away the electrostatic protection cabling will with the semiconductor and the insulating barrier in the zone of the overlapping interconnection of data wire, form interlayer interconnection district,
Remove the second height photoresist, simultaneously the first height photoresist thinned,
As mask, etch away the semiconductor layer of the second height photoresist covering originally with remaining photoresist, remove remaining photoresist then,
Deposit second metal level, the district directly is electrically connected with the first metal layer in described interlayer interconnection, and etches the second metal interconnected figure.
2. the manufacture method of liquid crystal indicator according to claim 1 is characterized in that described electrostatic protection cabling filled the post of by the short bar cabling that is arranged at the peripheral test circuit region, and its making step comprises:
One glass substrate is provided, is provided with a plurality of display panels unit and peripheral test circuit region,
On glass substrate, deposit a first metal layer and etch the first metal interconnected figure, this figure comprises first, second data short bar cabling that will be connected with data wiring in the gate wirings that always extends to corresponding peripheral test circuit region in the display panels unit and the test circuit district
Depositing insulating layer and semiconductor layer successively on this interconnection graph, and be coated with first photoresist layer,
This first photoresist layer is carried out many GTG exposures, make test circuit district inner grid distribution will want the zone of overlapping interconnection to be exposed fully with overlapping zone that is electrically connected of data wiring and two-layer short bar with the overlapping zone that is electrically connected of grid shortening bar, data short bar, and the photoresist that the semiconductor island of thin-film transistor zone covers has first height, the photoresist that other zones cover except that above-mentioned has second height, first height is greater than second height
With above-mentioned first photoresist layer pattern as mask, what etch away test circuit district inner grid distribution will will want the semiconductor and the insulating barrier in the zone of overlapping interconnection with overlapping zone that is electrically connected of data wiring and two-layer short bar with the overlapping zone that is electrically connected of grid shortening bar, data short bar, form interlayer interconnection district
Remove the second height photoresist, simultaneously the first height photoresist thinned,
As mask, etch away the semiconductor layer of the second height photoresist covering originally with remaining photoresist, remove remaining photoresist then,
Deposit second metal level, the district directly is electrically connected with the first metal layer in described interlayer interconnection, and etching the second metal interconnected figure, this figure comprises data wiring and first, second grid shortening bar cabling that always extends to corresponding peripheral test circuit region in the display panels unit.
3. the manufacture method of liquid crystal indicator according to claim 2, it is characterized in that: described first, second data short bar cabling is electrically connected with the data wiring of odd number bar and even number bar respectively, and described first, second grid shortening bar cabling is electrically connected with the gate wirings of odd number bar and even number bar respectively.
4. the manufacture method of liquid crystal indicator according to claim 3, it is characterized in that: the short bar cabling of each panel on the described TFT substrate is connected to array test pad group separately, and the array test pad group of each panel is independently of one another.
5. the manufacture method of liquid crystal indicator according to claim 3; it is characterized in that: the short bar cabling of each panel on the described TFT substrate is connected to array test pad group separately, and uses auxiliary with protecting distribution that the calibrating terminal of the array test pad group of different panels on all TFT substrates is connected to each other in order.
6. the manufacture method of liquid crystal indicator according to claim 1; it is characterized in that described electrostatic protection cabling is a network-like the first metal layer cabling; it is interconnected to network-like and is connected with gate wirings, the data wiring of each panel, and its making step comprises:
One glass substrate is provided, is provided with a plurality of display panels unit and panel periphery zone,
On glass substrate, deposit a first metal layer and etch the first metal interconnected figure; this figure comprises network-like electrostatic protection cabling in the gate wirings that always extends to corresponding panel periphery in the display panels unit and the panel periphery zone; the gate wirings that extends to corresponding panel periphery is communicated with network-like electrostatic protection cabling
Depositing insulating layer and semiconductor layer successively on this interconnection graph, and be coated with first photoresist layer,
This first photoresist layer is carried out many GTG exposures; the electrostatic protection cabling will be exposed fully with the zone of the overlapping interconnection of data wire; and the photoresist that the semiconductor island of thin-film transistor zone covers is by having first height; the photoresist that other zones cover except that above-mentioned has second height; first height is greater than second height
With above-mentioned first photoresist layer pattern as mask, etch away the electrostatic protection cabling will with the semiconductor and the insulating barrier in the zone of the overlapping interconnection of data wire, form interlayer interconnection district,
Remove the second height photoresist, simultaneously the first height photoresist thinned,
As mask, etch away the semiconductor layer of the second height photoresist covering originally with remaining photoresist, remove remaining photoresist then,
Deposit second metal level; the district directly is electrically connected with the first metal layer in described interlayer interconnection; and etching the second metal interconnected figure, this figure comprises the data wiring that extends to corresponding panel periphery zone always and directly be electrically connected with network-like electrostatic protection cabling in the display panels unit.
7. according to the manufacture method of claim 4,5 or 6 described liquid crystal indicators, it is characterized in that: the portion of terminal of described gate wirings and data wiring is provided with the electrostatic protection ring respectively.
8. the TFT of the liquid crystal indicator that makes of a method according to claim 1 finishes substrate, comprising:
One glass substrate is provided with a plurality of display panels unit and panel periphery zone,
In first, second metal level in display panels unit and panel periphery zone, be respectively arranged with signal wiring and electrostatic protection cabling; at the electrostatic protection cabling of interlayer with extend to panel periphery regional signal distribution overlapping insulating barrier and semiconductor layer are not set between the two, and direct superimposed electrical connection.
9. the TFT of liquid crystal indicator according to claim 8 finishes substrate; it is characterized in that: described electrostatic protection cabling is filled the post of by the short bar cabling that is arranged at the peripheral test circuit region; described TFT finishes substrate and is provided with a plurality of display panels unit and peripheral test circuit region, be provided with in this peripheral test circuit region respectively with the gate wirings interlayer of odd number bar and even number bar direct superimposed be electrically connected first; second grid short bar cabling and respectively with the data wiring interlayer of odd number bar and even number bar direct superimposed be electrically connected first; the second data short bar cabling.
10. the TFT of liquid crystal indicator according to claim 9 finishes substrate, it is characterized in that: the short bar cabling of each panel on the described TFT substrate is connected to array test pad group separately, and the array test pad group of each panel is independently of one another.
11. the TFT of liquid crystal indicator according to claim 9 finishes substrate; it is characterized in that: the short bar cabling of each panel on the described TFT substrate is connected to array test pad group separately, and the calibrating terminal of the array test pad group of different panels on all TFT substrates is connected to each other in order with the protection distribution by auxiliary.
12. the TFT of liquid crystal indicator according to claim 8 finishes substrate; it is characterized in that: described electrostatic protection cabling is a network-like the first metal layer cabling; it is interconnected to network-like and is connected with the gate wirings of each panel, and with direct superimposed electrical connection of the data wiring interlayer of each panel.
13. the TFT according to claim 10,11 or 12 described liquid crystal indicators finishes substrate, it is characterized in that: the portion of terminal of described gate wirings and data wiring is provided with the electrostatic protection ring respectively.
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| CNB2008100349619A CN100565846C (en) | 2008-03-21 | 2008-03-21 | A kind of manufacture method and TFT thereof of liquid crystal indicator finish substrate |
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| CNB2008100349619A CN100565846C (en) | 2008-03-21 | 2008-03-21 | A kind of manufacture method and TFT thereof of liquid crystal indicator finish substrate |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN101847628B (en) * | 2009-03-27 | 2013-11-06 | 上海天马微电子有限公司 | Display device |
| KR101310382B1 (en) * | 2009-10-30 | 2013-09-23 | 엘지디스플레이 주식회사 | Mother glass for liquid crystal display and fabricating method |
| CN102331633A (en) * | 2011-09-21 | 2012-01-25 | 深超光电（深圳）有限公司 | Mother substrate used for detecting winding of array and detecting method thereof |
| CN103543567B (en) | 2013-11-11 | 2016-03-30 | 北京京东方光电科技有限公司 | A kind of array base palte and driving method, display device |
| CN106653643B (en) * | 2017-02-22 | 2020-03-17 | 武汉华星光电技术有限公司 | Forming method of test bonding pad and array substrate |
| CN106997111A (en) * | 2017-04-05 | 2017-08-01 | 惠科股份有限公司 | Testing device and testing method for display panel |
| WO2019186652A1 (en) * | 2018-03-26 | 2019-10-03 | シャープ株式会社 | Method for manufacturing display device and display device |
| CN108649035B (en) * | 2018-04-26 | 2019-08-16 | 武汉华星光电半导体显示技术有限公司 | Display panel and preparation method thereof |
| CN109164615A (en) * | 2018-10-31 | 2019-01-08 | 深圳市华星光电半导体显示技术有限公司 | A kind of detection method and device of tft array substrate |
| CN109461384B (en) * | 2018-12-18 | 2021-03-16 | 武汉华星光电半导体显示技术有限公司 | Manufacturing method of display panel or array assembly for preventing static electricity and display panel |
| CN109725469B (en) * | 2018-12-25 | 2022-05-06 | 惠科股份有限公司 | Electrostatic protection structure and electrostatic protection method |
| CN111007686A (en) * | 2019-11-14 | 2020-04-14 | Tcl华星光电技术有限公司 | Array substrate, display panel and preparation method |
| CN112259612B (en) * | 2020-10-23 | 2024-07-05 | 合肥鑫晟光电科技有限公司 | Display substrate, manufacturing method thereof and display device |
| CN112259563B (en) * | 2020-10-28 | 2023-02-28 | 武汉华星光电技术有限公司 | Display panel and display device |
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