CN100559853C - A kind of multi-format video signal gathering and analyzing card - Google Patents

A kind of multi-format video signal gathering and analyzing card Download PDF

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Publication number
CN100559853C
CN100559853C CNB2008100544791A CN200810054479A CN100559853C CN 100559853 C CN100559853 C CN 100559853C CN B2008100544791 A CNB2008100544791 A CN B2008100544791A CN 200810054479 A CN200810054479 A CN 200810054479A CN 100559853 C CN100559853 C CN 100559853C
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China
Prior art keywords
vision signal
chip
video
input connector
signal
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Expired - Fee Related
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CNB2008100544791A
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CN101222599A (en
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梁凤梅
张起贵
倪嘉
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Tiancheng Co Ltd of Taiyuan University of Technology
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Tiancheng Co Ltd of Taiyuan University of Technology
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Abstract

A kind of multi-format video signal gathering and analyzing card is by the vision signal input connector, power interface (9), display (11) and shell (10) are formed, high definition YPbPr vision signal input connector (5) is housed on shell (10), high definition VGA vision signal input connector (6), SD S-Video vision signal input connector (7), SD Video vision signal input connector (8) is used for the connector (9) with computer swap data and input power supply; Display (11) is equipped with in shell (10) front, button (12); High-definition video signal AD conversion chip (1) is installed, SD vision signal decoding chip (2), data format treatment conversion chip (3), signal processing and interface chip (4) on the circuit board in shell (10).The present invention has collection analysis SD Video vision signal, SD S-Video vision signal, high definition VGA vision signal simultaneously, high definition YPbPr vision signal, and volume is little, and is in light weight, the advantage that can use in different occasions easily.

Description

A kind of multi-format video signal gathering and analyzing card
Technical field
The invention belongs to a kind of signal processing and analysis equipment, relate in particular to a kind of multi-format video signal gathering and analyzing card that has analytic function.
Background technology
Video capture device is that video camera has been widely used in the middle of Industry Control and the consumer electronics product.Support the high-definition camera of 1080i from early stage B to present stage.How accurately the feature of measurement and calibrating camera output signal also becomes a problem.For traditional standard definition video camera, since with a long history, there is a lot of special equipments accurately to measure to the characteristic parameter of its output signal.In video camera research and development, production, manufacturing field, all need the performance parameter of video camera is measured.Also need to use this kind equipment that video camera is measured in the field of using video camera.But these special equipments generally use application specific processor, and special-purpose acquisition chip adopts digital signal processor (DSP), and the hardware complexity is higher, and the overall device cost is higher.Be unfavorable for promoting.
Because present stage HD video extensive use, original used equipment can not be applied on the HD video.At present, the visible patent No. 200610165279.4 of the relevant document of the equipment of the video image of collection analysis single-definition SD or high definition HD, but this patent stresses the image transmission, there is no the image parameter analytic function, does not also possess the VGA/YPbPr interface simultaneously.Patent 200710119329.X narrates and relatively stresses resolution adjustment and demonstration simultaneously, does not also have the image parameter analytic function.
Summary of the invention
The purpose of this invention is to provide a kind of can collection analysis single-definition SD or the multi-format video signal gathering and analyzing card of the video signal of high definition HD.
The object of the present invention is achieved like this, adopts special ADC and video signal decoder, and the analog signal with input is transformed into digital signal earlier, finishes the analysis of signal at device interior, demonstrates analysis result by the display on the front panel then.Also can be passed to PC by interface circuit.By by the higher arithmetic speed of common desktop computer and the disposal ability of operational capability, carry out more accurate analysis and computing.
It is by the vision signal input connector, power interface, display and shell are formed, it is characterized in that being equipped with on the shell high definition YPbPr vision signal input connector, high definition VGA vision signal input connector, SD S-Video vision signal input connector, SD Video vision signal input connector is used for the connector with computer swap data and input power supply; Outer casing frontispiece is equipped with and is used for the display of display result, is used for selecting the button of tested entries; High-definition video signal AD conversion chip is installed, SD vision signal decoding chip, data format treatment conversion chip, signal processing and interface chip on the circuit board in the enclosure.
High definition YPbPr vision signal input connector and high definition VGA vision signal input connector are connected to high-definition video signal AD conversion chip by the circuit board upper conductor, be used for the high definition YPbPr vision signal and the high definition VGA vision signal of input are passed to high-definition video signal AD conversion chip, SD S-Video vision signal input connector and SD Video vision signal input connector are connected to SD vision signal decoding chip by the circuit board upper conductor, be used for the SD S-Video and the Video vision signal of input are passed to SD vision signal decoding chip, high-definition video signal AD conversion chip and SD vision signal decoding chip are connected to data format treatment conversion chip by the circuit board upper conductor, high-definition video signal AD conversion chip and SD vision signal decoding chip carry out analog/digital conversion with it after receiving the vision signal of input, again the digital video signal after the conversion is passed to data format treatment conversion chip, data format treatment conversion chip is connected to signaling interface and process chip by the circuit board upper conductor, data format treatment conversion chip is that digital clocking signal is adjusted chip, digital signal is reorganized into the sequential that the interface of signal processing and interface chip can be accepted, signaling interface and process chip are to be used for and the chip of computer interface, also possess the function of signal analysis simultaneously.Signal processing and interface chip are analyzed by own inside after receiving the digitized video that the transmission of data format treatment conversion chip comes, and the result is presented on the display on the shell.Also can finish the transmission of image information by being used for being connected to computer with the connector of computer swap data and input power supply.Display is connected to circuit board by flexible cable and is connected in signal processing and the interface chip again.Button directly is connected with interface chip with signal processing by the circuit board upper conductor.Power supply is used for the power supply that connector provided with computer swap data and input power supply.
Aforesaid high-definition video signal AD conversion chip can adopt AD9880, AD9380, AD9396, AD9980, AD9883 or AD9983.
Aforesaid SD vision signal decoding chip can adopt SAA7114, SAA7113, SAA7117, SAA7118, SAA7119, ADV7180, ADV7181, ADV7184, ADV7188, TW9901, TW9918, TW9919 or TVP5146.
Aforesaid data format treatment conversion chip can adopt XC3S250, XC3S200, XC3S400, XC3S 100E, XC3S200E or XC3S400E.
Aforesaid signal processing and interface chip can adopt CY7C68013, CY7C68014, CY7C68015, CY7C68016, CY7C68033 or CY7C68034.
Display can adopt JDL12232A, JDL12232B, JDL12232C, JDL12232D, JDL12864A, JDL12864B or JDL12864C as mentioned above.
Aforesaid button adopts 3 buttons to form key board, and 3 keypress functions are allocated as follows: select signal input channel, select test event, determine to begin test.
Aforesaid high definition YPbPr vision signal input connector, SD Video vision signal input connector adopt RCA type connector.
Aforesaid high definition VGA vision signal input connector adopts the standard VGA connector.
Aforesaid SD S-Video vision signal input connector adopts standard S-Video connector.
Aforesaid being used for adopted USB connector with the connector of computer swap data and input power supply.
Aforesaid signal processing is connected with display by circuit board with interface chip, can also finish the transmission of image information by being used for being connected to computer with the connector of computer swap data and input power supply.
When the signal of collection analysis video image, at first insert USB cable obtaining power supply, according to the classification of signal to be tested signal to be detected is inserted signal input connector.If test SD S-Video vision signal inserts standard S-Video connector with it; If test SD Video vision signal indicates the RCA type connector that SD Video vision signal is imported with its access; If test high definition YPbPr vision signal indicates the RCA type connector that high definition YPbPr vision signal is imported with its access; If test high definition VGA vision signal inserts the standard VGA connector with it.Press then and select the signal input channel key, select signal to be tested.Can show selected signal classification to be tested on the display on the shell.Repeatedly press and select the signal input channel key, can choose selection signal to be tested in SD S-Video vision signal, SD Video vision signal, high definition YPbPr vision signal, the high definition VGA vision signal circularly, and see chosen signal classification to be tested from display.Press then and select the test event key, select project to be tested.Can show selected test event classification on the display on the shell.Repeatedly press and select the test event key, can in definition, horizontal resolution, vertical resolution, colorimetric purity, color rendition degree, color saturation, white balance degree, irregularity in brightness, select project category to be tested circularly, and see chosen test event classification from display.More than two all select good after, press the beginning test button.This moment, signal processing and interface chip can carry out communication with high-definition video signal AD conversion chip, SD vision signal decoding chip, data format treatment conversion chip after receiving instruction, and initial information is loaded into above each chip.Judge user-selected input channel then, detect the state of input signal by the state that reads high-definition video signal AD conversion chip, SD vision signal decoding chip according to the difference of input channel.After detecting the state of signal, high-definition video signal AD conversion chip, SD vision signal decoding chip are write best configuration information.High-definition video signal AD conversion chip, SD vision signal decoding chip promptly can be exported normal signal to data format treatment conversion chip at this moment.After organizing sequential logic, the data preparation that operate as normal is come high-definition video signal AD conversion chip, the transmission of SD vision signal decoding chip behind the data format treatment conversion chip initiation passes to signal processing and interface chip.Signal processing and interface chip are with the buffer area of data passes in self.The tested entries of selecting according to the user is carried out data analysis then, and the result after will analyzing shows by display.Be stored in demonstration if the user need connect computer, need that then specific drivers additionally is installed and software is passed to computer for analysis and preservation with the result.
Advantage of the present invention is as follows:
1. convenience, this product interface flexible, volume is little, and is in light weight, can use in different occasions easily.
2. simultaneously collection analysis SD Video vision signal, SD S-Video vision signal, high definition VGA vision signal, high definition YPbPr vision signal.
3. this product is mainly analyzed and is software analysis, except characteristic parameter that can the analytical standard signal, can also support more test event by software upgrading.
Description of drawings
Fig. 1 is an internal structure schematic diagram of the present invention.
Fig. 2 is an external structure schematic diagram of the present invention
Fig. 3 is a data format treatment conversion circuit diagram of the present invention
Fig. 4 is SD vision signal of the present invention decoding and signal processing and interface circuit figure
Fig. 5 is high-definition video signal A/D convertor circuit figure of the present invention
As shown in the figure, the 1st, high-definition video signal AD conversion chip, the 2nd, SD vision signal decoding chip, the 3rd, data format treatment conversion chip, the 4th, signal processing and interface chip, the 5th, high definition YPbPr vision signal input connector, the 6th, high definition VGA vision signal input connector, the 7th, SD S-Video vision signal input connector, the 8th, SD Video vision signal input connector, the 9th, be used for the computer swap data and the input power supply connector, the 10th, shell, the 11st, display, the 12nd, button.
Embodiment
Embodiment 1
The high definition YPbPr vision signal input connector 5 that adopts the RCA connector is housed on the shell 10, adopt the high definition VGA vision signal input connector 6 of standard VGA joint, the SD S-Video vision signal input connector 7 of employing standard S-Video interface, adopt the SD Video vision signal input connector 8 of RCA connector, adopt the connector 9 with computer swap data and input power supply of being used for of USB connector, the display 11 that is used for the display analysis result and selects input signal that adopts JDL12232A is installed, adopts conventional push button switch 12 to be used for importing and selecting.The high-definition video signal AD conversion chip 1 that adopts AD9880 is installed on the circuit board in shell 10, adopt the SD vision signal decoding chip 2 of SAA7114, adopt the data format treatment conversion chip 3 of XC3S250, adopt signal processing and the interface chip 4 of CY7C68013.
Adopt the high definition YPbPr vision signal input connector 5 of RCA connector and adopt the high definition VGA vision signal input connector 6 of standard VGA joint to be connected to the high-definition video signal AD conversion chip 1 that adopts AD9880 by the circuit board upper conductor, be used for the high definition YPbPr vision signal and the high definition VGA vision signal of input are passed to the high-definition video signal AD conversion chip 1 that adopts AD9880, adopt the SD S-Video vision signal input connector 7 of S-Video joint and adopt the SD Video vision signal input connector 8 of RCA connector to be connected to the SD vision signal decoding chip 2 that adopts SAA7114 by the circuit board upper conductor, be used for the SD S-Video and the Video vision signal of input are passed to the SD vision signal decoding chip 2 that adopts SAA7114, adopt the high-definition video signal AD conversion chip 1 of AD9880 and adopt the SD vision signal decoding chip 2 of SAA7114 after receiving the vision signal of input, it to be carried out analog/digital conversion, again the digital video signal after the conversion is passed to the data format treatment conversion chip 3 that adopts XC3S250, adopt the data format treatment conversion chip 3 of XC3S250 to adjust chip for digital clocking signal, digital signal is reorganized into the sequential that the interface that meets the signal processing that adopts CY7C68013 and interface chip 4 can be accepted, and the signal processing that adopts CY7C68013 and interface chip 4 are to be used for computer interface and can to analyze the chip of data.After receiving that data format treatment conversion chip 3 transmits next digitized video, the signal processing of CY7C68013 and interface chip 4 inside are analyzed the view data of receiving, the result are presented on the display 11 of the employing JDL12232A on the shell 10.Also can finish the transmission of image information by being used for being connected to computer with the connector 9 of computer swap data and input power supply.The display 11 of employing JDL12232A is connected to circuit board by flexible cable and is connected in the signal processing and interface chip 4 that adopts CY7C68013 again.Button 12 directly is connected with interface chip 4 with the signal processing that adopts CY7C68013 by the circuit board upper conductor.
When the signal of collection analysis video image, at first inserting USB cable obtaining power supply, according to the classification of signal to be tested signal to be detected is inserted signal input connector.If test SD S-Video vision signal inserts the SD S-Video vision signal input connector 7 that adopts the S-Video joint with it; If test SD Video vision signal, its access is indicated the SD Video vision signal input connector 8 of the employing RCA connector of SD Video vision signal input; If test high definition YPbPr vision signal, its access is indicated the high definition YPbPr vision signal input connector 5 of the employing RCA connector of high definition YPbPr vision signal input; If test high definition VGA vision signal inserts the high definition VGA vision signal input connector 6 that adopts the standard VGA joint with it.Press the selection signal input channel key in the button 12 that adopts the conventional push button switch then, select signal to be tested.Can show selected signal classification to be tested on the display 11 of employing JDL12232A on the shell 10.Repeatedly press the selection signal input channel key in the button 12 that adopts the conventional push button switch, can choose selection signal to be tested in SD S-Video vision signal, SD Video vision signal, high definition YPbPr vision signal, the high definition VGA vision signal circularly, and see chosen signal classification to be tested from the display 11 that adopts JDL12232A.Press the selection test event key in the button 12 that adopts the conventional push button switch then, select project to be tested.Can show selected test event classification on the display 11 of employing JDL12232A on the shell 10.Repeatedly press the selection test event key in the button 12 that adopts the conventional push button switch, can in definition, horizontal resolution, vertical resolution, colorimetric purity, color rendition degree, color saturation, white balance degree, irregularity in brightness, select project category to be tested circularly, and see chosen test event classification from the display 11 that adopts JDL12232A.More than two all select good after, press the beginning test button in the button 12 that adopts the conventional push button switch.Adopt this moment signal processing and the interface chip 4 of CY7C68013 after receiving instruction, can carry out communication, initial information is loaded into above each chip with the data format treatment conversion chip 3 of the high-definition video signal AD conversion chip 1 that adopts AD9880, the SD vision signal decoding chip 2 that adopts SAA7114, employing XC3S250.Judge user-selected input channel then, detect the state of input signal according to the difference of input channel by the state that reads the high-definition video signal AD conversion chip 1 that adopts AD9880, adopts the SD vision signal decoding chip 2 of SAA7114.After detecting the state of signal, the high-definition video signal AD conversion chip 1 that adopts AD9880, the SD vision signal decoding chip 2 that adopts SAA7114 are write best configuration information.Adopt this moment the high-definition video signal AD conversion chip 1 of AD9880, the SD vision signal decoding chip 2 of employing SAA7114 promptly can export normal signal to the data format treatment conversion chip 3 that adopts XC3S250.Adopt operate as normal after data format treatment conversion chip 3 initialization of XC3S250 will adopt AD9880 high-definition video signal AD conversion chip 1, adopt the SD vision signal decoding chip 2 of SAA7114 to transmit the data preparation that comes to organize signal processing and the interface chip 4 that passes to employing CY7C68013 after the sequential logic.The signal processing that adopts CY7C68013 and interface chip 4 arrive buffer area in self with data passes.The tested entries of selecting according to the user is carried out data analysis then, and the result after will analyzing shows by the display 11 that adopts JDL12232A.Be stored in demonstration if the user need connect computer, need that then specific drivers additionally is installed and software is passed to computer for analysis and preservation with the result.
Embodiment 2
Have only following differently with embodiment 1, high-definition video signal AD conversion chip 1 adopts AD9380, and SD vision signal decoding chip 2 adopts ADV7180, and data format treatment conversion chip 3 adopts XC3S200.Other is with embodiment 1.
Embodiment 3
Have only following differently with embodiment 1, data format treatment conversion chip 3 adopts XC3S400.Signal processing and interface chip 4 employing CY7C68014,, LCD 11 adopts JDL12864C.Other is with embodiment 1.
Embodiment 4
Have only following differently with embodiment 3, high-definition video signal AD conversion chip 1 adopts AD9396, and SD vision signal decoding chip 2 adopts TW9919, signal processing and interface chip 4 employing CY7C68016.Other is with embodiment 3.
Embodiment 5
Have only following differently with embodiment 3, data format treatment conversion chip 3 adopts XC3S400E.Signal processing and interface chip 4 employing CY7C68033,, LCD 11 adopts JDL12864A.Other is with embodiment 3.
Embodiment 6
Have only following differently with embodiment 4, high-definition video signal AD conversion chip 1 adopts AD9983, and SD vision signal decoding chip 2 adopts TW9910, and other is with embodiment 4.

Claims (8)

1, a kind of multi-format video signal gathering and analyzing card is by the vision signal input connector, power interface (9), display (11) and shell (10) are formed, it is characterized in that being equipped with on the shell (10) high definition YPbPr vision signal input connector (5), high definition VGA vision signal input connector (6), SD S-Video vision signal input connector (7), SD Video vision signal input connector (8) is used for the connector (9) with computer swap data and input power supply; Display (11) is equipped with in shell (10) front, button (12); High-definition video signal AD conversion chip (1) is installed, SD vision signal decoding chip (2), data format treatment conversion chip (3), signal processing and interface chip (4) on the circuit board in shell (10);
Described high definition YPbPr vision signal input connector (5) and high definition VGA vision signal input connector (6) are connected to high-definition video signal AD conversion chip (1) by the circuit board upper conductor, SD S-Video vision signal input connector (7) and SD Video vision signal input connector (8) are connected to SD vision signal decoding chip (2) by the circuit board upper conductor, high-definition video signal AD conversion chip (1) and SD vision signal decoding chip (2) are connected to data format treatment conversion chip (3) by the circuit board upper conductor, data format treatment conversion chip (3) is connected to signaling interface and process chip (4) by the circuit board upper conductor, and display (11) is connected to circuit board and is connected in signal processing and the interface chip (4) again.Button (12) directly is connected with interface chip (4) with signal processing by the circuit board upper conductor.
2, a kind of multi-format video signal gathering and analyzing card as claimed in claim 1 is characterized in that described signal processing and interface chip (4) are by being used for being connected to computer with the connector (9) of computer swap data and input power supply.
3, a kind of multi-format video signal gathering and analyzing card as claimed in claim 1 is characterized in that described button adopts 3 buttons to form key board, and 3 keypress functions are allocated as follows: select signal input channel, select test event, determine to begin test.
4,, it is characterized in that described high-definition video signal AD conversion chip (1) is AD9880, AD9380, AD9396, AD9980, AD9883 or AD9983 as each described a kind of multi-format video signal gathering and analyzing card of claim 1-3.
5,, it is characterized in that described SD vision signal decoding chip (2) is SAA7114, SAA7113, SAA7117, SAA7118, SAA7119, ADV7180, ADV7181, ADV7184, ADV7188, TW9901, TW9918, TW9919 or TVP5146 as each described a kind of multi-format video signal gathering and analyzing card of claim 1-3.
6,, it is characterized in that described data format treatment conversion chip (3) is XC3S250, XC3S200, XC3S400, XC3S100E, XC3S200E or XC3S400E as each described a kind of multi-format video signal gathering and analyzing card of claim 1-3.
7,, it is characterized in that described signal processing and interface chip (4) are CY7C68013, CY7C68014, CY7C68015, CY7C68016, CY7C68033 or CY7C68034 as each described a kind of multi-format video signal gathering and analyzing card of claim 1-3.
8,, it is characterized in that described display (11) is JDL12232A, JDL12232B, JDL12232C, JDL12232D, JDL12864A, JDL12864B or JDL12864C as each described a kind of multi-format video signal gathering and analyzing card of claim 1-3.
CNB2008100544791A 2008-01-22 2008-01-22 A kind of multi-format video signal gathering and analyzing card Expired - Fee Related CN100559853C (en)

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CN102480609B (en) * 2010-11-25 2014-01-22 英业达股份有限公司 Signal conversion device
CN102036077A (en) * 2010-12-31 2011-04-27 太原理工大学 Device for transmitting high-definition video in local area network (LAN)
KR101271480B1 (en) * 2012-10-30 2013-06-05 주식회사 삼알글로벌 Digital video recorder having appartus for receiving automatic switched image by recognizing source and method thereof
CN103024506B (en) * 2012-12-19 2016-09-28 北京赛科世纪数码科技有限公司 Circuit board, Combined integrated machine

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