The application be the applying date be February 2 calendar year 2001 day, be called the dividing an application of No. 01102605.7 application for a patent for invention of " high-effiicent adaptive DC/AC converter ".
Fig. 1 describes a traditional C CFL power-supply system 10.This system comprises a power supply 12, one CCFL drive circuits 16, one controllers 14, one feedback control loops 18 substantially, and one or more lamp CCFL that are associated with LCD control board 20.Power supply 12 provides direct voltage to circuit 16, and is controlled by controller 14 by transistor Q3.Circuit 16 is a self-resonance circuit, is known as Roy's circuit (Royer circuit).Basically, circuit 16 be a self-oscillation direct current to a-c transducer, its resonance frequency determined by L1 and C1, the number of turn of N1 to N4 indication Transformer Winding and winding.At work, alternately conducting and switch input voltage on winding N1 and the N2 respectively of transistor Q1 and Q2.If the Q1 conducting, then input voltage places on the winding N1.Voltage with relative polarity will be placed on other the winding.Induced voltage among the N4 makes the base stage of Q2 for just, and Q1 conducting by the very low voltage drop between collector and emitter.The induced voltage of N4 also makes Q2 remain on cut-off state.The Q1 conducting is till the magnetic flux in the TX1 iron core reaches capacity.
When saturated, the collector voltage fast rise of Q1 (to value) by base circuit determined, and the induced voltage in the transformer descends fast.Q1 further is pulled away from saturated, and V
CERise, cause the voltage on the N1 further to descend.Loss in the base drive causes Q1 to end, its cause again subsequently that magnetic flux in the iron core descends slightly and in N4 induction one electric current with conducting Q2.Induced voltage among the N4 makes Q1 remain on the saturation conduction state, and is in the opposite direction saturated up to iron core, then produces a similar inverse process, switches circulation to finish.
Though inverter circuit 16 is made of quite few element, the nonlinear complex interactions of transistor and transformer is depended in its suitable work.In addition, C1, the variation of Q1 and Q2 (typically being 35% tolerance) makes circuit 16 not be suitable for the shunt transformer configuration, because arbitrary the duplicating of circuit 16 all can produce additional undesirable operating frequency, this frequency may be at some harmonic wave place resonance.When being applied to the CCFL load, this circuit can produce significantly undesirable " flapping " effect in CCFL.Even tolerance is almost mated, but because circuit 16 with self-resonance pattern work, so the effect of flapping can not be removed because arbitrary the duplicating in the circuit all will have itself distinctive operating frequency.
In United States Patent (USP) the 5th, 430,641; 5,619,402; 5,615,093; Can find some other drive system in 5,818, No. 172.These documents all have poor efficiency, two-stage power conversion, frequency conversion operation, and/or the shortcoming of correlation is arranged with load.In addition, when load comprises CCFL and assembly, can introduce parasitic capacitance, thereby influence the impedance of CCFL itself.For the suitable circuit of work of effective design one, must comprise and consider that the spurious impedance that is used to drive the CCFL load designs this circuit.This effort is not only time-consuming, expensive, and, when handling different loads, also be difficult to find the converter design an of the best.Therefore need overcome these shortcomings and a circuit solution is provided, this circuit has the reliable ignition of high efficiency, CCFL, with the irrelevant power adjustment of load and the characteristics of single-frequency power transfer.
Therefore, the invention provides one in order to drive the optimizer system of load, it has obtained the best effort for the load of various LCD control board, has improved the reliability of system thus.
In a broad sense, the invention provides an AC/DC converter circuit, in order to controllably power is sent to load, it comprises an input voltage source; Selectively be connected to more than first overlapping switches and more than second overlapping switches of this voltage source, these more than first overlapping switches define first guiding path, and these more than second overlapping switches define second guiding path.Provide a pulse generator in order to produce a pulse signal.Drive circuit receives this pulse signal and controls the conducting state of this first and second a plurality of switches.Transformer with primary side and secondary side is provided, and this primary side selectively is connected to this voltage source by first guiding path or second guiding path in an alternating manner.Load is connected to the secondary side of transformer.Have a feedback loop circuit between load and drive circuit, this feedback circuit provides indication to put on the feedback signal of the power of load.The a plurality of switches of first and second of this drive circuit are in the alternate conduction state, and overlapping time of the switch in the overlapping time of the switch in more than first switch and more than second switch by turns is so that small part is connected to primary side based on feedback signal and pulse signal with voltage source.
Set up drive circuit producing the first complementary pulse signal by pulse signal, and produce ramp signal by pulse signal.This pulse signal is applied to first of this more than first switch, to control its conducting state, this ramp signal is compared with this feedback signal at least producing second pulse signal, and a may command conducting overlap condition is present between the conducting state of first and second switch of more than first switch.Second pulse signal puts on second switch of more than first switch and controls its conducting state.This drive circuit also produces one second complementary pulse signal based on this second pulse signal, and wherein first and second complementary pulse signal is controlled the conducting state of first and second switch of second most switches respectively.Similarly, a may command conducting overlap condition is present between the conducting state of first and second switch of more than second switch.
With regard to method, the invention provides a kind ofly in order to control a Zero voltage switching circuit with method to the load transmission power, the step that this method comprises has:
One direct current voltage source is provided; Connect first and second transistor of definition first guiding path and define the primary side of the 3rd and the 4th transistor of second guiding path to a voltage source and a transformer; Produce a pulse signal with predetermined pulse width; Connection one is loaded to the secondary side of this transformer; Produce a feedback signal by load; And this feedback signal of control and pulse signal, to determine this first, second, third and the 4th transistorized conducting state.
In first embodiment, the invention provides a converter circuit, in transmission power to CCFL load, it comprises a voltage source, one has the transformer of primary side and secondary side, define first pair of switch and the second pair of switch of first and second guiding path between voltage source and the primary side respectively, one is connected to the CCFL load circuit of this secondary side, produce the pulse generator of a pulse signal, one is connected to the feedback circuit that this load produces a feedback signal, and drive circuit, this drive circuit receives this pulse signal and feedback signal and based on this pulse signal and feedback signal, connect first pair of switch or second pair of switch to voltage source and primary side, with power delivery to this CCFL load.
In addition, this first embodiment provides a pulse generator, and its generation has the pulse signal of preset frequency.Said drive circuit comprises first, second, third and the moving circuit of 4 wheel driven; This first pair of switch comprises first and second transistor; Second pair of switch comprises the 3rd and the 4th transistor.This first, second, third and the moving circuit of 4 wheel driven be connected to the first, second, third and the 4th transistorized control line respectively.This pulse signal is applied to this first drive circuit, makes the first transistor conducting or end according to this pulse signal.The 3rd drive circuit is based on pulse signal, and produces the first complementary pulse signal and a ramp signal, and this first complementary pulse signal is supplied with described the 3rd transistor, makes the conducting or end according to this first complementary pulse signal of the 3rd transistor.Ramp signal is compared with feedback signal, to produce second pulse signal.This second pulse signal is applied to second drive circuit, makes the conducting or end according to second pulse signal of this transistor seconds.The moving circuit of 4 wheel driven produces one second complementary pulse signal based on second pulse signal, and this second complementary pulse signal is offered the 4th transistor, makes the conducting or end according to this second complementary pulse signal of the 4th transistor.In the present invention, the quantity of power that is transported to load has been controlled in first, second transistor and the 3rd, the 4th transistorized conducting simultaneously respectively.Overlap the pulse signal and second pulse signal of a controlled quentity controlled variable, therefore, along the first guiding path transmission power to load.Because first and second complementary pulse signal is produced by this pulse signal and second pulse signal respectively, so the also overlapping controlled quentity controlled variable of first and second complementary pulse signal that produces, power is transported to load in the mode that replaces along second guiding path between first and second guiding paths.
Simultaneously, this pulse signal of generation and the first complementary pulse signal phase difference are about 180 degree, and this second pulse signal that produces and second complementary signal differ and also be approximately 180 degree, so just can avoid the short-circuit condition between first and second guiding path.
The converter circuit that provides in first embodiment, second embodiment comprises a flip-flop circuit that is connected to this second pulse signal, and it has only when the 3rd transistor switches to conducting state, triggers second pulse signal to the second drive signal.In addition, second embodiment comprises a phase-locked loop (PLL) circuit, and it has one from first input signal of primary side and second input signal of the said feedback signal of use.Differing between this two signal of PLL circuit comparison, and provide a control signal to pulse generator, with based on differing between first and second input, control the pulsewidth of this pulse signal.
In two embodiment, preferred circuit all comprises the feedback control loop with first comparator, and this first comparator is in order to benchmark signal and feedback signal and produce first output signal.Provide second comparator in order to more said first output signal and ramp signal, and based on the crosspoint of first output signal and ramp signal and produce said second pulse signal.Feedback circuit preferably also comprises the switching circuit of a current detection circuit and between first and second comparator, this current detection circuit receiving feedback signals also produces a triggering signal, this switching circuit receives this flop signal, and, produce first output signal or predetermined minimum signal based on the value of this flop signal.This reference signal can comprise for example being a signal, and this signal is manually to produce, and is sent to the desirable power of load with indication.Should can comprise the minimum voltage of being planned of supplying with switch by predetermined minimum voltage signal, and make and in load, overvoltage condition can not take place.
Similarly, among two embodiment described here, all can provide a circuit overcurrent protection, this circuit receiving feedback signals is also controlled this pulse generator based on the value of this feedback signal.Also can provide an overvoltage protection, receiving the voltage signal and first output signal, and relatively should be, with based on coming the control impuls generator from the voltage signal values of load from the voltage signal and first output signal of load from load.
Those skilled in the art will know that though following detailed description will be illustrated with reference to preferred embodiment and using method thereof, the present invention will be restricted in these preferred embodiments and the using method thereof.Opposite, the present invention has wider scope and a claim scope of being enclosed limits.
Other characteristics of the present invention and advantage will and can become clearly with reference to the accompanying drawings with the carrying out of following detailed description, and each identical numbering is described similar elements among the figure.
Though do not wish to be limited by example, following detailed description will be carried out as the load of circuit of the present invention with reference to the CCFL control board.Yet significantly, the present invention is not limited to only drive one or more CCFL, and on the contrary, the present invention should be interpreted as the power converter circuit and the method for the certain loads that is independent of an application-specific widely.
Generally speaking, the invention provides and use feedback signal and pulse signal, controllably with the circuit of power delivery, to adjust the ON time of two pairs of switches to load.Pair of switches is made that its ON time is overlapping by conducting controllably, with power along the defined guiding path of switch being delivered to load by a transformer by this.Similarly, when another makes that for conducting controllably its ON time is overlapping to switch, power along this another to the defined guiding path of switch, (by a transformer) is transported to load.Therefore, by overlapping between actuating switch and control switch selectively, the present invention can accurately control and be transported to a power of giving fixed load.In addition, the present invention comprises overcurrent and excess voltage protection, and it interrupts the power to load under short circuit or open-circuit condition.And control switch topological structure described herein makes circuit to have nothing to do in load, and uses one to have nothing to do in the one working frequency of the resonance effect of transformer configuration and work, and these characteristics are discussed following with reference to the accompanying drawings.
Circuit diagram shown in Figure 2 shows the preferred embodiment of phase shift of the present invention, full-bridge, zero voltage switching power converter.Basically, circuit shown in Figure 2 comprises a power supply 12, a plurality of switches 80, the definition alternate conduction switch path, that be arranged to the diagonal form is right, in order to the drive circuit 50 that drives each switch, one frescan 22, one transformer TX1 (having primary side and the defined relevant resonance groove of C1 circuit) and a load by TX1 to drive circuit 50 generations one square-wave pulse.The invention has the advantages that it also comprises an overlapping feedback control loop 40, each allows controllable power to be transported to load to the ON time of switch thus at least in its control.
Power supply 12 is applied to this system.During beginning, produce one bias voltage/reference signal 30 from this power supply and be used for control circuit (at control loop 40).Best, a frescan 22 produces one 50% duty cycle pulse signal, begins and with a set rate and the downward frequency sweep of predetermined process (i.e. the square-wave signal of a variable pulse width) with a upper frequency.Frescan 22 is preferably a programmable frequency generator as known in the art.(from frescan 22) pulse signal 90 is transported to B_ drive circuit (B_Drive) (its driving switch _ B (Switch-B), be the grid of control switch _ B), and being sent to A_ drive circuit (A_Drive), this drive circuit produces a complementary pulse signal 92 and a ramp signal 26.This complementation pulse signal 92 differs greatly with pulse signal 90 and is about 180 degree, and ramp signal 26 differs about 90 degree with pulse signal, and this will be as described below.Ramp signal is preferably serrated signal as shown in FIG..This ramp signal 26 is compared with the output signal (being called CMP here) of error amplifier 32 by comparator 28, produces signal 94 thus.The output signal 94 of comparator 28 is similarly one and is transported to the conducting of 50% task pulse of C_ drive circuit (C_Drive) with initialisation switch _ C (Switch_C), and switch C determine switch B and C subsequently, and, the lap between switch A and the D.Its complementary signal (differing about 180 degree) is applied to switch D via D_ drive circuit (D_Drive).Those skilled in the art can know that drive circuit _ A circuit to drive circuit _ D circuit is connected to the control line (for example grid) of switch _ A to switch _ D (Switch_D) respectively, and this is as the conducting controllably of each switch of permission described here.By being adjusted at the lap between switch B, C and A, D, finished the lamp current adjusting.In other words, be that the lap of the conducting state of said every pair of switch has determined the quantity of power handled in transducer.Therefore, switch B, C and switch A, D will be called as overlapping switch at this.
Though do not wish to be limited to by the example among this embodiment, the B_ drive circuit is preferably by totem-pote circuit, general Low ESR operation amplifier circuit, or emitter-base bandgap grading following device circuit forms.Set up the C_ drive circuit equally.Since A_ drive circuit and D_ drive circuit directly are not connected (being unsteady) with the ground end, so these drive circuits are preferably formed by boot-strap circuit (boot_strap circuit) or other high side (high-side) drive circuit as known in the art.In addition, as mentioned above, A_ drive circuit and D_ drive circuit comprise an inverter, to reverse respectively from the signal (being phase place) of B_ drive circuit and C_ drive circuit.
Finish efficient operation via a zero voltage switching technology.Four MOSFET (switch _ A to switch _ D) 80 after its essential diode (D1-D4) conducting and conducting, this is provided at the current flow path of the energy in transformer/capacitor (TX1/C1) configuration, when these switch conductions, the voltage on them is zero thus.With this controlled work, to make switch cost be minimum and kept high efficiency.
The preferable switch operating of this overlapping switch 80 is with reference to the sequential chart of 2a-2f figure.Switch _ C disconnects (Fig. 2 f) during some of switch B and the equal conducting of C.Behind cut-off switch _ C, the electric current (with reference to figure 2) that flows in the groove flows through the diode D4 (Fig. 2 e figure) among switch _ D, primary side, C1 and the switch _ B of transformer now, make voltage and current resonance in capacitor C 1 and transformer thus, the result (Fig. 2 f) of conveying capacity during as switch B and C conducting.This state must appear in attention, because the sudden change of the sense of current of transformer primary side will be violated Faraday's law.Therefore, when switch _ C disconnects, the electric current D4 that must flow through.During the D4 circulation, switch _ D is closed.Similarly, switch _ B disconnects that (Fig. 2 a), (Fig. 2 e) electric current goes to the diode D1 that is associated with switch _ A before switch _ A closure.Equally, switch _ D is disconnected (Fig. 2 d), and electric current is at present by switch _ A flow through C1, transformer primary side and diode D3.Switch _ C (Fig. 2 e) after the D3 conducting is closed.Switch B is closed after switch _ A disconnects, and this allows diode D2 at first to be switched on before switch _ B closure.That note is the switch B that is the diagonal angle, C and A, and the overlapping decision of the ON time of D is delivered to the energy of transformer, shown in Fig. 2 f.
In this embodiment, Fig. 2 b illustrates and only produce ramp signal 26 when switch _ A is closed.Therefore, the drive circuit _ A that produces ramp signal 26 preferably comprises certain current generator circuit (not shown), and it comprises the electric capacity with appropriate time constant, to produce ramp signal.For this purpose, utilize a reference current (not shown) to be this electric capacity charging, and this electric capacity is grounded (by a for example transistor switch), makes discharge rate exceed charge rate, thus, produce a sawtooth ramp signal 26.Certainly, as noted above, this can realize that therefore, ramp signal 26 can use an integrating circuit (for example operational amplifier and electric capacity) to form by integrated pulse signal 90.
In light-off period, be two that (promptly at switch A, D and B are between C) produces a predetermined minimum overlay between the switch at diagonal angle.This produces one by the least energy that inputs to the groove circuit that comprises C1, voltage device, C2, C3 and CCFL load.What note is that load can be ohmic and/or capacitive.Driving frequency starts from a predetermined upper frequency, and near the groove circuit and by the resonance frequency of the equivalent electric circuit that secondary side reflected of transformer, lot of energy is transported to the load that is connected with CCFL up to it.Because prefiring high impedance feature, CCFL is subjected to the high voltage from the energy that is applied to primary side.This voltage is enough to the CCFL that lights a fire.The CCFL impedance drop is low to moderate its normal working value (for example about 100K ohm is to 130K ohm), and the energy that work is supplied to primary side based on minimum overlay no longer is enough to keep the steady operation of CCFL.The output of error amplifier 26 begins its regulatory function, and is overlapping to increase this.The size decision lap of error amplifier output.For example:
With reference to the feedback control loop 40 of figure 2b, 2c and Fig. 2, be important to note that when ramp signal 26 (producing) by drive circuit _ A equal (by error amplifier 32 produces it) during the value of the definite signal CMP24 of comparator 28, switch _ C closure.Shown in the crosspoint among Fig. 2 b 36.In order to prevent short circuit, switch A, B, and C, D conducting simultaneously.By control CMP size, switch A, D, and B, C between overlapping time, regulate the energy that is transported to transformer.In order to regulate the energy (and regulating the energy that is delivered to the CCFL load thus) that is delivered to transformer, by the output CMP24 of departure amplifier, switch C and D are relevant to switch A and B does time shift.Be appreciated that if enter the driving pulse of switch C and D moves to right because of the level that increases CMP from the output of comparator 28 by sequential chart, will realize the overlapping increase between switch A, C and B, the D so, thereby, the energy that is delivered to transformer increased.In fact, this is corresponding to higher lamp current work (higher-lampcurrent operation).On the contrary, move to left (by reducing the CMP signal) of the driving pulse of switch C and D reduces the energy of being carried.
For this purpose, error amplifier 32 compares a feedback signal FB and a reference voltage REF.FB measures by detecting the current value of resistance R s, and its expression is via the total current of load 20.REF wants load state for indication, the signal of the electric current of the load of for example wanting to flow through.In operate as normal, REF=FB.Yet if load condition is intentionally compensated by the dimmer switch that is associated with LCD control board demonstration, the REF value can correspondingly increase/reduction.This value that is compared correspondingly produces CMP.CMP value reaction load situation and/or one is bias voltage intentionally, and is realized by the difference between REF and FB (being REF-FB).
Be not in open-circuit condition (for example in operate as normal time open circuit CCFL lamp state) in order to protect at the load of load-side and circuit; preferably also the FB signal is compared in current sense comparator 42 with a fiducial value (not shown and different with above-mentioned REF signal), it exports the state of definition switch 28 as described below.This fiducial value can be to programme, and/or is that the user is definable, and the minimum that preferably reflects system and allowed or maximum current (for example, can specifiedly be used for individual elements, especially for CCFL load).If the value of feedback FB signal and reference signal is (operate as normal) in allowed limits, then current sense comparator is output as 1 (or high).This allows the CMP switch 38 of flowing through, and circuit is worked saidly, with transmission power to load.Yet, if the value of FB signal and reference signal (open circuit or short-circuit condition) outside preset range, current sense comparator be output as 0 (or low), forbid that the CMP signal flow is through switch 38.(certainly, can realize inverse process, wherein switch triggers at 0 state).Up to current sense comparator indication can allow the to flow through electric current of Rs, just minimum voltage Vmin is provided and is applied to comparator 28 by switch 38 (not shown).Correspondingly, switch 38 comprises and is used for suitably selecting programmable voltage Vmin when detecting electric current and be 0.Refer again to Fig. 2 b, the effect of this work is that the CMP D. C. value is reduced to rated value, and minimum value (being CMP=Vmin) makes high-voltage state not occur on transformer TX1 in other words.Therefore, crosspoint 36 is by to moving to left, and reduced the lap between complementary switch (remember in the crosspoint 36, switch _ C conducting) thus.Similarly, when current sense comparator 42 is 0 when detected value (perhaps other the expression open-circuit condition preset value) time, be connected to frequency generator 22, to close generator 22.CMP is fed to protective circuit 62.If when CCFL is removed at work (open-circuit condition), this is to close frescan 22.
For protective circuit is not in overvoltage condition, present embodiment preferably comprises protective circuit 60, below provides its work (describing overcurrent protection by above-described current sense comparator 42).Circuit 60 comprises a protection comparator 62, and it is compared with one signal CMP by the voltage signal 66 of load 20 derivation.Preferably voltage signal is derived by as shown in Figure 2 dividing potential drop capacitor C 2 and C3 (in parallel with load 20).Under open lamp state (open-lampcondition), frescan continues frequency sweep, arrives a threshold value up to OVP signal 66.OVP signal 66 is taken from the dividing potential drop capacitor C 2 and the C3 of output, to detect the voltage of transformer TX1 output.For simplifying the analysis, these electric capacity are also represented the total capacitance of equivalent load capacitance.Threshold value be a fiducial value and circuit be designed such that Circuit Fault on Secondary Transformer voltage greater than minimum ignition voltage (for example by the needed voltage of LCD control board), and less than the rated voltage of transformer.When OVP exceeded threshold value, frescan stopped frequency sweep.Simultaneously, current detecting 42 detects less than signal on detection resistance R s.Therefore, the signal at output 24 places of switch block 38 is set at minimum value, makes switch A, C and B, and overlapping between D is minimum.Best, in case when OVP exceeded threshold value, the device 64 that promptly picks up counting opened beginning one timing (time-out) sequence regularly thus.The cycle of this timing ga(u)ge time series is preferably designed according to load request (for example CCFL of LCD control board), but also can be set to programmable value.In case timing time finishes, driving pulse is disabled, and thus, provides the trouble free service output of converter circuit.That is, circuit 60 provides a sufficient voltage so that this lamp igniting, then will be closed the feasible high pressure that can avoid in the mistake of output place if this lamp is not connected to transducer after the certain hour section.Must be arranged, because non-igniting lamp ﹠ lantern is similar to the open lamp state such time period.
Fig. 3 and 3a-3f depict another preferred embodiment of AC/DC circuit of the present invention.In this embodiment, circuit is worked in the mode that is similar to Fig. 2 and 2a-2f and is provided, yet this embodiment also comprises a phase-locked loop circuit (PLL) 70, in order to control frescan 22, and a flip-flop circuit 62, regularly to import the signal of C_ drive circuit.Be appreciated that by sequential chart if the driving pulse of switch C and D moves to right 50%, just can realize increase overlapping between switch A, C and B, D, thus, has increased the energy that is delivered to transformer by increasing the size of CMP.In fact, this is corresponding to higher lamp current work (may as the manual increase of above-mentioned required for example REF voltage).On the contrary, the driving pulse of switch C and D is moved to left (by reducing the CMP signal) then reduced the energy that is transferred.Phase-locked loop circuit 70 keeps the phase relation between feedback current (through Rs) and cell current (through TX1/C1) under operate as normal, as shown in Figure 3.PLL circuit 70 preferably comprises an input signal 98 and a Rs (above-mentioned FB signal) from groove circuit (C1 and TX1 primary side).In case CCFL is lighted a fire, just, activate the PLL70 circuit, the phase place between the electric current in this a circuit locking lamp current and the resonant slots (C1 and transformer primary side) via the electric current among the Rs detection CCFL.Promptly, provide PLL to be used for changing the frequency of adjusting frescan 22 because of the parasitism that resembles temperature action, mechanical arrangements, said mechanical arrangements is the wiring between transducer and LCD control board for example, and the distance between lamp and LCD control board metal frame, these configuration affects capacitance and inductance value.It is 180 degree that this system preferably remains on differing between the electric current of resonant slots circuit and the Rs that flows through (load current).Therefore, no matter the specific load state and/or the operating frequency of resonant slots circuit, this system can find a best operating point.
The operation class of the feedback loop of Fig. 3 is similar to above explanation to Fig. 2.Yet shown in Fig. 3 b, this embodiment is by the output of trigger 72 and C_ drive circuit timing initial signal.For example, when operate as normal, the output of error amplifier 32 is fed through control switch piece 38 (as mentioned above), and the result is a signal 24.Obtain certain lap between switch A, C and B, D by comparator 28 and trigger 72, this trigger 72 driving switch C and D (remembeing that the D_ drive circuit produces the complementary signal of C_ drive circuit).This is that CCFL (control board) load provides steady operation.CCFL (control board) is removed in consideration when operate as normal, CMP is raised to the boundary value (rail of output) and the trigger protection circuit immediately of the output of error amplifier.This function is under an embargo when igniting.
General reference Fig. 3 a-3f in this embodiment, replaces trigger switch C and the D working result as flip-flop circuit 72 via C_ drive circuit and D_ drive circuit.Shown in Fig. 3 b, trigger is every once triggering, thus initialization C_ drive circuit (and, correspondingly, be the D_ drive circuit).Timing then as described above with reference to figure 2a-2f, is worked in the same manner.
Refer now to Fig. 4 a-4f, analogous diagram 2 or 3 output circuit.For example, Fig. 4 a is presented at 21 volts of whens input, and when frescan during near 75.7KHz (0.5 microsecond is overlapping), output arrives 1.67KV
P-p, if CCFL needs 3300V
P-pIgniting, then this undertension is to open CCFL.When frequency was reduced to such as 68KHZ, minimum overlay produced about 3.9KV in output
P-p, this is enough to the CCFL that lights a fire.As shown in Fig. 4 b.In this frequency, overlapping 1.5 microseconds that increase to make and export about 1.9KV
P-p, with the lamp impedance of operation 130K ohm.This illustrates in Fig. 4 c.Work when in another example, Fig. 4 d is illustrated in input voltage and is 7 volts.When 71.4KHz, before lamp is struck sparks, be output as 750Vp-p.When frequency reduced, output voltage increased, till the lamp igniting.When Fig. 4 e was illustrated in 65.8KHz, output reached 3500V
P-pThe adjusting of CCFL electric current with after igniting, is supported the impedance of 130K ohm by regulating overlapping being finished.Voltage on the CCFL is for 660V at present
RmsLamp be 1.9KV
P-pThis is also shown in Fig. 4 f.Though not shown, the emulation of the circuit of Fig. 3 shows as similar fashion.
The difference (promptly adding trigger and PLL in Fig. 3) that it should be noted first and second embodiment will can not influence the overall work parameter that proposes in Fig. 4 a-4f.Yet it is the imperfect impedance of considering in circuit that decision adds PLL, and can be used as the replacement circuit of circuit shown in Fig. 2 and add.Simultaneously, add trigger and allow to remove above-mentioned normal current circuit.
Therefore, provide the AC of an efficient adaptive significantly, the target that it is satisfied with here to be proposed.Concerning those skilled in the art, clearly can carry out some modifications.For example, use MOSFET as switch though the present invention has described, those skilled in the art can know that entire circuit can use the BJT transistor, or the transistorized combination of any type, comprises MOSFET and BJT is made up.Other modification also is possible.For example related with drive circuit _ B and drive circuit _ D drive circuit can be made up of common-collector circuit, because the transistor AND gate ground that is associated end connects, therefore, floating state can't occur.PLL circuit described here is preferably the known general PLL circuit 70 of this specialty, through suitably revising, to accept input signal as mentioned above and to produce control signal.Pulse generator 22 is preferably a pulse-width modulation circuit (PWM) or frequency range modulation circuit (FWM), and both all are well known in this specialty these.Similarly, protective circuit 62 and timer constitute by known circuit and suitably correct, carry out work with said.Other circuit will be clearly for those skilled in the art, and all such modifications all are regarded as in spirit of the present invention and scope, and scope of the present invention is only limited by the claim of enclosing.