CN100549776C - Edge electrical field switching type liquid crystal display and its manufacture method - Google Patents

Edge electrical field switching type liquid crystal display and its manufacture method Download PDF

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CN100549776C
CN100549776C CNB2005101138043A CN200510113804A CN100549776C CN 100549776 C CN100549776 C CN 100549776C CN B2005101138043 A CNB2005101138043 A CN B2005101138043A CN 200510113804 A CN200510113804 A CN 200510113804A CN 100549776 C CN100549776 C CN 100549776C
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common
line
substrate
layer
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CN1949040A (en
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施博盛
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Hannstar Display Corp
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Hannstar Display Corp
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Abstract

A kind of edge electrical field switching type liquid crystal display and its manufacture method, this method comprises: form a first metal layer on a substrate, this the first metal layer of etching is to form several gate lines, form a common electrode and one second metal level on substrate, this second metal level of etching to be forming one first electrode, one second electrode, a common line and several data lines, and form one with the overlapping pixel electrode of common electrode; This gate line and data line surround at least one closed region, and in order to hold common electrode and pixel electrode, first electrode is connected with pixel electrode, and second electrode then is connected with data line, and this common electrode directly is connected with this common line.The present invention can overcome the problem of relevant image residue in the prior art, and in addition, method of the present invention is based on existing LCD manufacture method, carries out the change of part processing procedure, and its feasibility is high, has the utilizability on the industry.

Description

Edge electrical field switching type liquid crystal display and its manufacture method
[technical field]
The invention relates to a kind of transverse electric field formula (In-Plane Switching; IPS) LCD is particularly about a kind of edge electrical field switching type (Fringed FieldSwitching; FFS) LCD and its manufacture method.
[background technology]
In present display industry, LCD (Liquid Crystal Display; LCD), have advantages such as pure flat fully, in light weight, energy savings, low electromagnetic by feat of it, little by little cathode-ray tube (CRT) (Cathode Ray Tube) has been replaced, and become main flow in the display.
But, because the refractive index of the major axis of liquid crystal molecule and short-axis direction and inconsistent.Therefore, when watching the screen of LCD from different perspectives, along with the visual angle difference, the picture of being seen is also just different.When the visual angle constantly becomes big, phenomenons such as contrast decline, color change even GTG reverse will appear.At these weakness, developed various wide viewing angle technology successively, to address the above problem.
Wherein, again with multiregional vertical align (Multi-Domain Vertical Alignment; MVA) technology and transverse electric field technology are two big camps of present wide viewing angle technology.And fringe field switches (Fringe Field Switching; FFS) technology then is a branch in the transverse electric field technology, because it has characteristics such as high-penetration degree, wide viewing angle and low aberration, is regarded as one of technology that hves great potential especially.
See also Figure 1A, be the edge electrical field switching type liquid crystal display of known techniques, the floor map of its dot structure.Edge electrical field switching type liquid crystal display comprises: a common electrode 12, a pixel electrode 110, several gate line 13, one common lines 111, several data lines 17 and a contact hole 19.Wherein, Figure 1B is the diagrammatic cross-section of the A-A transversal of Figure 1A, and Fig. 1 C then is the diagrammatic cross-section of the B-B transversal of Figure 1A.
See also Figure 1A, 1B, 1C, the manufacturing step of edge electrical field switching type liquid crystal display is summarized as follows: at first, provide a substrate 11, and form common electrode 12 thereon.Secondly, be coated with a first metal layer on substrate 11, and this first metal layer of etching, to form gate line 13, common line 111; Wherein, common line 111 directly is connected with common electrode 12, shown in Fig. 1 C., form a gate insulator 14 in substrate 11 on thereafter, and in order to lining gate line 13 and common line 111.Then, form a channel strip 15 and a doped portion 16 on gate insulator 14, and corresponding to gate line 13 one of them.Form one second metal level again on gate insulator, and whole base plate 11 is lived in lining.Secondly, this second metal level of etching is to form data line 17, one source pole 171 and a drain 172 simultaneously., form a passivation layer 18 in the gate insulator 14 of data line 17, source electrode 171, drain 172 and part on, and whole base plate 11 linings are lived thereafter.Then, this passivation layer 18 of etching, and in source electrode 171 places formation contact hole 19.At last, on passivation layer 18, form the pixel electrode 110 that covers contact hole 19 again.
Shown in Fig. 1 C, the edge electrical field switching type liquid crystal display of known techniques, it has the two layers of dielectric layer between common electrode 12 and pixel electrode, i.e. gate insulator 14 and passivation layer 18,111 on common line is sandwiched between gate insulator 14 and the common electrode 12.Because the thicker cause of its medium thickness, the driving voltage between idol (just) Tu Chang and strange (bearing) figure field can become uneven, further causes the problem of image residue (Image Sticking).
[summary of the invention]
Purpose of the present invention, promptly be to provide a kind of LCD, particularly a kind of edge electrical field switching type liquid crystal display and its manufacture method are with the number and the thickness reduction of dielectric layer, to overcome the problem of relevant image residue in the prior art, in addition, except above-mentioned advantage, because LCD manufacture method provided by the present invention, it is based on existing LCD manufacture method, carry out the change of part processing procedure, its feasibility is high, so have the utilizability on the industry.
In order to achieve the above object, the invention provides a kind of LCD, particularly a kind of edge electrical field switching type liquid crystal display, with and manufacture method, can reduce the number and the thickness that are sandwiched in the dielectric layer between common electrode and pixel electrode, therefore can improve the problem of image residue.
In order to achieve the above object, LCD manufacture method provided by the present invention comprises the following step: a substrate is provided; Form a first metal layer on substrate; This first metal layer of etching is to form several gate lines; Form a common electrode on substrate; Form one second metal level on substrate; This second metal level of etching is to form one first electrode, one second electrode, a common line and several data lines; And form a pixel electrode, itself and common electrode are overlapping, wherein gate line and data line are interlaced with each other forms a pixel region to center on, this common electrode and pixel electrode system are disposed at pixel region, first electrode is connected with pixel electrode, second electrode then is connected with one of data line, and this common electrode directly is connected with common line.
Its preferably, this LCD is an edge electrical field switching type liquid crystal display.
Its preferably, this common electrode and pixel electrode are made by transparent conductive material.
Its preferably, this common linear system is parallel with data line.
Its preferably also comprises the following step: form a passivation layer, it is between common electrode and pixel electrode.
Its preferably also comprises the following step: form a gate insulator, with lining gate line and substrate.
Its preferably also comprises the following step: form a semi-conductor layer and a doped layer on gate insulator and substrate; Etching semiconductor layer and doped layer are to form a channel strip and a doped portion, corresponding to one of gate line; Form one first transparency conducting layer on doped portion and gate insulator; Form second metal level on first transparency conducting layer; Form a photoresist layer on second metal level; And utilize a shadow tone technology processing procedure, the photoresist layer on etching one first precalculated position, and the photoresist layer on partially-etched one second precalculated position fully.
Its preferably also comprises the following step: this second metal level and first transparency conducting layer on etching first precalculated position, to form first electrode, second electrode, common electrode, wherein first precalculated position is corresponding to one of gate line.
Its preferably also comprises the following step: utilize a photoresistance ashing processing procedure, remove the photoresist layer that is positioned on second precalculated position, and the residue photoresist layer that left behind then corresponds to first electrode, second electrode and common line.
Its preferably also comprises the following step: this doped portion of etching, and to form one first doped portion and one second doped portion, it corresponds to first electrode and second electrode respectively; And this second metal level of etching, to form common line.
Its preferably also comprises the following step: remove the residue photoresist layer; Form a passivation layer on substrate; Passivation layer on etching 1 the 3rd precalculated position is to form a contact hole; Form one second transparency conducting layer on substrate; And etching second transparency conducting layer, to form pixel electrode, wherein contact hole is in order to connect first electrode and pixel electrode.
Its preferably also comprises the following step: the etching doped portion, to form one first doped portion and one second doped portion, it corresponds to first electrode and second electrode respectively.
Its preferably also comprises the following step: utilize a photoresistance ashing processing procedure, remove the photoresist layer that is positioned on second precalculated position, and the residue photoresist layer that left behind then corresponds to first electrode, second electrode and common line.
Its preferably also comprises the following step: this second metal level of etching, and to form common line.
Its preferably also comprises the following step: remove the residue photoresist layer; Form a passivation layer on substrate; Passivation layer on etching 1 the 3rd precalculated position is to form a contact hole; Form one second transparency conducting layer on substrate; And etching second transparency conducting layer, to form pixel electrode, wherein contact hole system is in order to connect first electrode and pixel electrode.
In order to achieve the above object, LCD provided by the present invention comprises: a substrate; Several gate lines are disposed on the substrate; One common electrode is disposed on the substrate; One first electrode, one second electrode, a common line and several data lines are disposed on the substrate; An and pixel electrode, itself and common electrode are overlapping, wherein this gate line and data line are interlaced with each other forms a pixel region to center on, this common electrode and pixel electrode are to be disposed at pixel region, first electrode is connected with pixel electrode, second electrode then is connected with one of data line, and this common electrode directly is connected with this common line, and common line is parallel with data line.
Its preferably also comprises a gate insulator, and it is coated on gate line and the substrate.
Its preferably, this common electrode is to be disposed on the gate insulator.
Its preferably, this common line is between common electrode and gate insulator.
Its preferably also comprises a passivation layer, and it is between common electrode and pixel electrode.
Its preferably, this common line is between passivation layer and common electrode.
Its preferably also comprises a channel strip, and it is corresponding to one of gate line.
Its preferably also comprises one first doped portion and one second doped portion.
Its preferably, this first doped portion is between first electrode and channel strip, and second doped portion, then between second electrode and channel strip.
Its preferably also comprises a contact hole, is in order to connect first electrode and pixel electrode.
In sum, LCD provided by the present invention, edge electrical field switching type liquid crystal display, with and manufacture method, be primarily characterized in that this second metal level of etching, to form first electrode, second electrode, common line and several data lines.Therefore, above-mentioned every assembly is in the same plane, and it can so can reduce the number that is sandwiched in the dielectric layer between common electrode and pixel electrode, improve the problem of image residue in forming with micro image etching procedure or in different micro image etching procedures.
[description of drawings]
Figure 1A is the floor map of prior art;
Figure 1B is the diagrammatic cross-section of Figure 1A along the A-A line;
Fig. 1 C is the diagrammatic cross-section of Figure 1A along the B-B line;
Fig. 2 A is the floor map of the present invention's first embodiment;
Fig. 2 B is the diagrammatic cross-section of Fig. 2 A along the A-A line;
Fig. 2 C is the diagrammatic cross-section of Fig. 2 A along the B-B line;
Fig. 3 A to Fig. 3 E is the processing procedure synoptic diagram of second embodiment of the invention;
Fig. 4 A is the floor map of third embodiment of the invention;
Fig. 4 B is the diagrammatic cross-section of Fig. 4 A along the A-A line; And
Fig. 4 C is the diagrammatic cross-section of Fig. 4 A along the B-B line.
[embodiment]
In order further to describe LCD provided by the present invention, edge electrical field switching type liquid crystal display and manufacture method, its detailed content and embodiment will be illustrated by each following preferred embodiment.It should be noted that each following preferred embodiment, its purpose only is detailed content of the present invention and embodiment are described, makes it be easy to understand.
See through LCD manufacture method provided by the present invention, it can reduce number and the thickness that is sandwiched in the dielectric layer between common electrode and pixel electrode, with the further problem of improving image residue, to reach predetermined purpose of the present invention.
First embodiment
See also Fig. 2 A, it is among first embodiment provided by the present invention, the floor map of a certain pixel region.Each pixel region is interlaced with each other with around forming by several gate lines 22 and several data lines 272, and comprises: pixel electrode 210, the one common line 271 that a common electrode 26, has several openings is parallel to a data line 272 and a contact hole 29.
See also Fig. 2 B, be the diagrammatic cross-section of Fig. 2 A along the A-A line.Now with first embodiment provided by the present invention, its manufacture method is described below.At first, provide substrate 21, and the first metal layer is formed thereon.Secondly, this first metal layer of etching to form several gate lines 22, then applies a gate insulator 23 again, lives the substrate 21 of gate line 22 and part with lining.Then, on gate insulator 23, form channel strip 24, doped portion 25 and common electrode 26 in regular turn, wherein doped portion 25 also comprises first doped portion 251 and second doped portion 252.Moreover, on first doped portion 251 and second doped portion 252, form first electrode 2721, second electrode 2722, data line 272 and common line 271 shown in Fig. 2 C, if first electrode, 2721 source electrodes wherein, then 2722 at second electrode can be drain.Secondly, on first electrode 2721, second electrode 2722, form a passivation layer 28, and live whole substrate 21, then again passivation layer 28 is carried out etching, on first electrode 2721, form contact hole 29 in order to lining.At last, on passivation layer 28, formation one covers the pixel electrode 210 of contact hole 29, to connect first electrode 2721.
In addition, with reference to figure 2C, it is the diagrammatic cross-section of Fig. 2 A along the B-B line.In the present embodiment in the LCD that is provided, between common electrode 26 and pixel electrode 210, only have one dielectric layer-passivation layer 28, common line 271 then is to be sandwiched between passivation layer 28 and the common electrode 26, so can improve the phenomenon of image residue whereby.In the present embodiment, common electrode 26 and pixel electrode 210, suggestion is by indium tin oxide (Indium-Tin Oxide; ITO) etc. transparent conductive material is made.
Second embodiment
Fig. 3 A to Fig. 3 E is the edge electrical field switching type liquid crystal display of the second embodiment of the present invention, and it utilizes halftone technique processing procedure (Half-Tone Technology Process), to define the processing procedure synoptic diagram of common electrode and data line simultaneously.Wherein, the right-hand part of Fig. 3 A to Fig. 3 E is the diagrammatic cross-section of Fig. 2 A along the A-A line, and its left side then is the diagrammatic cross-section of Fig. 2 A along the B-B line.
At first as shown in Figure 3A, on gate insulator 23 and substrate 21, form semiconductor layer and doped layer in regular turn.Secondly, semiconductor layer and doped layer are carried out etching,, form channel strip 24 and doped portion 253 with on a gate line 22.Moreover, on doped portion 253 and gate insulator 23, form one first transparency conducting layer 261, and form second metal level 2711 more thereon.Wherein, first transparency conducting layer 261 is also advised by transparent conductive materials such as indium tin oxide etc. made.Then, on second metal level 2711, form a photoresist layer 31 again.And then, utilize the halftone technique processing procedure again, on one first precalculated position, photoresist layer 31 is carried out complete etching, and on another second precalculated position, carry out partially-etched photoresist layer 31.
Shown in Fig. 3 B, on first precalculated position, second metal level and first transparency conducting layer 261 are carried out etching again, to form first electrode 2721, second electrode 2722, and the common electrode shown in Fig. 2 C 26, wherein first precalculated position is to correspond to one of gate line 22.
Shown in Fig. 3 C, utilize photoresistance ashing processing procedure (Photo Resistance AshingProcess), remove the photoresist layer that is positioned on second precalculated position.Wherein, the residue photoresist layer 32 that left behind then corresponds to first electrode 2721, second electrode 2722 and common line 271.That is second precalculated position is to correspond to an electrode 2721, two electrodes 2722 and logical line 271 part in addition.
Shown in Fig. 3 D, etching doped portion 253 to form first doped portion 251 and second doped portion 252, corresponds to first electrode 2721 and second electrode 2722 respectively, and this second metal level 2711 of etching, to form common line 271.Or this second metal level 2711 of first etching, to form common line 271, the etching doped portion 253 again, to form first doped portion 251 and second doped portion 252 also can.
Shown in Fig. 3 E, at first will remain after photoresist layer 32 removes fully, form a passivation layer 28, live substrate 21 with lining fully.Secondly, on one the 3rd precalculated position, passivation layer 28 is carried out etching again, to form contact hole 29.Then, on whole substrate 21, form second transparency conducting layer, and, can form pixel electrode 210 again after its etching.Wherein, pixel electrode 210 can be by contact hole 29, and electrically connects with first electrode 2721.
The 3rd embodiment
See also Fig. 4 A, it is among the 3rd embodiment provided by the present invention, the floor map of a certain pixel region.Each pixel region system is interlaced with each other with around forming by several gate lines 42 and several data lines 462, and comprises: the pixel electrode 410, that a common electrode 47, has several openings is parallel to the common line 461 and a contact hole 49 of data line 462.
See also Fig. 4 B, be the diagrammatic cross-section of Fig. 4 A along the A-A line.Now with the 3rd embodiment provided by the present invention, its manufacture method is described below.At first, provide substrate 41, and the first metal layer is formed thereon.Secondly, this first metal layer of etching to form several gate lines 42, then applies a gate insulator 43 again, lives the substrate 41 of gate line 42 and part with lining.Then, on gate insulator 43, form channel strip 44 and doped portion 45 in regular turn, wherein doped portion 45 also comprises first doped portion 451 and second doped portion 452.Moreover, on first doped portion 451 and second doped portion 452, form first electrode 4621, second electrode 4622, data line 462 and common line 461 shown in Fig. 4 C, if first electrode, 4621 source electrodes wherein, then 4622 at second electrode can be drain.Form common electrode 47 again, and on first electrode 4621, second electrode 4622, form a passivation layer 48, and live whole substrate 41, then again passivation layer 48 is carried out etching, on first electrode 4621, form contact hole 49 in order to lining.At last, on passivation layer 48, formation one covers the pixel electrode 410 of contact hole 49, to connect first electrode 4621.
In addition, with reference to figure 4C, it is the diagrammatic cross-section of Fig. 4 A along the B-B line.In the present embodiment in the LCD that is provided, between common electrode 47 and pixel electrode 410, only have one dielectric layer-passivation layer 48, common line 461 then is to be sandwiched between common electrode 47 and the gate insulator 43, so can improve the phenomenon of image residue by this.In the present embodiment, common electrode 47 and pixel electrode 410 are advised made by transparent conductive materials such as indium tin oxides.
In sum, first embodiment provided by the present invention, second embodiment and the 3rd embodiment, the main emphasis of its processing procedure all are this second metal level of etching, to form first electrode, second electrode, common line and several data lines.In the first embodiment of the present invention and the 3rd embodiment, first electrode, second electrode, common line and several data lines, it promptly is to form in micro image etching procedure, and in the second embodiment of the present invention, then is to form in different micro image etching procedures.Wherein, the difference of first embodiment and the 3rd embodiment is to define first electrode, second electrode, common line and several data lines, and the order difference of the micro image etching procedure of definition common electrode.And second embodiment then is a micro image etching procedure of integrating definition first electrically conducting transparent and second metal level, to etch common electrode, first electrode, second electrode, common line and several data lines simultaneously.
By LCD manufacture method provided by the present invention, can reduce the number and the thickness that are sandwiched in the dielectric layer between common electrode and pixel electrode, and can overcome the problem of relevant image residue in the prior art according to this.Therefore, LCD provided by the present invention, edge electrical field switching type liquid crystal display, with and manufacture method, can solve problem and shortcoming in the known techniques, so display industry is had the contribution that can not wear away, the value on the dark tool industry.
The above, only be to utilize preferred embodiment to describe technology contents of the present invention in detail, therefore, the present invention must be by the personage who has the knack of this technology, appoint and to execute that the craftsman thinks and be to modify as all, and do slightly change and adjustment, the main idea place that will not lose the present invention, the spirit and scope that also do not break away from the present invention are so still all should be considered as the present invention's further enforcement situation.
[primary clustering symbol description]
11,21,41 substrates
12,26,47 common electrodes
13,22,42 gate lines
14,23,43 gate insulators
15,24,44 channel strips
16,25,45,253 doped portions
17,272,462 data lines
18,28,48 passivation layers
19,29,49 contact holes
31 photoresist layers
32 residue photoresist layers
110,210,410 pixel electrodes
111,271,461 common lines
171 source electrodes
172 drains
261 first transparency conducting layers
251,451 first doped portions
252,452 second doped portions
2,711 second metal levels
2721,4,621 first electrodes
2722,4,622 second electrodes

Claims (22)

1. LCD manufacture method is characterized in that: comprise the following step:
A., one substrate is provided;
B. form a first metal layer on this substrate;
C. this first metal layer of etching is to form several gate lines;
D. form one second metal level on this substrate;
E. this second metal level of etching is to form one first electrode, one second electrode, a common line and several data lines;
F. form a common electrode on this substrate;
G. form a pixel electrode, itself and this common electrode is overlapping, wherein this gate line and this data line are interlaced with each other forms a pixel region to center on, this common electrode and this pixel electrode are to be disposed at this pixel region, this first electrode is connected with this pixel electrode, this second electrode then is connected with one of this data line, and this common electrode directly is connected with this common line.
2. LCD manufacture method as claimed in claim 1 is characterized in that: this common electrode and this pixel electrode are made by transparent conductive material.
3. LCD manufacture method as claimed in claim 1 is characterized in that: this common line is parallel with this data line.
4. LCD manufacture method as claimed in claim 1 is characterized in that: also comprise the following step:
Form a passivation layer, it is between this common electrode and this pixel electrode.
5. LCD manufacture method as claimed in claim 1 is characterized in that: also comprise the following step:
Form a gate insulator, with this gate line and this substrate of being covered.
6. LCD manufacture method is characterized in that: comprise the following step:
A., one substrate is provided;
B. form a first metal layer on this substrate;
C. this first metal layer of etching is to form several gate lines;
D. form one first transparency conducting layer on this substrate;
E. form one second metal level on this first transparency conducting layer;
F. form a photoresist layer on this second metal level; And
G. utilize a shadow tone technology processing procedure, this photoresist layer on etching one first precalculated position, and this photoresist layer on partially-etched one second precalculated position fully;
H. this second metal level and this first transparency conducting layer on this first precalculated position of etching, to form first electrode, second electrode, common electrode and data line, wherein this first precalculated position is corresponding to one of this gate line, and this second metal level of etching forms common line;
I. form a pixel electrode, itself and this common electrode is overlapping, wherein this gate line and this data line are interlaced with each other forms a pixel region to center on, this common electrode and this pixel electrode are to be disposed at this pixel region, this first electrode is connected with this pixel electrode, this second electrode then is connected with one of this data line, and this common electrode directly is connected with this common line.
7. LCD manufacture method as claimed in claim 6 is characterized in that: also comprise the following step:
Form a gate insulator, with this gate line and this substrate of being covered,
Form a semi-conductor layer and a doped layer on this gate insulator and this substrate;
This semiconductor layer of etching and this doped layer are to form a channel strip and a doped portion, corresponding to one of this gate line;
This first transparency conducting layer is formed on this doped portion and this gate insulator.
8. LCD manufacture method as claimed in claim 7 is characterized in that: also comprise the following step:
Utilize a photoresistance ashing processing procedure, remove this photoresist layer that is positioned on this second precalculated position, and the residue photoresist layer that left behind then corresponds to this first electrode, this second electrode and this common line.
9. LCD manufacture method as claimed in claim 8 is characterized in that: also comprise the following step:
This doped portion of etching, to form one first doped portion and one second doped portion, it corresponds to this first electrode and this second electrode respectively.
10. LCD manufacture method as claimed in claim 9 is characterized in that: also comprise the following step:
Remove this residue photoresist layer;
Form a passivation layer on this substrate;
This passivation layer on etching 1 the 3rd precalculated position is to form a contact hole;
Form one second transparency conducting layer on this substrate; And
This second transparency conducting layer of etching, to form this pixel electrode, wherein this contact hole system is in order to connect this first electrode and this pixel electrode.
11. LCD manufacture method as claimed in claim 7 is characterized in that: also comprise the following step:
This doped portion of etching, to form one first doped portion and one second doped portion, it corresponds to this first electrode and this second electrode respectively.
12. LCD manufacture method as claimed in claim 11 is characterized in that: also comprise the following step:
Utilize a photoresistance ashing processing procedure, remove this photoresist layer that is positioned on this second precalculated position, and the residue photoresist layer that left behind then corresponds to this first electrode, this second electrode and this common line.
13. LCD manufacture method as claimed in claim 12 is characterized in that: also comprise the following step:
Remove this residue photoresist layer;
Form a passivation layer on this substrate;
This passivation layer on etching 1 the 3rd precalculated position is to form a contact hole;
Form one second transparency conducting layer on this substrate; And
This second transparency conducting layer of etching, to form this pixel electrode, wherein this contact hole system is in order to connect this first electrode and this pixel electrode.
14. an edge electrical field switching type liquid crystal display is characterized in that: comprise:
One substrate;
Several gate lines are disposed on this substrate;
One first electrode, one second electrode, a common line and several data lines are disposed on this substrate;
One common electrode, be disposed on this substrate, this common line is positioned at this common electrode below, a pixel electrode, and itself and this common electrode is overlapping, wherein this gate line and this data line are interlaced with each other forms a pixel region to center on, this common electrode and this pixel electrode are to be disposed at this pixel region, and this first electrode is connected with this pixel electrode, and this second electrode then is connected with one of this data line, this common electrode directly is connected with this common line, and this common line is parallel with this data line.
15. edge electrical field switching type liquid crystal display as claimed in claim 14 is characterized in that:
Also comprise a gate insulator, it is coated on this gate line and this substrate.
16. edge electrical field switching type liquid crystal display as claimed in claim 15 is characterized in that:
This common electrode is to be disposed on this gate insulator.
17. edge electrical field switching type liquid crystal display as claimed in claim 16 is characterized in that:
This common line is between this common electrode and this gate insulator.
18. edge electrical field switching type liquid crystal display as claimed in claim 14 is characterized in that:
Also comprise a passivation layer, it is between this common electrode and this pixel electrode.
19. edge electrical field switching type liquid crystal display as claimed in claim 18 is characterized in that:
This common electrode is between this passivation layer and this common line.
20. edge electrical field switching type liquid crystal display as claimed in claim 14 is characterized in that:
Also comprise a channel strip, it is corresponding to one of this gate line.
21. edge electrical field switching type liquid crystal display as claimed in claim 20 is characterized in that:
Also comprise one first doped portion and one second doped portion, this first doped portion is between this first electrode and this channel strip, and this second doped portion, then between this second electrode and this channel strip.
22. edge electrical field switching type liquid crystal display as claimed in claim 14 is characterized in that:
Also comprising a contact hole, is in order to connect this first electrode and this pixel electrode.
CNB2005101138043A 2005-10-12 2005-10-12 Edge electrical field switching type liquid crystal display and its manufacture method Active CN100549776C (en)

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CN101957529B (en) * 2009-07-16 2013-02-13 北京京东方光电科技有限公司 FFS (Fringe Field Switching) type TFT-LCD (Thin Film Transistor Liquid Crystal Display) array substrate and manufacturing method thereof
CN101963726B (en) * 2009-07-24 2011-12-28 北京京东方光电科技有限公司 FFS (Fringe Field Switching) type TFT-LCD (Thin Film Transistor-Liquid Crystal Display) array base plate and manufacturing method thereof

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