CN100538561C - 分数除法器系统及方法 - Google Patents
分数除法器系统及方法 Download PDFInfo
- Publication number
- CN100538561C CN100538561C CNB2005100809958A CN200510080995A CN100538561C CN 100538561 C CN100538561 C CN 100538561C CN B2005100809958 A CNB2005100809958 A CN B2005100809958A CN 200510080995 A CN200510080995 A CN 200510080995A CN 100538561 C CN100538561 C CN 100538561C
- Authority
- CN
- China
- Prior art keywords
- timing error
- low
- fractional divider
- frequency clock
- clock
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000000034 method Methods 0.000 title claims description 51
- 239000013078 crystal Substances 0.000 claims abstract description 36
- 230000002618 waking effect Effects 0.000 claims abstract description 17
- 230000036316 preload Effects 0.000 claims description 23
- 238000005070 sampling Methods 0.000 claims description 12
- 238000009434 installation Methods 0.000 claims description 8
- 238000005259 measurement Methods 0.000 claims description 8
- 239000013256 coordination polymer Substances 0.000 abstract 1
- 230000008901 benefit Effects 0.000 description 18
- 238000004590 computer program Methods 0.000 description 8
- 238000010586 diagram Methods 0.000 description 6
- 230000005540 biological transmission Effects 0.000 description 2
- 230000006872 improvement Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012163 sequencing technique Methods 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 238000012937 correction Methods 0.000 description 1
- 230000001934 delay Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000012423 maintenance Methods 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 230000006641 stabilisation Effects 0.000 description 1
- 238000011105 stabilization Methods 0.000 description 1
- 230000001360 synchronised effect Effects 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K23/00—Pulse counters comprising counting chains; Frequency dividers comprising counting chains
- H03K23/64—Pulse counters comprising counting chains; Frequency dividers comprising counting chains with a base or radix other than a power of two
- H03K23/68—Pulse counters comprising counting chains; Frequency dividers comprising counting chains with a base or radix other than a power of two with a base which is a non-integer
Landscapes
- Electric Clocks (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Abstract
Description
Claims (20)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP04015423.9 | 2004-06-30 | ||
EP04015423A EP1612942A1 (en) | 2004-06-30 | 2004-06-30 | A fractional divider system and method |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1722029A CN1722029A (zh) | 2006-01-18 |
CN100538561C true CN100538561C (zh) | 2009-09-09 |
Family
ID=34925562
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB2005100809958A Expired - Fee Related CN100538561C (zh) | 2004-06-30 | 2005-06-30 | 分数除法器系统及方法 |
Country Status (3)
Country | Link |
---|---|
US (1) | US7209534B2 (zh) |
EP (1) | EP1612942A1 (zh) |
CN (1) | CN100538561C (zh) |
Families Citing this family (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI245178B (en) * | 2004-01-16 | 2005-12-11 | Realtek Semiconductor Corp | Clock generation method and apparatus |
DE102006037436A1 (de) * | 2006-08-09 | 2008-02-14 | Micronas Gmbh | Digitaler Taktteiler und Verfahren zum Betreiben eines digitalen Taktteilers |
US7518418B1 (en) | 2007-09-25 | 2009-04-14 | Hewlett-Packard Development Company, L.P. | Ratio granularity clock divider circuit and method |
US7521972B2 (en) | 2007-09-25 | 2009-04-21 | Hewlett-Packard Development Company, L.P. | Fifty percent duty cycle clock divider circuit and method |
US20090199037A1 (en) * | 2008-02-01 | 2009-08-06 | Narasimhan Venkatesh | Wake-up timer with periodic recalibration |
US8549341B2 (en) * | 2008-08-29 | 2013-10-01 | Netlogic Microsystems, Inc. | System and method for reducing latency associated with timestamps in a multi-core, multi-threaded processor |
US8004319B2 (en) | 2009-11-30 | 2011-08-23 | Freescale Semiconductor, Inc. | Programmable clock divider |
CN106953630B (zh) * | 2017-03-16 | 2023-03-31 | 中国科学院武汉物理与数学研究所 | 用于汞离子微波频标的高速脉冲信号计数装置及其方法 |
WO2019024064A1 (zh) * | 2017-08-04 | 2019-02-07 | 深圳市汇顶科技股份有限公司 | 定时方法、时钟设备和终端设备 |
CN112953514B (zh) * | 2021-03-09 | 2024-03-22 | 炬芯科技股份有限公司 | 校准蓝牙时钟的方法和装置 |
WO2023151793A1 (en) * | 2022-02-10 | 2023-08-17 | Huawei Digital Power Technologies Co., Ltd. | Timer circuit and method for providing adjustable frequency timing in a closed-loop control circuit |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3132810B2 (ja) * | 1997-02-21 | 2001-02-05 | 松下電器産業株式会社 | 拡散型分数分周器 |
EP0954105A1 (de) * | 1998-04-29 | 1999-11-03 | Siemens Aktiengesellschaft | Phasenregelkreis mit gebrochenem Teilverhältinis |
AU7724800A (en) * | 1999-09-27 | 2001-04-30 | Parthus Technologies Plc | Method and apparatus for in the field wireless device calibration |
DE10009683A1 (de) * | 2000-02-29 | 2001-08-30 | Nokia Mobile Phones Ltd | Verfahren zum Unterbrechen eines Ruhezustandes einer Kommunikationseinheit in einem Kommunikationssystem, insbesondere in einem Funk-Kommunikationssystem |
US6725067B1 (en) * | 2000-03-24 | 2004-04-20 | International Business Machines Corporation | Method and system for restarting a reference clock of a mobile station after a sleep period with a zero mean time error |
US6449329B1 (en) * | 2000-09-14 | 2002-09-10 | Qualcomm Incorporated | Dual-edge M/N:D counter |
JP3688683B2 (ja) * | 2003-01-31 | 2005-08-31 | 株式会社東芝 | 分数分周器、テレビ受信機、ビデオ信号用集積回路及び分数分周器方法 |
-
2004
- 2004-06-30 EP EP04015423A patent/EP1612942A1/en not_active Withdrawn
-
2005
- 2005-06-16 US US11/154,095 patent/US7209534B2/en not_active Expired - Fee Related
- 2005-06-30 CN CNB2005100809958A patent/CN100538561C/zh not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
CN1722029A (zh) | 2006-01-18 |
US7209534B2 (en) | 2007-04-24 |
EP1612942A1 (en) | 2006-01-04 |
US20060001498A1 (en) | 2006-01-05 |
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Owner name: INTEL MOBILE COMMUNICATIONS TECHNOLOGY LTD. Free format text: FORMER OWNER: INFINEON TECHNOLOGIES AG Effective date: 20120608 Owner name: INTEL MOBILE COMMUNICATIONS LTD. Free format text: FORMER OWNER: INTEL MOBILE COMMUNICATIONS TECHNOLOGY LTD. Effective date: 20120608 |
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Owner name: INFINEON TECHNOLOGIES AG Free format text: FORMER NAME: INFENNIAN TECHNOLOGIES AG |
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Address after: Neubiberg, Germany Patentee after: Infineon Technologies AG Address before: Munich, Germany Patentee before: INFINEON TECHNOLOGIES AG |
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Effective date of registration: 20120608 Address after: Neubiberg, Germany Patentee after: Intel Mobile Communications GmbH Address before: Neubiberg, Germany Patentee before: Infineon Technologies AG Effective date of registration: 20120608 Address after: Neubiberg, Germany Patentee after: Intel Mobile Communications GmbH Address before: Neubiberg, Germany Patentee before: Intel Mobile Communications GmbH |
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C56 | Change in the name or address of the patentee | ||
CP01 | Change in the name or title of a patent holder |
Address after: Neubiberg, Germany Patentee after: Intel Mobile Communications GmbH Address before: Neubiberg, Germany Patentee before: Intel Mobile Communications GmbH |
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Effective date of registration: 20200721 Address after: California, USA Patentee after: Apple Inc. Address before: California, USA Patentee before: INTEL Corp. Effective date of registration: 20200721 Address after: California, USA Patentee after: INTEL Corp. Address before: Neubiberg, Germany Patentee before: Intel Mobile Communications GmbH |
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CF01 | Termination of patent right due to non-payment of annual fee | ||
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Granted publication date: 20090909 Termination date: 20210630 |