CN100533537C - Driving device for increasing bit and method - Google Patents
Driving device for increasing bit and method Download PDFInfo
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- CN100533537C CN100533537C CNB2006100877752A CN200610087775A CN100533537C CN 100533537 C CN100533537 C CN 100533537C CN B2006100877752 A CNB2006100877752 A CN B2006100877752A CN 200610087775 A CN200610087775 A CN 200610087775A CN 100533537 C CN100533537 C CN 100533537C
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Abstract
The invention discloses a driving circuit and method to increase effective bit of source electrode driver, which generates a group of compensating reference voltage level through reference voltage generating device not to repeat the original reference voltage level, wherein one group of reference voltage level is selected from multiple groups of reference voltage level through one or more lowest signal, which is transmitted to the digital-analog converter of source electrode driver to increase the grey step of the display effectively.
Description
Technical field
The present invention system is relevant with a kind of driver circuit of display panels, particularly about a kind of liquid crystal display-driving circuit and method of significance bit of increase source electrode driver.
Prior art
LCD is used on computing machine or the TV screen at present widely owing to have low radiation, low power consuming and advantage such as in light weight.Yet (Digital-to-Analog converter DAC) is example, and it only can show 64 GTGs, can't satisfy general user's demand already with traditional 6 bit digital analog converters.Therefore, some methods that increase significance bits just produce thereupon, for example utilize figure rate control (Frame rate control, FRC) technology and increase the number of significant digit of digital analog converter.For instance, present in regular turn, thereby formed 5 different color ranges in visual effect by formed four figure of original B﹠W; In these 5 color ranges, it is original color range that two color ranges are arranged, for example complete black and complete white, and (Frame rate control, FRC) technology produces by figure rate control in its three color range systems.Therefore, when the FRC technology is used in 1 DAC, can obtain to be close to the effect of 3 DAC, that is to say that picture shows in 5 GTG modes.Identical, when the DAC that is used for 2, can obtain to be close to the effect of 4 DAC, show 13 GTGs.Same, when the DAC that is used for 6, can obtain to be close to the effect of 8 DAC, picture presents 253 GTGs.Yet figure rate control FRC also can't intactly present the GTG group of digital analog converter DAC; For example, use 6 digital analog converter DAC, only present 253 GTGs but not 256 GTGs.Therefore, need a kind of method or framework can improve or replace the shortcoming of above-mentioned FRC, but still have the low cost and the advantage that reduces area of its DAC that uses low level.
Summary of the invention
Fundamental purpose of the present invention does not tie up to and need replace the script low level, put before the digital analog converter cheaply to use a high position, expensive digital analog converter, increases the significance bit of the digital analog converter of source electrode driver.Therefore, can be economical and increase shown GTG effectively and improve the resolution of liquid crystal panel simultaneously.
According to a first aspect of the present invention, a kind of circuit of display driving is provided, comprise the multiple source driver, wherein each source electrode driver comprises the digital analog converter of a n position, this circuit of display driving comprises: one first reference voltage generating device, in order to produce one first group of voltage level, wherein this first group of voltage level used so that the digital analog converter of this n position produces one first group 2
nIndividual output voltage; At least one second reference voltage generating device, in order to produce at least one second group of voltage level, wherein this second group of voltage level used so that the digital analog converter of this n position produces at least one second group 2
nIndividual output voltage, wherein this second group of voltage level and this first group of voltage level do not repeat mutually; And a selecting arrangement, by at least one lowest order signal, in a time cycle, select above-mentioned many groups voltage level in regular turn in the digital analog converter of this n position, make the digital analog converter of this n position that this display at least 2 is provided
N+1Individual output voltage.
According to a second aspect of the present invention, a kind of gamma electric voltage control method is provided, in order to the significance bit of the digital analog converter that increases source electrode driver, it comprises following steps: a plurality of original gamma electric voltage level and a plurality of compensation gamma electric voltage level are provided; By at least one lowest order signal, by selecting a plurality of gamma electric voltages in these a plurality of original gamma electric voltage level and these a plurality of compensation gamma electric voltage level; And in regular turn input this selecteed a plurality of gamma electric voltages in this digital analog converter, wherein these a plurality of original gamma electric voltages and the interlaced with each other and non-overlapping copies of these a plurality of compensation gamma electric voltages.
According to a third aspect of the present invention, a kind of source electrode driver of LCD is provided, it comprises: a data buffer, in order to input and output digital image data; One breech lock is in order to receive the digital image data of this data buffer; One selector switch in order to receive many group reference voltage levels and by one or more lowest order signal it to be controlled, constantly to select and to export the set of reference voltages of being chosen in regular turn, wherein should many group reference voltages repeat and interlaced with each other mutually; One digital/analog converter in order to receiving above-mentioned this group reference voltage and above-mentioned digital image data, in order to converting simulating signal to, and is exported this simulating signal to one LCD; And an output circuit, in order to the output data that receives and amplify this digital/analog converter.
Thereby, driving circuit and method according to the LCD of increase source electrode driver significance bit of the present invention, by a reference voltage generating device produce one with one of staggered reference voltage level (level) group of primary voltage level group, wherein those many group voltage levels are that (Least significant bits LSBs) is controlled by one or more lowest order signal.
Description of drawings
State with other purpose, feature and advantage and can become apparent on the present invention for allowing, a preferred embodiment cited below particularly, and conjunction with figs. are described in detail below:
The skeleton diagram of Fig. 1 (A)～Fig. 1 (C) demonstration the present invention's the liquid crystal display panel drive circuit and the source electrode driver chip for driving of collocation;
Fig. 2 (A)～Fig. 2 (C) is depicted as process according to the invention, makes 2 DAC have the function of 3 and 4 DAC;
The skeleton diagram of Fig. 3 (A)～Fig. 3 (B) demonstration the present invention's another liquid crystal display panel drive circuit and the source electrode driver chip for driving of collocation; And
Figure 4 shows that according to the present invention the experimental curve diagram of one of 6 DAC increase.
Embodiment
Fig. 1 (A) is depicted as the structure skeleton diagram according to the liquid crystal display panel drive circuit 10 of one embodiment of the invention.Display panels driver circuit 10 comprises a gamma electric voltage generation device (Gamma voltage generator) 17, one direct current power supply changeover device (DC/DCconverter) 16, time schedule controller (Timing controller basically, T-con) 14, one of constituted source electrode driver (source driver) 13, constituted a gate drivers (gate driver) 12, and a display panels 11 by a plurality of line driver by a plurality of line driver.And this display panels has comprised the liquid crystal molecule that is driven by gate drivers 12 and source electrode driver 13 in a large number.Digital image signal, as R, G, the B signal of video signal is imported these time schedule controllers 14 with synchronizing signal by an input interface (Input interface, I/F In) 15; This gate drivers 12 is by the signal that this time schedule controller 14 is provided afterwards, controlled image show in preface; And source electrode driver 13 receives the signal of video signal that this time schedule controller transmitted; Therefore therefore produce picture on the display panels 11.Dc power converter (DC/DCconverter) 16 is in order to provide each circuit required power supply, for example gamma electric voltage generation device (Gamma voltage generator) 17, time schedule controller (Timing controller, T-con) 14, source electrode driver (source driver) 13, gate drivers (gate driver) 12 or the like.In addition, above-mentioned digital image signal is during through source electrode driver 13, with processed and convert the analog image signal to; And gamma electric voltage producer 17 produces a gamma electric voltage level, digital analogue signal generator (the Digital-to-Analogconverter of input source driver 13 then, DAC), in order to proofread and correct and to have compensated the nonlinear torsional deformation that signal of video signal manifested on the display panels 11.
Wherein, this gamma electric voltage generation device 17 is a composite reference device for generating voltage, and in order to produce a gamma electric voltage level, this gamma electric voltage voltage level comprises one group of original reference voltage level and at least one group of compensate for reference voltage level.And shown in Fig. 1 (A), another reference voltage device for generating voltage 720A embeds this gamma electric voltage generation device 17, in order to produce this compensate for reference voltage level group.In other words, according to this gamma electric voltage generation device 17 of present embodiment by two above reference voltage generating devices be integrated into one form; And those reference voltage generating devices, one is used to produce this original reference voltage level group, and other then is used to produce this compensate for reference voltage level group.Further, the one or more control signal of time schedule controller (T-con) 14 inputs is in above-mentioned gamma electric voltage generation device 17 (comprising this reference voltage device for generating voltage 720A), wherein this control signal comprises one or more lowest order signal (least significant bits by it, LSBs), selection is also arranged those above-mentioned reference voltage level groups, enters this source electrode driver 13.In addition, those lowest order signals LSBs follows above-mentioned R, and G, B digital image signal import this time schedule controller (T-con) 14.So above-mentioned primary voltage level group and compensate for reference voltage level group just are provided for the digital analog converter DAC of source electrode driver 13 successively with alternating, so the significance bit of this source electrode driver just increases thereupon.In addition, this compensate for reference voltage level group is different from this primary voltage level group; That is to say this compensation voltage level group and this primary voltage level group non-overlapping copies and interlaced with each other.Though the reference voltage device for generating voltage 720A that present embodiment disclosed embeds this gamma electric voltage generation device 17, it also can be that independently integrated circuit or design are integrated in a circuit or the integrated circuit (IC) apparatus individually.In addition, the internal wiring of this reference voltage generating device 720A is identical with general line design, so do not specify.And driving method of the present invention will at length be inquired in follow-up again.
Fig. 1 (B) is depicted as the structure general block diagram of liquid crystal display panel drive circuit 10 according to a further embodiment of the invention.It embeds this source electrode driver 13 with a reference voltage generating device 720B.This reference voltage generating device 720B and this gamma electric voltage generation device 17 provide the digital analog converter DAC of its many groups that produce reference voltage level to source electrode driver 13.Wherein one or more first control signal of this time schedule controller (T-con) 14 inputs is given gamma electric voltage producer 17, imports one or more second control signal and gives reference voltage generating device 720B.Therefore, the group reference voltage level alternates and alternately constantly offers the digital analog converter DAC of source electrode driver 13 more than above-mentioned.Further, the first above-mentioned control signal and second control signal have at least one to comprise one or more lowest order signal between the two; (least significant bits LSBs) selects and arranges those above-mentioned reference voltage level groups, particularly the reference voltage level group that is produced by this reference voltage generator 720B so the present invention is by one or more lowest order signal.Wherein, those lowest order signals LSBs system follows R, G, B digital image signal input timing controller (T-con) 14.And identical, this compensate for reference voltage level is different from this primary voltage level; That is to say this compensation voltage level and this primary voltage level non-overlapping copies and interlaced with each other.In addition, though the reference voltage device for generating voltage 720B that present embodiment disclosed system embeds this source electrode driver 13, it also can be that independently integrated circuit or design are integrated in a circuit or the integrated circuit (IC) apparatus individually.
Shown in the chip for driving skeleton diagram of the source electrode driver 13 of Fig. 1 (C), and digital analog converter (Digital-to-Analog converter, DAC) 130 is that of source electrode driver 13 forms assembly; Its required reference voltage level provides by previous described reference voltage generating device 720A or 720B or gamma electric voltage generation device 17, and then reaches and proofread and correct and the effect that has compensated the nonlinear torsional deformation that signal of video signal manifested on the display panels 11.But generally speaking, digital analog converter (Digital-to-Analog converter, DAC) be to constitute by a large amount of resistance, it has occupied the chip for driving overwhelming majority area of source electrode driver, when figure place big more, its needed area is big more, so it has decisive influence to the source electrode driver size.Yet drive circuit structure according to the present invention and driving method, just available 6 DAC of this source electrode driver 13 replace 8 DAC expensive, large volume.Therefore, source electrode driver big young pathbreaker suitably controlled, and the driving circuit 10 of whole LCD just can be controlled in a reasonably size; Same, manufacturing cost also can effectively reduce.
For instance, the digital analog converter DAC 130 of a n position has comprised 2
n-1 resistance; Be one another in series between its resistance, and node voltage V0 is provided, V1 ..., V2
n-2, and V2
n-1; (transmission gate TG) selects the usefulness of one of them node voltage as simulation output via the transmission valve.(transmission gate TG) receives two adjacent node voltages to each transmission valve, selects one of them and propagates into another transmission valve downwards.Therefore, obtained final simulation output Bn...B1B0.And the reference voltage level of the generation of mentioning in the above is provided on these nodes that some choosings of resistors of connection are selected continuously.For instance, the reference voltage level group that is produced by gamma electric voltage generation device 17 can optionally be provided in the V0 of 6 bit digital analog converters, V15, and V31 is on these nodes of V47 and V63.
The present invention is not needing to use a high position, expensive digital analog converter to replace originally low level, put before the digital analog converter cheaply, and the circuit and the method for the significance bit of a digital analog converter DAC 130 who increases source electrode driver 13 is provided.Therefore, economical and increase shown GTG effectively and improve the resolution of liquid crystal panel simultaneously.The present invention utilizes specific reference voltage level group to apply to digital analog converter 130, produces desired GTG, to reach purpose of the present invention.For example, provide the source electrode driver of one group of reference voltage level to a n position.According to Ohm law, its digital analog converter DAC can produce 2
nVoltage.And according to the present invention, this digital analog converter will be organized reference voltage level according to another and produce other 2
nVoltage.Therefore, the digital analog converter DAC of this source electrode driver can produce 2
N+1Voltage, and promote the shown color depth (colordepth) of display panels.And compare with the source electrode driver of a n+1 position, the institute of its digital analog converter DAC comprises number of resistors and can significantly reduce.Therefore, the digital analog converter DAC of n position not only cost is cheap more than the digital analog converter DAC of n+1 position, and also little many than the digital analog converter of n+1 position of the area of its shared source electrode driver.At gamma electric voltage control (GVC) system aspects, least significant bit (LSB) signal LSBs is that it is used that other position then can be the digital analogue signal conversion in order to selection reference voltage level group.For instance, if two signals are used to the selection of reference voltage level, then this digital analog converter only needs 2
N-2Individual resistor, and still preserve 2
nOutput voltage.In addition, if the present invention also can be combined with the FRC technology, and then reach the spinoff that reduces FRC.
By the example of a shown simplification of Fig. 2 (A)～Fig. 2 (C), be described in further detail the present invention and how make original 2 digital analog converter that the function of 3 and 4 bit digital analog converters effectively is provided.Fig. 2 (A) is shown as the primary voltage level group of the digital analog converter 130 that is used for above-mentioned Fig. 1 (C), and (Vo1=4V Vo2=1V), provides an output voltage group by the node in the middle of the resistor R, comprises four voltage 1V, 2V, 3V, and 4V.In order to increase the significance bit of this digital analog converter 130, the present invention by a device for generating voltage provide with Fig. 2 (A) in the new voltage level group (V11=3.5V of the primary voltage level non-overlapping copies that shows, V12=0.5V), make this digital analog converter 130 produce another group output voltage, 0.5V for example, 1.5V, 2.5V, and 3.5V; New voltage level group and primary voltage level group are interlaced with each other, and alternately are used for this digital analog converter with primary voltage level group.In other words, for example,, these primary voltage level groups are used for a digital analog converter,, produce one first output voltage through those resistance and transmission valve first time; One second later time, these new voltage level groups are used for same digital analog converter afterwards,, produce one second output voltage through those resistance and transmission valve; In addition, similarly, this first output voltage and this second output voltage non-overlapping copies, and interlaced with each other.Previous embodiment according to the present invention describes, and the selection of this voltage level of two groups and sequential are defined (shown in Fig. 1 (A) and Fig. 1 (B)) by a least significant bit (LSB).In particular, when least significant bit (LSB) LSB is logic high (logi chigh), this digital analog converter 130 will be exported one first voltage group, comprise this four voltage 1V, 2V, 3V, and 4V (or being equivalent to 001,011,101 and 111); After this, when least significant bit (LSB) LSB is logic low (logic low), this digital analog converter 130 will be exported one second voltage group, comprise the voltage 0.5V of those new generations, 1.5V, 2.5V, and 3.5V (or being equivalent to 000,010,100 and 110).In like manner, original 2 digital analog converter is reached the function of 3 digital analog converter effectively, so the color depth on the display panels 11 (color depth) also improves thereupon.
And Fig. 2 (C) illustrates how original 2 bit digital analog converters provide another example of 4 function effectively.The voltage level group of in Fig. 2 (C), being showed comprise original 2 voltage level (Vo1=4V, Vo2=1V) and other voltage level (V11=3.75V, V12=0.75V; V21=3.5V, V22=0.5V; V31=3.25V, V32=0.25V).Here two groups voltage level in the example before replacing adopts four groups voltage level, and is controlled the selection and order of this voltage level of four groups by two least significant bit (LSB)s (LSBs).In particular, this LSBs is a logical one 1, and in first time, this digital analog converter will be according to primary voltage level group (Vo1=4V, Vo2=1V) output one first voltage group comprises following four voltage 1V, 2V, 3V, and 4V (or being equivalent to 0011,0111,1011 and 1111); One second time, this LSBs is a logical one 0, this digital analog converter will (V11=3.75V V12=0.75V) exports one second voltage group, comprises following four voltage 0.75V according to new generation voltage level group, 1.75V, 2.75V, and 3.75V (or is equivalent to 0010,0110,1010 and 1110); One the 3rd time, this LSBs is a logical zero 1, this digital analog converter will (V21=3.5V V22=0.5V) exports a tertiary voltage group, comprises following four voltage 0.5V according to new generation voltage level group, 1.5V, 2.5V, and 3.5V (or is equivalent to 0001,0101,1001 and 1101) be used to this digital analog converter; At last, one the 4th time, this LSBs is a logical zero 0, and this digital analog converter will be according to new generation voltage level group (V31=3.25V, V32=0.25V) output one the 4th voltage group, comprise following four voltage 0.25V, 1.25V, 2.25V, and 3.25V (or is equivalent to 0000,0100,1000 and 1100).In like manner, original 2 digital analog converter is realized the function of 4 digital analog converter effectively, so the color depth on the display panels 11 (color depth) improves thereupon.
What pay special attention to is that four groups voltage level alternates in different time and alternately is used for this digital analog converter.And according to the description to Fig. 2 (A)～Fig. 2 (C), should be based on same principle and inference, one is used the display panels 11 of 6 source electrode driver also can realize 8 source electrode driver function effectively, and manifests 256 resolution for output voltage.
Fig. 3 (A) is depicted as the structure general block diagram of liquid crystal display panel drive circuit 20 according to yet another embodiment of the invention.Liquid crystal display panel drive circuit 20 comprise basically gamma electric voltage generation device (Gamma voltagegenerator) 21, one a direct current power supply changeover device (DC/DC converter) 22 that two groups of above reference voltages are provided at least, time schedule controller (timing controller, T-con) 23, one by source electrode driver (source driver) 24, that a plurality of line driver constituted by a gate drivers (gatedriver) 25 and a display panels 26 that a plurality of row driver constituted.And this display panels 26 has comprised the liquid crystal molecule that is driven by gate drivers 25 and source electrode driver 24 in a large number.Digital image signal, as R, G, the B signal of video signal, (Inputinterface I/FIn) 27 imports these time schedule controllers 23 by an input interface with synchronizing signal; This gate drivers 25 is by the signal that this time schedule controller 23 is provided afterwards, controlled image show in preface; And source electrode driver 24 receives the signal of video signal that this time schedule controller transmitted; Therefore on display panels 26, just produced picture.And dc power converter (DC/DC converter) 22 is in order to provide each circuit required power supply, for example gamma electric voltage generation device (Gammavoltage generator) 21, time schedule controller (Timing controller, T-con) 23, source electrode driver (source driver) 24, gate drivers (gate driver) 25 or the like.In addition, above-mentioned digital image signal is during through source electrode driver 24, with processed and convert the analog image signal simultaneously to; And gamma electric voltage generation device 21 will produce digital analogue signal generator (the Digital-to-Analog converter of the above gamma electric voltage of at least two groups in source electrode driver 24, DAC), in order to proofread and correct and to have compensated the nonlinear torsional deformation that signal of video signal manifested on the display panels 24.In addition, this gamma electric voltage producer 21 is for comprising plural reference voltage generating device at least, or is integral by integrated circuit (IC) design.
Fig. 3 (B) shows that one is applied to the skeleton diagram of integrated circuit (IC) chip of the source electrode driver 24 of a specific embodiment of the present invention, comprises moving comprising offset buffer (Shift register) 241, data buffer (Data register) 242, breech lock (Latch) 243, level shifter (Levelshifter) 244, selector switch (selector) 245, digital analog converter DAC246 and output amplifier (output buffer) 247.Offset buffer (shift register) 241 sees through a source electrode clock signal (CLK), and (start horizontal signal STH1/STH2) converts synchronizing signal to horizontal start signal.Data buffer (data register) 242 is according to 241 output signals of offset buffer (shift register), and by R, G, B signal of video signal take a sample successively and export the data line of each row to.This moment, breech lock (latch) 243 pinned this R by data buffer (data register) 242, G, B signal of video signal by a load signal (Load).After the voltage level of the signal of video signal that suitably moves these pinnings via level shifter (level shifter) 244, digital analog converter 246 makes those signal of video signal be transformed into the simulating signal of equivalence.Output amplifier this moment (output buffer) 247 according to a polar signal (polarity signal, POL) enlarge and the signal of video signal of exporting these transformations to display panels 26.Be input to the selector switch 245 of this source electrode driver simultaneously by the first group of reference voltage level that adds that agate device for generating voltage 21 produces and second group of reference voltage level, wherein this selector switch 245 can be that switch or time schedule controller constitute.Once select one group of reference voltage level to give this digital analog converter DAC 246 by this selector switch.And the selection of above-mentioned reference voltage level group system is controlled by one or more least significant bit (LSB) signal (leastsignificant bit (s) (LSBs)), with Fig. 3 (B) is example, and above-mentioned least significant bit (LSB) signal LSBs comes from this level shifter (level shifter) 244.
Fig. 4 increases by 6 digital analog converter for the present invention one experimental curve diagram; This figure with square frame show that 6 bit digital analog converters are originally provided 64 (2
6) individual output voltage, can provide 128 (2 with stain (filled circles) display application the inventive method and framework in this 6 bit digital analog converter
7) individual output voltage, that is to say effect with 7 (6+1) bit digital analog converter.Therefore use the liquid crystal display drive circuit of 6 source electrode driver also can effectively realize the function of 7 potential source drivers, make display panels obtain high-resolution 128 output voltages.
As mentioned above liquid crystal display drive circuit and the driving method according to the present invention mainly imports more than one at least reference voltage generating device with so that this LCD has 2
N+mOutput voltage.In more detail, the driving circuit of display panels comprises the multiple source driver, and wherein each source electrode driver comprises the digital analog converter of a n position, a gamma electric voltage generation device, and 2
m-1 reference voltage generating device.This gamma electric voltage generation device produces one first group of reference voltage level, and for example original gamma electric voltage level then inputs to the digital analog converter of those n positions, makes it produce one first group 2
nOutput voltage; Each reference voltage generating device produces one second group of reference voltage level, for example compensates the gamma electric voltage level, then inputs to the digital analog converter of those n positions, makes it produce one second group 2
nOutput voltage; Wherein this second group of reference voltage level and this first group of reference voltage level do not repeat mutually.That is to say that the voltage level level of these primary voltage level and compensation is interlaced with each other.In like manner can demonstrate,prove, many groups voltage that this digital analog converter is exported does not repeat mutually, and interlaced with each other.In addition, the selection and the arrangement of above-mentioned reference voltage level group are arranged in pairs or groups a selecting arrangement and are controlled by one or more lowest order signal.Therefore, the method according to this invention and framework, the source electrode driver of this each n position just can provide this display at least 2 at least
N+1Output voltage, generally can be reached for 2
N+mOutput voltage, wherein n and m are positive integer.Further, the number of reference voltage generating device is to decide according to institute's product demand.
The present invention's technology contents and technical characterstic; though only disclose as above with some preferred embodiments; right its is not in order to limit the present invention; any those skilled in the art; without departing from the spirit and scope of the invention; when can doing various changes and modification, so the present invention's protection domain attached claims person of defining after looking is as the criterion.
Claims (20)
1, a kind of circuit of display driving comprises the multiple source driver, and wherein each source electrode driver comprises the digital analog converter of a n position, and this circuit of display driving comprises:
One first reference voltage generating device, in order to produce one first group of voltage level, wherein this first group of voltage level used so that the digital analog converter of this n position produces one first group of 2n output voltage;
At least one second reference voltage generating device, in order to produce at least one second group of voltage level, wherein this second group of voltage level used so that the digital analog converter of this n position produces at least one second group 2
nIndividual output voltage, wherein this second group of voltage level and this first group of voltage level do not repeat mutually; And
One selecting arrangement by at least one lowest order signal, in a time cycle, selects above-mentioned many groups voltage level in the digital analog converter of this n position in regular turn, makes the digital analog converter of this n position that this display at least 2 is provided
N+1Individual output voltage.
2, circuit of display driving as claimed in claim 1, wherein the number of this second reference voltage generating device is 2
m-1, and m is a positive integer.
3, circuit of display driving as claimed in claim 2, wherein each source electrode driver provides 2
N+mIndividual output voltage is given this display.
4, circuit of display driving as claimed in claim 1 also comprises a sequential control device, and it is exported at least one control signal and gives this first reference voltage generating device or this second reference voltage generating device or both.
5, circuit of display driving as claimed in claim 4, wherein this control signal comprises this lowest order signal, and this control signal inputs to this time schedule controller by digital image signal.
6, circuit of display driving as claimed in claim 1, wherein this digital analog converter is formed by many resistance series connection.
7, circuit of display driving as claimed in claim 6 wherein is provided in to those selecteed voltage level group selections some specific contacts between those resistance in seriess.
8, circuit of display driving as claimed in claim 1, wherein this first reference voltage generating device and this second reference voltage generating device are integrated into one.
9, circuit of display driving as claimed in claim 1, wherein this second reference voltage generating device embeds this source electrode driver.
10, a kind of gamma electric voltage control method, in order to the significance bit of the digital analog converter that increases source electrode driver, it comprises following steps:
A plurality of original gamma electric voltage level and a plurality of compensation gamma electric voltage level are provided;
By at least one lowest order signal, by selecting a plurality of gamma electric voltages in these a plurality of original gamma electric voltage level and these a plurality of compensation gamma electric voltage level; And
Import these selecteed a plurality of gamma electric voltages in regular turn in this digital analog converter,
Wherein these a plurality of original gamma electric voltages and the interlaced with each other and non-overlapping copies of these a plurality of compensation gamma electric voltages.
11, gamma electric voltage control method as claimed in claim 10, wherein this lowest order signal is provided by a time schedule controller or a level shift circuit.
12, gamma electric voltage control method as claimed in claim 10 wherein selects the mode of these a plurality of gamma electric voltages switch of arranging in pairs or groups to be reached.
13, gamma electric voltage control method as claimed in claim 10, wherein this digital analog converter comprises a plurality of resistance in seriess.
14, gamma electric voltage control method as claimed in claim 13, also comprising optionally provides this selecteed gamma electric voltage level some specific contacts between these a plurality of resistance in seriess.
15, a kind of source electrode driver of LCD, it comprises:
One data buffer is in order to input and output digital image data;
One breech lock is in order to receive the digital image data of this data buffer;
One selector switch in order to receive many group reference voltage levels and by one or more lowest order signal it to be controlled, constantly to select and to export the set of reference voltages of being chosen in regular turn, wherein should many group reference voltages repeat and interlaced with each other mutually;
One digital/analog converter in order to receiving above-mentioned this group reference voltage and above-mentioned digital image data, in order to converting simulating signal to, and is exported this simulating signal to one LCD; And
One output circuit is in order to the output data that receives and amplify this digital/analog converter.
16, the source electrode driver of LCD as claimed in claim 15 also comprises an offset buffer, and in order to input and conversion synchronization signal, wherein this synchronizing signal is in order to control the sequential of this data buffer digital image data input.
17, the source electrode driver of LCD as claimed in claim 15 also comprises a level shifter, in order to the voltage level of the digital image data of this breech lock of conversion.
18, the source electrode driver of LCD as claimed in claim 15, wherein this group reference voltage is controlled by time schedule controller and is selected.
19, the source electrode driver of LCD as claimed in claim 15, wherein this selector switch is controlled by at least one lowest order signal that level shifter provided and is selected.
20, the source electrode driver of LCD as claimed in claim 15 also comprises at least one voltage generator, in order to produce many group reference voltages.
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|---|---|---|---|---|
| CN103632640A (en) * | 2012-08-21 | 2014-03-12 | 联咏科技股份有限公司 | Driving apparatus for liquid crystal display |
| CN104123919B (en) * | 2013-07-19 | 2017-10-13 | 深超光电（深圳）有限公司 | Liquid crystal display device and display device |
| CN103390393B (en) * | 2013-07-19 | 2015-11-25 | 深圳市华星光电技术有限公司 | A kind of tune gray voltage production method and device, panel drive circuit and display panel |
| JP2018041001A (en) * | 2016-09-09 | 2018-03-15 | セイコーエプソン株式会社 | Display driver, electro-optical device, electronic apparatus, and control method for display driver |
| CN110570803A (en) * | 2019-10-17 | 2019-12-13 | 南京芯视元电子有限公司 | System for increasing effective display digit |
| CN111402780B (en) * | 2020-06-05 | 2020-09-08 | 南京芯视元电子有限公司 | Display system for improving DAC precision inside micro-display through time division display |
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2006
- 2006-06-01 CN CNB2006100877752A patent/CN100533537C/en active Active
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| CN101083059A (en) | 2007-12-05 |
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