CN1005308B

CN1005308B - Chrominance signal processing apparatus

Info

Publication number: CN1005308B
Application number: CN85104891.9A
Authority: CN
Inventors: 松本时和
Original assignee: Matsushita Electric Industrial Co Ltd
Current assignee: Panasonic Holdings Corp
Priority date: 1985-06-25
Filing date: 1985-06-25
Publication date: 1989-09-27
Also published as: CN85104891A

Abstract

In a tape video camera, in order to carry out A/D transformation to a chrominance signal containing a color synchronisation pulse signal, a controllable voltage controlled oscillator is used for generating a clock signal, so the phase difference between a color common frequency pulse signal and the clock signal is always kept zero. Compared with a symbol and an absolute value of the phase difference output by a phase comparator of phases of the color synchronisation pulse signal and the clock signal, the absolute value is used for controlling current values of two current sources of a current outflow type and a current confluence type. The opening and the shutting off respectively correspond to symbolic values. The voltage controlled oscillator is controlled by the two current sources through a low pass filter, and thus, the phase error of the voltage controlled oscillator is eliminated.

Description

Chrominance signal processing apparatus

The invention relates to a kind of chrominance signal processing apparatus that belongs to automatic phase control circuit (calling the APC circuit in the following text) that is used for equipment such as Video/tape/recorder, can obtain the signal synchronous with the burst gating pulse of incoming carrier chrominance signal.

At present, in equipment such as Video/tape/recorder, more and more need to handle, include the videl signal of chrominance signal with the form of digital signal.Like this, in order to obtain a clock signal synchronous, will use the PAC circuit with burst gating pulse.

Common APC circuit is described with reference to the accompanying drawings, and Fig. 1 is the common APC circuit of chrominance signal is handled in expression with the digital signal form a block diagram.On the figure, from the videl signal that contains chrominance signal of input 1 input by A/D(mould/number) converter 2 is transformed into digital signal, this digital signal brings out, is input to simultaneously a phase comparator 4 from output 3, its phase place and VC08(voltage controlled oscillator) phase place of output signal compares.

Then, the output signal of phase comparator 4 is by just closed switching circuit 5 during burst gating pulse only, and passes through by resistance R ₁, R ₂, low pass filter 9 filtering that the operational amplifier 7 of capacitor C and control VC08 is formed.The output of VC08 is delivered to A/D converter 2 as clock signal, by the clock signal synchronous with burst gating pulse, the input signal from input 1 is carried out the A/D conversion.

Yet, resemble above-mentioned this line construction and have many shortcomings, because being the voltage by the voltage source 6 that is connected to operational amplifier 7 positive input terminals, the phase difference between the output signal of VC08 and the burst gating pulse signal determined, so above-mentioned phase difference fluctuates with the variation of the voltage of voltage source 6.This is because low pass filter 9 has filtered the voltage of voltage source 6 and delivered to voltage difference between the output voltage of phase comparator 4 of switching circuit 5, except in phase difference null moment, the output voltage of phase comparator 4 equals outside the voltage of voltage source 6, feedback does not add, so the phase difference of two signals that phase comparator 4 is compared, promptly just to become be zero to the phase difference between burst gating pulse signal and VC08 output signal.

The purpose of this invention is to provide a kind of chrominance signal processing apparatus or a kind of APC circuit.Wherein the necessary clock signal of A/D conversion of videl signal and the phase difference between the burst gating pulse signal remain zero, and irrelevant with the variation of the circuit constant of analog circuit.This sync signal comprises the chrominance signal synchronous with burst gating pulse.

Chrominance signal processing apparatus of the present invention can make the phase difference between burst gating pulse and the clock signal be always zero.It comprises an A/D converter that the videl signal that contains the carrier chroma signal is carried out the A/D conversion; The controlled variable frequency oscillator of frequency that produces clock signal to said A/D converter; A phase comparator that is used for more said A/D converter output signal and clock signal phase place; One is used for calculating the absolute value of said phase comparator output signal during burst gating pulse and the counting circuit of symbol thereof; With the current source of two electric current outflow types and electric current manifold-type, their current value is controlled by the absolute value of said counting circuit output, and their opening and closing are controlled by the value of symbol of counting circuit output respectively.The output of wherein said electric current outflow type and electric current manifold-type current source is interconnected, and the output signal of said current source passes through to control said variable oscillator behind the low pass filter.

Fig. 1 is the block diagram of the common APC circuit structure of expression.

Fig. 2 is the block diagram of expression the preferred embodiments of the present invention structure.

Fig. 3 (a) to (d) is circuit diagram and the working waveform figure of an embodiment that expression is used for the phase comparator of Fig. 2 embodiment.

Fig. 4 is the circuit diagram of an embodiment that expression is used for the counting circuit of Fig. 2 embodiment.

Fig. 5 is the circuit diagram that expression is used for the current source embodiment of Fig. 2 embodiment.

Below with reference to figure the present invention is described.Fig. 2 is the block diagram of expression according to an APC circuit embodiments of the present invention, and the videl signal that contains chrominance signal by input 10 inputs on the figure carries out the A/D conversion by A/D converter 11.The signal that is transformed is delivered to phase comparator 13 simultaneously from output 12 outputs.

Phase comparator 13 compares the phase place of A/D converter 11 output signals and the phase place of VC024 output signal, and its output delivered to counting circuit 14, counting circuit 14 takes out the output signal of phase comparator 13 during burst gating pulse, calculate the symbol and the absolute value of this signal, its symbol is outputed to output 15 as the binary system signal, absolute value is outputed to output 16 as numerical data.The absolute value that outputs to output 16 is sent to the

current source

18 and 19 of controlled current, and controls their current value.

Current source

18 and 19 is respectively electric current outflow type and electric current manifold-type current source, and their current value is decided by numerical data.This current source can be made of the internal current source with a plurality of current values, and these current values can be selected by numerical data.

On the other hand, the symbol that obtains on output 16 is opened or off switch circuit 17, and by inverter 20 unlatching or off switch circuit 21, the result, for example when the leading VC024 output signal of the phase place of burst gating pulse signal phase place, switch 17 closures, and current source 18 makes the electric current that is proportional to phase difference, flow into capacitor 23 from power supply by resistance 22, so that the rising of the current potential of capacitor is opposite, when the phase lag of burst gating pulse signal during in the phase place of VC024 output signal, switch 21 closures, current source 19 make the electric current that is proportional to phase difference flow out by resistance 22 to ground from capacitor 23, and the current potential of capacitor 23 is fallen.This current potential of capacitor 23 is by resistance 22 control VC024, and to form a negative feedback loop, making the phase difference between burst gating pulse signal and VC024 output signal is zero.Capacitor 23 herein and resistance 22 are equivalent to the low pass filter 9 in the general embodiment.In the embodiments of the invention, when fluctuation takes place in the analog circuit constant, the words that current value corresponding to a definite numerical data on

current source

18 and 19 was changed, the leading VC024 output signal of burst gating pulse signal phase place phase place, electric current just flows into capacitor 23, then electric current flows out capacitor on the contrary, and this effect accurately carries out, so this remains zero with regard to the phase difference that makes burst gating pulse signal and VC024 output signal.

The phase comparator 13 of the embodiment of the invention is described below, the concrete structure of counting circuit 14 and

current source

18 and 19 respectively with reference to Fig. 3, Fig. 4 and Fig. 5.Fig. 3 represents an embodiment of phase comparator.In this embodiment, this situation that is based on is described, promptly digitalized data is 6, and sampling frequency is 4 times of chrominance signal.The sampled situation of Fig. 3 (b) expression chrominance signal, wherein circle is represented sampling point, like this, when latching a sample signal by latch 90 every a sampling point, just obtains as the signal shown in figure C goes up.With 1/2 frequency divider 97 clock signal that comes from VCO is divided into half and obtains the latch pulse signal frequently, when with exclusive OR circuit 91-96 the output signal of latch 90 when a clock signal is anti-phase, just can obtain representing the DC level of phase difference between sampling clock signal and chrominance signal.

Fig. 4 is an embodiment of counting circuit, and element 101 to 105 is exclusive OR circuit, and element 100 is that a phase inverter is according to the Msub(highest significant position) symbol, each numerical digit upset being lower than Msub just can obtain absolute value, Msub is used as sign bit.

Fig. 5 represents an embodiment of

current source

18 and 19, and current source 18 is made of current source 120-124 and switch 110-114, and current source 19 is made of current source 125-129 and switch 115-119.Current source 120,121, the ratio of 122,123 and 124 current value is 16: 8: 4: 2: 1; Current source 125, the ratio of 126,127,128 and 129 current value is 16: 8: 4: 2: 1, correspondingly when the resulting absolute value of the counting circuit of above-mentioned use switch is controlled each current source, just can there be the electric current that is proportional to this absolute value to flow into or flows out resistance 22 and capacitor 23.

As above-mentioned phase comparator, counting circuit and current source only provide by way of example, are appreciated that with this known technology to obtain various other structures.

Claims

1, a kind of chrominance signal processing apparatus comprises:

An A/D converter that the videl signal that contains the carrier chroma signal is carried out A/D conversion;

The controlled variable frequency oscillator of frequency that produces clock signal for the A/D converter;

The phase comparator of a more said A/D converter output signal phase place and said clock signal phase place; And

A control circuit of this variable frequency oscillator being controlled according to the output signal of said phase comparator,

It is characterized in that said control circuit comprises:

A counting circuit that calculates said phase comparator output signal absolute value and value of symbol during burst gating pulse; With

The current source of two electric current outflow types and electric current manifold-type, their current value can be controlled by the output signal absolute value of said counting circuit, and can make current source open or close respectively by the value of symbol of said counting circuit output signal, the output of said electric current inflow type and electric current manifold-type current source is interconnected, thereby the output signal of said current source is by being added to and controlling said variable frequency oscillator after the low pass filter.