CN100530662C - Mother board, pixel array substrate, photoelectrical device and its manufacture method - Google Patents
Mother board, pixel array substrate, photoelectrical device and its manufacture method Download PDFInfo
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- CN100530662C CN100530662C CNB2007101651705A CN200710165170A CN100530662C CN 100530662 C CN100530662 C CN 100530662C CN B2007101651705 A CNB2007101651705 A CN B2007101651705A CN 200710165170 A CN200710165170 A CN 200710165170A CN 100530662 C CN100530662 C CN 100530662C
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Abstract
The invention discloses a motherboard, a pixel array substrate, a photoelectric device and a fabrication method thereof. The motherboard comprises a substrate with display units and an anti-static means with a first zone and a second zone adjacent to each other. The display units form a precut region therebetween. Each display unit comprises a pixel display zone and a circumferential circuit zone. The anti-static means is equipped on the precut region and positioned within the circumferential circuit zone, and the anti-static means connected with the display zone comprises a first patterned conducting layer equipped on the first zone and with a distal end apart from the precut region, a first patterned dielectric layer equipped on the first patterned conducting layer and the substrate and with a first opening, a patterned transparent conducting layer opposite to the precut region and connected with the first patterned conducting layer; and a second patterned dielectric layer covered on the patterned transparent conducting layer and the substrate. The first opening exposes a part of the first patterned conducting layer.
Description
Technical field
The present invention relates to the manufacture method of a kind of motherboard, image element array substrates, electrooptical device and above-mentioned various elements, and relate in particular to a kind of motherboard, image element array substrates, electrooptical device and above-mentioned various manufacturing method that is provided with electrostatic protection structure.
Prior art
In the daily life environment, the phenomenon of static discharge is seen everywhere.Because electronics for the affinity difference of various objects, so separate after any two objects contact, just is easy to generate the phenomenon that electric charge shifts between object again, causes the accumulation of static.In case the buildup of static electricity in the object is to a certain degree, and during when the object touching of this static electrification or near another object different with its current potential, the phenomenon of moment electric charge transfer can take place just, promptly be so-called static discharge.
With the display panels is example, and display panels is being made, produces, assembles, transported, even in the use after consumer's purchase, the possibility that is subjected to the static discharge injury is very high.Therefore, display panels must possess the protection design of static discharge, can effectively prolong its useful life.In general, display panels comprises image element array substrates, subtend substrate and is positioned at liquid crystal layer between this two substrates.To make image element array substrates is example, improves in order to make process efficiency, and regular meeting forms a plurality of display units on the motherboard of a glass baseplate, then via cutting technique these display units are cut down to form a plurality of image element array substrates.
In addition, when forming these display units, can on glass baseplate, utilize the conductivity good metal to form the electrostatic defending line so that each display unit is connected.If the phenomenon of buildup of static electricity takes place in any one processing step, the electrostatic defending line can be derived these electrostatic charges, is subjected to nonvolatil damage to avoid circuit or element in each display unit because of static discharge.Furthermore, each display unit is cut and after forming a plurality of image element array substrates, the electrostatic defending line also help with assembling, transport in addition process that the consumer uses in issuable electrostatic charge discharge.Therefore, the electrostatic defending line disposes the useful life that helps prolong the display panels of using this image element array substrates.
Yet when each display unit was cut and forms a plurality of image element array substrates, the electrostatic defending line of metal material just can expose out.In follow-up panel test process, these exposed metals may be corroded or oxidation, and then influence the display effect of display panels.Therefore, the display panels of prior art can't be taken into account good demonstration usefulness and long useful life.
Summary of the invention
Technical problem to be solved by this invention is to provide a kind of motherboard, after solving the motherboard cutting, and the exposed problem of metal material on the cut surface (as: electrostatic defending line).
Another purpose of the present invention is to provide a kind of image element array substrates, is corroded and influences the problem that shows usefulness to solve the metal material (as: electrostatic defending line) that exposes out.
Another object of the present invention is to provide a kind of manufacture method of motherboard, does not have the exposed motherboard of metal material (as: electrostatic defending line) after making cutting.
Still a further object of the present invention is to provide a kind of manufacture method of image element array substrates, can make display quality image element array substrates preferably.
Still a further object of the present invention is to provide a kind of electrooptical device, and it has good quality.
A present invention more purpose is to provide a kind of manufacture method of electrooptical device, and it has higher technology yield.
For achieving the above object, the present invention proposes a kind of motherboard, comprises a substrate and at least one electrostatic protection structure.Substrate has a plurality of display units, defines at least one precut district between the display unit.Each display unit comprises that one has viewing area and at least one perimeter circuit district of a plurality of pixels.Electrostatic protection structure is arranged in the precut district, is arranged in the perimeter circuit district, and is connected in the viewing area.Electrostatic protection structure has at least one first area and at least one second area adjacent with the first area.Electrostatic protection structure comprises first patterned conductive layer, first pattern dielectric layer, patterned transparent conductive layer and second pattern dielectric layer.First patterned conductive layer is disposed on the first area, and the end of first patterned conductive layer is away from precut district.First pattern dielectric layer is disposed on first patterned conductive layer and the substrate.First pattern dielectric layer has at least one first opening and exposes partly first patterned conductive layer.Patterned transparent conductive layer goes up and is electrically connected at first patterned conductive layer corresponding to precut district.Second pattern dielectric layer is covered on patterned transparent conductive layer and the substrate.
And for achieving the above object, the present invention proposes a kind of image element array substrates in addition, comprises a substrate and at least one electrostatic protection structure.Substrate comprises viewing area and at least one perimeter circuit district with a plurality of pixels.Electrostatic protection structure is arranged in this perimeter circuit district, is connected in the viewing area, and has at least one first area and at least one second area adjacent with the first area.Electrostatic protection structure comprises first patterned conductive layer, first pattern dielectric layer, patterned transparent conductive layer and second pattern dielectric layer.First patterned conductive layer is disposed on the first area, and the end of first patterned conductive layer is away from the edge of substrate.First pattern dielectric layer is disposed on first patterned conductive layer and the substrate, and first pattern dielectric layer exposes partly first patterned conductive layer.Patterned transparent conductive layer is disposed on the substrate, and electrically connects with first patterned conductive layer.Second pattern dielectric layer is covered on patterned transparent conductive layer and the substrate.
And the present invention proposes a kind of manufacture method of motherboard again.Motherboard comprises a substrate and at least one electrostatic protection structure.Substrate has a plurality of display units, defines at least one precut district between the display unit.Each display unit comprises that one has viewing area and at least one perimeter circuit district of a plurality of pixels.Electrostatic protection structure is arranged in the precut district, is arranged in the perimeter circuit district, and is connected in the viewing area.Electrostatic protection structure has at least one first area and at least one second area adjacent with the first area.The manufacture method of electrostatic protection structure comprises: form one first patterned conductive layer in the first area, the end of first patterned conductive layer is away from precut district.Form one first pattern dielectric layer on the first metal layer and substrate, and first pattern dielectric layer has at least one first opening, exposed portion goes out first patterned conductive layer.Form a patterned transparent conductive layer and go up and be electrically connected at first patterned conductive layer corresponding to precut district.Form one second pattern dielectric layer on patterned transparent conductive layer and substrate.
And the present invention also proposes a kind of manufacture method of image element array substrates.Provide just like the described motherboard of previous embodiment.Along precut district's cutting motherboard, wherein the end of the end of first patterned conductive layer on the first area and patterned transparent conductive layer is covered by second pattern dielectric layer, and a side of the patterned transparent conductive layer on the second area is exposed.
And the present invention reintroduces a kind of manufacture method of image element array substrates.At first, provide a motherboard.This motherboard comprises a substrate and at least one electrostatic protection structure.Substrate has a plurality of display units, defines at least one precut district between the display unit.Each display unit comprises that one has viewing area and at least one perimeter circuit district of a plurality of pixels.Electrostatic protection structure is arranged in the precut district, is arranged in the perimeter circuit district, and is connected in the viewing area.Electrostatic protection structure has at least one first area and at least one second area adjacent with the first area.Electrostatic protection structure comprises first patterned conductive layer, first pattern dielectric layer, patterned semiconductor layer, second patterned conductive layer, patterned transparent conductive layer and second pattern dielectric layer.First patterned conductive layer is disposed on the first area, and the end of first patterned conductive layer is away from precut district.First pattern dielectric layer is disposed on first patterned conductive layer and the substrate.First pattern dielectric layer has at least one first opening and exposes partly first patterned conductive layer.Patterned semiconductor layer is disposed in the second area, so that part first pattern dielectric layer is between substrate and patterned semiconductor layer.Second patterned conductive layer is disposed on first pattern dielectric layer.Second patterned conductive layer has at least one the 3rd opening and first interleaved openings, to distinguish and to electrically connect first patterned conductive layer and patterned semiconductor layer away from precuting.Patterned transparent conductive layer goes up and is electrically connected at first patterned conductive layer corresponding to precut district.Second pattern dielectric layer is covered on patterned transparent conductive layer and the substrate.Then, along precut district's cutting motherboard, wherein a side of a side of the patterned transparent conductive layer on the first area and the patterned transparent conductive layer on the second area, first pattern dielectric layer and patterned semiconductor layer is exposed.
And the present invention more proposes a kind of electrooptical device, comprises the aforesaid image element array substrates of the present invention.
And the present invention reintroduces a kind of manufacture method of electrooptical device, comprises the manufacture method of the aforesaid image element array substrates of the present invention.
The present invention is configured in electrostatic protection structure corresponding to the zone in the precut district because of adopting non-metallic conducting material.Therefore, do not have the structure (as: electrostatic protection structure) of metal material in the motherboard cutting area, it is exposed also to be that the side of the formed image element array substrates in motherboard cutting back does not have metal material.So, during any display panel applications image element array substrates of the present invention, be difficult for taking place the problem of metal material corrosion, and then have superior display quality.In addition, the configuration of non-metallic conducting material makes electrostatic protection structure can keep the function of its conduction electrostatic charge, and helps to prolong the useful life of image element array substrates.
For above and other objects of the present invention, feature and advantage can be become apparent, preferred embodiment cited below particularly, and cooperate appended accompanying drawing, be described in detail below.
Description of drawings
Fig. 1 looks schematic diagram on the part for the motherboard of the first embodiment of the present invention;
Fig. 2 A to Fig. 2 E is the manufacturing process profile of the electrostatic protection structure of the first embodiment of the present invention that illustrates along hatching line AA ' and the hatching line BB ' of Fig. 1;
Fig. 3 A to Fig. 3 E illustrates and is the local top view of the manufacturing process of the electrostatic protection structure of the motherboard of Fig. 1;
Fig. 4 A illustrates to looking schematic diagram on the image element array substrates of the first embodiment of the present invention;
Fig. 4 B1, Fig. 4 B2 and Fig. 4 B3 are respectively the generalized section that is illustrated along hatching line I-II, II-III, the IV-III of Fig. 4 A;
Fig. 5 illustrates on the part for the motherboard of the second embodiment of the present invention and looks schematic diagram;
Fig. 6 A to Fig. 6 E is the manufacturing process profile of the electrostatic protection structure of the second embodiment of the present invention that illustrates along hatching line CC ' and the hatching line DD ' of Fig. 5;
Fig. 7 A to Fig. 7 E illustrates and is the local top view of the manufacturing process of the electrostatic protection structure of the motherboard of Fig. 5;
Fig. 8 A illustrates to looking schematic diagram on the image element array substrates of the second embodiment of the present invention;
Fig. 8 B1, Fig. 8 B2 and Fig. 8 B3 are respectively the generalized section that is illustrated along hatching line I-II, II-III, the IV-III of Fig. 8 A;
Fig. 9 A looks schematic diagram on the electrostatic protection structure of motherboard of the third embodiment of the present invention;
The profile that Fig. 9 B is illustrated for hatching line EE ' and hatching line FF ' along Fig. 9 A;
Figure 10 A looks schematic diagram on the electrostatic protection structure of motherboard of the fourth embodiment of the present invention;
The profile that Figure 10 B is illustrated for hatching line GG ' and hatching line HH ' along Figure 10 A;
Figure 11 A looks schematic diagram on the electrostatic protection structure of motherboard of the fifth embodiment of the present invention;
The profile that Figure 11 B is illustrated for hatching line JJ ' and hatching line KK ' along Figure 11 A;
The profile that Figure 11 C is illustrated for the hatching line LL ' along Figure 11 A;
Figure 12 is the schematic diagram of the electrooptical device of one embodiment of the invention;
Wherein, Reference numeral:
100,500: motherboard 110: substrate
112: display unit 114: precut district
116: pixel 116A: scan line
116B: data wire 116C: active member
116D: pixel electrode 118: viewing area
120: the perimeter circuit district
132: first area 134: second area
142: the first conductive layers of 140: the first patterned conductive layers
162,170: the second pattern dielectric layer of 962: the second openings
400,800: image element array substrates 580: patterned semiconductor layer
Patterned conductive layer 1200 in 590: the second: electronic installation
1202: display floater 1204: electronic component
130,530,930,1030,1130: electrostatic protection structure 150,950,1050,1150: the first pattern dielectric layer 152,952,954,1052,1054,1152: the first openings
Data A-A ', B-B ', C-C ', D-D ', E-E ', F-F ', G-G ', H-H ', I-II-III-IV, J-J ', K-K ', L-L ': hatching line
Embodiment
First embodiment
Fig. 1 looks schematic diagram on the part for the motherboard of the first embodiment of the present invention.Please refer to Fig. 1, motherboard 100 comprises a substrate 110 and at least one electrostatic protection structure 130.Substrate 110 has a plurality of display units 112, defines at least one precut district 114 between the display unit.Each display unit 112 comprises that one has the viewing area 118 of a plurality of pixels 116 and at least one perimeter circuit district 120 adjacent to viewing area 118, and embodiments of the invention are serve as the enforcement example with at least one perimeter circuit district 120 around viewing area 118, but are not limited thereto.Electrostatic protection structure 130 is arranged in the precut district 114, is arranged in perimeter circuit district 120, and is connected in viewing area 118.For instance, pixel 116 for example includes scan line 116A, data wire 116B, at least one active member 116C and pixel electrode 116D.In other embodiments, pixel 116 can also also include at least one capacitance electrode (not illustrating), at least one alignment structure (not illustrating), gap elements such as (Spacer do not illustrate) wherein at least one.
Fig. 2 A to Fig. 2 E is the manufacturing process profile of the electrostatic protection structure of the first embodiment of the present invention that illustrates along hatching line AA ' and the hatching line BB ' of Fig. 1, and Fig. 3 A to Fig. 3 E illustrates the local top view of manufacturing process into the electrostatic protection structure of the motherboard of Fig. 1.Please at first on substrate 110, form first conductive layer 142 simultaneously with reference to Fig. 2 A and Fig. 3 A.First conductive layer 142 is single layer structure or sandwich construction, and its material for example is by metal, above-mentioned alloy, above-mentioned metal oxide, above-mentioned metal nitride or above-mentioned combinations such as gold, silver, copper, iron, tin, lead, hafnium, tungsten, molybdenum, neodymium, titanium, tantalum, aluminium, zinc.In the present embodiment, first conductive layer, 142 positions for example define first area 132, just the position of hatching line AA '.In motherboard 100, first conductive layer 142 is arranged in the perimeter circuit district 120 of each display unit 112, and first conductive layer 142 for example is to be connected in each viewing area 118.Electrostatic charges accumulated in each circuit of viewing area 118 time when having in the processing step, first conductive layer 142 can be derived these electrostatic charges.Therefore, first conductive layer 142 is as the usefulness of the protection of static discharge, and it helps to improve the technology yield of motherboard 100.
In addition, the material of substrate 110 is to comprise inorganic transparent material (as: glass, quartz or other material), organic transparent material (as: polyalkenes, poly-Hai class, polyalcohols, polyesters, rubber, thermoplastic polymer, thermosetting polymer, poly aromatic hydro carbons, poly-methyl propionyl acid methyl esters class, polycarbonate-based or other or above-mentioned derivative or above-mentioned combination), inorganic transparent materials (as: silicon chip, pottery or other or above-mentioned combination) or above-mentioned combination.For instance, substrate 110 is the usefulness that is used in the image element array substrates as substrate, and serves as to implement example with the glass of inorganic transparent material, but not as limit.
Then, please on first conductive layer 142 and substrate 110, form first pattern dielectric layer 150 simultaneously with reference to Fig. 2 B and Fig. 3 B.For example have at least one first opening 152 in first pattern dielectric layer 150, it exposes the part zone of first conductive layer 142.The material of first pattern dielectric layer 150 for example is inorganic (as: silica, silicon nitride, silicon oxynitride, carborundum, hafnium oxide, aluminium oxide or other material or above-mentioned combination), organic material (as: photoresist, benzocyclobutene (enzocyc lobutane, BCB), cyclenes class, polyimide, polyamide-based, polyesters, polyalcohols, poly(ethylene oxide) class, polyphenyl class, resinae, polyethers, polyketone class or other material or above-mentioned combination) or above-mentioned combination.What deserves to be mentioned is that the position of first opening 152 for example is corresponding to being example in the precut district 114 of motherboard 100, just being positioned at the intersection of each display unit 112.In addition, the size of first opening 152 for example is the width that is slightly larger than precut district 114, come out will precut in the district 114 and to precut part first conductive layer 142 of distinguishing 114 both sides, but be not limited thereto, the size of first opening 152 is the width that are same as precut district 114 haply.In other embodiments, first opening 152 also can extend along precut district 114, so that the substrate 110 in the precut district 114 is exposed.That is to say that the edge of first pattern dielectric layer 150 can be to be positioned at outside the precut district 114.
Then, please form patterned transparent conductive layer 160 simultaneously with reference to Fig. 2 C and Fig. 3 C, it is connected in first conductive layer 142.The generation type of patterned transparent conductive layer 160 for example is to form earlier transparent conductive material on substrate 110, and carries out a Patternized technique to form corresponding to precut district 114 and to be connected in the patterned transparent conductive layer 160 of first conductive layer 142.Transparent conductive material for example is indium tin oxide, indium-zinc oxide, indium tin zinc oxide, hafnium oxide, zinc oxide, aluminium oxide, aluminium tin-oxide, aluminium zinc oxide, cadmium tin-oxide, cadmium zinc oxide etc. or above-mentioned combination.In the present embodiment, the profile of patterned transparent conductive layer 160 also is a top view shape, preferably, for example be the bended pattern of the annular patterns of square shape, O font or ㄇ font, U font, also can use the bended pattern of H font, S font, W font, V font etc.Simultaneously, second opening 162 that above-mentioned annular patterns or the part of bended pattern constitute is arranged in precut district 114, corresponding first opening 152, and expose the part zone of first conductive layer 142.On the practice, first conductive layer 142 that second opening 162 of patterned transparent conductive layer 160 will precut in the district 114 comes out.In addition, it is other that the part zone of patterned transparent conductive layer 160 is arranged in the first area 132 that Fig. 1 illustrates, to define second area 134, and hatching line BB ' position just.
First conductive layer 142 is not continuous plain conductor and can be used as the usefulness of release electrostatic lotus before the patterning.Yet after if motherboard 100 is cut, first conductive layer 142 that is arranged in precut district 114 may be corroded or oxidation and influence product quality in the follow-up test process by exposed side.So, please refer to Fig. 2 D and Fig. 3 D, carrying out above-mentioned Patternized technique, also first patterned conductive layer 140 is patterned to the discontinuous line segment of multistage with when forming patterned transparent conductive layer 160.On the practice, first conductive layer 142 that is arranged in second opening 162 will be removed in this step, to form first patterned conductive layer 140.Therefore, the end of first patterned conductive layer 140 for example is to trim with the part sidewall of patterned transparent conductive layer 160 in second opening 162, but be not limited thereto, the end of first patterned conductive layer 140 also can be shunk back in the projected area of the part sidewall of patterned transparent conductive layer 160 in second opening 162.Must it should be noted that in other embodiments, first conductive layer also can cooperate photomask to carry out Patternized technique forming first patterned conductive layer 140 in Fig. 2 A or Fig. 2 B process, and do not need with patterned transparent conductive layer 160 processes in form simultaneously.
In addition, the part zone of patterned transparent conductive layer 160 for example contacts with first patterned conductive layer 140 that first opening 152 is come out.Also promptly, connect corresponding to the end of the patterned transparent conductive layer 160 that precuts district 114 first patterned conductive layer 140.Therefore, the patterned transparent conductive layer 160 and first patterned conductive layer 140 constitute a complete conductive circuit, and the electrostatic charge that helps to be accumulated in the processing step or in the environment on the substrate 110 discharges.
In other words, present embodiment be by patterned transparent conductive layer 160 be configured to discontinuous first patterned conductive layer 140 is connected, and constitute complete electrostatic defending circuit.Therefore, each element on the substrate 110 is not vulnerable to the destruction of static discharge, and can keep good quality.In addition, in subsequent technique during along cutting area 144 cutting substrates 110, first patterned conductive layer 140 that contains metal material can not be exposed and be corroded.So the design of present embodiment helps to keep the quality of product.
Afterwards, please refer to Fig. 2 E and Fig. 3 E, on substrate 110 and patterned transparent conductive layer 160, form second pattern dielectric layer 170, to finish electrostatic protection structure 130.Second pattern dielectric layer 170 can be made by organic dielectric materials, Inorganic Dielectric Material or above-mentioned combination, and its material can be selected first pattern dielectric layer, 150 described materials for use.Second pattern dielectric layer 170 intactly is covered on the substrate 110.On the practice, second pattern dielectric layer 170 for example is the part sidewall that covers first patterned conductive layer 140 and patterned transparent conductive layer 160, and also promptly second pattern dielectric layer 170 conformably covers first patterned conductive layer 140 and patterned transparent conductive layer 160.In addition, being positioned at part second pattern dielectric layer 170 that precuts district 114 for example directly is disposed on the substrate 110.
In addition, in the process of making electrostatic protection structure 130, can in the viewing area 118 of each display unit 112, form a plurality of pixels 116 simultaneously.Generally speaking, each production phase of motherboard 100 all has complete conductive circuit that unnecessary electrostatic charge is derived, and makes motherboard 100 of the present invention have advantages of high process yield.Even motherboard 100 is still kept good quality after being cut into a plurality of image element array substrates.
Because, motherboard 100 comprises a plurality of display units 112, therefore after motherboard 100 completes, must each display unit 112 be divided into a plurality of image element array substrates independently separately by laser cutting technique, cutter technology, cutting wheel technology or other cutting technique or above-mentioned cutting technique combination.Fig. 4 A illustrates to looking schematic diagram on the image element array substrates of the first embodiment of the present invention, and Fig. 4 B1, Fig. 4 B2 and Fig. 4 B3 are respectively the generalized section that is illustrated along hatching line I-II, II-III, the IV-III of Fig. 4 A.Please be simultaneously with reference to Fig. 4 A and Fig. 4 B1, Fig. 4 B2 and Fig. 4 B3, image element array substrates 400 is to be formed along 114 cuttings of precut district by above-mentioned motherboard 100, so the element of image element array substrates 400 is identical with motherboard 100.Image element array substrates 400 comprises a substrate 100 and at least one electrostatic protection structure 130.Substrate 100 comprises viewing area 118 with a plurality of pixels 116 and at least one perimeter circuit district 120 adjacent to viewing area 118, and embodiments of the invention are serve as the enforcement example with at least one perimeter circuit district 120 around viewing area 118, but are not limited thereto.Electrostatic protection structure 130 is arranged in this perimeter circuit district 120, is connected in viewing area 118, and has at least one first area 132 and at least one second area 134 adjacent with first area 132.In addition, hatching line I-II is arranged in first area 132, and hatching line II-III is that hatching line IV-III then is arranged in second area 134 along substrate 110 edges.
From hatching line I-II as can be known, first opening 152 of first pattern dielectric layer 150 exposes partly first patterned conductive layer 140, present embodiment is to serve as to implement example with the end that first opening 152 exposes first patterned conductive layer 140, and patterned transparent conductive layer 160 is connected with first patterned conductive layer 140.In the electrostatic protection structure 130, the end of first patterned conductive layer 140 is away from the edge of substrate 110.Therefore, first patterned conductive layer 140 is positioned at outside the section that hatching line II-III illustrated.Also promptly, the edge of substrate 110 side that do not have first patterned conductive layer 140 exposes out.In addition, second pattern dielectric layer 170 is covered on patterned transparent conductive layer 160 and the substrate 110.On the practice, from hatching line II-III as can be known, second pattern dielectric layer 170 exposes a side of the patterned transparent conductive layer 160 on the second area 134.
The inside of image element array substrates 400 is if there is the accumulation of electrostatic charge, and then these electrostatic charges can conduct to patterned transparent conductive layer 160 and are released into outside the image element array substrates 400 along first patterned conductive layer 140.Therefore, electrostatic protection structure 130 is being played the part of the role of important electrostatic discharge protective in image element array substrates 400, and helps to keep the quality of image element array substrates 400.In addition, shown in hatching line II-III, being exposed to outer conductive layer in the electrostatic protection structure 130 is patterned transparent conductive layer 160, and it is non-metallic material also, so electrostatic protection structure 130 does not have the problem generation that the exposed metal/bare metal face is corroded.
Second embodiment
Fig. 5 illustrates on the part for the motherboard of the second embodiment of the present invention and looks schematic diagram.Please refer to Fig. 5, motherboard 500 is similar to the motherboard 100 of first embodiment, and wherein components identical does not repeat them here.Motherboard 500 and motherboard 100 differences be in, also comprise in the electrostatic protection structure 530 of motherboard 500 patterned semiconductor layer 580 and second patterned conductive layer 590 at least one of them.
In the electrostatic protection structure 530, first patterned conductive layer 140, second patterned conductive layer 590, patterned semiconductor layer 580 connect into complete conductive circuit with patterned transparent conductive layer 160, to prevent to take place in the motherboard 500 phenomenon of static discharge.Therefore, motherboard 500 is difficult for being damaged in manufacture process, and higher technology yield is arranged.In addition, the electrostatic protection structure 530 conducting wire part that is positioned at precut district 114 is all made by non-metallic material.So, do not have on the cut surface after motherboard 114 is cut along precut district 114 exposed metal/bare metal in outside, and can keep good quality.Fig. 6 A to Fig. 6 E is the manufacturing process profile of the electrostatic protection structure of the second embodiment of the present invention that illustrates along hatching line CC ' and the hatching line DD ' of Fig. 5; Fig. 7 A to Fig. 7 E illustrates and is the local top view of the manufacturing process of the electrostatic protection structure of the motherboard of Fig. 5, specifically, the manufacture method of electrostatic protection structure 530 is looked shown in the schematic diagram on the generalized section of Fig. 6 A～6E and Fig. 7 A～7E, and wherein Fig. 6 A～6E is that hatching line CC ' along Fig. 5 illustrates with hatching line DD '.
Please, on substrate 110, form one first conductive layer 142 and form first dielectric layer 154 earlier with reference to Fig. 6 A and Fig. 7 A.At this, for example the step with Fig. 2 A and Fig. 3 A is identical to form the step of first conductive layer 142.In addition, first dielectric layer 154 is covered on first conductive layer 142 and the substrate 110, and particularly in the second area 134, first dielectric layer 154 directly is disposed on the substrate 110.The material of first dielectric layer 154 for example is inorganic (as: silica, silicon nitride, silicon oxynitride, carborundum, hafnium oxide, aluminium oxide or other material or above-mentioned combination), organic material (as: photoresist, benzocyclobutene (enzocyclobutane, BCB), cyclenes class, polyimide, polyamide-based, polyesters, polyalcohols, poly(ethylene oxide) class, polyphenyl class, resinae, polyethers, polyketone class or other material or above-mentioned combination) or above-mentioned combination.
Then, please refer to Fig. 6 B and Fig. 7 B, in first conductive layer, the 142 other patterned semiconductor layer 580 that form.The position in corresponding precut district 114, the position of patterned semiconductor layer 580, and do not overlap with first conductive layer 142 or intersect.Patterned semiconductor layer 580 is disposed on first dielectric layer 154, and also promptly in second area 134, and first dielectric layer 154 is between patterned semiconductor layer 580 and substrate 110.
Then, please refer to Fig. 6 C and Fig. 7 C, in first dielectric layer 154, form one first opening 152, so that first dielectric layer 154 is patterned as first pattern dielectric layer 150.At this moment, the part zone of first pattern dielectric layer 150 for example is between patterned semiconductor layer 580 and substrate 110.First opening 152 partly overlaps with precut district 114 and exposes partly first conductive layer 142.Because the first continuous conductive layer 142 can be derived the electrostatic charge in the substrate 110, and the damage that provides suitable protective action to cause portion of element to avoid in above-mentioned each making step static discharge taking place.
Afterwards, please refer to Fig. 6 D and Fig. 7 D, on first pattern dielectric layer 150, form second patterned conductive layer 590.In the present embodiment, the material of second patterned conductive layer 590 for example is selected from material identical with first patterned conductive layer 142 or material inequality, and first patterned conductive layer 142 can be selected from the material described in the previous embodiment.Second patterned conductive layer 590 has at least one the 3rd opening 592 that interlocks with first opening 152.The edge of the 3rd opening 592 roughly is adjacent to the edge in precut district 114 or trims the edge in precut district 114, and the 3rd opening 592 is broken into a plurality of blocks with second patterning conductor layer 590.That is to say that the configuration of the 3rd opening 592 makes second patterned conductive layer 590 be positioned in fact outside the precut district 114.
In addition, when forming the 3rd opening 592, first conductive layer 142 that also will be arranged in the 3rd opening 592 removes to form first patterned conductive layer 140.In other words, first patterned conductive layer 140 and second patterned conductive layer 590 form in same Patternized technique.Corresponding the 3rd opening 592 places, the edge of first patterned conductive layer 140 and second patterned conductive layer 590 for example can roughly trim.Therefore, first patterned conductive layer 140 and second patterned conductive layer 590 in fact all are positioned at outside the precut district 114.So, outside the metal material that does not have first patterned conductive layer 140 and second patterned conductive layer 590 in the subsequent technique on precut district 114 cut surfaces that cut is exposed to.In addition, in other embodiments, first conductive layer 142 also can distinctly cooperate photomask to carry out Patternized technique forming first patterned conductive layer 140 in Fig. 6 A, Fig. 6 C or Fig. 6 D process, and do not need with patterning second conductive layer 590 processes in form simultaneously.Therefore, first patterned conductive layer 140 in fact all is positioned at outside the precut district 114.So, outside the metal material that does not have first patterned conductive layer 140 in the subsequent technique on precut district 114 cut surfaces that cut is exposed to.
In addition, first patterned conductive layer 140, second patterned conductive layer 590 constitute a continuous conducting layers circuit with patterned semiconductor layer 580.Even it is disconnected to provide the first metal layer 142 of electrostatic defending effect to be patterned into discontinuous line originally in this step, first patterned conductive layer 140, second patterned conductive layer 590 still can be derived the electrostatic charge that is accumulated in the technology or in the environment on the substrate 110 with the conductive layer circuit that patterned semiconductor layer 580 constitutes.Generally, still possess the circuit of electrostatic defending on the substrate 110, and make the technology yield unaffected.
Afterwards, please refer to Fig. 6 E and Fig. 7 E, form a patterned transparent conductive layer 160 and second pattern dielectric layer 170 in regular turn on substrate 110, to constitute electrostatic protection structure 530.The material of patterned transparent conductive layer can be selected the described material of previous embodiment for use.Patterned transparent conductive layer 160 is electrically connected at second patterned conductive layer 590 and patterned semiconductor layer 580.On the practice, second patterned conductive layer 590 that patterned transparent conductive layer 160 will be positioned at 114 both sides, precut district electrically connects.So the configuration of patterned transparent conductive layer 160 also helps electrostatic protection structure 530 that electrostatic charge is derived outside substrate 110, and further promote the yield of motherboard 530.Certainly, in forming the process of electrostatic protection structure 530, also can in display unit 112, form a plurality of simultaneously as the described pixel 116 of first embodiment in viewing area 118.What deserves to be mentioned is, the manufacture process of electrostatic protection structure 530 can with the manufacture process compatibility of pixel 116, and the present invention does not get rid of with different manufacturing steps to make electrostatic protection structure 530 and pixel 116 respectively.Yet, in other embodiments, also can not have the step of second patterned conductive layer 590, and constitute a continuous conducting layers circuit by follow-up step.Therefore, the continuous conducting layers circuit that is constituted this moment is made up of with patterned transparent conductive layer 160 first patterned conductive layer 140, patterned semiconductor layer 580.
Fig. 8 A illustrates to looking schematic diagram on the image element array substrates of the second embodiment of the present invention, and the generalized section that Fig. 8 B is illustrated for hatching line I-II, II-III, IV-III along Fig. 8 A.Wherein, hatching line I-II is arranged in first area 132, and hatching line II-III is the edge along substrate 110, and hatching line IV-III then is arranged in second area 134.Please refer to Fig. 8 A and Fig. 8 B, image element array substrates 800 is to be formed along 114 cuttings of precut district by the motherboard 500 of Fig. 5, and its element with motherboard 500 is identical.So, in electrostatic protection structure 530, patterned transparent conductive layer 160 is covered on second patterned conductive layer 590, first pattern dielectric layer 150, part patterned semiconductor layer 580 and the substrate 110 or is covered on first pattern dielectric layer 150, part patterned semiconductor layer 580 and the substrate 110.
As observing image element array substrates 800 along hatching line II-III, then second pattern dielectric layer 170 exposes a side of patterned transparent conductive layer 160, first pattern dielectric layer 150 and patterned semiconductor layer 580 on the second area 134, and a side of the patterned transparent conductive layer on the first area 132 160.That is to say that the conductive layer that side exposed out of image element array substrates 800 (as patterned transparent conductive layer 160 and patterned semiconductor layer 580) all is the conductive layer of non-metallic material.So image element array substrates 800 does not have corrosion of metals in follow-up test process problem takes place.
In addition, patterned transparent conductive layer 160 electrically connects second patterned conductive layer 590 and part patterned semiconductor layer 580 in the electrostatic protection structure 530, and second patterned conductive layer 590 directly connects first patterned conductive layer 140 or partly patterned semiconductor layer 580 and 140 electric connections of first patterned conductive layer of patterned transparent conductive layer 160.So if generation of static electricity is arranged, then electrostatic protection structure 530 can be derived static to avoid the damage of static discharge to each element or circuit in the image element array substrates 800.In brief, not only image element array substrates of the present invention 800 do not have that metal exposes and the problem of corroding has more long useful life.The display floater of using the image element array substrates 800 of present embodiment and making has good quality and long useful life especially.
The 3rd embodiment
Fig. 9 A be third embodiment of the invention motherboard electrostatic protection structure on look schematic diagram, and the profile of Fig. 9 B for being illustrated along hatching line E-E ' and the hatching line F-F ' of Fig. 9 A.Please refer to Fig. 9 A and Fig. 9 B, the material of electrostatic protection structure among electrostatic protection structure 930 and first embodiment on the motherboard 100 130 similar and its description, manufacture method and necessary element also can be implemented and selects for use according to making description, configuration, manufacture method among first embodiment.In the electrostatic protection structure 930, first pattern dielectric layer 950 has a plurality of first openings 952,954.First opening 952 is corresponding to precut district 114, and trims haply with the edge of first patterned conductive layer 140.In addition, first opening 954 is positioned at the end in first patterned conductive layer, 140 contiguous precut districts 114, and partly first patterned conductive layer 140 comes out.So, first patterned conductive layer 140 can see through first opening 954 and patterned transparent conductive layer 960 electric connections.
In addition, second opening 962 of patterned transparent conductive layer 960 for example is to expose first pattern dielectric layer 950 partly in the present embodiment.That is to say that on the bearing of trend of first patterned conductive layer 140, the width of second opening 962 for example is in fact greater than the width of first opening 952.The electrostatic protection structure 930 of present embodiment has the advantage of the electrostatic protection structure 130 described in first embodiment.So the electrostatic protection structure 930 of present embodiment helps to promote the making yield and the quality of motherboard or active component array base board.In addition, the production method of the electrostatic protection structure of present embodiment also can be compatible with the active cell array technology of prior art.
In addition, among this embodiment, when master slice cuts out a plurality of image element array substrates, electrostatic protection structure does not have problem generation and its cross-section structure along substrate 110 edges that the exposed metal/bare metal face is corroded yet, and also the hatching line II-III as first embodiment is along the described structure in substrate 110 edges.
The 4th embodiment
Figure 10 A be fourth embodiment of the invention motherboard electrostatic protection structure on look schematic diagram, and the profile of Figure 10 B for being illustrated along hatching line G-G ' and the hatching line H-H ' of Figure 10 A.Please refer to Figure 10 A and Figure 10 B, in the present embodiment, the material of similar and its description, configuration, manufacture method and necessary element of the electrostatic protection structure 530 of motherboard 500 also can be implemented and selects for use according to making description, manufacture method among second embodiment among electrostatic protection structure 1030 and second embodiment.In the electrostatic protection structure 1030, first pattern dielectric layer 1050 has a plurality of first openings 1052,1054.First opening 1052 is corresponding to precut district 114, and trims haply with the edge of first patterned conductive layer 140.In addition, first opening 1054 is positioned at the end in first patterned conductive layer, 140 contiguous precut districts 114, and partly first patterned conductive layer 140 comes out.Simultaneously, the 3rd opening 592 of second patterned conductive layer 590 for example is to expose first pattern dielectric layer 1050 partly in the present embodiment, makes the edge of the 3rd opening 592 be positioned at outside the precut district 140.
On the practice, first patterned conductive layer 140 can electrically connect second patterned conductive layer 590 by first opening 1054, and further electrically connects with patterned transparent conductive layer 160.When not being provided with second patterned conductive layer 590 in the electrostatic protection structure 1030, first patterned conductive layer 140 also can electrically connect by first opening 1054 and patterned transparent conductive layer 160.The electrostatic protection structure 1030 of present embodiment has the advantage of the electrostatic protection structure 530 described in second embodiment.So the electrostatic protection structure 1030 of present embodiment helps to promote the making yield and the quality of motherboard or active component array base board.
In addition, among this embodiment, when master slice cuts out a plurality of image element array substrates, electrostatic protection structure does not have problem generation and its cross-section structure along substrate 110 edges that the exposed metal/bare metal face is corroded yet, and also the hatching line II-III as second embodiment is along the described structure in substrate 110 edges.
The 5th embodiment
Figure 11 A be fifth embodiment of the invention motherboard electrostatic protection structure on look schematic diagram, and the profile of Figure 11 B for being illustrated along hatching line J-J ' and the hatching line K-K ' of Figure 11 A.Please refer to Figure 11 A and Figure 11 B, in the present embodiment, the material of similar and its description, manufacture method and necessary element of the electrostatic protection structure among electrostatic protection structure 1130 and the 4th embodiment 1030 also can be implemented and selects for use according to making description, manufacture method among second embodiment.In the electrostatic protection structure 1130, first opening 1152 of first pattern dielectric layer 1150 is positioned at the end in first patterned conductive layer, 140 contiguous precut districts 114, and partly first patterned conductive layer 140 comes out.That is to say that electrostatic protection structure 1130 is not provided with corresponding to first opening 1152 in the precut district 114, first opening 1152 that also is present embodiment is not in precut district 114.
First patterned conductive layer 140 can electrically connect second patterned conductive layer 590 by first opening 1152, and further electrically connects with patterned transparent conductive layer 160.When not being provided with second patterned conductive layer 590 in the electrostatic protection structure 1130, first patterned conductive layer 140 also can electrically connect by first opening 1152 and patterned transparent conductive layer 160.The electrostatic protection structure 1130 of present embodiment is to be made by different conductive material, and the conductor that is positioned at precut district 114 is to be made of non-metallic material, does not therefore have the situation of exposed metal/bare metal on the cut surfaces of precut district 114 cuttings.Electrostatic protection structure 1130 has the advantage of the electrostatic protection structure 530 described in second embodiment.
On the practice, if electrostatic protection structure 1130 is cut along precut district 114, then the profile of cut surface is shown in Figure 11 C.By Figure 11 C as can be known, the conductor layer that exposes out on the hatching line L-L ' is patterned semiconductor layer 580 and patterned transparent conductive layer 160.This two-layer conductor layer is all non-to be made of metal material, so electrostatic protection structure 1130 does not have after cutting that metal exposes and the problem of corroding.Furthermore, if using 1130 of the electrostatic protection structures that present embodiment proposed, display panels can have than reaching display quality preferably long useful life.
In addition, must it should be noted that, the patterning mode of each rete is through each film deposition, photoresist coating and cooperates photomask exposure and etching to remove the part that does not keep in the foregoing description, but be not limited thereto, also can other any suitable mode be prepared, for example: ink-jetting style, mode of printing, alternate manner or aforesaid combination.Above-mentioned photomask types, also can adopt general photomask, also promptly only have light penetrating region and light not penetrating region or photomask with the penetration level of not sharing the same light, also promptly have light penetrating region, light not penetrating region, and at least one not semi-transparent zone of penetrating region of light penetrating region and light that is positioned at, the photomask of this type, as: the photomask of slit pattern photomask, semi-transparent mask, GTG photomask, diffraction photomask or other same type or above-mentioned combination.
Figure 12 is the electrooptical device schematic diagram of one embodiment of the invention.As shown in figure 12, can be applied in the display floater 1202, and display floater 1202 and electronic component 1204 electrically connects the electrooptical device 1200 that becomes then capable of being combined by the formed image element array substrates of above-mentioned various embodiment.At this, electronic component 1204 comprises as control element, executive component, treatment element, input element, memory element, driving element, light-emitting component, protection component, sensing element, detecting element or other function element or aforesaid combination.And the type of electrooptical device comprises the panel in portable product (as mobile phone, video camera, camera, mobile computer, game machine, wrist-watch, music player, electronic mail transceiver, map navigator, digital photo or similar products like), video and audio product (as audio-visual projector or similar products like), screen, TV, billboard, the projector etc.
Generally speaking, the finished product of display floater 1202 comprises an image element array substrates, another transparency carrier with respect to above-mentioned image element array substrates at least, and another transparency carrier have a transparency conducting layer, and the material of a display medium (display media) be arranged between image element array substrates and another transparency carrier.When the material of display medium was liquid crystal material, display floater 1202 was called display panels (as: penetrating type display floater, the semi penetration type display floater, reflective display panel, colored filter display floater of (color filteron array) on active layers, active layers display floater of (array on color filter) on colored filter, vertical orientation type (VA) display floater, horizontal switch type (IPS) display floater, multi-domain perpendicular alignment-type (MVA) display floater, twisted nematic (TN) display floater, super-twist nematic (STN) display floater, pattern vertical orientation type (PVA) display floater, super pattern vertical orientation type (S-PVA) display floater, the advanced person is type (ASV) display floater with great visual angle, fringe field switch type (FFS) display floater, continuous fireworks shape arrange type (CPA) display floater, axial symmetry is arranged micella type (ASM) display floater, optical compensation curved arrange type (OCB) display floater, super horizontal switch type (S-IPS) display floater, advanced super horizontal switch type (AS-IPS) display floater, extreme edge electric field switch type (UFFS) display floater, stabilizing polymer alignment-type display floater, double vision angle type (dual-view) display floater, three visual angle type (triple-view) display floaters, 3 d display (three-dimensional) or other profile plate, or above-mentioned combination).In addition, when the material of display medium is the organic electric-excitation luminescent material, then display floater 1202 is called organic electric-excitation luminescent displaying panel (as: fluorescence organic electric-excitation luminescent displaying panel, phosphorescence organic electric-excitation luminescent displaying panel or above-mentioned combination), or above-mentioned combination.Wherein, the organic electric-excitation luminescent material of organic electric-excitation luminescent displaying panel comprises micromolecule luminescent material, high-molecular luminous material or above-mentioned combination.
In sum, in motherboard of the present invention and the image element array substrates, electrostatic protection structure is formed by connecting by metal and nonmetal conductive layer, and wherein nonmetal conductive layer is to dispose corresponding to the precut district of motherboard.In the formed image element array substrates, the side that electrostatic protection structure exposes out is a non-metallic material to motherboard after cutting.Therefore, image element array substrates does not have that metal material is exposed to side and the problem that is corroded.In addition, in the manufacture method of the motherboard of part embodiment of the present invention, the technology in each stage all has the circuit of electrostatic defending, and the technology yield of motherboard is improved.Furthermore, the image element array substrates that forms of motherboard of the present invention cutting also has high yield.Comprehensive and opinion, the present invention can provide motherboard, image element array substrates and the relative photo electric installation thereof of high yield, high-quality and long service life.
Certainly; the present invention also can have other various embodiments; under the situation that does not deviate from spirit of the present invention and essence thereof; those of ordinary skill in the art work as can make various corresponding changes and distortion according to the present invention, but these corresponding changes and distortion all should belong to the protection range of the appended claim of the present invention.
Claims (21)
1. motherboard, comprise a substrate and at least one electrostatic protection structure, this substrate has a plurality of display units, define at least one precut district between the described display unit, respectively this display unit comprises that one has viewing area and at least one perimeter circuit district of a plurality of pixels, this electrostatic protection structure is arranged in this precut district and is arranged in described perimeter circuit district, and be connected in described viewing area, this electrostatic protection structure has at least one first area and at least one second area adjacent with this first area, and this electrostatic protection structure comprises:
One first patterned conductive layer is disposed on this first area, and the end of this first patterned conductive layer is away from this precut district;
One first pattern dielectric layer is disposed on this first patterned conductive layer and this substrate, and this first pattern dielectric layer has at least one first opening, exposes this first patterned conductive layer of part;
One patterned transparent conductive layer goes up and is electrically connected at this first patterned conductive layer corresponding to this precut district;
One second pattern dielectric layer is covered on this patterned transparent conductive layer and this substrate.
2. motherboard according to claim 1 is characterized in that, this patterned transparent conductive layer has second opening of at least one correspondence in this first opening.
3. motherboard according to claim 1 is characterized in that, also comprises a patterned semiconductor layer, is disposed in this second area, so that this first pattern dielectric layer of part is between this substrate and this patterned semiconductor layer.
4. motherboard according to claim 3, it is characterized in that, also comprise one second patterned conductive layer, be disposed on this first pattern dielectric layer, and this second patterned conductive layer has at least one the 3rd opening and this first interleaved openings, to precut the district away from this and to electrically connect this first patterned conductive layer and this patterned semiconductor layer.
5. motherboard according to claim 4 is characterized in that, this patterned transparent conductive layer covers this second patterned conductive layer, this first pattern dielectric layer, this patterned semiconductor layer of part and this substrate.
6. image element array substrates, comprise a substrate and at least one electrostatic protection structure, this substrate comprises that one has viewing area and at least one perimeter circuit district of a plurality of pixels, this electrostatic protection structure is arranged in this perimeter circuit district, be connected in this viewing area, and have at least one first area and at least one second area adjacent with this first area, this electrostatic protection structure comprises:
One first patterned conductive layer is disposed on this first area, and the end of this first patterned conductive layer is away from the edge of this substrate;
One first pattern dielectric layer is disposed on this first patterned conductive layer and this substrate, and this first pattern dielectric layer exposes this first patterned conductive layer of part;
One patterned transparent conductive layer is disposed on this substrate, and electrically connects with this first patterned conductive layer; And
One second pattern dielectric layer is covered on this patterned transparent conductive layer and this substrate.
7. image element array substrates according to claim 6 is characterized in that, this second pattern dielectric layer exposes a side of this patterned transparent conductive layer on this second area.
8. image element array substrates according to claim 6 is characterized in that, also comprises a patterned semiconductor layer, is disposed in this second area, so that this first pattern dielectric layer of part is between this substrate and this patterned semiconductor layer.
9. image element array substrates according to claim 8 is characterized in that, this second pattern dielectric layer exposes a side of this patterned transparent conductive layer, this first pattern dielectric layer and this patterned semiconductor layer on this second area.
10. image element array substrates according to claim 8 is characterized in that, also comprises one second patterned conductive layer, is disposed on this first pattern dielectric layer, to electrically connect this first patterned conductive layer and this patterned semiconductor layer.
11. image element array substrates according to claim 10 is characterized in that, this patterned transparent conductive layer is covered on this second patterned conductive layer, this first pattern dielectric layer, this patterned semiconductor layer of part and this substrate.
12. image element array substrates according to claim 10, it is characterized in that this second pattern dielectric layer exposes a side of a side of this patterned transparent conductive layer on this first area and this patterned transparent conductive layer on this second area, this patterned semiconductor layer, this first pattern dielectric layer.
13. the manufacture method of a motherboard, this motherboard comprises a substrate and at least one electrostatic protection structure, this substrate has a plurality of display units, define at least one precut district between the described display unit, respectively this display unit comprises a viewing area and at least one perimeter circuit district with a plurality of pixels, this electrostatic protection structure is arranged in this precut district, be arranged in described perimeter circuit district, and be connected in described viewing area, this electrostatic protection structure has at least one first area and at least one second area adjacent with this first area, and the manufacture method of this electrostatic protection structure comprises:
Form one first patterned conductive layer in this first area, the end of this first patterned conductive layer is away from this precut district;
Form one first pattern dielectric layer on this first patterned conductive layer and this substrate, and this first pattern dielectric layer has at least one first opening, to expose this first patterned conductive layer of part;
Form a patterned transparent conductive layer and go up and be electrically connected at this first patterned conductive layer corresponding to this precut district;
Form one second pattern dielectric layer on this patterned transparent conductive layer and this substrate.
14. the manufacture method of motherboard according to claim 13 is characterized in that, also be included in this patterned transparent conductive layer form at least one pair of should be in second opening of this first opening.
15. the manufacture method of motherboard according to claim 13 is characterized in that, also comprises forming a patterned semiconductor layer in this second area, so that this first pattern dielectric layer of part is between this substrate and this patterned semiconductor layer.
16. the manufacture method of motherboard according to claim 15, it is characterized in that, also comprise form one second patterned conductive layer on this first pattern dielectric layer and this second patterned conductive layer have at least one the 3rd opening and this first interleaved openings, precutly to distinguish and to electrically connect this first patterned conductive layer and this patterned semiconductor layer away from this.
17. the manufacture method of an image element array substrates is characterized in that, comprising:
Provide a claim 1 described motherboard; And
Along this precut this motherboard of district's cutting, the end of this first patterned conductive layer on this first area and the end of this patterned transparent conductive layer are covered by this second pattern dielectric layer, and a side of this patterned transparent conductive layer on this second area is exposed.
18. the manufacture method of an image element array substrates is characterized in that, comprising:
Provide a claim 4 described motherboard; And
Along this precut this motherboard of district's cutting, a side of this patterned transparent conductive layer on its this first area and a side of this patterned transparent conductive layer on this second area, this first pattern dielectric layer and this patterned semiconductor layer are exposed.
19. an electrooptical device is characterized in that, comprises the described image element array substrates of claim 6.
20. the manufacture method of an electrooptical device is characterized in that, comprises the manufacture method of the described image element array substrates of claim 17.
21. the manufacture method of an electrooptical device is characterized in that, comprises the manufacture method of the described image element array substrates of claim 18.
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| CN107134465A (en) * | 2017-07-06 | 2017-09-05 | 京东方科技集团股份有限公司 | Array base palte and preparation method thereof, display device |
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| KR101200258B1 (en) * | 2008-12-26 | 2012-11-12 | 엘지디스플레이 주식회사 | Mother array substrate for liquid crystal display device |
| CN101566765B (en) * | 2009-05-27 | 2011-10-26 | 昆山龙腾光电有限公司 | Liquid crystal display device mother board |
| CN102193667B (en) * | 2010-03-12 | 2013-03-20 | 胜华科技股份有限公司 | Mother board for touch panels |
| JP6431278B2 (en) * | 2014-04-18 | 2018-11-28 | 株式会社ジャパンディスプレイ | Substrate for display device |
| TWI607552B (en) * | 2015-05-27 | 2017-12-01 | 友達光電股份有限公司 | Pixel array substrate, display panel, and master thereof |
| US10345659B2 (en) | 2017-08-31 | 2019-07-09 | Wuhan China Star Optoelectronics Technology Co., Ltd. | Array substrate and liquid crystal display panel |
| CN107422559A (en) * | 2017-08-31 | 2017-12-01 | 武汉华星光电技术有限公司 | Array base palte and liquid crystal display panel |
| CN108257974B (en) * | 2018-01-02 | 2021-08-31 | 京东方科技集团股份有限公司 | Array substrate, display device and method for preparing array substrate |
| CN110854113B (en) * | 2019-10-29 | 2022-10-04 | 武汉华星光电技术有限公司 | Electrostatic protection structure, manufacturing method and array substrate mother board |
| CN113066803B (en) * | 2021-03-22 | 2023-04-28 | 合肥鑫晟光电科技有限公司 | Display panel manufacturing method, display panel and display panel to be cut |
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| CN107134465A (en) * | 2017-07-06 | 2017-09-05 | 京东方科技集团股份有限公司 | Array base palte and preparation method thereof, display device |
| CN107134465B (en) * | 2017-07-06 | 2021-03-30 | 京东方科技集团股份有限公司 | Array substrate, preparation method thereof and display device |
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