CN100492837C - Switching regulator - Google Patents

Abstract

A control signal generating circuit (1) comprises a comparator (10) for comparing an output voltage VO with a reference voltage outputted from a reference voltage source (11), a flip-flop (12) set by the output of the comparator (10), and a pulse control circuit (13) which receives an input voltage VIN, a reference voltage VREF2, and the inverted output of the flip-flop (12), sets the on time in accordance with the ratio between the input voltage VIN and the reference voltage VREF2, and resets the flip-flop (12) when the on time elapses after the output pulse of the flip-flop (12) rises. The output pulse of the flip-flop (12) is outputted as a control signal into a driver logic circuit (2). The driver logic circuit (2) performs on/off control of NMOSs (3, 4) according to the control signal. Thus, a switching regulator capable of operating at high speed can be realized.

Description

Switching regulator

Technical field

The present invention relates to switching regulator (switching regulator).

Background technology

In the ordinary tap stabilizer, error amplifier amplifies reference voltage and based on the error between the voltage of switching regulator output voltage, then the PWM comparator compares the output voltage and the triangular wave of error amplifier, produce pwm signal, then, according to this pwm signal, conducting or the switching device (for example, seeing following listed patent documentation 1) that in the DC-DC transducer, comprises.But, disadvantageously, carry out amplifieroperation because be arranged on the error amplifier of feedback fraction, so can not high speed operation as the switching regulator of above-mentioned configuration.

The Controlled in Current Mode and Based switching regulator is an example of switching regulator that can high speed operation.In the Controlled in Current Mode and Based switching regulator, the variable voltage that will be offset according to reference voltage and difference based on the voltage of switching regulator output voltage, compare with voltage based on its output current, then, generation has the pulse signal of the duty ratio consistent with comparative result, then, and according to this pulse signal, conducting or the switching device (for example, seeing following listed patent documentation 2) that in the DC-DC transducer, comprises.

Patent documentation 1:JP-A-2003-219638 (Fig. 1)

Patent documentation 2:JP-A-2003-219643 (Fig. 2)

Summary of the invention

The problem to be solved in the present invention

But disadvantageously, the Controlled in Current Mode and Based stabilizer comprises FEEDBACK CONTROL, produce according to reference voltage with based on the difference of the voltage of switching regulator output voltage and the variable voltage of conversion, therefore, it is difficult to be higher than the speed operation of specific speed.For example, in patent documentation 2 in the disclosed Controlled in Current Mode and Based switching regulator, trsanscondutance amplifier (gm amplifier) is poor according to the output voltage of reference voltage and switching regulator, compensate for variable voltage, then, the gm amplifier is carried out amplifieroperation according to the output voltage of switching regulator.So disclosed Controlled in Current Mode and Based switching regulator is difficult to be higher than the speed operation of specific speed in the patent documentation 2.

Consider above-mentioned shortcoming, the purpose of this invention is to provide a kind of control signal generation circuit, be used for switching regulator, allow its high speed operation, and a kind of switching regulator that can high speed operation is provided.

The device of dealing with problems

For realizing above purpose, according to the present invention, the control signal generation circuit that is used for switching regulator comprises: comparator compares voltage and reference voltage based on the output voltage of switching regulator; Trigger is by the output set of comparator; And pulse control circuit, after the output pulse of trigger is risen, through predetermined conducting period, reset flip-flop.Here, the output pulse of control signal generation circuit output trigger is as the control signal at switching device.

(1). a kind of control signal generation circuit that is used for switching regulator, described control signal generation circuit comprises:

Comparator compares voltage and reference voltage based on the output voltage of described switching regulator;

Trigger comes set by the output of described comparator; And

Pulse control circuit passes through predetermined conducting during the period after the output pulse of described trigger is risen, the described trigger that resets,

Wherein, described control signal generation circuit is exported the output pulse of described trigger, as the control signal that is included in the switching device in the switching regulator.

(2). according to (1) described control signal generation circuit, wherein

Described pulse control circuit comprises:

Current source;

Capacitor,

Transistor, when being high, described transistor ends in the output pulse of described trigger, so that will be fed into described capacitor as charging current by the electric current that described current source produces, when low, described transistor turns is so that to described capacitor charging in the output pulse of described trigger; And

The conducting period is provided with comparator, the charging voltage and second reference voltage of described capacitor compared, and

By the output that comparator was set with the described conducting period described trigger that resets, be set the conducting period.

(3). according to (1) described control signal generation circuit, also comprise maximum conducting period control circuit, be used to be provided with the maximum conducting period, and after the output pulse of described trigger is risen, pass through maximum conducting during the period, the described trigger that resets,

Wherein, limit the conducting period of the output pulse of described trigger, make it be no more than the maximum conducting period.

(4). according to (2) described control signal generation circuit, also comprise maximum conducting period control circuit, be used to be provided with the maximum conducting period, and after the output pulse of described trigger is risen, pass through maximum conducting during the period, the described trigger that resets,

Wherein, limit the conducting period of the output pulse of described trigger, make it be no more than the maximum conducting period.

(5). according to (3) described control signal generation circuit, also comprising resets prevents part, if after the output pulse of described trigger is risen through the conducting the be scheduled to during period, be lower than described reference voltage based on the voltage of the output voltage of described switching regulator, the output that the prevents described pulse control circuit described trigger that resets.

(6). according to (4) described control signal generation circuit, also comprising resets prevents part, if after the output pulse of described trigger is risen through the conducting the be scheduled to during period, be lower than described reference voltage based on the voltage of the output voltage of described switching regulator, the output that the prevents described pulse control circuit described trigger that resets.

(7). according to (5) described control signal generation circuit, comprise that also set prevents part, after after the output pulse of described trigger is risen, having passed through the maximum conducting period, prevent the described trigger of output set of described comparator, up to having passed through predetermined periods again.

(8). according to (6) described control signal generation circuit, comprise that also set prevents part, after after the output pulse of described trigger is risen, having passed through the maximum conducting period, prevent the described trigger of output set of described comparator, up to having passed through predetermined periods again.

(9). a kind of switching regulator comprises:

The DC-DC transducer;

Control signal generation circuit produces the corresponding control signal of output voltage with described DC-DC transducer; And

Drive circuit according to described control signal, drives the switching device that comprises in the described DC-DC transducer,

Wherein, described control signal generation circuit comprises:

Comparator compares voltage and reference voltage based on the output voltage of described switching regulator;

Trigger comes set by the output of described comparator; And

Pulse control circuit passes through predetermined conducting during the period after the output pulse of described trigger is risen, the described trigger that resets,

Wherein, described control signal generation circuit is exported the output pulse of described trigger, as the control signal of described switching device.

(10). according to (9) described switching regulator, wherein

Described pulse control circuit comprises:

Current source;

Capacitor,

Transistor, when being high, described transistor ends in the output pulse of described trigger, so that will be fed into described capacitor as charging current by the electric current that described current source produces, when low, described transistor turns is so that to described capacitor charging in the output pulse of described trigger; And

The conducting period is provided with comparator, the charging voltage and second reference voltage of described capacitor compared, and

By the output that comparator was set with the described conducting period described trigger that resets, be set the conducting period.

(11). according to (9) described switching regulator, wherein said control signal generation circuit also comprises maximum conducting period control circuit, is used to be provided with the maximum conducting period, and passes through maximum conducting during the period after the output pulse of described trigger is risen, described trigger resets

Wherein, limit the conducting period of the output pulse of described trigger, make it be no more than the maximum conducting period.

(12). according to (10) described switching regulator, wherein said control signal generation circuit also comprises maximum conducting period control circuit, is used to be provided with the maximum conducting period, and passes through maximum conducting during the period after the output pulse of described trigger is risen, described trigger resets

Wherein, limit the conducting period of the output pulse of described trigger, make it be no more than the maximum conducting period.

(13). according to (11) described switching regulator, wherein said control signal generation circuit also comprises resetting and prevents part, if the conducting that process is scheduled to after the output pulse of described trigger is risen is during the period, voltage based on the output voltage of described switching regulator is lower than described reference voltage, the output that the prevents described pulse control circuit described trigger that resets.

(14). according to (12) described switching regulator, wherein said control signal generation circuit also comprises resetting and prevents part, if the conducting that process is scheduled to after the output pulse of described trigger is risen is during the period, voltage based on the output voltage of described switching regulator is lower than described reference voltage, the output that the prevents described pulse control circuit described trigger that resets.

(15). according to (13) described switching regulator, wherein said control signal generation circuit comprises that also set prevents part, after after the output pulse of described trigger is risen, passing through the maximum conducting period, prevent the described trigger of output set of described comparator, up to passing through predetermined periods again.

(16). according to (14) described switching regulator, wherein said control signal generation circuit comprises that also set prevents part, after after the output pulse of described trigger is risen, passing through the maximum conducting period, prevent the described trigger of output set of described comparator, up to passing through predetermined periods again.

(17). according to (9) described switching regulator, wherein said reference voltage changes along with the output pulse of described trigger, and is in and the output voltage of described switching regulator in fact on the opposite phases.

(18). according to (17) described switching regulator, also comprise:

Constant pressure source; And

Resistor, an end links to each other with the reversed-phase output of described trigger, and the other end links to each other with the output of described constant pressure source,

Voltages at nodes between wherein said constant pressure source and the described resistor is described reference voltage.

(19). according to (17) described switching regulator, also comprise:

Constant pressure source;

Variable current source according to the signal based on control signal, changes electric current; And

Resistor, an end links to each other with described constant pressure source, and the other end links to each other with described variable current source,

Voltages at nodes between wherein said resistor and the described variable current source is described reference voltage.

In combining the switching regulator of aforesaid control signal generation circuit, feedback fraction is carried out simply based on the voltage of the output voltage of switching regulator and the compare operation between the reference voltage, thereby allows high speed operation.

As the control signal generation circuit of above-mentioned configuration in, pulse control circuit can comprise that the conducting period is provided with comparator, the period of process after will rising with the output pulse of trigger, with with all corresponding voltage of the input voltage of switching regulator (being subjected to monitoring voltage), compare with second reference voltage.In this case, can be set the conducting period by the output reset flip-flop of comparator was set with the conducting period.

Adopt this configuration, pulse control circuit is carried out the compare operation that is subjected between the monitoring voltage and second reference voltage.Therefore, in combining the switching regulator of this control signal generation circuit, feedback fraction is mainly carried out based on the voltage of the output voltage of switching regulator and the compare operation between the reference voltage, and be subjected to compare operation between the monitoring voltage and second reference voltage, thereby allow high speed operation.

In the control signal generation circuit of how about above-mentioned configuration in office, maximum conducting period control circuit can also be set, the maximum conducting period is set, and the maximum conducting of process during the period after the output pulse of trigger is risen, reset flip-flop.In this case, can limit the conducting period of the output pulse of trigger, make it be no more than the maximum conducting period.

Adopt this configuration, the conducting period of the output pulse of trigger was limited within the maximum conducting period, therefore, will never reach the switching regulator that combines this control signal generation circuit unsettled level that becomes that makes from the duty ratio of the control signal of control signal generation circuit output.Therefore, though from the duty ratio (on-duty) of the control signal of control signal generation circuit output near 100%, also can make the switching regulator that combines this control signal generation circuit stable.

As control signal generation circuit above-mentioned configuration, that comprise maximum conducting period control circuit in, can also be provided with resets prevents part, the conducting period through being scheduled to after the output pulse of trigger is risen, and when being lower than reference voltage, prevent the output reset flip-flop of pulse control circuit based on the voltage of the output voltage of switching regulator.

Adopt this configuration, when the output voltage of switching regulator descends, prevent the output reset flip-flop of pulse control circuit.Therefore, the output voltage that can reduce switching regulator returns the required time of predetermined value.

As above-mentioned configuration, comprise reset prevent the part control signal generation circuit in, set can also be set prevent part, after rising, the output pulse of trigger, prevents the output set flip-flop of comparator, up to passing through scheduled time slot again through after the maximum conducting period.

Adopt this configuration,, also after the output pulse of trigger is risen, after the process maximum conducting period, prevent the output set flip-flop of comparator, up to passing through scheduled time slot again even when the output voltage of switching regulator descends.Therefore, will never reach the switching regulator that combines this control signal generation circuit unsettled level that becomes that makes from the duty ratio of the control signal of control signal generation circuit output.Therefore, though from the duty ratio of the control signal of control signal generation circuit output near 100%, also can make the switching regulator that combines this control signal generation circuit stable.

For realizing above purpose, according to the present invention, a kind of switching regulator comprises: the DC-DC transducer; Control signal generation circuit produces the corresponding control signal of output voltage with the DC-DC transducer; And drive circuit, according to control signal, drive the switching device that comprises in the DC-DC transducer.Here, control signal generation circuit is one of control signal generation circuit as above-mentioned configuration.Adopt this configuration, can realize high speed operation.High speed operation makes can handle bigger electric current.

As the switching regulator of above-mentioned configuration in, can and be included between the output capacitor in the DC-DC transducer at comparator resistor is set; Perhaps, reference voltage can change along with the output pulse of trigger, and can be in and the output voltage of switching regulator in fact on the opposite phases.

The capacitor (for example, ceramic capacitor) that has a low equivalent series resistance in use adopts last configuration, even during as output capacitor, also can improve the ripple voltage of switching regulator output voltage.Therefore, even the capacitor (for example, ceramic capacitor) that has a low equivalent series resistance in use during as output capacitor, also can reduce the increase of switching delay phase in comparator, thus the work of stable switch stabilizer.Adopt back one structure, though the capacitor (for example, ceramic capacitor) that has a low equivalent series resistance in use during as output capacitor, work that also can the stable switch stabilizer, and can not reduce the stability of switching regulator output voltage.

Advantage of the present invention

According to the present invention, can realize control signal generation circuit, be used for switching regulator, allow its high speed operation, and realize can high speed operation switching regulator.

Description of drawings

[Fig. 1] is the figure that the switching regulator configuration of first embodiment of the invention is shown;

[Fig. 2] illustrates the figure that is included in the ios dhcp sample configuration IOS DHCP of the control signal generation circuit in the switching regulator shown in Fig. 1;

[Fig. 3] is in switching regulator shown in Figure 1 and control signal generation circuit shown in Figure 2, the sequential chart of the voltage and current of observing at reference point;

[Fig. 4] is the figure that the switching regulator configuration of second embodiment of the invention is shown;

[Fig. 5] illustrates the figure that is included in the ios dhcp sample configuration IOS DHCP of the pulse control circuit in the switching regulator shown in Fig. 4;

[Fig. 6] has under the situation of capacitor as output capacitor of low equivalent series resistance in use, in switching regulator shown in Fig. 1 or 4, and the sequential chart of the voltage and current of observing at reference point;

[Fig. 7] is the figure that the switching regulator configuration of third embodiment of the invention is shown;

[Fig. 8] is the figure that the switching regulator configuration of fourth embodiment of the invention is shown;

[Fig. 9] is the figure that the switching regulator configuration of fifth embodiment of the invention is shown;

[Figure 10 A] illustrates in the switching regulator shown in Figure 7, the figure of the voltage waveform of observing at reference point;

[Figure 10 B] illustrates in the switching regulator shown in Figure 9, the figure of the voltage waveform of observing at reference point;

[Figure 11] is the figure that the switching regulator configuration of sixth embodiment of the invention is shown; And

[Figure 12] illustrates in the switching regulator shown in Figure 11, the figure of the voltage waveform of observing at reference point;

List of numerals

1,1 ', 100,200,300 control signal generation circuit

2 driver logic circuit

3，4 NMOS

5 Zener diodes

6 capacitors

7 coils

8 output capacitances

9,24 resistors

10 comparators

11 reference voltage sources

11a, 11b, 22 resistors

12 triggers

13 pulse control circuits

14 maximum conducting period control circuits

15,17 or the door

16,19 with the door

18,21 not gates

20 by the period control circuit

25 current sources

Embodiment

Below, the embodiment of the invention will be described with reference to the drawings.At first, the first embodiment of the present invention will be described.The configuration of the switching regulator of first embodiment of the invention shown in Fig. 1.

Switching regulator shown in Fig. 1 comprises control signal generation circuit 1, driver logic circuit 2, N-channel MOS transistor (calling " NMOS " or " nmos pass transistor " in the following text) 3 and 4, Zener diode 5, capacitor 6, coil 7 and output capacitor 8.Here, suppose input voltage V _INThan driving the driving voltage V that is included in the circuit in the control signal generation circuit 1 _DDHigh.In the present embodiment, suppose input voltage V _INBe+25V driving voltage V _DDBe+5V.In the present embodiment, NMOS 3 and 4, coil 7 and output capacitor are formed the DC-DC transducer jointly, and the DC-DC transducer is with input voltage V _INConvert output voltage V to _OSo, output voltage V _OBeing the output voltage of switching regulator shown in Fig. 1, also is the output voltage of DC-DC transducer simultaneously.

Control signal generation circuit 1 receives output signal V _O, produce pulse signal (control signal) then, to send to driver logic circuit 2.Driver logic circuit 2 is according to the pulse signal from control signal generation circuit 1 output, conducting or by NMOS 3 and 4.

When NMOS 3 ends, and during NMOS 4 conducting complementally, charging current flows through Schottky diode 5, and the terminal by capacitor 6 enters and has been applied in driving voltage V _DDCapacitor 6, thereby the voltage at capacitor 6 two ends becomes approximately+5V.Then, when NMOS 3 conductings, and NMOS 4 complementally by the time, the node voltage between capacitor 6 and the NMOS 3 becomes+25V, and the node voltage between capacitor 6 and the Schottky diode 5 becomes approximately+30V.Here, the about+30V voltage that occurs to the node of driver logic circuit 2 feed-ins between capacitor 6 and Schottky diode 5.

Driver logic circuit 2 use by the node between capacitor 6 and the Schottky diode 5 provide+30V voltage, the level of the pulse signal that will export from control signal generation circuit 1 moves to higher electromotive force.Then, driver logic circuit 2 is to the grid feed-in of NMOS 3 first drive signal based on the signal of mobile level; Driver logic circuit 2 also will be anti-phase from the pulse signal of control signal generation circuit 1 output, with to the grid feed-in of NMOS 4 second drive signal based on inversion signal.

Node voltage between coil 7 and the output capacitor 8 level and smooth NMOS 3 and 4, thus output voltage V formed _O

Now, with the control signal generation circuit of describing in detail as feature of the present invention 1.Control signal generation circuit 1 comprises comparator 10, reference voltage source 11, trigger 12 and pulse control circuit 13.

Comparator 10 is output voltage V relatively _OWith reference voltage V from reference voltage source 11 outputs _REF, relatively export with set end feed-in, as asserts signal to trigger 12.Pulse control circuit 13 receives input voltage V _IN, reference voltage V _REF2With the anti-phase output of trigger 12, and according to input voltage V _INWith reference voltage V _REF2Ratio (V _REF2/ V _IN), be provided with from the conducting period T of the pulse signal of control signal generation circuit 1 output _ON, to satisfy following equation (1).After rising, through conducting period T at pulse signal from control signal generation circuit 1 output _ONThe time, the signal that pulse control circuit 13 has frequency f to the reset terminal feed-in of trigger 12 is as the reset signal of reset flip-flop 12.Then, export to the pulse of driver logic circuit 2 feed-in triggers 12.Can reference voltage V be set with band-gap circuit (bandgap circuit) etc. _REF2

[equation 1]

$T_{\mathrm{ON}}=\frac{V_{\mathrm{REF}2}}{V_{\mathrm{IN}}}\×\frac{1}{f}---\left(1\right)$

The ios dhcp sample configuration IOS DHCP of control signal generation circuit shown in Fig. 21.Should be noted that in Fig. 2,, and no longer repeat detailed description this part with the same section shown in the shared reference number marked graph 1.The pulse control circuit 13 that is included in the control signal generation circuit 1 shown in Fig. 2 comprises: resistor R 1 and R2, and to input voltage V _INCarry out dividing potential drop; NPN transistor Q3; Resistor R 3, the emitter current of transistor Q3 flows through this resistor; High speed amplifier AMP1 amplifies input voltage V _INBranch pressure voltage and the voltage difference between the voltage at resistor R 3 two ends, then to this voltage difference of base stage feed-in of transistor Q3; Capacitor C1; Current mirroring circuit comprises PNP transistor Q1 and Q2, and equates with the emitter current of transistor Q3 to capacitor C1 feed-in, or the charging current of its prearranged multiple; Nmos pass transistor Q4 according to the anti-phase output of trigger 12, switches between the charging of capacitor C1 and discharge; Resistor R 4 and R5 are to reference voltage V _REF2Carry out dividing potential drop; And comparator C OM1, comparison reference voltage V _REF2Branch pressure voltage and the voltage at capacitor C1 two ends, relatively export with reset terminal feed-in to trigger 12.

Shown in Fig. 3 in switching regulator shown in Figure 1 and control signal generation circuit shown in Figure 2, the sequential chart of the voltage and current of observing at reference point.Now, will be with reference to figure 3, the work of control signal generation circuit shown in the work of switching regulator and Fig. 2 shown in description Fig. 1.

Pulse signal V when the output feed-in driver logic circuit 2 of slave flipflop 12 _QWhen being in low level, NMOS 3 ends, NMOS 4 complementary conductings, so the electric current I of flowing through coil 7 _LAnd output voltage V _OAll reduce gradually.At this moment, the anti-phase output of trigger 12 is in high level, thereby makes nmos pass transistor Q4 conducting, the voltage V at capacitor C1 two ends _C1Be zero.Therefore, from the reset signal V of the reset terminal of comparator C OM1 feed-in trigger 12 _RBe in low level.

Then, work as output voltage V _OBecome than reference voltage V _REFWhen low, from the asserts signal V of the set end of comparator 10 feed-in triggers 12 _SFrom the low height that changes to.This makes pulse signal V _QChange to height from low, NMOS 3 conductings thus, and NMOS 4 complementations end.Therefore, output voltage V _OBecome than reference voltage V _REFHeight, thus make asserts signal turn back to low level immediately.At this moment, to low, nmos pass transistor Q4 ends thus from hypermutation in the anti-phase output of trigger 12, to begin to capacitor C1 feed-in charging current.

As pulse signal V as the output of trigger 12 _QWhen being in high level, the electric current I of flowing through coil 7 _L, output voltage V _OVoltage V with capacitor C1 two ends _C1All increase gradually.

Then, as the voltage V at capacitor C1 two ends _C1Reach threshold value V _THWhen (voltage that equates with node voltage between resistor R 4 and the R5), reset signal V _RFrom the low height that changes to.This makes pulse signal V _QFrom hypermutation to low.As pulse signal V _QDuring step-down, the anti-phase output of trigger 12 uprises.Therefore, nmos pass transistor Q4 conducting, the voltage V at capacitor C1 two ends _C1Vanishing, thus make reset signal V _RTurn back to low level immediately.

Because switching regulator shown in Figure 1 and control signal generation circuit shown in Figure 2 are worked as described above, so pulse signal V _QConducting period T _ONBe consistent with the charging period of capacitor C1.Therefore, by following equation (2) indicating impulse signal V _QConducting period T _ON, C wherein ₁The electric capacity of expression capacitor C1, i represents the charging current by capacitor C1, and R ₁To R ₅The resistance of representing resistor R 1 to R5 respectively.Here, these resistor satisfied R ₁=R ₄, R ₂=R ₅

[equation 2]

$T_{\mathrm{ON}}=\frac{{\mathrm{<figure-callout\; id="1"\; label="C"\; filenames="C200580008326E00251.png,C200580008326E00261.png"\; state="\{\{state\}\}">C</figure-callout>}}_1\&times;V_{\mathrm{TH}}}{i}$

$=\frac{{\mathrm{<figure-callout\; id="1"\; label="C"\; filenames="C200580008326E00251.png,C200580008326E00261.png"\; state="\{\{state\}\}">C</figure-callout>}}_1\&times;\frac{R_5}{{\mathrm{<figure-callout\; id="4"\; label="R"\; filenames="C200580008326E00251.png,C200580008326E00311.png"\; state="\{\{state\}\}">R</figure-callout>}}_4+{\mathrm{<figure-callout\; id="5"\; label="R"\; filenames="C200580008326E00311.png"\; state="\{\{state\}\}">R</figure-callout>}}_5}\&times;V_{\mathrm{REF}2}}{\frac{R_2}{{\mathrm{<figure-callout\; id="1"\; label="R"\; filenames="C200580008326E00251.png,C200580008326E00261.png"\; state="\{\{state\}\}">R</figure-callout>}}_1+{\mathrm{<figure-callout\; id="2"\; label="R"\; filenames="C200580008326E00251.png,C200580008326E00291.png"\; state="\{\{state\}\}">R</figure-callout>}}_2}\&times;V_{\mathrm{IN}}\&times;\frac{1}{{\mathrm{<figure-callout\; id="3"\; label="R"\; filenames="C200580008326E00321.png"\; state="\{\{state\}\}">R</figure-callout>}}_3}}$

$=\frac{V_{\mathrm{REF}2}}{V_{\mathrm{IN}}}\&times;{\mathrm{<figure-callout\; id="1"\; label="C"\; filenames="C200580008326E00251.png,C200580008326E00261.png"\; state="\{\{state\}\}">C</figure-callout>}}_1\&times;R_3---\left[2\right]$

Here, if switching regulator has the buck DC-DC transducer, then be used for conducting and by the conducting period T of the pulse signal of the switching device that is included in the DC-DC transducer by above-mentioned equation (1) expression _ON(energy is stored in the period in the coil that is included in the DC-DC transducer).Therefore, the capacitor C of capacitor C1 ₁Resistance value R with resistor R 3 ₃Arithmetic product equal pulse signal V _QFrequency.So, even change input voltage V _IN, pulse signal V _QFrequency also keep constant.

In switching regulator shown in Figure 1, feedback fraction is mainly carried out output voltage V _OWith reference voltage V _REFBetween compare operation, and charging voltage V _C1With reference voltage V _REF2Between compare operation.This allows high speed operation.

Below, second embodiment of the present invention will be described.The configuration of the switching regulator of second embodiment of the invention shown in Fig. 4.Should be noted that in Fig. 4,, and no longer repeat detailed description this part with the same section shown in the shared reference number marked graph 1.The difference of the switching regulator shown in switching regulator shown in Fig. 4 and Fig. 1 is, has substituted the control signal generation circuit 1 that is included among the latter with control signal generation circuit 1 '.Compare with control signal generation circuit 1, in control signal generation circuit 1 ', additionally be provided with maximum conducting period control circuit 14 and or door 15.To the reset terminal of trigger 12, the output of the output of feed-in pulse control circuit 13 and maximum conducting period control circuit 14 is as reset signal.

Maximum conducting period control circuit 14 receives the anti-phase output of trigger 12, and is provided with from the maximum conducting period T of the pulse signal of control signal generation circuit 1 ' output _MAXAfter rising, through maximum conducting period T at pulse signal from control signal generation circuit 1 ' output _MAXThe time, maximum conducting period control circuit 14 output signals are come reset flip-flop 12.

Or door 15 calculate between the output of the output of pulse control circuits 13 and maximum conducting period control circuit 14 or, and to this result of reset terminal feed-in of trigger 12, as reset signal.Therefore, can limit from the conducting period T of the pulse signal of control signal generation circuit 1 output _ONThereby, make it be no more than maximum conducting period T _MAX

The ios dhcp sample configuration IOS DHCP of control signal generation circuit 1 ' shown in Fig. 5.Should be noted that in Fig. 5,, and no longer repeat detailed description this part with the same section shown in the shared reference number marked graph 2.The maximum conducting period control circuit 14 that comprises in the control signal generation circuit 1 ' shown in Figure 5 comprises: the first reference voltage source REF1 is used to export the first reference voltage V _REF1NPN transistor Q7; Resistor R 6, the emitter current of transistor Q7 this resistor of flowing through; Amplifier AMP2 amplifies the first reference voltage V _REF1And the voltage difference between the voltage at resistor R 6 two ends is then to this voltage difference of base stage feed-in of transistor Q7; Capacitor C2; Current mirroring circuit comprises PNP transistor Q5 and Q6, and equates with the emitter current of transistor Q7 to capacitor C2 feed-in, or the charging current of its prearranged multiple; Nmos pass transistor Q8 according to the anti-phase output of trigger 12, switches between the charging of capacitor C2 and discharge; The second reference voltage source REF3 is used to export the second reference voltage V _REF3 And comparator C OM2, comparison reference voltage V _REF3With the voltage at capacitor C2 two ends, with to or the feed-in of one of door 15 input relatively export.

Dispose maximum conducting period control circuit 14 as mentioned above, thereby by the maximum conducting period T of following equation (3) expression by 14 settings of maximum conducting period control circuit _MAX, wherein, C ₂The electric capacity of expression capacitor C2, R ₆The resistance value of expression resistor R 6.

[equation 3]

$T_{\mathrm{MAX}}=\frac{V_{\mathrm{REF}3}}{{\mathrm{<figure-callout\; id="1"\; label="V\; REF"\; filenames="C200580008326E00251.png,C200580008326E00261.png"\; state="\{\{state\}\}">V</figure-callout>}}_{\mathrm{REF}}}\&times;{\mathrm{<figure-callout\; id="2"\; label="C"\; filenames="C200580008326E00251.png,C200580008326E00291.png"\; state="\{\{state\}\}">C</figure-callout>}}_2\&times;R_6---\left(3\right)$

In the switching regulator of first embodiment of the invention shown in Figure 1, when the input voltage step-down, make duty ratio from the pulse signal of control signal generation circuit 1 output near 100% o'clock, the period that can be used for the charging of bootstrap capacitor 6 becomes very short, thereby makes job insecurity.On the contrary, in the switching regulator of second embodiment of the invention shown in Figure 4, by the conducting period T of restriction from the pulse signal of control signal generation circuit 1 ' output _ON, make it be no more than maximum T _MAX, can obtain enough periods for the charging of bootstrap capacitor 6.Even making in duty ratio, this also can make working stability near 100% o'clock.

Below, the third embodiment of the present invention will be described.In above-mentioned switching regulator shown in Figure 1 and switching regulator shown in Figure 4, output voltage V _ORipple voltage Δ V equal the electric current I of flowing through coil 7 _LFluctuating range Δ I and the arithmetic product of the equivalent series resistance of output capacitor 8 (below, " ESR ").Therefore, as shown in Figure 6, under the situation of capacitor (for example, ceramic capacitor) of using low ESR as output capacitor 8, output voltage V _ORipple voltage Δ V may become too little.Along with output voltage V _ORipple voltage Δ V diminish output voltage V _OGradient diminish.Therefore, the switching delay phase of comparator 10 is (in output voltage V _OBe reduced to and reference voltage V _REFAfter equating, become the period of high level up to the output of comparator 10) become longer.So, work as output voltage V _ORipple voltage Δ V become too hour, it is unstable that work becomes.

As shown in Figure 7, the switching regulator configuration design with third embodiment of the invention solves this shortcoming.Should be noted that in Fig. 7,, and no longer repeat detailed description this part with the same section shown in the shared reference number marked graph 4.

Compare with switching regulator shown in Figure 4, switching regulator shown in Figure 7 additionally is provided with resistor 9.Node between the inverting input of one end of resistor 9 and coil 7 and comparator 10 links to each other, the other end of resistor 9 with send output voltage V _OThe terminal of process and the node between the output capacitor 8 link to each other.Adopt this configuration, output voltage V _ORipple voltage Δ V equal resistance sum with the ESR and the resistor 9 of output capacitor 8, multiply by the electric current I of flowing through coil 7 _LFluctuating range Δ I, the value of being calculated.Therefore, even during as output capacitor 8, also can improve and increase voltage V at the capacitor (for example, ceramic capacitor) that uses low ESR _ORipple voltage Δ V, come steady operation.

Though the voltage of the inverting input of input comparator 10 is output voltage V _OWith the voltage sum at resistor 9 two ends, but should and be approximately equal to output voltage V _OTherefore, in this explanation, think and imported output voltage V to the inverting input of input comparator 10 _O

The resistor 9 because output current of switching regulator is flowed through is so can detect resistor as output current with resistor 9.

External resistor device substitutional resistance device 9 can be set, the inverting input of an end of this external resistor device and coil 7, comparator 10 and send output voltage V _OThe node between the terminal of process link to each other, the other end of external resistor device links to each other with output capacitor 8.Unlike resistor 9, this external resistor device can not detect resistor as output current.

Below, the fourth embodiment of the present invention will be described.The switching regulator work of the invention described above first embodiment, the conducting period T of the feasible pulse signal of from control signal generation circuit 1, exporting _ONSatisfy previous equations (1).Therefore, work as output voltage V _ODuring decline, unfriendly, output voltage V _OTake a long time and get back to predetermined value.Output voltage V _OIt is many more to descend, output voltage V _OIt is long more to get back to the required time of predetermined value.

As shown in Figure 8, the switching regulator configuration design with fourth embodiment of the invention solves this shortcoming.Should be noted that in Fig. 8,, and no longer repeat detailed description this part with the same section shown in the shared reference number marked graph 4.The difference of the switching regulator shown in switching regulator shown in Fig. 8 and Fig. 4 is, has substituted the control signal generation circuit 1 ' that is included among the latter with control signal generation circuit 100.Compare with control signal generation circuit 1 ', in control signal generation circuit 100, additionally be provided with and door 16 and 19 or door 17, not gate 18 and 21 and by period control circuit 20.The preferential trigger that resets is as trigger 12.

The output of comparator 10 links to each other with first input end with door 16, and links to each other with first input end with door 19 by not gate 18.Link to each other with the set end of trigger 12 with the output of door 16, and with or door 17 first input end link to each other.The output of trigger 12 with or door 17 second input link to each other, or 17 output links to each other with driver logic circuit 12.

The reversed-phase output of trigger 12 links to each other with the input side of pulse control circuit 13, and links to each other with the input side of maximum conducting period control circuit 14.The outlet side of pulse control circuit 13 with link to each other with second input of door 19, with the output of door 19 with or the first input end of door 15 link to each other.The outlet side of maximum conducting period control circuit 14 with or second input of door 15 link to each other.Or door 15 output 15 links to each other with the reset terminal of trigger 15, and links to each other with the input side that ends period control circuit 20., and link to each other by not gate 21 by the outlet side of period control circuit 20 with second input of door 16.

(work as output voltage V in the operate as normal _ODo not have when decline), control signal generation circuit 100 is exported the similar pulse signal of pulse signal to the control signal generation circuit 1 ' output that comprises from switching regulator shown in Figure 4.

Below, will be described in output voltage V _ODuring decline, how control signal generation circuit 100 works.Work as output voltage V _ODuring decline, the output of comparator 10 uprises, thus with the output step-down of door 19.At first, also do not have through the maximum conducting period, therefore maximum conducting period control circuit 14 outputs are low.Therefore, or door 15 outputs are low, and not gate output is high, thereby the output with door is uprised.Therefore, with trigger 12 set, and the pulse signal of exporting from control signal generation circuit 100 rises.

Then, after the pulse signal from control signal generation circuit 100 output rises through conducting period T _ONAfterwards, even when the output of pulse control circuit 13 uprises, low with the output maintenance of door 19.Therefore, can reset flip-flop 12.This makes can shorten output voltage V _OGet back to the required time of predetermined value.

After the pulse signal from control signal generation circuit 100 output rises through maximum conducting period T _MAXThe time, the output of maximum conducting period control circuit 14 uprises, and gets back to low level then immediately.This makes after the pulse signal from control signal generation circuit 100 outputs rises through maximum conducting period T _MAXAfterwards, up to ending period T through minimum _MIN, low with the output maintenance of door 16.Therefore, can set flip-flop 12.This makes and can obtain enough periods for the charging of bootstrap capacitor 6.

Below, the fifth embodiment of the present invention will be described.In the switching regulator of the invention described above the 3rd embodiment, even at the capacitor (for example, ceramic capacitor) that uses low ESR during as output capacitor 8, work that also can the stable switch stabilizer.But, because this moment output voltage V _ORipple voltage bigger, so unfriendly, output voltage V _OUnstable.

As shown in Figure 9, the switching regulator configuration design with fifth embodiment of the invention solves this shortcoming.Should be noted that in Fig. 9,, and no longer repeat detailed description this part with the same section shown in the shared reference number marked graph 7.

In switching regulator shown in Figure 9, compare with switching regulator shown in Figure 7, substituted the control signal generation circuit 1 ' that is included among the latter with control signal generation circuit 200, deleted resistor 9, added resistor 22.In control signal generation circuit 200, substituted the reference voltage source 11 that comprises in the control signal generation circuit 1 ' with resistor 11a and 11b.Resistor 11a and 11b form an end and are applied in constant voltage V _C, other end ground connection series circuit.The non-inverting input of comparator 10 links to each other with node between resistor 11a and the 11b, and therefore, the node voltage between resistor 11a and the 11b is as reference voltage V _REFOne end of resistor 22 also with resistor 11a and 11b between node link to each other, the other end of resistor 22 links to each other with the grid of nmos pass transistor 4.

Under the situation of the switching regulator of third embodiment of the invention shown in Figure 7, output voltage V _O, reference voltage V _REFWith to the waveform of the pulse signal LG of the grid of nmos pass transistor 4 output shown in Figure 10 A.Therefore, if output voltage V _ORipple voltage little, comparator 10 is difficult to carry out compare operation, causes the job insecurity of switching regulator.

On the contrary, under the situation of the switching regulator of fifth embodiment of the invention shown in Figure 9, output voltage V _O, reference voltage V _REFWith to the waveform of the pulse signal LG of the grid of nmos pass transistor 4 output shown in Figure 10 B.Therefore, even output voltage V _ORipple voltage little, comparator 10 also is easy to carry out compare operation, makes the working stability of switching regulator.So, in the switching regulator of fifth embodiment of the invention shown in Figure 9, even at the capacitor (for example, ceramic capacitor) that uses low ESR during as output capacitor 8, work that also can the stable switch stabilizer, and can not reduce output voltage V _OStability.

Though should be noted that in switching regulator shown in Figure 9, the other end of resistor 22 links to each other with the grid of nmos pass transistor 4, can adopt other any configuration to implement the present invention.For example, when the other end of resistor 22 links to each other with the non-oppisite phase end of trigger 12, also can obtain aforesaid same advantage.Capacitor 23 is set eliminates noise.

Below, will the switching regulator of sixth embodiment of the invention be described.This switching regulator provides the advantage identical with the advantage that switching regulator provided of fifth embodiment of the invention.Figure 11 is the figure that the switching regulator of sixth embodiment of the invention is shown.Should be noted that in Figure 11,, and no longer repeat detailed description this part with the same section shown in the shared reference number marked graph 9.

In switching regulator shown in Figure 11, compare with switching regulator shown in Figure 9, substitute control signal generation circuit 200 with control signal generation circuit 300, and deleted resistor 22.In control signal generation circuit 300, compare with control signal generation circuit 200, delete capacitor 23, and additionally be provided with resistor 24 and current source 25.Resistance is R ₂₄An end of resistor 24 link to each other with node between resistor 11a and the 11b, the other end of resistor 24 links to each other with an end of current source 25.The other end ground connection of current source 25 is used as reference voltage V with the node voltage between resistor 24 and the current source 25 _REF Current source 25 is the current sources according to the control signal output current.In this embodiment, from the pulse signal of driver logic circuit 2, as the control signal of current source 25 to the grid output of nmos pass transistor 3.

In the switching regulator of sixth embodiment of the invention shown in Figure 11, the node voltage V between resistor 11a and the 11b ₁₁, from pulse signal HG, the output voltage V of driver logic circuit 2 to the output of the grid of nmos pass transistor 3 _O, current source 25 output current I ₂₅With reference voltage V _REF(=V ₁₁-R ₂₄* I ₂₅) waveform as shown in figure 12.Therefore, even output voltage V _ORipple voltage little, comparator 10 also is easy to carry out compare operation, makes the working stability of switching regulator.So, in the switching regulator of sixth embodiment of the invention shown in Figure 11, even at the capacitor (for example, ceramic capacitor) that uses low ESR during as output capacitor 8, work that also can the stable switch stabilizer, and can not reduce output voltage V _OStability.

Though should be noted that in switching regulator shown in Figure 11, will as the control signal of current source 25, can adopt any other configuration to implement the present invention from the pulse signal HG of driver logic circuit 2 to the grid output of nmos pass transistor 3.For example, when the signal that the output of slave flipflop 12 is exported is used as the control signal of current source 25, also can obtain aforesaid same advantage.

Above-mentioned first to the 6th embodiment relates to the switching regulator with bootstrap type DC-DC transducer.Self-evident, the present invention can be applicable to have the switching regulator of any other type DC-DC transducer.In whole embodiment of the present invention, can substitute Zener diode 5 and capacitor 6, the voltage that obtains to strengthen with any other configuration.Comparator 10 can have hysteresis, unless it influences conducting period T _ON

Industrial applicibility

Generally speaking, switching regulator according to the present invention can be applied to electrical equipment.

Claims (19)

1. control signal generation circuit that is used for switching regulator, described control signal generation circuit comprises:

Comparator compares voltage and reference voltage based on the output voltage of described switching regulator;

Trigger comes set by the output of described comparator; And

Pulse control circuit passes through predetermined conducting during the period after the output pulse of described trigger is risen, the described trigger that resets,

Wherein, described control signal generation circuit is exported the output pulse of described trigger, as the control signal that is included in the switching device in the switching regulator.

2. control signal generation circuit according to claim 1, wherein

Described pulse control circuit comprises:

Current source;

Capacitor,

Transistor, when being high, described transistor ends in the output pulse of described trigger, so that will be fed into described capacitor as charging current by the electric current that described current source produces, when low, described transistor turns is so that to described capacitor charging in the output pulse of described trigger; And

The conducting period is provided with comparator, the charging voltage and second reference voltage of described capacitor compared, and

By the output that comparator was set with the described conducting period described trigger that resets, be set the conducting period.

3. control signal generation circuit according to claim 1 also comprises maximum conducting period control circuit, is used to be provided with the maximum conducting period, and passes through maximum conducting during the period after the output pulse of described trigger is risen, the described trigger that resets,

Wherein, limit the conducting period of the output pulse of described trigger, make it be no more than the maximum conducting period.

4. control signal generation circuit according to claim 2 also comprises maximum conducting period control circuit, is used to be provided with the maximum conducting period, and passes through maximum conducting during the period after the output pulse of described trigger is risen, the described trigger that resets,

Wherein, limit the conducting period of the output pulse of described trigger, make it be no more than the maximum conducting period.

5. control signal generation circuit according to claim 3, also comprising resets prevents part, if after the output pulse of described trigger is risen through the conducting the be scheduled to during period, be lower than described reference voltage based on the voltage of the output voltage of described switching regulator, the output that the prevents described pulse control circuit described trigger that resets.

6. control signal generation circuit according to claim 4, also comprising resets prevents part, if after the output pulse of described trigger is risen through the conducting the be scheduled to during period, be lower than described reference voltage based on the voltage of the output voltage of described switching regulator, the output that the prevents described pulse control circuit described trigger that resets.

7. control signal generation circuit according to claim 5, comprise that also set prevents part, after after the output pulse of described trigger is risen, having passed through the maximum conducting period, prevent the described trigger of output set of described comparator, up to having passed through predetermined periods again.

8. control signal generation circuit according to claim 6, comprise that also set prevents part, after after the output pulse of described trigger is risen, having passed through the maximum conducting period, prevent the described trigger of output set of described comparator, up to having passed through predetermined periods again.

9. switching regulator comprises:

The DC-DC transducer;

Control signal generation circuit produces the corresponding control signal of output voltage with described DC-DC transducer; And

Drive circuit according to described control signal, drives the switching device that comprises in the described DC-DC transducer,

Wherein, described control signal generation circuit comprises:

Comparator compares voltage and reference voltage based on the output voltage of described switching regulator;

Trigger comes set by the output of described comparator; And

Pulse control circuit passes through predetermined conducting during the period after the output pulse of described trigger is risen, the described trigger that resets,

Wherein, described control signal generation circuit is exported the output pulse of described trigger, as the control signal of described switching device.

10. switching regulator according to claim 9, wherein

Described pulse control circuit comprises:

Current source;

Capacitor,

Transistor, when being high, described transistor ends in the output pulse of described trigger, so that will be fed into described capacitor as charging current by the electric current that described current source produces, when low, described transistor turns is so that to described capacitor charging in the output pulse of described trigger; And

The conducting period is provided with comparator, the charging voltage and second reference voltage of described capacitor compared, and

By the output that comparator was set with the described conducting period described trigger that resets, be set the conducting period.

11. switching regulator according to claim 9, wherein said control signal generation circuit also comprises maximum conducting period control circuit, is used to be provided with the maximum conducting period, and passes through maximum conducting during the period after the output pulse of described trigger is risen, described trigger resets

Wherein, limit the conducting period of the output pulse of described trigger, make it be no more than the maximum conducting period.

12. switching regulator according to claim 10, wherein said control signal generation circuit also comprises maximum conducting period control circuit, is used to be provided with the maximum conducting period, and passes through maximum conducting during the period after the output pulse of described trigger is risen, described trigger resets

Wherein, limit the conducting period of the output pulse of described trigger, make it be no more than the maximum conducting period.

13. switching regulator according to claim 11, wherein said control signal generation circuit also comprises resetting and prevents part, if the conducting that process is scheduled to after the output pulse of described trigger is risen is during the period, voltage based on the output voltage of described switching regulator is lower than described reference voltage, the output that the prevents described pulse control circuit described trigger that resets.

14. switching regulator according to claim 12, wherein said control signal generation circuit also comprises resetting and prevents part, if the conducting that process is scheduled to after the output pulse of described trigger is risen is during the period, voltage based on the output voltage of described switching regulator is lower than described reference voltage, the output that the prevents described pulse control circuit described trigger that resets.

15. switching regulator according to claim 13, wherein said control signal generation circuit comprises that also set prevents part, after after the output pulse of described trigger is risen, passing through the maximum conducting period, prevent the described trigger of output set of described comparator, up to passing through predetermined periods again.

16. switching regulator according to claim 14, wherein said control signal generation circuit comprises that also set prevents part, after after the output pulse of described trigger is risen, passing through the maximum conducting period, prevent the described trigger of output set of described comparator, up to passing through predetermined periods again.

17. switching regulator according to claim 9, wherein said reference voltage changes along with the output pulse of described trigger, and is in and the output voltage of described switching regulator in fact on the opposite phases.

18. switching regulator according to claim 17 also comprises:

Constant pressure source; And

Resistor, an end links to each other with the reversed-phase output of described trigger, and the other end links to each other with the output of described constant pressure source,

Voltages at nodes between wherein said constant pressure source and the described resistor is described reference voltage.

19. switching regulator according to claim 17 also comprises:

Constant pressure source;

Variable current source according to the signal based on control signal, changes electric current; And

Resistor, an end links to each other with described constant pressure source, and the other end links to each other with described variable current source,

Voltages at nodes between wherein said resistor and the described variable current source is described reference voltage.

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