CN100476741C - 处理器阵列和用于处理器阵列的处理方法 - Google Patents
处理器阵列和用于处理器阵列的处理方法 Download PDFInfo
- Publication number
- CN100476741C CN100476741C CNB2004800047322A CN200480004732A CN100476741C CN 100476741 C CN100476741 C CN 100476741C CN B2004800047322 A CNB2004800047322 A CN B2004800047322A CN 200480004732 A CN200480004732 A CN 200480004732A CN 100476741 C CN100476741 C CN 100476741C
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- Prior art keywords
- processor
- array
- processors
- frequency
- task
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- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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- 238000003672 processing method Methods 0.000 title 1
- 238000000034 method Methods 0.000 claims abstract description 78
- 230000008569 process Effects 0.000 claims abstract description 46
- 230000005540 biological transmission Effects 0.000 claims description 14
- 230000003068 static effect Effects 0.000 claims description 3
- 238000004590 computer program Methods 0.000 claims 1
- 238000004891 communication Methods 0.000 abstract description 27
- 238000012545 processing Methods 0.000 abstract description 5
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- 239000011159 matrix material Substances 0.000 description 2
- 238000012546 transfer Methods 0.000 description 2
- 241001269238 Data Species 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000013461 design Methods 0.000 description 1
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- 238000005516 engineering process Methods 0.000 description 1
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Images
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
- G06F9/5061—Partitioning or combining of resources
- G06F9/5066—Algorithms for mapping a plurality of inter-dependent sub-tasks onto a plurality of physical CPUs
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F8/00—Arrangements for software engineering
- G06F8/40—Transformation of program code
- G06F8/41—Compilation
- G06F8/45—Exploiting coarse grain parallelism in compilation, i.e. parallelism between groups of instructions
- G06F8/451—Code distribution
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Software Systems (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Multi Processors (AREA)
Abstract
Description
周期 | PUT | OBuffer1 | OBuffer0 | 时隙 | IBuffer1 | IBuffer0 | GET |
0 | |||||||
1 | D0 | D0 | |||||
2 | D0 | ||||||
3 | D0 | 1 | |||||
4 | D0 | ||||||
5 | D1 | D1 | D0 | ||||
6 | D2 | D2 | D1 | D0 | |||
7 | D2 | D1 | 2 | D0 |
8 | D2 | D1 | D0 | ||||
9 | D2 | D1 | D0 | ||||
10 | D2 | D1 | |||||
11 | D2 | 3 | D2 | D1 | |||
12 | D2 | D1 | |||||
13 | D2 | D1 | |||||
14 | D2 | ||||||
15 | 4 | D2 | |||||
16 | D2 | ||||||
17 | D2 | ||||||
18 |
Claims (12)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB0304056A GB2398651A (en) | 2003-02-21 | 2003-02-21 | Automatical task allocation in a processor array |
GB0304056.5 | 2003-02-21 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1781080A CN1781080A (zh) | 2006-05-31 |
CN100476741C true CN100476741C (zh) | 2009-04-08 |
Family
ID=9953470
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB2004800047322A Expired - Fee Related CN100476741C (zh) | 2003-02-21 | 2004-02-19 | 处理器阵列和用于处理器阵列的处理方法 |
Country Status (7)
Country | Link |
---|---|
US (1) | US20070044064A1 (zh) |
EP (1) | EP1595210A2 (zh) |
JP (1) | JP2006518505A (zh) |
KR (1) | KR20050112523A (zh) |
CN (1) | CN100476741C (zh) |
GB (1) | GB2398651A (zh) |
WO (1) | WO2004074962A2 (zh) |
Families Citing this family (19)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2370380B (en) | 2000-12-19 | 2003-12-31 | Picochip Designs Ltd | Processor architecture |
JP4855234B2 (ja) * | 2006-12-12 | 2012-01-18 | 三菱電機株式会社 | 並列処理装置 |
US7768435B2 (en) * | 2007-07-30 | 2010-08-03 | Vns Portfolio Llc | Method and apparatus for digital to analog conversion |
GB2454865B (en) | 2007-11-05 | 2012-06-13 | Picochip Designs Ltd | Power control |
GB2455133A (en) * | 2007-11-29 | 2009-06-03 | Picochip Designs Ltd | Balancing the bandwidth used by communication between processor arrays by allocating it across a plurality of communication interfaces |
GB2457309A (en) * | 2008-02-11 | 2009-08-12 | Picochip Designs Ltd | Process allocation in a processor array using a simulated annealing method |
GB2459674A (en) * | 2008-04-29 | 2009-11-04 | Picochip Designs Ltd | Allocating communication bandwidth in a heterogeneous multicore environment |
JP2010108204A (ja) * | 2008-10-30 | 2010-05-13 | Hitachi Ltd | マルチチッププロセッサ |
GB2470037B (en) | 2009-05-07 | 2013-07-10 | Picochip Designs Ltd | Methods and devices for reducing interference in an uplink |
EP2437170A4 (en) * | 2009-05-25 | 2013-03-13 | Panasonic Corp | MULTIPROCESSOR SYSTEM, MULTIPROCESSOR CONTROL METHOD AND INTEGRATED MULTIPROCESSOR CIRCUIT |
GB2470771B (en) | 2009-06-05 | 2012-07-18 | Picochip Designs Ltd | A method and device in a communication network |
GB2470891B (en) | 2009-06-05 | 2013-11-27 | Picochip Designs Ltd | A method and device in a communication network |
GB2474071B (en) | 2009-10-05 | 2013-08-07 | Picochip Designs Ltd | Femtocell base station |
GB2482869B (en) | 2010-08-16 | 2013-11-06 | Picochip Designs Ltd | Femtocell access control |
GB2489716B (en) | 2011-04-05 | 2015-06-24 | Intel Corp | Multimode base system |
GB2489919B (en) | 2011-04-05 | 2018-02-14 | Intel Corp | Filter |
GB2491098B (en) | 2011-05-16 | 2015-05-20 | Intel Corp | Accessing a base station |
WO2013102970A1 (ja) * | 2012-01-04 | 2013-07-11 | 日本電気株式会社 | データ処理装置、及びデータ処理方法 |
US10390114B2 (en) | 2016-07-22 | 2019-08-20 | Intel Corporation | Memory sharing for physical accelerator resources in a data center |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5367678A (en) * | 1990-12-06 | 1994-11-22 | The Regents Of The University Of California | Multiprocessor system having statically determining resource allocation schedule at compile time and the using of static schedule with processor signals to control the execution time dynamically |
GB2317245A (en) * | 1996-09-12 | 1998-03-18 | Sharp Kk | Re-timing compiler integrated circuit design |
US6789256B1 (en) * | 1999-06-21 | 2004-09-07 | Sun Microsystems, Inc. | System and method for allocating and using arrays in a shared-memory digital computer system |
GB2370380B (en) * | 2000-12-19 | 2003-12-31 | Picochip Designs Ltd | Processor architecture |
WO2002059743A2 (en) * | 2001-01-25 | 2002-08-01 | Improv Systems, Inc. | Compiler for multiple processor and distributed memory architectures |
US7073158B2 (en) * | 2002-05-17 | 2006-07-04 | Pixel Velocity, Inc. | Automated system for designing and developing field programmable gate arrays |
-
2003
- 2003-02-21 GB GB0304056A patent/GB2398651A/en not_active Withdrawn
-
2004
- 2004-02-19 KR KR1020057015460A patent/KR20050112523A/ko not_active Application Discontinuation
- 2004-02-19 JP JP2006502300A patent/JP2006518505A/ja not_active Withdrawn
- 2004-02-19 US US10/546,615 patent/US20070044064A1/en not_active Abandoned
- 2004-02-19 WO PCT/GB2004/000670 patent/WO2004074962A2/en active Application Filing
- 2004-02-19 EP EP04712602A patent/EP1595210A2/en not_active Withdrawn
- 2004-02-19 CN CNB2004800047322A patent/CN100476741C/zh not_active Expired - Fee Related
Non-Patent Citations (5)
Title |
---|
Signal: a declarative language for synchronous programmingof real-time systems. GAUTIER T, LE GUERNIC P, BESNARD L.INRIA, RAPPORT DE RECGERCHE NO. 761. 1987 |
Signal: a declarative language for synchronousprogrammingof real-time systems. GAUTIER T, LE GUERNIC P, BESNARD L.INRIA, RAPPORT DE RECGERCHE NO. 761. 1987 |
SYNDEX : un environnement de programmation pourmulti-processeur de traitement du signal-mecanismes decommunication. GHEZAL N, MATIATOS S, PIOVESAN P, SOREL Y,SORINE M.INRIA, RAPPORT DE RECHERCHE NO.1236. 1990 |
SYNDEX : un environnement de programmation pourmulti-processeur de traitement du signal-mecanismes decommunication.GHEZAL N, MATIATOS S, PIOVESAN P, SOREL Y,SORINE M.INRIA, RAPPORT DE RECHERCHE NO.1236. 1990 * |
SYNDEX : un environnement de programmationpourmulti-processeur de traitement du signal-mecanismesdecommunication. GHEZAL N, MATIATOS S, PIOVESAN P, SOREL Y,SORINEM.INRIA, RAPPORT DE RECHERCHE NO.1236. 1990 |
Also Published As
Publication number | Publication date |
---|---|
KR20050112523A (ko) | 2005-11-30 |
GB2398651A (en) | 2004-08-25 |
WO2004074962A3 (en) | 2005-02-24 |
US20070044064A1 (en) | 2007-02-22 |
CN1781080A (zh) | 2006-05-31 |
EP1595210A2 (en) | 2005-11-16 |
GB0304056D0 (en) | 2003-03-26 |
JP2006518505A (ja) | 2006-08-10 |
WO2004074962A2 (en) | 2004-09-02 |
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Legal Events
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PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
ASS | Succession or assignment of patent right |
Owner name: INTEL CORP . Free format text: FORMER OWNER: PICOCHIP LTD. Effective date: 20140905 |
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C41 | Transfer of patent application or patent right or utility model | ||
C56 | Change in the name or address of the patentee |
Owner name: PICOCHIP CO., LTD. Free format text: FORMER NAME: PICOCHIP DESIGUS LTD. Owner name: PICOCHIP LTD. Free format text: FORMER NAME: PICOCHIP CO., LTD. |
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CP01 | Change in the name or title of a patent holder |
Address after: Bath in Britain Patentee after: PICOCHIP Ltd. Address before: Bath in Britain Patentee before: Bikeqi Co.,Ltd. Address after: Bath in Britain Patentee after: Bikeqi Co.,Ltd. Address before: Bath in Britain Patentee before: PICOCHIP DESIGNS LTD. |
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TR01 | Transfer of patent right |
Effective date of registration: 20140905 Address after: California, USA Patentee after: INTEL Corp. Address before: Bath in Britain Patentee before: Picochip Ltd. |
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CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20090408 Termination date: 20210219 |
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CF01 | Termination of patent right due to non-payment of annual fee |