CN100468512C - Drive circuit and method of display faceplate - Google Patents
Drive circuit and method of display faceplate Download PDFInfo
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- CN100468512C CN100468512C CNB200610145444XA CN200610145444A CN100468512C CN 100468512 C CN100468512 C CN 100468512C CN B200610145444X A CNB200610145444X A CN B200610145444XA CN 200610145444 A CN200610145444 A CN 200610145444A CN 100468512 C CN100468512 C CN 100468512C
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Abstract
A method for driving display face plate includes inputting the first driving signal to multiple first grid line on display face plate in sequence from the first direction and simultaneously inputting the second driving signal to multiple second grid line on display face plate in sequence from the second direction opposite to the first one, regulating the driving time of the first driving signal to difference driving time of two said grid lines when two said driving signals are separately inputted to two said grid lines being set in adjacent arrangement.
Description
Technical field
The present invention is about a kind of driving circuit and method of display pannel; Particularly, the present invention is about a kind of driving circuit and method of improving the display pannel of coupling effect (coupling effect).
Background technology
That flat-panel screens has is frivolous, power consumption is low and advantage such as low radiation, little by little replaces traditional projection tube (CRT) display.Flat-panel screens comprises plasma display panel and LCD etc., yet LCD has been caught up with plasma display panel gradually on panel size and color representation.
In order to improve the color representation of LCD, Fig. 1 is the calcspar of the driving circuit of known displays panel.As shown in Figure 1, first grid chip for driving 102 and second grid chip for driving 104 are disposed in the known technology utilization respectively in the both sides of display pannel 100, first grid chip for driving 102 connects a plurality of first grid polar curves 106 respectively, second grid chip for driving 104 connects a plurality of second grid lines 108 respectively, first grid chip for driving 102 is distinguished from top to bottom and mode driving display panel 100 from bottom to top with second grid chip for driving 104, or first grid chip for driving 102 and second grid chip for driving 104 drive this display pannel 100 respectively up and down by the central authorities of display pannel 100, causes the uneven shortcoming of display picture color to improve display pannel 100 because of undertension.
Yet, when first grid chip for driving 102 and second grid chip for driving 104 respectively from top to bottom and mode from bottom to top simultaneously at adjacent first grid polar curve 106 during with second grid line 108 driving display panels 100, this first grid polar curve 106 second grid line 108 therewith drives simultaneously, has coupling effect (coupling effect) and produces.So-called coupling effect is too close because of driven first grid polar curve 106 and second grid line 108, this moment can display frame is indistinct find out in the middle of a coupling line (couplingline).Therefore need a kind of driving circuit of display pannel and method to improve the shortcoming that display in the known technology can produce coupling effect.
Summary of the invention
A purpose of the present invention can make the display frame homogeneity improve in driving circuit that a kind of display pannel is provided and method.
Another object of the present invention is in driving circuit that a kind of display pannel is provided and method, to be reduced in the possibility that display frame produces coupling effect (coupling effect).
For achieving the above object, the present invention discloses a kind of driving method of display pannel, this driving method comprises in order imports a plurality of first grid polar curves of first drive signal in display pannel by first direction, at one time, in turn by importing second drive signal in contrast to the second direction of this first direction in a plurality of second grid lines; When first drive signal and second drive signal are input into the first grid polar curve of adjacent position and second grid line respectively, adjust the driving time of first drive signal, the driving time of differentiation first grid polar curve and second grid line.
The present invention also discloses a kind of driving circuit of display pannel, and this driving circuit comprises frequency controller, first grid polar curve, second grid line and treatment loop.Frequency controller produces frequency signal, and a plurality of first grid polar curves connect this frequency controller, transmit first drive signal according to this frequency signal; A plurality of second grid lines connect this frequency controller, transmit second drive signal according to this frequency signal; Treatment loop is in order to change the generation time of first drive signal; And wherein this first grid polar curve comprises one first critical gate line, this second grid line comprises one second critical gate line, this first critical gate line is adjacent with this second critical gate line, when in turn importing this first drive signal this first grid polar curve in this display pannel by a first direction, and in turn by importing this second drive signal in contrast to a second direction of this first direction when this second grid line of this display pannel, in the signal period of being different from of signal period of this first drive signal of this first critical gate line in this second drive signal of this second critical gate line.
The present invention can make the display frame homogeneity improve, and is reduced in the possibility that display frame produces coupling effect.
Description of drawings
Fig. 1 is the calcspar of the driving circuit of known displays panel;
Fig. 2 for display pannel of the present invention the process flow diagram of driving method;
Fig. 3 is the calcspar of the driving circuit of display pannel of the present invention;
Fig. 4 is the calcspar that the grid of driving circuit of the present invention is connected with frequency controller;
Fig. 5 a is the signal graph of driving circuit one embodiment of display pannel of the present invention;
Fig. 5 b is the signal graph of another embodiment of driving circuit of display pannel of the present invention.
Wherein, Reference numeral:
100 display pannels, 102 first grid chip for driving
104 second grid chip for driving, 106 first grid polar curves
108 second grid lines, 200 driving circuits
202 frequency controllers, 204 first grid chip for driving
206 first grid polar curves, 2,062 first critical gate lines
208 second grid chip for driving, 210 second grid lines
2,102 second critical gate line 212 treatment loops
214 display pannels, 216 frequency signals
218 first drive signals, 220 second drive signals
222 source driving chips, 224 data-signals
226 data lines, 302 frequency controllers
304 frequency signal generators, 306 first pulse signal producers
308 second pulse signal producers, 310 first grid chip for driving
312 second grid chip for driving, 314 frequency signals
316 first pulse signals, 318 first drive signals
320 second pulse signals, 322 second drive signals
324 treatment loops, 502 first pulse signals
504 second pulse signals, 506 frequency signals
508 n-3 bars, first drive signal, 510 n-2 bars, second drive signal
512 n-1 bars, first drive signal, 514 n bars, second drive signal
516 n+1 bars, first drive signal, 518 n+2 bars, second drive signal
Embodiment
The invention provides a kind of driving circuit and method of display pannel.Utilize the method to improve the shortcoming that display in the known technology can produce coupling effect (coupling effect), simultaneously the homogeneity of display frame is improved.
Fig. 2 is the calcspar of the driving circuit of display pannel of the present invention.As shown in Figure 2, this driving circuit 200 comprises frequency controller 202, at least one first grid chip for driving 204, first grid polar curve 206, at least one second grid chip for driving 208, second grid line 210 and treatment loop 212.First grid polar curve 206 is disposed on the display pannel 214 with interval mode with second grid line 210, and electrically connects with first grid chip for driving 204 and second grid chip for driving 208 respectively.Frequency controller 202 produces frequency signal 216, and first grid chip for driving 204 connects this frequency controller 202, and first grid chip for driving 204 is from top to bottom transmitted first drive signal 218 to this first grid polar curve 206 line by line according to frequency signal 216; Second grid chip for driving 208 connects frequency controller 202, and second grid chip for driving 208 is from bottom to top transmitted second drive signal 220 to this second grid line 210 line by line according to this frequency signal 216.When first drive signal 218 and second drive signal 220 transfer to first grid polar curve 206 with second grid line 210, by at least one source driving chip 222 input data signals 224 in the data line 226 of second grid line 210 quadratures therewith of first grid polar curve 206 therewith, to show different brightness, GTG or color with first grid polar curve 206 and second grid line 210 orthogonal area at data line 226.
Still consult Fig. 2, when first drive signal 218 transfers to a certain first grid polar curve 206, this first grid polar curve 206 is called the first critical gate line 2062 at this, and when second drive signal 220 transfers to a certain second grid line 3208, it is adjacent with the second critical gate line 2102 that this second grid line 210 is called second critical gate line 2102, the first critical gate lines 2062 at this.When first drive signal 218 and second drive signal 220 transfer to the first critical gate line 2062 and the second critical gate line 2102 at one time respectively,, can produce coupling effect because of the first critical gate line 2062 is adjacent with the second critical gate line 2102.Utilize this moment treatment loop 212 to change the generation time of first drive signal 218 or change the length of the driving time of first drive signal 218, because first drive signal 218 is different with the driving time of second drive signal 220, shorten in the time of first drive signal 218 and second drive signal 220 simultaneously, be reduced in the driving voltage on the display pannel, reduce the possibility that coupling effect produces.
The calcspar of the preferred embodiment that Fig. 3 is connected with frequency controller for the grid of driving circuit of the present invention.As shown in Figure 3, frequency controller 302 comprises frequency signal generator 304, first pulse signal producer 306 and second pulse signal producer 308.The frequency signal generator 304 and first pulse signal producer 306 electrically connect with first grid chip for driving 310; In addition, the frequency signal generator 304 and second pulse signal producer 308 electrically connect with second grid chip for driving 312.Frequency controller 302 passes through frequency signal generator 304 and first pulse signal producer, 306 difference output frequency signals 314 and first pulse signal 316 to first grid chip for driving 310, makes first grid chip for driving 310 outputs first drive signal 318; At one time, frequency controller 302 passes through frequency signal generator 304 and second pulse signal producer, 308 difference output frequency signals 314 and second pulse signal 320 to second grid chip for driving 312, makes second grid chip for driving 312 outputs second drive signal 322.
As shown in Figure 3, for generation time that changes first drive signal 318 or the length that changes the driving time of first drive signal 318, to reduce the possibility that coupling effect produces, configuration one treatment loop 324 in frequency controller 302, and electrically connect with first pulse signal producer 306, in different embodiment, this handles loop 324 and is disposed between first pulse signal producer 306 and the first grid chip for driving 310.This handles the driving time that first pulse signal 316 can be done sth. in advance or postpone in loop 324, in different embodiment, treatment loop 324 also may command transfers to the frequency signal 314 of first grid chip for driving 310, change the generation time of frequency signal 314, can change the generation time of first pulse signal 316, further change the driving time of first drive signal 318.Do sth. in advance or delay when the generation time of first pulse signal 316, the generation time of first drive signal 318 or concluding time are also and then done sth. in advance or postpone, and the length of the driving time of first drive signal 318 changes equally.Because first drive signal 318 is different with the driving time of second drive signal 322, shorten in the time of first drive signal 318 and second drive signal 322 simultaneously, be reduced in the driving voltage on the display pannel, reduce the possibility that coupling effect produces.
Fig. 4 is the process flow diagram of the embodiment of the driving method of display pannel of the present invention.As shown in Figure 4, in step S401, in turn import a plurality of first grid polar curves of first drive signal in display pannel by first direction.The same time is in step S402, in order by importing second drive signal in contrast to the second direction of this first direction in a plurality of second grid lines.In step S403, when first drive signal and second drive signal are input into the first grid polar curve of adjacent position and second grid line simultaneously, adjust the driving time of first drive signal, the driving time of differentiation first grid polar curve and second grid line.In step S403, to adjust the driving time of first drive signal and finish by a treatment loop, this handles the loop can be by simple circuit to reach the length of the driving time that changes first drive signal.By differentiation first grid polar curve among the step S403 and second grid line, avoid adjacent first grid polar curve and second grid line on display pannel, first drive signal and second drive signal of equal intensities are provided, can reduce the influence of coupling effect on display pannel.
First grid polar curve and second grid line in step S401 and step S402 are positioned over display pannel with interval mode.When first drive signal and second drive signal are input into first grid polar curve and second grid line, by at least one source electrode drive circuit input data signal in the data line of first grid polar curve and second grid line quadrature, show different brightness, GTG or color at data line with first grid polar curve and second grid line orthogonal area.
Fig. 5 a is the signal graph of driving circuit one embodiment of display pannel of the present invention.Shown in Fig. 5 a, this signal graph shows the signal graph of first pulse signal 502, second pulse signal 504, frequency signal 506, n-3 bar first drive signal 508, n-2 bar second drive signal 510, n-1 bar first drive signal 512, n bar second drive signal 514, n+1 bar first drive signal 516 and n+2 bar second drive signal 518.The switch of first pulse signal 502 and second pulse signal, 504 control first drive signals and second drive signal.As shown in the figure, when frequency signal 506, first pulse signal 502 and second pulse signal 504 were opened (on), n-3 bar first drive signal 508 and n-2 bar second drive signal 510 were opened; When frequency signal 506, first pulse signal 502 and second pulse signal 504 closed (off), n-3 bar first drive signal 508 and n-2 bar second drive signal 510 still were in the state of opening.When frequency signal 506, when first pulse signal 502 and second pulse signal 504 are opened again, close n-3 bar first drive signal 508 and n-2 bar second drive signal 510, open n-1 bar first drive signal 512 and n bar second drive signal 514. simultaneously because this n-1 bar first drive signal 512 and n bar second drive signal 514 drive in adjacent gate lines (not shown), for reducing the possibility that coupling effect produces, the time of opening first pulse signal 502 once more in advance, the driving time of n-1 bar first drive signal 512 is shortened, cause n-1 bar first drive signal 512 different with the driving time of n bar second drive signal 514.Thereby the duration of charging of n-1 bar first drive signal 512 is shorter, is reduced in the driving voltage on the display pannel, reduces the possibility that coupling effect produces.
In different embodiment, shown in Fig. 5 b, also can postpone to open the time of n-1 bar first drive signal 512, make n-1 bar first drive signal 512 different with the generation time of n bar second drive signal 514, reduce the possibility that coupling effect produces.When frequency signal 506 and second pulse signal 504 are opened again, n bar second drive signal 514 is closed, open n+1 bar first drive signal 516 and n+2 bar second drive signal 518 simultaneously, at this moment, n+1 bar first drive signal 516 and n+2 bar second drive signal 518 are recovered to open simultaneously and closing state.
Certainly; the present invention also can have other various embodiments; under the situation that does not deviate from spirit of the present invention and essence thereof; being familiar with those of ordinary skill in the art ought can make various corresponding changes and distortion according to the present invention, but these corresponding changes and distortion all should belong to the protection domain of the appended claim of the present invention.
Claims (14)
1. the driving method of a display pannel is characterized in that, comprises:
In turn import a plurality of first grid polar curves of one first drive signal in this display pannel by a first direction;
In turn by import a plurality of second grid lines of one second drive signal in contrast to a second direction of this first direction in this display pannel; And
When this first drive signal and this second drive signal are input into this first grid polar curve of adjacent position and this second grid line respectively, adjust the driving time of this first drive signal, the driving time of this first grid polar curve of differentiation and this second grid line.
2. driving method according to claim 1 is characterized in that, this method disposes this first grid polar curve and this second grid line respectively with interlace mode.
3. driving method according to claim 1, it is characterized in that, when this first drive signal and this second drive signal are input into this first grid polar curve and this second grid line, provide a plurality of data-signals in respectively with a plurality of data lines of this first grid polar curve and this second grid line quadrature.
4. driving method according to claim 1 is characterized in that, this driving time of adjusting this first drive signal is short than the driving time of this second drive signal.
5. driving method according to claim 1 is characterized in that, this first grid polar curve of this method is connected at least one first grid chip for driving and at least one second grid chip for driving that is disposed at these display pannel both sides respectively with this second grid line.
6. the driving circuit of a display pannel is characterized in that, comprises:
One frequency controller produces a frequency signal;
A plurality of first grid polar curves connect this frequency controller, transmit one first drive signal according to this frequency signal;
A plurality of second grid lines connect this frequency controller, transmit one second drive signal according to this frequency signal;
One treatment loop is in order to change the generation time of this first drive signal; And
Wherein this first grid polar curve comprises one first critical gate line, this second grid line comprises one second critical gate line, this first critical gate line is adjacent with this second critical gate line, when importing this first drive signal this first grid polar curve by a first direction in order in this display pannel, and in order by importing this second drive signal in contrast to a second direction of this first direction when this second grid line of this display pannel, at the driving time of being different from of the driving time of this first drive signal of this first critical gate line in this second drive signal of this second critical gate line.
7. driving circuit according to claim 6 is characterized in that this driving circuit more comprises a plurality of data lines, this data line and this first grid polar curve and this second grid line quadrature.
8. driving circuit according to claim 7, it is characterized in that, this data line when this first drive signal and this second drive signal are imported this first grid polar curve and this second grid line, provide a plurality of data-signals in respectively with a plurality of data lines of this first grid polar curve and this second grid line quadrature.
9. driving circuit according to claim 6 is characterized in that, this first drive signal and this second drive signal are provided by at least one first grid chip for driving and at least one second grid chip for driving respectively.
10. driving circuit according to claim 9 is characterized in that, this first grid chip for driving and this second grid chip for driving are disposed at this display pannel both sides respectively.
11. driving circuit according to claim 6 is characterized in that, this data-signal is provided by at least one source driving chip.
12. driving circuit according to claim 6 is characterized in that, this frequency controller and this treatment loop electrically connect.
13. driving circuit according to claim 6 is characterized in that, this treatment loop is disposed in this frequency controller.
14. driving circuit according to claim 6 is characterized in that, and is short at the driving time of this second drive signal of this second critical gate line at the driving time of this first drive signal of this first critical gate line.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB200610145444XA CN100468512C (en) | 2006-11-15 | 2006-11-15 | Drive circuit and method of display faceplate |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB200610145444XA CN100468512C (en) | 2006-11-15 | 2006-11-15 | Drive circuit and method of display faceplate |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1959798A CN1959798A (en) | 2007-05-09 |
| CN100468512C true CN100468512C (en) | 2009-03-11 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB200610145444XA Active CN100468512C (en) | 2006-11-15 | 2006-11-15 | Drive circuit and method of display faceplate |
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| Country | Link |
|---|---|
| CN (1) | CN100468512C (en) |
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- 2006-11-15 CN CNB200610145444XA patent/CN100468512C/en active Active
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| CN1959798A (en) | 2007-05-09 |
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