CN100465916C - Failure diagnosis method, device and system for PCI system - Google Patents

Failure diagnosis method, device and system for PCI system Download PDF

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Publication number
CN100465916C
CN100465916C CNB2007100969640A CN200710096964A CN100465916C CN 100465916 C CN100465916 C CN 100465916C CN B2007100969640 A CNB2007100969640 A CN B2007100969640A CN 200710096964 A CN200710096964 A CN 200710096964A CN 100465916 C CN100465916 C CN 100465916C
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pci
data
line
pci bus
fault
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CN101034365A (en
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崔江虹
李秀中
苏勇
鲁玉春
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New H3C Technologies Co Ltd
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Hangzhou H3C Technologies Co Ltd
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Abstract

The invention discloses a PCI system failure diagnosis method, comprising: a to-be-detected system executes preset PCI bus failure diagnosis operation; collecting data on PCI bus in the operating course and determining failure position of the PCI bus. And the invention also discloses a PCI system failure diagnosis device and system. And it can locate PCI bus failure in high efficiency.

Description

A kind of pci system method for diagnosing faults, equipment and system
Technical field
The present invention relates to fault diagnosis field, particularly a kind of pci system method for diagnosing faults, equipment and system.
Background technology
PCI (Peripheral component interconnect peripheral hardware is interconnected) bus because of high bandwidth that it had, high-transmission efficient, support dynamic-configuration and support outstanding advantages such as burst synchronization transmission, and obtain extremely strong vitality.A typical PCI application system often comprises: CPU (central processing unit) (CPU), pci bus, PCI equipment (PCI Device) and PCI bridge (PCI Bridge) etc.
Comprise in the process of communication facilities, computing machine of pci bus in maintenance, can produce the various faults phenomenon when pci bus or PCI equipment failure, as power on can't operate as normal, restart repeatedly, deadlock, display message are unusual etc.At present, when diagnosing above-mentioned pci system fault, usually adopt the testing apparatus of on-line testing (ICT) that pci bus is detected, particularly, utilize this ICT testing apparatus to connect the two ends of certain root signal wire in the pci bus, an end therein sends pumping signal, catches this signal to determine whether this signal wire is normal at the other end.When adopting aforesaid way to carry out fault detect, if pci bus drives a plurality of PCI equipment, then pci bus topological structure complexity, need data/address line, the control line quantity of measurement huge, the investigation fault is very time-consuming, and inefficiency, can't fast and effeciently carry out localization of fault.In addition, the method of the above-mentioned ICT of utilization testing apparatus relatively is applicable to carries out fault detect to new pci system, for the pci system that uses after a while, because system is subjected to excessive erosion, can't guarantee the ICT testing apparatus is connected on one section pci bus wishing to measure, therefore, can't guarantee the application of said method.Under this class situation, utilize the ICT testing apparatus to position to fault.
Another automatic trouble diagnosis method commonly used is: the register of PCI equipment is carried out the operation of write-then-read, the data that the CPU of pci system writes and reads by contrast judge whether the PCI peripheral hardware breaks down, and print the information that shows initialization PCI equipment and locate the pci bus abort situation.This method especially PCI device power in pci system is correctly used during initialization more.When using this method and carrying out fault diagnosis, because pci bus is the address/data bus multiplexed form, the data that PCI peripheral hardware register is write and reads occur inconsistent the time, can't judge that it still is that PCI peripheral hardware register can't be operated that address data bus breaks down, therefore can only determine abort situation according to initialize routine ruuning situation, for example fail during the 3rd PCI peripheral hardware of initialization, can judge that the 3rd PCI peripheral hardware itself or near the bus it break down, but can't determine fault type and accurate abort situation (being positioned to concrete wire size).
In a word, existing P CI diagnosis method for system fault can't be realized the pci system failure location efficiently.
Summary of the invention
In view of this, the invention provides a kind of pci system method for diagnosing faults, can position the pci bus fault efficiently.
The present invention also provides a kind of pci system failure diagnosis apparatus and system, can position the pci bus fault efficiently.
For achieving the above object, the present invention adopts following technical scheme:
A kind of pci system method for diagnosing faults comprises:
For control interface line, address date AD line and command byte in the pci bus enable the CBE line, the corresponding fault diagnosis write operation of setting special use, and be kept among the BOOTROM of independent memory device or pci system to be measured;
Central processing unit CPU in the pci system to be measured is carried out the fault diagnosis write operation of control interface line, AD line and CBE line correspondence among the BOOTROM be kept at described independent memory device or pci system to be measured successively;
The PCI failure diagnosis apparatus that links to each other with pci system to be measured is gathered the data on the pci bus in the described fault diagnosis write operation process, determines the abort situation of pci bus according to the data of gathering.
Preferably, the CPU in the pci system to be measured carries out described fault diagnosis write operation before initialization PCI equipment.
Preferably, the fault diagnosis write operation of described control interface line correspondence is: carry out write operation arbitrarily;
Data in the acquisition controlling interface line diagnostic operation process on the pci bus are: gather the data in the data phase in the described write operation process;
Image data according to control interface radiodiagnosis x operation determines that the abort situation of pci bus is: if can identify action type, determine that then the control interface line of pci bus is normal, otherwise, determine the control interface line fault of pci bus.
Preferably, the fault diagnosis write operation of described AD line correspondence is: the write operation that carries out in the mode of walking " 1 " and walking " 0 ";
Data in the operating process of collection AD radiodiagnosis x on the pci bus are: gather the data on the interior AD line of data phase in the described write operation process;
Image data according to the operation of AD radiodiagnosis x determines that the abort situation of pci bus is: the image data in the anticipatory data of more described write operation and the write operation process in the data phase, determine according to this result who relatively obtains whether the AD line breaks down and abort situation.
Preferably, the fault diagnosis write operation of described CBE line correspondence is: the write operation that is carried out with the mode variation configuration word of walking " 1 " and walking " 0 " successively;
Data in the operating process of collection CBE radiodiagnosis x on the pci bus are: gather the data on the interior CBE line of data phase in the described write operation process;
Image data according to the operation of CBE radiodiagnosis x determines that the fault type of pci bus and position are: the image data in the anticipatory data of more described write operation and the write operation process in the data phase, determine according to this result who relatively obtains whether the CBE line breaks down and abort situation.
Preferably, this method further comprises: when definite pci bus is diagnosed non-fault, the CPU of pci system to be measured carries out predefined PCI equipment side fault diagnosis operation, gather the data on the pci bus in the PCI equipment side diagnostic operation process, determine the abort situation of PCI equipment side according to image data.
Preferably, described PCI equipment side fault diagnosis is operating as: a kind of or combination in any in the operation of PCI device scan, control interface branch road diagnostic operation, AD line branch road diagnostic operation and the CBE line branch road diagnostic operation.
Preferably, described PCI device scan is operating as: the identification of the manufacturer Vendor ID, device identification Device ID, type codes Class code and the version identifier Revision ID that read each PCI equipment;
Gather that the data on the pci bus are in the operating process of PCI device scan: gathers the data on the interior AD line of data phase in described identification of the manufacturer VendorID, device identification Device ID, type codes Class code and the version identifier Revision ID operating process of reading each PCI equipment;
Image data according to the operation of any PCI device scan determines that the fault type of PCI equipment and position are: interior image data of data phase in the anticipatory data of this PCI device scan operation and the read operation process relatively, when the two is inconsistent, determine that this PCI equipment is not on the throne.
Preferably, described control interface branch road diagnostic operation is: write data to the read-write register of the appointment of each PCI equipment, again sense data from this register;
Data in the acquisition controlling interface branch road diagnostic operation process on the pci bus are: gather the data in the data phase in the described read operation process;
The abort situation of determining pci bus according to the image data of control interface branch road diagnostic operation is: if collect data in the phase, determine that then the branch road of control interface line is normal in the data of read operation, otherwise, determine that the branch road of control interface line breaks down.
Preferably, described AD line branch road diagnostic operation is: write specific data to the read-write register of the appointment of each PCI equipment, again sense data from this register;
Gather that the data on the pci bus are in the AD line branch road diagnostic operation process: gather the read-write register of described appointment respectively and write in specific data and the read operation process data data on the AD line in the phase to each PCI equipment;
Determine that according to the image data of AD line branch road diagnostic operation the abort situation of PCI equipment is: to any PCI equipment, the image data in the data phase in write operation and the read operation process relatively, according to this result who relatively obtains determine this PCI equipment and connect the AD line and whether break down and abort situation.
Preferably, described CBE line branch road diagnostic operation is: write data to the read-write register of the appointment of each PCI equipment with the specified configuration word, again sense data from this register;
Data in the described CBE line branch road diagnostic operation process on the pci bus are: gather in data phase in the described write operation process in the data on the CBE and AD line and read operation process the data on the AD line in the data phase;
The image data of described CBE line branch road diagnostic operation determines that the abort situation of PCI equipment is: to any PCI equipment, according to data in the write operation process in the phase image data on AD line and the CBE line determine to treat that the CPU of examining system wishes to write the data of described appointment register, data on the AD line in the data phase in the data that write of this hope and the read operation process relatively, determine this PCI equipment and connect the CBE line and whether break down and abort situation.
Preferably, when determining described abort situation, further comprise: the type of determining described fault.
Preferably, when comprising multistage pci bus in the described pci system to be measured,, carry out described execution, collection and definite step respectively at each grade pci bus according to pci bus cascade order from top to bottom.
A kind of pci system fault diagnosis system, this system comprises pci system to be measured, described pci system to be measured comprises pci bus, PCI equipment and central processing unit CPU, and this diagnostic system further comprises the pci system failure diagnosis apparatus that links to each other with the pci bus of pci system to be measured, the memory module that links to each other with the CPU of pci system to be measured;
Described memory module is used for storing the fault diagnosis write operation that enables the corresponding special use of setting of CBE line in advance for pci bus control interface line, address date AD line and command byte;
The CPU of described pci system to be measured is used for calling and carry out the fault diagnosis write operation of control interface line, AD line and CBE line correspondence that described memory module stores, sends data to pci bus;
Described pci system failure diagnosis apparatus is used for gathering the data on the described fault diagnosis write operation process pci bus, determines the abort situation of pci bus.
Preferably, described memory module is further used for storing predefined PCI equipment side fault diagnosis content of operation;
The CPU of described pci system to be measured is further used for calling and carrying out the PCI equipment side fault diagnosis operation of storing in the described memory module;
Described pci system failure diagnosis apparatus is further used for gathering the data on the pci bus in the operating process of PCI equipment side fault diagnosis, determines the abort situation of PCI equipment side.
Preferably, described memory module is a separate equipment, perhaps is positioned at described pci system to be measured inside.
As seen from the above technical solution, among the present invention, constitute diagnostic system jointly by pci system to be measured and pci system failure diagnosis apparatus, in this diagnostic system, the pci system failure diagnosis apparatus links to each other with the pci bus of pci system to be measured, so that the pci system failure diagnosis apparatus is gathered the data on the pci bus.In carrying out failure diagnostic process, the CPU that treats examining system carries out the operation of pci bus fault diagnosis according to preestablishing, the pci system failure diagnosis apparatus is gathered the data on the pci bus in the aforesaid operations process, judges according to the contrast between predetermined registration operation and actual acquired data whether pci bus breaks down and the fault type and the particular location of this fault.As can be seen, the present invention utilizes the data on the pci system failure diagnosis apparatus collection pci bus, and combine with the operation of predefined fault diagnosis, can access target data and actual transmissions data on the pci bus, and, the pci bus fault is accurately located by analysis-by-synthesis to the two.
Further, after definite pci bus diagnosis non-fault, the CPU that treats examining system can also further carry out predefined PCI equipment side diagnostic operation, the pci system failure diagnosis apparatus is gathered the data on the pci bus in this operation, judges fault type and the particular location whether PCI equipment and PCI main line branch road break down and show this fault according to this image data.Like this, promptly pci bus diagnosis and the diagnosis of PCI equipment side can be separated, and, carry out the diagnosis of PCI equipment side again, thereby assurance be about the accurate location of PCI equipment side fault by after at first carrying out the pci bus diagnosis and guaranteeing bus main line non-fault.
In a word, utilize the solution of the present invention can realize efficiently the pci bus fault is quick and precisely located, and can further show fault type and accurate abort situation, the location is simple, accurate, directly perceived.
Description of drawings
Fig. 1 is the overall construction drawing of pci system fault diagnosis system provided by the invention.
Fig. 2 is the overall construction drawing of pci system failure diagnosis apparatus provided by the invention.
Fig. 3 is the concrete structure figure of pci system failure diagnosis apparatus provided by the invention preferred embodiment.
Fig. 4 is the overview flow chart of pci system method for diagnosing faults provided by the invention.
Fig. 5 is the particular flow sheet of the preferred embodiment of pci system method for diagnosing faults provided by the invention.
Embodiment
For making purpose of the present invention, technological means and advantage clearer, below in conjunction with accompanying drawing, the embodiment that develops simultaneously is described in further detail the present invention.
Basic thought of the present invention is: when pci system breaks down, make the CPU in the pci system carry out fault diagnostic program, image data on pci bus is with to pci bus diagnosing malfunction and location.
Fig. 1 is the overall construction drawing of pci system fault diagnosis system provided by the invention.As shown in Figure 1, this system comprises: pci system to be measured, memory module and pci system failure diagnosis apparatus.Wherein, pci system to be measured comprises CPU, pci bus, and the pci system failure diagnosis apparatus links to each other with pci bus in the pci system, and memory module links to each other with CPU in the pci system.
In above-mentioned pci system fault diagnosis system, memory module is used to store predefined pci bus fault diagnosis content of operation.The CPU of pci system to be measured is used for calling and carry out the pci bus fault diagnosis operation that memory module is stored, and sends data to pci bus.The pci system failure diagnosis apparatus is used for the data on the acquisition of diagnostic operating process pci bus, determines the abort situation of pci system.
Above-mentioned is the general structure of pci system fault diagnosis system among the present invention and the basic function of its realization.Further, for reaching better fault diagnosis effect, comprise in the pci system to be measured among Fig. 1 that the PCI equipment that at least one is to be measured, memory module can further store the operation of predefined PCI equipment side fault diagnosis; CPU in the pci system to be measured can also further call and carry out the PCI equipment side fault diagnosis operation of storing in the memory module; The pci system failure diagnosis apparatus correspondingly can further be gathered the data on the pci bus in the operating process of PCI equipment side fault diagnosis, in order to determine the abort situation of PCI equipment side.Like this, promptly can realize the fault diagnosis of pci bus and equipment side by the pci system fault diagnosis system among this Fig. 1, thereby make diagnosis more comprehensive.In actual applications, memory module can be an independent memory device, also can be the module that is arranged in pci system to be measured, for example can be the BOOTROM in the pci system to be measured.
The present invention also provides the pci system failure diagnosis apparatus, can be applied in the pci system fault diagnosis system shown in Figure 1, and Fig. 2 is the overall construction drawing of this equipment.As shown in Figure 2, this equipment comprises pci interface module, data acquisition module and processing module.Wherein, the pci interface module links to each other with pci bus in the pci system to be measured with data acquisition module respectively; Data acquisition module is used for the data on the acquisition of diagnostic operating process pci bus, and offers processing module; Processing module is used for the image data of data acquisition module is carried out analyzing and processing, determines the abort situation of pci system.
Fig. 3 is the concrete structure figure of the preferred embodiment of pci system failure diagnosis apparatus provided by the invention.As shown in Figure 3, this equipment comprises pci interface (PCI PORT), FPGA, dual port RAM (Dual-Port RAM), Flash, real-time clock (Real Time Clock), CPU, LCD and RS-232.Wherein, pci interface is the specific implementation of the pci interface module among Fig. 2, and FPGA and dual port RAM are the specific implementation of the data acquisition module among Fig. 2, and CPU is the specific implementation of processing module among Fig. 1.In addition, pci system failure diagnosis apparatus among Fig. 3 has also comprised the Flash of working procedure among the storage CPU and the LCD of fault diagnosis result is provided, and the RS-232 that is used to provide the real-time clock of timestamp and is used to report diagnostic result, the correct time of image data can be provided and realize reporting of fault diagnosis result, thereby enrich the function of failure diagnosis apparatus.
Particularly, in this equipment, pci interface is connected with pci bus, the data on the pci bus that FPGA is used to gather with pci interface links to each other, and with acquired data storage in dual port RAM; Dual port RAM is used for that the data that FPGA gathers are offered CPU to be handled; Flash is used to store the firmware program of pci system failure diagnosis apparatus; Real-time clock is used to operation that timestamp is provided; CPU is used for the image data that dual port RAM provides is analyzed, and determines the fault type and the position of pci system to be measured, and image data and fault diagnosis result are offered LCD and RS-232; LCD is used to show image data and fault diagnosis result; RS-232 is used for the fault diagnosis result of CPU is reported to other computing machine, easily fault is analyzed further in order to the comprehensive treatment capability with computing machine.Certainly, in concrete enforcement, be used to provide the module of fault diagnosis result can also be other form, the module of voice suggestion and print fault result's module etc. for example are provided.
The above-mentioned embodiment that is pci system failure diagnosis apparatus provided by the invention can be applied to this pci system failure diagnosis apparatus in the pci system fault diagnosis system shown in Figure 1, thereby realizes the fault diagnosis to pci system to be measured.
In addition, the present invention provides a kind of pci system method for diagnosing faults again, and this method can utilize pci system fault diagnosis system shown in Figure 1 and pci system failure diagnosis apparatus shown in Figure 2 to implement.Fig. 4 is the overview flow chart of this method.As shown in Figure 4, this method comprises:
Step 401 treats that examining system carries out the operation of predefined pci bus fault diagnosis.
In this step, treat that examining system according to pci signal line to be measured, carries out predefined read/write operation, whether normal to test this signal wire.
Step 402, the abort situation of pci bus is determined and shown to the data in the operating process of acquisition step 401 on the pci bus according to this image data.
So far, the most basic pci system method for diagnosing faults flow process of the present invention finishes.By as seen above-mentioned, need treat that to the fault diagnosis of pci system the CPU in the examining system carries out corresponding diagnostic operation among the present invention, and the reasonable analysis of image data be finished in conjunction with the PCI failure diagnosis apparatus.Wherein, preferably, the diagnostic operation that CPU carries out can treat that then the CPU of examining system promptly can carry out corresponding diagnostic operation according to the setting of fault diagnostic program by write relevant fault diagnostic program in start-up routine.
The process above-mentioned steps can be diagnosed the most faults on the pci bus, but but can't diagnose for the open fault that the branch road in pci bus partly occurs, for more fully diagnosing circuit and equipment failure, preferably, the present invention can further include the step in the frame of broken lines among Fig. 4 after above-mentioned steps 402:
Step 403 judges whether the pci bus diagnosis breaks down, if, the back execution in step 404 of then fixing a breakdown, otherwise direct execution in step 404.
Because pci bus main line fault must cause mistake is appearred in the read-write of branch road and equipment, therefore, preferably after pci bus diagnosis non-fault, carry out for the fault diagnosis of the branch road and the PCI equipment of pci bus.
Step 404 treats that examining system carries out the operation of predefined PCI equipment side fault diagnosis, and the PCI failure diagnosis apparatus is gathered the data on the pci bus in this operating process, determines the abort situation of PCI equipment side according to this image data.
In this step, treat that examining system according to carrying out the PCI equipment side pin and the corresponding signal lines of fault diagnosis, carries out predefined read/write operation, whether normal to test this pin and corresponding signal lines.
So far, the overall procedure of the preferred pci system fault diagnosis of the present invention finishes.Above-mentioned is overview to pci system method for diagnosing faults of the present invention, and by above-mentioned flow process as can be seen, fault diagnosis preferably divides two stages to carry out, and is respectively pci bus diagnosis and PCI equipment side and diagnoses.Wherein, when the above-mentioned flow process of concrete enforcement, the pci bus diagnostic phases can be determined fault type and fault wire size to the main line diagnosing malfunction of pci bus; And after finding fault, supspend fault diagnosis, continue the diagnosis of PCI equipment side according to the fault type of determining and the wire size back of fixing a breakdown.In PCI equipment side diagnostic phases, can diagnose the branch trouble of PCI equipment and pci bus, determine fault type and fault wire size, and show.
Fig. 5 is the particular flow sheet of the preferred embodiment of pci system method for diagnosing faults provided by the invention.In this embodiment, for reaching best fault diagnosis effect, the above-mentioned pci system method for diagnosing faults in two fault diagnosis stages that preferably comprises is described in detail.In fact, for the basic concrete enforcement that includes only the pci bus diagnostic phases, identical with the enforcement in bus diagnostic stage in the optimal way.In addition, the embodiment of the invention is particularly useful for and can't carries out fault diagnosis by correct initialized pci system, therefore preferably before initialization, carry out above-mentioned failure diagnostic process, make each PCI equipment all in a state of nature, can not be subjected to the PCI equipment self to carry out the influence of professional and initial configuration, the inherent characteristic that reflects this equipment and bus is easier to position and type that failure judgement takes place.
Before carrying out concrete method flow, the pci system failure diagnosis apparatus is connected to the end of pci bus to be measured in the pci system to be measured.For making coverage reach maximum, the pci system failure diagnosis apparatus is placed pci bus end trough to be measured position.Pci system to be measured may be boxlike switch and rack-mount unit etc.In practical operation, for fixing boxlike switch of pci bus architecture and the rack-mount unit that does not have pci bus interface, the pci system failure diagnosis apparatus need be connected pci bus end to be measured; For rack-mount unit, the pci system failure diagnosis apparatus should place back panel connector end trough position.Then, pci bus to be measured connects, and enters the PCI fault diagnosis flow scheme.
As shown in Figure 5, this method flow comprises the steps:
Step 501 treats that the CPU of examining system carries out the control interface diagnostic operation of pci bus, and the pci system failure diagnosis apparatus is gathered bus data, judges whether control interface is normal, and shows diagnostic result.
In this step, the control interface line of pci bus comprises STOP#, FRAME#, IRDY#, DEVSEL# and TRDY#.Can be any write operation that CPU initiates to the operation of this control interface line.
Judge according to the data that the pci system failure diagnosis apparatus is gathered on pci bus, be " configurable write ", determine that then control interface is normal, otherwise determine and the DCI fault if can identify action type.
The plant maintenance personnel determine promptly that according to the failure message that shows among STOP#, FRAME#, IRDY#, DEVSEL# and the TRDY# one or several breaks down, and specifically measures these control interface signals again, and carries out fault and get rid of.
Step 502 is treated CPU executive address data (AD) the radiodiagnosis x operation of examining system, and whether the bus data in the pci system failure diagnosis apparatus acquisition operations process breaks down and fault type and position by these data being carried out analysis and judgement AD line.
In this step, to PCI_AD[31:0] line diagnoses.Specifically the diagnostic operation that carries out can for: according to preestablishing, in the mode of " walking 1 " and " walking 0 " fixed address is carried out write operation respectively.The pci system failure diagnosis apparatus is gathered the data in the aforesaid operations process, and the anticipatory data that writes down in interim data that collect of data and the analysis software is compared, and determines fault type and wire size by this result is analyzed.Wherein, the initial testing vector of walking 1 algorithm is 0,0,0 ..., 1, allow 1 order be shifted then, so be called walking 1 algorithm.The initial testing vector of walking 0 algorithm is 1,1,1 ..., 0, allow 0 order be shifted then, so be called walking 0 algorithm.
In the present embodiment, because the pci system failure diagnosis apparatus can link to each other by RS-232 with other computing machine, therefore, the pci data of pci system failure diagnosis apparatus collection is sent in other computing machine by RS-232.If circuit non-fault, the pci data that receives are specifically as shown in Table 1.
Figure C200710096964D00161
Figure C200710096964D00171
Table 1
In table 1, the operation sequence number is shown in the Num tabulation; Action type is shown in the Operate tabulation; Operation address is shown in the Address tabulation; Configuration words is shown in the Con tabulation; Current operation status is shown in the State tabulation; Service data is shown in the Data tabulation.Because the AD line number on the pci bus is 32, then the test vector number of these two kinds of algorithms needs is 64.
Because line fault, the situation of table 2 might appear in the data of gathering on the pci bus.
Figure C200710096964D00172
Figure C200710096964D00181
Table 2
The firmware program that moves among the CPU of pci system failure diagnosis apparatus contrasts in the data (i.e. data in the Data row in the table 2) that data were gathered in the phase FPGA with expected results (data in the table 1 in the Data row), when the two is inconsistent, determine to break down, and in two data different bit promptly corresponding to the signal wire that breaks down.Further, according to the statistics situation of collection result repeatedly, can determine fault type.Particularly, as shown in Figure 2, it is incorrect to find that 000b, 000c, 002b, 002c operate, and appearance of the bit of AD10 and AD11 correspondence and the inconsistent situation of expected results, determines that then AD10 and AD11 break down.Further, by the repeatedly statistics discovery of collection result, the high-low level of AD10 and AD11 is identical all the time, think that then the bridge joint short trouble appears in pci bus AD10, AD11, and on LCD, show, also can send to other computing machine, demonstration fault type as shown in table 3 and fault wire size in PCI diagnostic result display interface by RS-232.
Fault Type BUS Num Position Bit
Short 00 Forward AD10&AD11
Table 3
In table 3, fault type is shown in Fault Type tabulation; ALCL Assembly Line Communication Link number is shown in BUS Num tabulation; Abort situation is shown in the Position tabulation; The fault wire size is shown in the Bit tabulation.
Show in the pci bus service data display interface that and for example the pci bus data of gathering are as shown in table 4.
Num Operate Address Con State Data
0009 Config W Fffff7ff 0 Ok 00000200
000a Config W Fffff7ff 0 Ok 00000400
000b Config W Fffff7ff 0 Ok 00000000
000c Config W Fffff7ff 0 Ok 00001000
......
Table 4
In the present embodiment, the PCLAD[31:0 that data were gathered in the phase only] data and anticipatory data compare, and just only the corresponding data of Data row made comparisons, and do not consider the data in the phase of address.Compare discovery through the data with Data row in the data of Data row in the table 4 and the table 1, the bit of AD11 correspondence is different with expected results, and then definite AD11 breaks down.Further, by the repeatedly statistics discovery of collection result, AD11 is always low level, determines that then stuck-open fault appears in the top build-out resistor and the main line part A D11 of pci bus, and shows in PCI diagnostic result display interface:
Fault Type BUS Nurn POsition Bit
Stuck-Open 00 Forward AD11
Table 5
The above-mentioned mode of walking 1 and walking 0 of utilizing is carried out the regular same as the prior art of the definite fault type of data contrast.And, those skilled in the art can understand, walking 1 algorithm is 100% to the fault coverage of fixed logic 0 fault (Stuck-at fault) and bridge joint short trouble (Short fault), walking 0 algorithm also is 100% to the fault coverage of fixed logic 1 fault (Stuck-at fault) and bridge joint short trouble (short fault), and stuck-open fault often shows as fixed logic 1 fault or fixed logic 0 fault, so use walking l algorithm simultaneously and walking 0 algorithm can be to the fixed logic fault of address wire, stuck-open fault and bridge joint short trouble carry out complete test.With PCI_AD[3:0] be example, complete fault diagnosis criterion is as 1:
1 2 3 4 5 6 7
1000 1000 1000 1000 1110 1000 0000
0100 0000 0000 0000 0110 0110 0000
0010 0010 0000 0000 0110 0110 0000
0001 0001 0001 0001 0111 0001 0000
0111 0011 00O1 0111 0111 0111 0110
1011 1011 1001 1001 1111 1111 0000
1101 1001 1001 1O01 1111 1111 0000
1110 1010 1000 1110 1110 1110 0110
Expectation value AD[3:0] The AD2 S-A-0 that opens a way The AD2﹠AD1 S-A-0 that opens a way AD2﹠AD1 short circuit 0-dominance The AD2﹠AD1 S-A-1 that opens a way AD2﹠AD1 short circuit 1-dominance AD3﹠AD0 open circuit S-A-0 AD2﹠AD1 short circuit 0-dominance
Table 6
As mentioned above, to PCI_AD[31:0] diagnose, image data is analyzed the back show fault type and position.The maintenance personal promptly can carry out fault according to this fault diagnosis result and get rid of, wherein, for the bridge joint short trouble, both may cause by pci bus main line and top build-out resistor short circuit, also may cause by pci bus branch road and the short circuit of terminal build-out resistor, therefore, for the bridge joint short trouble, test investigation to all fronts road of AD; In like manner, the fixed logic fault also may be caused by pci bus main line or branch road, be to all fronts drive test examination investigation; For stuck-open fault, at the stuck-open fault that the pci bus diagnostic phases is diagnosed, then must be to cause by pci bus main line and top build-out resistor rosin joint etc., therefore only need test investigation to the main line part of AD.Change an angle, in the pci bus diagnostic procedure, can diagnose out the bridge joint short circuit and the fixed logic fault of optional position in the circuit, comprise and determine fault type and definite wire size, in addition, can also diagnose out the open fault that the main line part occurs in the circuit.
Promptly can realize the fault diagnosis of AD line according to aforesaid way.
Step 503 is treated CPU fill order byte enable (CBE) the radiodiagnosis x operation of examining system, and whether the bus data in the pci system failure diagnosis apparatus acquisition operations process breaks down and fault type and position by these data being carried out analysis and judgement CBE line.
In this step, identical with the mode of diagnosis AD line to the operation that the CBE line is diagnosed.Particularly, according to preestablishing, when a fixed address is carried out write operation, with the configuration words of the variation write operation of " walking 1 " and " walking 0 ".For example, if non-fault, will be as shown in Table 7 at pci bus service data display interface.
Figure C200710096964D00201
Figure C200710096964D00211
Table 7
In table 7, be example explanation, in fact, can write arbitrary data, as long as guarantee that configuration words changes with walking 1 and walking 0 mode to write 00000000H.
By above-mentioned CBE line image data (i.e. the configuration words of Con row in the table 6) is compared with anticipatory data (i.e. Con column data in the table 1), fault coverage to stuck-open fault (Stuck-open fault), bridge joint short trouble (Short fault) and fixed logic fault (Stuck-at fault) is 100%, and shows fault wire size, fault type in PCI diagnostic result display interface.The rule of concrete definite fault type and wire size is identical with the situation in the aforementioned AD line, just repeats no more here.
More than diagnosis can cover BUS0 top build-out resistor and main line.After the pci bus test non-fault to be determined, carry out the operation of subsequent P CI equipment side fault diagnosis again, can guarantee main line part non-fault like this, so that positioning equipment side fault.Following steps are carried out in concrete operations:
Step 504 scans the PCI equipment on the bus to be measured.
In this step, read Vendor ID, Device ID, Class code and the RevisionID of PCI equipment, the CPU in the pci system failure diagnosis apparatus compares data and the expected results that FPGA gathers, and whether can identify PCI equipment on the throne.For example, show that in pci bus service data display interface the pci data that collects is as shown in table 8.
Figure C200710096964D00212
Table 8
Wherein side-play amount is that the register of 00H is Vendor ID and Device ID register; Side-play amount is that the register of 08H is Class code and Revision ID register.
But for chip partial failure (failure rate is very low), this diagnosis can't cover.For example: can read the Vendor ID of PCI equipment etc., but self disabler of chip, this moment, test can't be diagnosed out failure of chip.
This step is carried out a diagnosis roughly to PCI equipment, and can detection correctly read the ID of PCI equipment.Because the diagnosis of equipment side is carried out when pci bus diagnosis non-fault, therefore if can't correctly read the ID of PCI equipment, can conclude that then PCI equipment or pci bus branch road break down.Next, the PCI equipment side is carried out the completeness fault diagnosis.
Step 505, treat that the CPU of examining system carries out the branch road diagnostic operation of the control interface signal wire of PCI equipment side, whether the bus data in the pci system failure diagnosis apparatus acquisition operations process breaks down and fault type and position by the AD line that these data is carried out each pci bus branch road of analysis and judgement and PCI equipment.
In this step, the branch road diagnostic operation of the control interface signal wire that carries out can for: carry out the operation of write-then-read to the appointment of each PCI equipment read-write (R/W) register, judge whether and to collect data in the data phase of read operation, if then show the branch road part non-fault of control interface signal wire.
Step 506, treat that the CPU of examining system carries out the AD line branch road diagnostic operation of PCI equipment side, whether the bus data in the pci system failure diagnosis apparatus acquisition operations process breaks down and fault type and position by the AD line that these data is carried out each pci bus branch road of analysis and judgement and PCI equipment.
In this step, the AD line branch road diagnostic operation that carries out can for: carry out the operation of write-then-read to the appointment R/W of each PCI equipment register, data that data collected in the phase in the relatively read-write process then, by analyzing this comparative result, whether the AD pin of judging the branch road part of AD line and each PCI equipment fault and fault type and abort situation.
In the write operation process, data on the interim pci bus of data are to be sent by the CPU of pci system, data that will write at first just, when open fault appearred in the branch road AD of pci bus line, the data that the pci system failure diagnosis apparatus was gathered in the data phase can not be affected.Specify the data of register to be affected but write, send on the bus by PCI equipment because of the data on the interim pci bus of data of read operation process again, so the data that the pci system failure diagnosis apparatus was gathered in the data phase of read operation are that PCI equipment is specified the data in the register.Because pci bus is diagnosed non-fault, when the two difference occurs when contrast, illustrate that then CPU wishes that the data and the actual data that write that write are inconsistent, the bridge joint short circuit of branch road and fixed logic fault all can be found and get rid of in the pci bus diagnostic procedure in addition, and therefore the fault of diagnosing out this moment is open fault.
In the selection that writes data, preferably, the data that write with the mode setting of " walking 1 " and " walking 0 ".To choose side-play amount is that the R/W register of 18h is write, read operation is example, shows data as shown in table 9 in pci bus service data display interface.
Figure C200710096964D00231
Figure C200710096964D00241
Table 9
Identical in the method for determining fault type and abort situation according to the above-mentioned mode that writes data and the step 502 just repeats no more here.
Step 507, treat that the CPU of examining system carries out the CBE line branch road diagnostic operation of PCI equipment side, whether the bus data in the pci system failure diagnosis apparatus acquisition operations process breaks down and fault type and position by the CBE line that these data is carried out each pci bus branch road of analysis and judgement and PCI equipment.
In this step, when carrying out the fault diagnosis of CBE line, need operate one by one, and analyze data, thereby obtain the fault state on each PCI equipment and institute chord road thereof a plurality of PCI equipment that connect on this pci bus.Wherein, the operation that each PCI equipment is carried out and identical to the analysis of data is an example with one of them PCI equipment here, and this failure diagnostic process is described.
Treat preset operation that the CPU in the examining system carries out can for: write data to the appointment R/W of PCI equipment register with the specified configuration word, again reading of data from this register.Wherein, the data in the data phase on the CBE line are configuration words, i.e. the byte number that is enabled of data on the specific data line.
The pci system failure diagnosis apparatus in write operation process to PCI equipment, the data in the image data phase on CBE and the AD line, in the read operation process, the data in the image data phase on the AD line.Wherein, under the trouble-free prerequisite of pci bus, data on the CBE line of gathering in the phase according to data in the write operation process and the data on the AD line can determine that CPU wishes to write the data that PCI equipment 1 is specified in the register; In the read operation process, data on the AD line of gathering in the data phase are the actual data that PCI equipment is specified register that write, these actual data that write and the data that the hope of determining writes are compared, then can determine CBE line whether fault and fault type and abort situation.
In the selection of configuration words, preferably, change configuration words in the mode of " walking 1 " and " walking 0 ", determine that according to this kind mode fault type and abort situation are that those skilled in the art can realize, just repeat no more here.
In the operation of above-mentioned steps 505~507, for the pci system that comprises the terminal build-out resistor, its fault coverage is not 100%, its reason is that data and the address wire of PCI is multiplexing, when when specifying the register write data, may be because the register address that the fault of address wire makes PCI equipment receive wishes that with CPU the register address that writes is different, at this moment, when if the register of PCI recognition of devices is read-only register, the data of reading from this register are not the data that expection writes, the result that judge this moment is wrong, and then fault can't be located.
Promptly finished fault diagnosis by above-mentioned diagnosis to certain bar pci bus and continuous PCI equipment thereof.
The maintenance personal just can get rid of fault targetedly according to this diagnostic result, has alleviated maintenance personal's workload greatly.
In some pci system, may there be the multistage pci bus that connects by the PCI bridging, at this moment, all adopt the process of above-mentioned steps 501~507 to carry out fault diagnosis to the pci bus of each grade.In having the pci system of multistage pci bus, the fault of higher level's pci bus may influence the data transmission of its subordinate, that is to say that even subordinate's pci bus and continuous equipment non-fault thereof, the fault of higher level's pci bus also can cause the data transmission on the PCI of the subordinate circuit mistake to occur.Therefore, when the pci system with multistage pci bus is carried out fault diagnosis, preferably, at first carry out the diagnosis of higher level's pci bus, after guaranteeing this pci bus non-fault, carry out the fault diagnosis of pci buss at different levels step by step downwards.
By above-mentioned specific description of embodiments of the present invention as can be seen, utilization of the present invention treats that the CPU of examining system and the pci system failure diagnosis apparatus that is connected on the pci bus combine, can quick and precisely locate the pci system fault, and can show fault type and accurate abort situation, realize simple.
Technical scheme of the present invention is aimed at pci system at first, and how accurately fault location type and position are designed can not correctly carry out initialization the time.Because this type of fault is normally caused by the fault of control interface signal, AD line and CBE line or relevant device pin, therefore in the embodiment of the invention described above, the fault diagnosis of these signal wires is described in detail.If can guarantee above-mentioned signal non-fault, the problem that this pci system generally can the initialization for causing mistake then.For the fault diagnosis of other signal wire, can after the pci system normal initialization, carry out according to existing mode.Certainly, technical scheme of the present invention is suitable equally for fault diagnosis that can correct initialized pci system.
Being preferred embodiment of the present invention only below, is not to be used to limit protection scope of the present invention.Within the spirit and principles in the present invention all, any modification of being done, be equal to replacement, improvement etc., all should be included within protection scope of the present invention.

Claims (16)

1, a kind of pci system method for diagnosing faults is characterized in that, this method comprises:
For control interface line, address date AD line and command byte in the pci bus enable the CBE line, the corresponding fault diagnosis write operation of setting special use, and be kept among the BOOTROM of independent memory device or pci system to be measured;
Central processing unit CPU in the pci system to be measured is carried out the fault diagnosis write operation of control interface line, AD line and CBE line correspondence among the BOOTROM be kept at described independent memory device or pci system to be measured successively;
The PCI failure diagnosis apparatus that links to each other with pci system to be measured is gathered the data on the pci bus in the described fault diagnosis write operation of the pci system to be measured process, determines the abort situation of pci bus according to the data of gathering.
2, method according to claim 1 is characterized in that, the CPU in the pci system to be measured carries out described fault diagnosis write operation before initialization PCI equipment.
3, method according to claim 1 is characterized in that, the fault diagnosis write operation of described control interface line correspondence is: carry out write operation arbitrarily;
Data in the acquisition controlling interface line diagnostic operation process on the pci bus are: gather the data in the data phase in the described write operation process;
Image data according to control interface radiodiagnosis x operation determines that the abort situation of pci bus is: if can identify action type, determine that then the control interface line of pci bus is normal, otherwise, determine the control interface line fault of pci bus.
4, method according to claim 1 is characterized in that, the fault diagnosis write operation of described AD line correspondence is: the write operation that carries out in the mode of walking " 1 " and walking " 0 ";
Data in the operating process of collection AD radiodiagnosis x on the pci bus are: gather the data on the interior AD line of data phase in the described write operation process;
Image data according to the operation of AD radiodiagnosis x determines that the abort situation of pci bus is: the image data in the anticipatory data of more described write operation and the write operation process in the data phase, determine according to this result who relatively obtains whether the AD line breaks down and abort situation.
5, method according to claim 1 is characterized in that, the fault diagnosis of described CBE line correspondence is operating as: the write operation that is carried out with the mode variation configuration word of walking " 1 " and walking " 0 ";
Data in the operating process of collection CBE radiodiagnosis x on the pci bus are: gather the data on the interior CBE line of data phase in the described write operation process;
Image data according to the operation of CBE radiodiagnosis x determines that the fault type of pci bus and position are: the image data in the anticipatory data of more described write operation and the write operation process in the data phase, determine according to this result who relatively obtains whether the CBE line breaks down and abort situation.
6, according to arbitrary described method in the claim 1 to 5, it is characterized in that, this method further comprises: when definite pci bus is diagnosed non-fault, pci system to be measured is carried out predefined PCI equipment side fault diagnosis operation, gather the data on the pci bus in the PCI equipment side diagnostic operation process, determine the abort situation of PCI equipment side according to image data.
7, method according to claim 6, it is characterized in that described PCI equipment side fault diagnosis is operating as: a kind of or combination in any in the operation of PCI device scan, control interface branch road diagnostic operation, AD line branch road diagnostic operation and the CBE line branch road diagnostic operation.
8, method according to claim 7 is characterized in that, described PCI device scan is operating as: the identification of the manufacturer Vendor ID, device identification Device ID, type codes Class code and the version identifier Revision ID that read each PCI equipment;
Gather that the data on the pci bus are in the operating process of PCI device scan: gathers the data on the interior AD line of data phase in described identification of the manufacturer Vendor ID, device identification Device ID, type codes Class code and the version identifier Revision ID process that reads each PCI equipment;
Image data according to the operation of any PCI device scan determines that the fault type of PCI equipment and position are: interior image data of data phase in the anticipatory data of this PCI device scan operation and the read operation process relatively, when the two is inconsistent, determine that this PCI equipment is not on the throne.
9, method according to claim 7 is characterized in that, described control interface branch road diagnostic operation is: write data to the read-write register of the appointment of each PCI equipment, again sense data from this register;
Data in the acquisition controlling interface branch road diagnostic operation process on the pci bus are: gather the data in the data phase in the described read operation process;
The abort situation of determining pci bus according to the image data of control interface branch road diagnostic operation is: if collect data in the phase, determine that then the branch road of control interface line is normal in the data of read operation, otherwise, determine that the branch road of control interface line breaks down.
10, method according to claim 7 is characterized in that, described AD line branch road diagnostic operation is: write specific data to the read-write register of the appointment of each PCI equipment, again sense data from this register;
Gather that the data on the pci bus are in the AD line branch road diagnostic operation process: gather the read-write register of described appointment respectively and write in specific data and the read operation process data data on the AD line in the phase to each PCI equipment;
Determine that according to the image data of AD line branch road diagnostic operation the abort situation of PCI equipment is: to any PCI equipment, the image data in the data phase in write operation and the read operation process relatively, according to this result who relatively obtains determine this PCI equipment and connect the AD line and whether break down and abort situation.
11, method according to claim 7 is characterized in that, described CBE line branch road diagnostic operation is: write data to the read-write register of the appointment of each PCI equipment with the specified configuration word, again sense data from this register;
Data in the described CBE line branch road diagnostic operation process on the pci bus are: gather in data phase in the described write operation process in the data on the CBE and AD line and read operation process the data on the AD line in the data phase;
The image data of described CBE line branch road diagnostic operation determines that the abort situation of PCI equipment is: to any PCI equipment, according to data in the write operation process in the phase image data on AD line and the CBE line determine to treat that the CPU of examining system wishes to write the data of described appointment register, data on the AD line in the data phase in the data that write of this hope and the read operation process relatively, determine this PCI equipment and connect the CBE line and whether break down and abort situation.
12, according to claim 1,4,5,10 or 11 described methods, it is characterized in that, when determining described abort situation, further comprise: the type of determining described fault.
13, method according to claim 6, it is characterized in that, when comprising multistage pci bus in the described pci system to be measured,, carry out described execution, collection and definite step respectively at each grade pci bus according to pci bus cascade order from top to bottom.
14, a kind of pci system fault diagnosis system, this system comprises pci system to be measured, described pci system to be measured comprises pci bus, PCI equipment and central processing unit CPU, it is characterized in that this diagnostic system further comprises the pci system failure diagnosis apparatus that links to each other with the pci bus of pci system to be measured, the memory module that links to each other with the CPU of pci system to be measured;
Described memory module is used for storing the fault diagnosis write operation that enables the corresponding special use of setting of CBE line in advance for pci bus control interface line, address date AD line and command byte;
The CPU of described pci system to be measured is used for calling and carry out the fault diagnosis write operation of control interface line, AD line and CBE line correspondence that described memory module stores, sends data to pci bus;
Described pci system failure diagnosis apparatus is used for gathering the data on the described fault diagnosis write operation process pci bus, determines the abort situation of pci bus.
15, system according to claim 14 is characterized in that, described memory module is further used for storing predefined PCI equipment side fault diagnosis content of operation;
The CPU of described pci system to be measured is further used for calling and carrying out the PCI equipment side fault diagnosis operation of storing in the described memory module;
Described pci system failure diagnosis apparatus is further used for gathering the data on the pci bus in the operating process of PCI equipment side fault diagnosis, determines the abort situation of PCI equipment side.
According to claim 14 or 15 described systems, it is characterized in that 16, described memory module is a separate equipment, perhaps be positioned at described pci system to be measured inside.
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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102360241A (en) * 2011-09-23 2012-02-22 福建星网锐捷网络有限公司 Reset processing method, device and system of equipment
CN103995762A (en) * 2014-06-06 2014-08-20 山东超越数控电子有限公司 Method for diagnosing board card fault
CN105302688B (en) * 2015-09-18 2018-03-16 许继集团有限公司 A kind of parallel bus self checking method and system
CN105446857A (en) * 2015-11-16 2016-03-30 山东超越数控电子有限公司 Fault diagnosis method and system
CN106708689B (en) * 2015-11-18 2020-05-05 中兴通讯股份有限公司 Abnormal equipment positioning method and device
US20190286537A1 (en) * 2018-03-13 2019-09-19 Carrier Corporation Detection of wiring faults in serial bus connected components
CN108763113B (en) * 2018-05-23 2020-10-09 广东水利电力职业技术学院(广东省水利电力技工学校) Bus embedded industrial control system, control method and information processing terminal
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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6633832B1 (en) * 2000-04-11 2003-10-14 Lsi Logic Corporation PCI-X bus system testing and verification apparatus and method
CN1516014A (en) * 2003-01-07 2004-07-28 英业达股份有限公司 Method for testing interconnected bus of external components
CN1553337A (en) * 2003-12-18 2004-12-08 威盛电子股份有限公司 Detecting method for PCI system
CN1831783A (en) * 2005-03-11 2006-09-13 佛山市顺德区顺达电脑厂有限公司 Data access device of peripheral element extension interface and its method

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6633832B1 (en) * 2000-04-11 2003-10-14 Lsi Logic Corporation PCI-X bus system testing and verification apparatus and method
CN1516014A (en) * 2003-01-07 2004-07-28 英业达股份有限公司 Method for testing interconnected bus of external components
CN1553337A (en) * 2003-12-18 2004-12-08 威盛电子股份有限公司 Detecting method for PCI system
CN1831783A (en) * 2005-03-11 2006-09-13 佛山市顺德区顺达电脑厂有限公司 Data access device of peripheral element extension interface and its method

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