CN100440713C - A two-phase PWM modulation method for reducing common-mode voltage - Google Patents

Abstract

The invention discloses PWM modulation technical area by using inverter in three-phase voltage type to control operation of three-phase AC motor. Characters are that three adjacent effective voltage vectors are used to synthesize target vector. The said 'adjacent' means that only one action of switch device is needed to switch from any one state to other state. Comparing with traditional PWM method, the invention avoids using zero vector so as to reduce common mode voltage to 1/3 voltage of general PWM method. The invention also reduces action number of times of switch device so as to solve induced issue of switching loss and heat.

Description

A two-phase PWM modulation method for reducing common-mode voltage

technical field

The invention relates to a two-phase modulation technology for controlling the operation of a three-phase AC motor by using a three-phase voltage type inverter.

Background technique

Pulse width modulation (PWM) technology, especially space vector PWM (space vector pulse width modulation, SVPWM) technology has been widely used in power electronics and power transmission in recent years.

In the three-phase PWM technology, if the three-phase switching devices need to act in each PWM cycle, it is called a three-phase modulation technology, such as the traditional sinusoidal PWM technology, and the ordinary seven-segment method SVPWM belongs to this category; if every In a PWM cycle, only two-phase switching devices operate, and the other phase keeps the upper bridge arm (or lower bridge arm) conducting, which is called two-phase modulation technology, and it is also called bus clamp PWM or discontinuous modulation in literature. Technology, the common five-stage method PWM belongs to this category.

For the three-phase voltage type inverter-AC motor system shown in Figure 1, if 0 and 1 are used to indicate the status of each phase of the inverter bridge arm (1 indicates that the switching device of the upper bridge arm is turned on, and 0 indicates that the switching device of the lower bridge arm conduction), then the three-phase switch state of the inverter can be represented by binary numbers as 000~111, a total of 8 states. If the inverter output voltage corresponding to each switch state is expressed as a vector in a two-dimensional coordinate system (stationary αβ coordinate system), then the 8 switch states correspond to 8 basic space voltage vectors, as shown in Figure 2, Where V ₀ and V ₇ coincide at the origin.

In most cases, the voltage command given by the controller cannot be obtained directly from a single vector. In the space vector PWM technology, the target vector V _ref is synthesized by two basic voltage vectors on both sides of the voltage command (also expressed as V _ref in vector) according to the principle of equivalent average effect. Taking FIG. 3 as an example, when the desired output reference voltage vector V _ref is at the position shown in the figure, V _ref is synthesized with V ₄ and V ₆ . That is, in a PWM cycle T _pwm , V ₄ and V ₆ act for a period of time T ₁ and T ₂ respectively, so that the average effect is equivalent to the effect produced by V _ref acting on T _pwm time:

T _pwm V _ref =T ₁ V ₄ +T ₂ V ₆ (1)

If T ₁ +T ₂ <T _pwm , send zero vectors to make up for the rest of the time. Divide both sides of the above formula by T _pwm , and express it in the form of duty cycle as

V _ref =k ₁ V ₄ +k ₂ V ₆ +k ₀ 0 (2)

Where k ₁ +k ₂ +k ₀ =1. Here 0 means zero vector, you can choose V ₀ (corresponding to 000 state) or V ₇ (corresponding to 111 state), such as traditional five-segment PWM; you can also use V ₀ and V ₇ in one PWM period at the same time, such as traditional seven Segment method PWM.

Taking the five-segment method as an example, it determines the zero vector according to the principle of reducing the number of switches as much as possible. When inserting the zero vector, if there is a "1" in the switch state corresponding to the previously sent non-zero vector, then insert the zero vector V ₀ corresponding to 000; if there are two "1" in the switch state corresponding to the previously sent non-zero vector 1", insert the zero vector V ₇ corresponding to 111. Still taking Figure 3 as an example:

Method 1: When V ₇ is used, the order in which each vector is issued is

1. Suppose starting from V ₄ : V ₄ →V ₆ →V ₇ ;

2. Then start from V ₇ : V ₇ → V ₆ → V ₄ , and return to V ₄ ;

3. Go back to 1 and repeat the process.

Method 2: When V ₀ is used, the order in which each vector is issued is

1. Starting from V ₆ : V ₆ →V ₄ →V ₀ ;

2. Then start from V ₀ : V ₀ →V ₄ →V ₆ , return to V ₆ ;

3. Repeat steps 1 and 2.

For the sake of symmetry, in the traditional five-segment PWM technology, these two zero-vector insertion methods are generally used alternately between sectors.

However, when a three-phase voltage inverter is used to supply power to the motor, since the neutral point of the motor is usually suspended, different combinations of PWM switching states will generate high amplitudes between the midpoint of the motor winding and the reference ground (the maximum peak-to-peak value can be up to DC bus voltage) and high-frequency alternating common-mode voltage. Studies have shown that under the action of various stray parameters, the common-mode voltage will not only generate electromagnetic interference to the surrounding environment, but also an important source of motor shaft voltage, and may even break down the oil film of the bearing to form a shaft current and damage the motor bearing. Shortened motor life.

During the PWM modulation process, the mechanism of generating high-frequency high-amplitude common-mode voltage is analyzed as follows.

Referring to Figure 1, the common-mode voltage u _com output by the inverter can be expressed as

${\mathrm{<span\; class="notranslate">\; u</span>}}_{\mathrm{<span\; class="notranslate">\; com</span>}}<span\; class="notranslate">\; =</span>\frac{\mathrm{<span\; class="notranslate">\; 1</span>}}{\mathrm{<span\; class="notranslate">\; 3</span>}}<span\; class="notranslate">\; (</span>{\mathrm{<span\; class="notranslate">\; u</span>}}_{\mathrm{<span\; class="notranslate">\; a</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; u</span>}}_{\mathrm{<span\; class="notranslate">\; b</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; u</span>}}_{\mathrm{<span\; class="notranslate">\; c</span>}}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 3</span>}<span\; class="notranslate">\; )</span>$

Here u _a , u _b , _uc are the potentials of the three-phase stator winding terminals (points a, b, c in the figure) to ground respectively. It can be seen that the size of the common-mode voltage is related to the switching state of the inverter, see Table I.

Table I The relationship between inverter switch state and common mode voltage

Among them, the odd state refers to the conduction of the upper bridge arm of one phase and the conduction of the lower bridge arms of the other two phases, such as 100, 001, and 010;

到

即峰峰值为

使用方式二时，共模电压波动范围为

峰峰值也是但整体上，由于两种方式交替使用，其波动的峰峰值达V_dc，即与直流母线电压数值相等。如使用七段法SVPWM或者正弦PWM，由于在每个PWM周期内000和111开关状态均可出现，其共模电压在一个PWM周期内的波动峰峰值就可达到V_dc，因此情况更为严重。It can be seen from Table I that when using method 1, the common-mode voltage fluctuation range is from

arrive

That is, the peak-to-peak value is

When using mode 2, the common mode voltage fluctuation range is

Peak-to-peak is also But on the whole, since the two methods are used alternately, the peak-to-peak value of the fluctuation reaches V _dc , which is equal to the value of the DC bus voltage. If the seven-segment method SVPWM or sinusoidal PWM is used, since 000 and 111 switching states can appear in each PWM cycle, the peak-to-peak fluctuation of the common-mode voltage in one PWM cycle can reach V _dc , so the situation is more serious .

In the PWM modulation process, different switching states appear alternately, and the fluctuation frequency of the resulting common-mode voltage corresponds to the PWM cycle, that is, the order of magnitude is the same as the switching frequency.

In view of the hazards of high frequency (its frequency is the same order of magnitude as the switching frequency) and large-scale common-mode voltage, in order to suppress the common-mode voltage to protect the bearing and reduce the negative effect of the inverter, the general practice is to add a choke to the system device or filter, but this also greatly increases the cost, size and system complexity.

In fact, it can be found from Table I that the common-mode voltage amplitude generated by the non-zero state is only one-third of that of the zero state (000, 111). It can be seen that the root cause of the excessively large common-mode voltage amplitude lies in the extensive use of zero vectors in the traditional PWM method.

The present invention is based on the idea that if the zero vector is not used as much as possible in the PWM modulation process, the common-mode voltage generated by it can be greatly reduced (reduced to one-third of the traditional PWM technology). Therefore, the present invention proposes a two-phase modulation technique, which uses three adjacent effective vectors to synthesize the target vector, and solves the problem that the common-mode voltage amplitude is too high due to the use of zero vectors.

Contents of the invention

According to the above problems, an object of the present invention is to provide a PWM algorithm that generates a common-mode voltage as small as possible. Another object of the present invention is not to increase or reduce the number of switching device actions as much as possible, so as to reduce other problems such as switching loss and heat generated thereby.

The present invention proposes a new PWM technology, which uses three adjacent effective vectors to synthesize the target voltage vector, thereby avoiding the use of zero vectors and reducing the common-mode voltage to one-third of that of the common PWM method, greatly reducing the The common mode voltage is small. The present invention is characterized in that, the method is in the three-phase voltage type inverter-motor system, uses the symmetrical five-section PWM method in the DSP as PWM signal generation unit, realizes successively with following steps:

Step 1, in the DSP, set the current time k, and obtain the voltage command V _ref ^k through the variable voltage variable frequency control algorithm,

Step 2, according to the position of the phase angle θ of the voltage command V _ref ^k in space, determine its three adjacent effective vectors, the adjacent refers to a vector with only one phase switching action from one switching state to another switching state , that is: V _ref ^k =k _l V _l +k _c V _c +k _r V _r

k _l +k _c +k _r =1,

Among them, V _l , V _c , and V _r are adjacent basic space voltage vectors determined according to the position of the phase angle θ of V _ref ^k in space, and their corresponding switch states can be obtained according to Figure 2, denoted as S _I , S _c , S _r . There is only one-phase switching action between V _r and V _c , V _c and V _l ,

k _l , k _c , k _r are the duty ratios of the adjacent vectors V _l , V _c , V _r respectively, and are set values,

Step 3: Set: PWM period is T _PWM , record: T _p = T _PWM /2, DSP calculates the action time T _l , T _r , and T _c corresponding to V _l , V _r , V _c according to the following formula:

$\left\{\begin{array}{c}{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; l</span>}}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; k</span>}}_{\mathrm{<span\; class="notranslate">\; l</span>}}<span\; class="notranslate">\; *</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; p</span>}}\\ {\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; c</span>}}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; k</span>}}_{\mathrm{<span\; class="notranslate">\; c</span>}}<span\; class="notranslate">\; *</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; p</span>}}\\ {\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; r</span>}}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; k</span>}}_{\mathrm{<span\; class="notranslate">\; r</span>}}<span\; class="notranslate">\; *</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; p</span>}}\end{array}\right.$

T _l +T _c +T _r =T _p ,

Step 4, the DSP starts the voltage vector sequentially in the following manner:

Start the voltage vector V _r , send out the inverter switching state S _r corresponding to V _r , and keep it for T _r ;

Start the voltage vector V _c , send out the inverter switch state S _c corresponding to V _c , and keep it for T _c ;

Start the voltage vector V _l , send out the inverter switching state S _I corresponding to V _l , and hold the time for 2×T _l ;

Start the voltage vector V _c again, send out the inverter switching state S _c corresponding to V _c , and hold the time for T _c ;

Start the voltage vector V _r again, send out the switching state S _r of the inverter corresponding to V _r , and hold the time for T _r ;

Step 5, DSP makes k→k+1, if V _ref ^k+1 =V _ref ^k , go to step 4; otherwise, go to step 2 to enter the next PWM cycle.

The present invention has following characteristics:

1. In each PWM cycle, the conduction state of the inverter switching device contains three adjacent switching state combinations without considering the dead zone, and any one state switches to another state only needs one phase switching device action;

2. In each PWM cycle, there is always a phase switch that does not act, thereby reducing the number of switches by about one-third;

3. The common-mode suppression effect is good, and the fluctuation range (peak-to-peak value) of the common-mode voltage generated is only one-third of the DC bus voltage;

4. It can be realized by software without hardware cost.

Description of drawings

Figure 1. Schematic diagram of a three-phase voltage inverter-motor system;

Figure 2. Basic space voltage vector diagram;

Figure 3. Traditional vector synthesis method diagram;

Fig. 4. the system diagram that the present invention is applied;

Figure 5. A schematic diagram of a reference voltage vector synthesized by three adjacent vectors;

Fig. 6. experimental waveform of the present invention:

6(a) Traditional seven-segment PWM common-mode voltage waveform, 20V/div, 1ms/div;

6(b) Traditional five-segment PWM common-mode voltage waveform, 20V/div, 2ms/div;

6(c) Common-mode voltage waveform of the PWM method of the present invention, 20V/division, 2ms/division.

Figure 7. DSP program flow diagram.

Detailed ways

Fig. 4 is a block diagram of an actual system to which the present invention is applied. Generally, the system includes: a DC power supply 1, which provides the energy required for system operation; a three-phase inverter 2, whose output is connected to a load 4 (here, a motor), and responds to PWM commands to convert DC power into AC power to drive the motor work; and a control system, including detection links (5, 7, 9) of physical quantities such as voltage and current, and a control instruction input part and an algorithm part 8. The control algorithm uses various input quantities and through a certain control strategy to calculate the command signal V _ref of the required voltage. The PWM generating unit 6 (shown by the rectangular dotted line) converts the signal into a PWM signal and sends it to the inverter to drive each Turning on and off of switching devices. Among them, 8 and 6 can be implemented by software in the CPU. The present invention is used in the PWM generation unit to provide a new PWM generation method.

The vector synthesis method proposed by the present invention is shown in FIG. 5 . When the reference voltage vector V _ref is at the position shown in the figure, instead of using the zero vector, three adjacent active vectors V ₄ , V ₆ , V ₂ are used to synthesize the reference voltage vector. The meaning of "adjacent" here is that there is only one phase switching action from one switching state to another switching state. Right now

V _ref =k _l V ₂ +k _c V ₆ +k _r V ₄ (4)

here

k _l +k _c +k _r =1 (5)

From the switching states 010, 110, and 100 corresponding to these three effective vectors, it can be seen that the c-phase switch state is always 0, so the c-phase switch does not act during the entire PWM cycle, thereby reducing the switching times by one-third one or so.

Taking the shown position of V _ref among Fig. 5 as an example, the first feasible implementation scheme of the present invention is (general steps such as data collection, calculation before step 1 are omitted):

1. Set the current moment as k, and obtain the voltage command V _ref ^k through the control algorithm (such as variable voltage variable frequency control, vector control, etc., refer to the relevant works of experts such as Chen Boshi ^[1-3] );

2. According to the position of the voltage command V _ref ^k in space, three effective vectors closest to it are determined. Record the phase angle of V _ref ^k as θ, then the effective vector can be determined according to the range of θ angle, as shown in the table below. (Example: in Figure 5, the phase angle of the target vector is about 45 degrees, so the effective vectors are V ₂ , V ₆ and V ₄ )

Table II sector division and vector selection

3. Calculate the duty cycle k _l , k _r , k _c of each effective vector according to formulas (4) and (5);

4. Record the PWM period as T _pwm , and record T _p =T _pwm /2. calculate

$\left\{\begin{array}{c}{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; l</span>}}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; k</span>}}_{\mathrm{<span\; class="notranslate">\; l</span>}}<span\; class="notranslate">\; *</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; p</span>}}\\ {\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; c</span>}}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; k</span>}}_{\mathrm{<span\; class="notranslate">\; c</span>}}<span\; class="notranslate">\; *</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; p</span>}}\\ {\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; r</span>}}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; k</span>}}_{\mathrm{<span\; class="notranslate">\; r</span>}}<span\; class="notranslate">\; *</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; p</span>}}\end{array}\right.<span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 6</span>}<span\; class="notranslate">\; )</span>$

5. Output switching state 100 (that is, the upper bridge arm of phase A is turned on and the lower bridge arm is turned off; the lower bridge arm of phase B is turned on and the upper bridge arm is turned off; the lower bridge arm of phase C is turned on and the upper bridge arm is turned off) , the holding time is T _r ;

6. Send the switching state 110, and the holding time is T _c ;

7. Send the switching state 010, and the holding time is 2×T _l ;

8. Send the switching state 110, and the holding time is T _c ;

9. Send the switching state 100, and the holding time is T _r ;

10. The method of step 1 calculates the voltage command value V _ref k+1 at the new time k+ ¹ ;

11. V _ref ^k+1 = V _ref ^k , go to step 5; otherwise set $k<=k+1,$ Go to step 2. Enter the next PWM cycle and execute cyclically.

Second implementation:

Steps 1 to 4 are the same as the first plan;

5. Send switch status 010, hold time T _l ;

6. Send the switching state 110, and the holding time is T _c ;

7. Send the switching state 100, and the holding time is 2×T _r ;

8. Send the switching state 110, and the holding time is T _c ;

9. Send the switching state 010, and the holding time is T _l ;

The following steps are the same as the first scheme.

The third option:

Steps 1 to 3 are the same as the first plan;

4. Record the PWM period as T _pwm . calculate

$\left\{\begin{array}{c}{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; l</span>}}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; k</span>}}_{\mathrm{<span\; class="notranslate">\; l</span>}}<span\; class="notranslate">\; *</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; pwm</span>}}\\ {\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; c</span>}}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; k</span>}}_{\mathrm{<span\; class="notranslate">\; c</span>}}<span\; class="notranslate">\; *</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; pwm</span>}}\\ {\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; r</span>}}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; k</span>}}_{\mathrm{<span\; class="notranslate">\; r</span>}}<span\; class="notranslate">\; *</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; pwm</span>}}\end{array}\right.<span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 7</span>}<span\; class="notranslate">\; )</span>$

5. Send the switching state 100, and the holding time is T _r ;

6. Send the switching state 110, and the holding time is T _c ;

7. Send the switching state 010, and the holding time is T _l ;

8. Calculate the new voltage command value V _ref k+1 at time ^k+1 according to step 1;

9. If V _ref ^k+1 = V _ref ^k , go to step 5; otherwise set $k<=k+1,$ Go to step 2. Enter the next PWM cycle and execute cyclically.

The fourth option:

Steps 1-4 are the same as the third scheme;

5. Send switch status 010, hold time T _l ;

6. Send the switching state 110, and the holding time is T _c ;

7. Send the switching state 100, and the holding time is T _r ;

The steps thereafter are the same as the third scheme.

The present invention can also be implemented in more different ways without departing from the spirit of the present invention, that is, there are three combinations of inverter switching device states occurring within one PWM cycle without considering the dead zone effect, from one From one combination to another, only one phase switching device is required to act. The described embodiments are illustrative rather than restrictive. All changes that come within the metes and bounds of the claims, or equivalents of such metes and bounds, are therefore embraced in the claims. For example, instead of calculating the duty cycle of each effective vector, it can be directly calculated or obtained by comparing the modulation wave with the carrier to obtain the moment of the three-phase switching action to obtain a similar PWM waveform.

In order to verify the actual effect of the present invention, a comparative experiment was done using different PWM techniques in a prototype system.

The experimental system is shown in Figures 1 and 4, where: the DC bus voltage is 120V; the inverter load is a 4kW three-phase asynchronous motor; the control algorithm is VVVF control.

The specific implementation steps in the experiment are:

1. Let the current moment be k. Using the VVVF control algorithm to calculate the voltage command V _ref ^k , this step can be divided into the following sub-steps:

1.1 Obtain the given frequency command f from the control given signal;

1.2 According to the principle of VVVF, calculate the amplitude of the voltage command V _ref ^k according to the following formula

V _ref ^k =Cf (8)

Among them, C is the voltage-frequency ratio constant.

1.3 Calculate the phase angle increment

Δθ ^k = 2π ^* f ^* T _pwm (9)

Assuming that the phase angle at the previous moment is θ ^k-1 , then the phase angle θ ^k at the current moment is

θ ^k ＝θ ^k-1 +Δθ ^k (10)

1.4 Then the amplitude of the voltage command V _ref ^k at the current moment is V _ref and the phase angle is θ ^k , namely

${\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; ref</span>}}^{\mathrm{<span\; class="notranslate">\; k</span>}}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; ref</span>}}<span\; class="notranslate">\; \&angle;</span>{\mathrm{<span\; class="notranslate">\; \&theta;</span>}}^{\mathrm{<span\; class="notranslate">\; k</span>}}<span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 11</span>}<span\; class="notranslate">\; )</span>$

2. According to the position of the voltage command V _ref ^k in space, determine its three closest effective vectors. From the phase angle θ ^k of V _ref ^k , the effective vector combination can be determined according to its range, as shown in the table below. (Example: in Figure 4, the phase angle of the target vector is about 45 degrees, so the effective vectors are V ₂ , V ₆ and V ₄ )

3. According to (4) and (5), the duty cycle k _l , k _r , k _c of each effective vector are obtained;

4. Record the PWM period as T _pwm , and record T _p =T _pwm /2. calculate

$\left\{\begin{array}{c}{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; l</span>}}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; k</span>}}_{\mathrm{<span\; class="notranslate">\; l</span>}}<span\; class="notranslate">\; *</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; p</span>}}\\ {\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; c</span>}}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; k</span>}}_{\mathrm{<span\; class="notranslate">\; c</span>}}<span\; class="notranslate">\; *</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; p</span>}}\\ {\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; r</span>}}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; k</span>}}_{\mathrm{<span\; class="notranslate">\; r</span>}}<span\; class="notranslate">\; *</span>{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; p</span>}}\end{array}\right.<span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 12</span>}<span\; class="notranslate">\; )</span>$

5. Send the switch status 100 (that is, the upper bridge arm of phase A is turned on and the lower bridge arm is turned off; the lower bridge arm of phase B is turned on and the upper bridge arm is turned off; the lower bridge arm of phase C is turned on and the upper bridge arm is turned off) , the holding time is T _r ;

6. Send the switching state 110, and the holding time is T _c ;

7. Send switch state 010, hold time is 2×T _l ;

8. Send the switching state 110, and the holding time is T _c ;

9. Send the switching state 100, and the holding time is T _r ;

10. Calculate the new voltage command value V _ref k+1 at time ^k+1 by the method in step 1;

11. If V _ref ^k+1 = V _ref ^k , go to step 5; otherwise set $k<=k+1,$ Go to step 2. Enter the next PWM cycle and execute cyclically.

The experimental waveform of the common-mode voltage obtained by using the PWM technique in the present invention is shown in FIG. 6(c). It can be seen that the fluctuation range of the common mode voltage is about 40V, which is one-third of the DC voltage.

For the sake of comparison, Figure 6(a) shows the experimental waveform of the common seven-segment space voltage vector PWM, and Figure 6(b) shows the experimental waveform of the common five-segment space voltage vector PWM. It can be seen from the experimental waveforms that the peak-to-peak value of the common-mode voltage of the traditional seven-segment method is equal to the DC bus voltage; the peak-to-peak value of the common-mode voltage fluctuation of the traditional five-segment method is about 80V within a small area (one sector), but the global peak-to-peak value is still The DC bus voltage is 120V.

From the comparison of the experimental waveforms in Fig. 6, it can be known that using the PWM technology of the present invention, the amplitude of the common-mode voltage can be reduced to one-third of that of the traditional method, thereby greatly reducing the harm of the common-mode voltage. Therefore, compared with the traditional PWM technology, the present invention has obvious advantages in suppressing common-mode voltage, reducing common-mode interference and shaft voltage hazards, and the like.

It should be noted that the above-mentioned embodiments illustrate rather than limit the invention, and that those skilled in the art will be able to design many embodiments without departing from the scope of the appended claims.

Claims (3)

1. two phase PWM modulation method that reduces common-mode voltage,

It is characterized in that this method is to realize with following steps in sequence with five sections symmetrical PWM methods in as the DSP of pwm signal generating unit in three-phase voltage-type inverter-electric motor system:

Step 1 in described DSP, is set current time k, obtains voltage instruction V by the variable voltage variable frequency control algolithm _Ref ^k,

Step 2 is according to voltage instruction V _Ref ^kPhase angle θ in the position in space, determine three effective vectors that it is adjacent, the described adjacent vector that has only a phase switch motion from an on off state to the another one on off state, that is: the V of being meant _Ref ^k=k _lV _l+ k _cV _c+ k _rV _r

k _l+k _c+k _r＝1，

Wherein, V _l, V _r, V _cBe according to described V _Ref ^kPhase angle θ in the position in space and definite adjacent fundamental space voltage vector, V _rAnd V _c, V _cAnd V _lBetween have only the switch motion of a phase,

k _l, k _c, k _rIt is respectively described adjacent vector V _l, V _c, V _rDuty ratio, be set point,

Step 3, set: the PWM cycle is T _PWM, note: T _p=T _PWM/ 2, DSP is calculated as follows V _l, V _r, V _cCorresponding action time T _l, T _r, and T _c:

$\left\{\begin{array}{c}{T}_l=k_l*T_p\\ T_c=k_c*T_p\\ T_r=k_r*T_p\end{array}\right.$

T _l+T _c+T _r＝T _p，

Step 4, DSP is starting resistor vector successively in the following manner:

Start described voltage vector V _r, send V _rCorresponding inverter switching states S _r, the retention time is T _r

Start described voltage vector V _c, send V _cCorresponding inverter switching states S _c, the retention time is T _c

Start described voltage vector V _l, send V _lCorresponding inverter switching states S _l, the retention time is 2 * T _l

Start described voltage vector V once more _c, send V _cCorresponding inverter switching states S _c, the retention time is T _c

Start described voltage vector V once more _r, send V _rCorresponding inverter switching states S _r, the retention time is T _rStep 5, DSP makes k → k+1, if V _Ref ^K+1=V _Ref ^k, then change step 4; Otherwise, change step 2, enter the next PWM cycle.

2. a kind of two phase PWM modulation method that reduces common-mode voltage according to claim 1 is characterized in that, in described step 4, the mode of DSP starting resistor vector is undertaken by following order successively: V _l→ V _c→ V _r→ V _c→ V _l

3. a kind of two phase PWM modulation method that reduces common-mode voltage according to claim 1 and 2 is characterized in that described T _p=T _PWM

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