CN100440713C - Two phase PWM modulation method for reducing small common-mode voltage - Google Patents

Abstract

The invention discloses PWM modulation technical area by using inverter in three-phase voltage type to control operation of three-phase AC motor. Characters are that three adjacent effective voltage vectors are used to synthesize target vector. The said 'adjacent' means that only one action of switch device is needed to switch from any one state to other state. Comparing with traditional PWM method, the invention avoids using zero vector so as to reduce common mode voltage to 1/3 voltage of general PWM method. The invention also reduces action number of times of switch device so as to solve induced issue of switching loss and heat.

Description

A kind of two phase PWM modulation method that reduces common-mode voltage

Technical field

The present invention relates to a kind of two-phase modulation technique of using the operation of three-phase voltage-type inverter control three-phase alternating-current motor.

Background technology

Pulse-width modulation (pulse width modulation, PWM) technology particularly space vector PWM (space vector pulsewidthmodulation, SVPWM) technology has obtained extensive use in recent years in power electronics and power drives.

In the three-phase PWM technology, if each PWM in the cycle threephase switch device all need the action, be referred to as the three-phase modulations technology, for example traditional sine pulse width modulation (PWM) technology, common for another example seven sections method SVPWM all belong to this type of; If each PWM has only the action of two-phase switching device in the cycle, other one keeps going up brachium pontis (or following brachium pontis) conducting mutually, then be referred to as the two-phase modulation technique, also have to be referred to as bus clamp PWM or discontinuous modulation technique in the document, common five sections method PWM then belong to this type of.

For three-phase voltage-type inverter-AC motor system shown in Figure 1, if (conducting of brachium pontis switching device is gone up in 1 expression with the every phase brachium pontis of 0,1 expression inverter state, 0 is brachium pontis switching device conducting down), then the threephase switch state of inverter can be 000～111 with binary number representation, totally 8 kinds of states.If with the inverter output voltage of every kind of on off state correspondence in two-dimensional coordinate system (static α β coordinate system) with vector representation, then 8 on off state correspondences 8 basic space voltage vectors, as shown in Figure 2, V wherein ₀And V ₇Coincide with initial point.

In most cases, controller provides voltage instruction and can not directly be obtained by single vector.In the space vector PWM technology, (also be V with the vector representation with voltage instruction _Ref) two basic voltage vectors of both sides synthesize target vector V according to the principle of average effect equivalence _RefWith Fig. 3 is example, as the reference voltage vector V of hope output _RefWhen shown position, with V ₄And V ₆Synthesize V _RefPromptly a PWM period T _PwmIn, V ₄And V ₆Each acts on a period of time T ₁, T ₂, make its average effect be equivalent to V _RefEffect T _PwmThe effect that time produced:

T _pwmV _ref＝T ₁V ₄+T ₂V ₆ (1)

If T ₁+ T ₂＜T _Pwm, then in remaining time, send out zero vector and come polishing.The following formula both sides are same divided by T _Pwm, be expressed as with the form of duty ratio

V _ref＝k ₁V ₄+k ₂V ₆+k ₀0 (2)

K wherein ₁+ k ₂+ k ₀=1.The 0 expression zero vector here can be selected V ₀(corresponding 000 state) or V ₇(corresponding 111 states) are as five sections method PWM of tradition; Also can use V in the cycle simultaneously at a PWM ₀And V ₇, as seven sections method PWM of tradition.

With five sections methods is example, and it determines zero vector according to the principle that reduces the switch number of times as far as possible.When inserting zero vector,, then insert the zero vector V of 000 correspondence if one " 1 " is arranged in the on off state of the non-zero vector correspondence of sending out before ₀In the on off state as the non-zero vector correspondence sent out before two " 1 " are arranged, then insert the zero vector V of 111 correspondences ₇Still be example with Fig. 3:

Mode one: when using V ₇The time, the order that each vector sends is

1, supposes from V ₄Set out: V ₄→ V ₆→ V ₇

2, then from V ₇Set out: V ₇→ V ₆→ V ₄, get back to V again ₄

3, get back to 1, repeat this process.

Mode two: when using V ₀The time, the order that each vector sends is

1, from V ₆Set out: V ₆→ V ₄→ V ₀

2, then from V ₀Set out: V ₀→ V ₄→ V ₆, get back to V ₆

3, repeat 1,2 steps.

For the purpose of symmetry, in five sections method PWM technology of tradition, these two kinds of zero vector inserted modes generally are used alternatingly between each sector.

But when adopting three-phase voltage-type inverter that motor is powered, because usually generator neutral point is unsettled, so the combination of different PWM on off states can be at the motor windings mid point and the common-mode voltage of generation high amplitude (the maximum peak peak value can reach DC bus-bar voltage) and high frequency alternation between with reference to ground.Studies show that, under the effect of various stray parameters, this common-mode voltage not only can produce electromagnetic interference to surrounding environment, still produces the important root of motor shaft voltage, thereby even may puncture bearing film and form the bearing that shaft current is damaged motor, shorten motor useful life.

In the PWM modulated process, the Analysis on Mechanism that produces the high amplitude common-mode voltage of high frequency is as follows.

With reference to figure 1, the common-mode voltage u of inverter output _ComCan be expressed as

$u_{\mathrm{com}}=\frac{1}{3}(u_a+u_b+u_c)---\left(3\right)$

Here u _a, u _b, u _cBe respectively threephase stator winding end points (a, b, c point among the figure) current potential over the ground.As seen, the size of common-mode voltage is relevant with inverter switching states, sees Table I.

The relation of Table I inverter switching states and common-mode voltage

Wherein, strange state refers to have one to go up brachium pontis conducting under brachium pontis conducting, the other two-phase mutually, as 100,001,010; The idol state is just in time opposite with the situation of strange state, as 110,011,101.

By Table I as can be known, when occupation mode for the moment, the common-mode voltage fluctuation range from

Arrive

Be that peak-to-peak value is

During occupation mode two, the common-mode voltage fluctuation range is

Peak-to-peak value also is Because dual mode is used alternatingly, the peak-to-peak value of its fluctuation reaches V but on the whole, _Dc, promptly equate with DC bus-bar voltage numerical value.As use seven sections method SVPWM or sine pulse width modulation (PWM) since each PWM in the cycle 000 and 111 on off states all can occur, its common-mode voltage just can reach V at the fluctuation peak-to-peak value of a PWM in the cycle _Dc, so situation is even more serious.

In the PWM modulated process, different on off states alternately occurs, and the vibration frequency of the common-mode voltage that causes thus is corresponding with the PWM cycle, and is promptly identical with the switching frequency order of magnitude.

In view of high frequency (its frequency and switching frequency same order), the harm of the common-mode voltage of amplitude greatly; for suppress common-mode voltage with the protection bearing, reduce the negative effect of inverter; general way is to increase choke or filter in system, but this also makes cost, volume and system complexity increase greatly simultaneously.

In fact, from Table I, can find 1/3rd when the common-mode voltage amplitude that non-zero status produces only is nought state (000,111).Hence one can see that, causes the excessive basic reason of common-mode voltage amplitude to be a large amount of uses of zero vector in the conventional P WM mode.

The present invention is based on following thinking: if do not use zero vector in the PWM modulated process as far as possible, then the common-mode voltage of its generation just can reduce (be reduced to conventional P WM technology 1/3rd) greatly.Therefore, the present invention proposes a kind of two-phase modulation technique, adopts three adjacent effective vectors to synthesize target vector, has solved to use zero vector to cause the too high problem of common-mode voltage amplitude.

Summary of the invention

According to the problems referred to above, an object of the present invention is to provide a kind of PWM algorithm, make its generation little common-mode voltage of trying one's best.Another object of the present invention is not increase or reduce the switching device action frequency as far as possible, to reduce other problems such as the switching loss that causes thus and heating.

The present invention proposes a kind of new PWM technology, promptly synthesize the target voltage vector, thereby avoid using zero vector, make common-mode voltage be reduced to 1/3rd of common PWM method, reduced common-mode voltage greatly with three adjacent effective vectors.The invention is characterized in that this method is in three-phase voltage-type inverter-electric motor system, in as the DSP of pwm signal generating unit,, realize with following steps in sequence with five sections PWM methods of symmetry:

Step 1 in described DSP, is set current time k, obtains voltage instruction V by the variable voltage variable frequency control algolithm _Ref ^k,

Step 2 is according to voltage instruction V _Ref ^kPhase angle θ in the position in space, determine three effective vectors that it is adjacent, the described adjacent vector that has only a phase switch motion from an on off state to the another one on off state, that is: the V of being meant _Ref ^k=k _lV _l+ k _cV _c+ k _rV _r

k _l+k _c+k _r＝1，

Wherein, V _l, V _c, V _rBe according to described V _Ref ^kPhase angle θ in the position in space and definite adjacent fundamental space voltage vector can obtain its corresponding on off state according to Fig. 2, be expressed as S _I, S _c, S _rV _rAnd V _c, V _cAnd V _lBetween have only the switch motion of a phase,

k _l, k _c, k _rIt is respectively described adjacent vector V _l, V _c, V _rDuty ratio, be set point,

Step 3, set: the PWM cycle is T _PWM, note: T _p=T _PWM/ 2, DSP is calculated as follows V _l, V _r, V _cCorresponding action time T _l, T _r, and T _c:

$\left\{\begin{array}{c}{T}_l=k_l*T_p\\ T_c=k_c*T_p\\ T_r=k_r*T_p\end{array}\right.$

T _l+T _c+T _r＝T _p，

Step 4, DSP is starting resistor vector successively in the following manner:

Start described voltage vector V _r, send V _rCorresponding inverter switching states S _r, the retention time is T _r

Start described voltage vector V _c, send V _cCorresponding inverter switching states S _c, the retention time is T _c

Start described voltage vector V _l, send V _lCorresponding inverter switching states S _I, the retention time is 2 * T _l

Start described voltage vector V once more _c, send V _cCorresponding inverter switching states S _c, the retention time is T _c

Start described voltage vector V once more _r, send V _rCorresponding inverter switching states S _r, the retention time is T _r

Step 5, DSP makes k → k+1, if V _Ref ^K+1=V _Ref ^k, then change step 4; Otherwise, change step 2, enter the next PWM cycle.

The present invention has following characteristics:

1. the inverter switch device conducting state contains three adjacent on off state combinations in each PWM cycle under the situation of not considering the dead band, and wherein any state switches to another state and only needs phase switching device action;

2. each PWM has a phase switch to be failure to actuate all the time in the cycle, thereby reduces switch number of times about 1/3rd;

3. common mode inhibition is effective, and its fluctuation range of the common-mode voltage of generation (peak-to-peak value) only is 1/3rd of a DC bus-bar voltage;

4. can realize with software, need not hardware cost.

Description of drawings

Fig. 1. three-phase voltage-type inverter-electric motor system schematic diagram;

Fig. 2. the fundamental space voltage vector-diagram;

Fig. 3. conventional vector synthesis mode figure;

Fig. 4. the applied system diagram of the present invention;

Fig. 5. adopt three adjacent vector synthesized reference voltage vector schematic diagrames;

Fig. 6. experimental waveform of the present invention:

Seven sections method PWM common-mode voltage waveforms of 6 (a) tradition, 20V/ lattice, 1ms/ lattice;

Five sections method PWM common-mode voltage waveforms of 6 (b) tradition, 20V/ lattice, 2ms/ lattice;

The common-mode voltage waveform of 6 (c) PWM method of the present invention, 20V/ lattice, 2ms/ lattice.

Fig. 7 .DSP program flow chart.

Embodiment

Fig. 4 is the applied real system block diagram of the present invention.Usually, this system comprises: DC power supply 1 provides operation institute of system energy requirement; Three-phase inverter 2, its output are connected in the load 4 (here for motor), and response PWM instructs and direct current is transformed into alternating current comes drive motor work; And control system, comprise detection link (5,7,9) and the control command importation and the algorithm part 8 of physical quantitys such as voltage, electric current.Control algolithm is utilized various input variables, by certain control strategy, calculates the command signal V of required voltage _Ref, PWM generating unit 6 (shown in the rectangular broken line frame) becomes pwm signal to deliver to inverter to drive opening and turn-offing of each switching device this signal transformation.Wherein 8 and 6 can in CPU, realize by software.The present invention is promptly in the PWM generating unit, in order to a kind of new PWM producing method to be provided.

The vector synthetic method that the present invention proposes as shown in Figure 5.As reference voltage vector V _RefWhen being positioned at position shown in the figure, not using zero vector, and be to use three adjacent effective vector V ₄, V ₆, V ₂Come the synthesized reference voltage vector.Here the meaning of " adjacent " is for having only a phase switch motion from an on off state to the another one on off state.Promptly

V _ref＝k _lV ₂+k _cV ₆+k _rV ₄ (4)

Here

k _l+k _c+k _r＝1 (5)

From the on off state 010,110 and 100 of these three effective vector correspondences as can be seen, c phase on off state is always 0, and therefore in whole PWM in the cycle, c phase switch is failure to actuate, thereby the switch number of times has been reduced about 1/3rd.

With V among Fig. 5 _RefShown in the position be example, first kind of feasible embodiment of the present invention is (general step such as the data acquisition before the step 1, calculating are omitted):

1, establishing current time is k, by control algolithm (as variable voltage variable frequency control, vector control etc., can be with reference to experts' such as old when uncle relevant treatise ^[1-3]), obtain voltage instruction V _Ref ^k

2, according to voltage instruction V _Ref ^kIts immediate three effective vectors are determined in position in the space.Note V _Ref ^kPhase angle be θ, then effectively vector can be determined according to the scope at θ angle, and is as shown in the table.(example: the object vector phase angle is about 45 degree, so effective vector is V among Fig. 5 ₂, V ₆And V ₄)

The Table II sector is divided with vector and is selected

3, calculate the duty ratio k of each effective vector according to formula (4) and (5) _l, k _r, k _c

4, the note PWM cycle is T _Pwm, note T _p=T _Pwm/ 2.Calculate

$\left\{\begin{array}{c}{T}_l=k_l*T_p\\ T_c=k_c*T_p\\ T_r=k_r*T_p\end{array}\right.---\left(6\right)$

5, (be that A goes up the brachium pontis conducting mutually, following brachium pontis turn-offs to go out on off state 100; B descends the brachium pontis conducting mutually, and last brachium pontis turn-offs; C descends the brachium pontis conducting mutually, and last brachium pontis turn-offs), the retention time is T _r

6, send on off state 110, the retention time is T _c

7, send on off state 010, the retention time is 2 * T _l

8, send on off state 110, the retention time is T _c

9, send on off state 100, the retention time is T _r

10, step 1 method is calculated new k+1 voltage instruction value V constantly _Ref ^K+1

11, V _Ref ^K+1=V _Ref ^k, change step 5; Otherwise order $k<=k+1,$ Change step 2.Enter next PWM cycle, circulation is carried out.

Second kind of embodiment:

1～4 step is with first scheme;

5, send on off state 010, the retention time is T _l

6, send on off state 110, the retention time is T _c

7, send on off state 100, the retention time is 2 * T _r

8, send on off state 110, the retention time is T _c

9, send on off state 010, the retention time is T _l

Later step is with first scheme.

The third scheme:

1～3 step is with first scheme;

4, the note PWM cycle is T _PwmCalculate

$\left\{\begin{array}{c}{T}_l=k_l*T_{\mathrm{pwm}}\\ T_c=k_c*T_{\mathrm{pwm}}\\ T_r=k_r*T_{\mathrm{pwm}}\end{array}\right.---\left(7\right)$

5, send on off state 100, the retention time is T _r

6, send on off state 110, the retention time is T _c

7, send on off state 010, the retention time is T _l

8,1 method is calculated new k+1 voltage instruction value V constantly set by step _Ref ^K+1

9, if V _Ref ^K+1=V _Ref ^k, change step 5; Otherwise order $k<=k+1,$ Change step 2.Enter next PWM cycle, circulation is carried out.

The 4th kind of scheme:

Step 1～4 are with third party's case;

5, send on off state 010, the retention time is T _l

6, send on off state 110, the retention time is T _c

7, send on off state 100, the retention time is T _r

After this step is with third party's case.

Can also realize the present invention with how different implementations, and do not deviate from spirit of the present invention, promptly three kinds of combinations are arranged under the situation of not considering dead time effect, only make up and to move by a phase switching device from a kind of another kind that is combined at the inverter switch device state that a PWM occurred in the cycle.Described embodiment is illustrative and not restrictive.Therefore, falling into institute within the equivalence of the boundary of claims and scope or this boundary and scope changes and is included in claims.For example, can not calculate the duty ratio of each effective vector, but directly calculate or obtain the moment of threephase switch action to obtain similar PWM waveform by modulating wave and carrier wave ratio mode.

For verifying actual effect of the present invention, in a cover model machine system, adopt different PWM technology to be the contrast experiment.

Experimental system is shown in Fig. 1,4, wherein: DC bus-bar voltage 120V; The inverter load is the 4kW threephase asynchronous; Control algolithm is variable voltage variable frequency (VVVF) control.

Concrete implementation step is in the experiment:

1. establishing current time is k.Utilize the VVVF control algolithm, calculating voltage instruction V _Ref ^k, this step can be divided following little step again:

1.1 from control given signal, obtain given frequency instruction f;

1.2, be calculated as follows voltage instruction V according to the VVVF principle _Ref ^kAmplitude

V _ref ^k＝Cf (8)

Wherein, C is the voltage-frequency specific ray constant.

1.3 calculate the phase angle increment

Δθ ^k＝2π ^*f ^*T _pwm (9)

If a last moment phase angle is θ ^K-1, the phase angle theta of current time then ^kFor

θ ^k＝θ ^k-1+Δθ ^k (10)

1.4 the voltage instruction V of current time then _Ref ^kAmplitude be V _Ref, phase angle is θ ^k, promptly

$V_{\mathrm{ref}}^k=V_{\mathrm{ref}}\&angle;{\mathrm{\&theta;}}^k---\left(11\right)$

2. according to voltage instruction V _Ref ^kIts immediate three effective vectors are determined in position in the space.By V _Ref ^kPhase angle theta ^k, can determine effective vectorial combination according to its scope, as shown in the table.(example: the object vector phase angle is about 45 degree, so effective vector is V among Fig. 4 ₂, V ₆And V ₄)

3. calculate the duty ratio k of each effective vector according to (4) and (5) _l, k _r, k _c

4. the note PWM cycle is T _Pwm, note T _p=T _Pwm/ 2.Calculate

$\left\{\begin{array}{c}{T}_l=k_l*T_p\\ T_c=k_c*T_p\\ T_r=k_r*T_p\end{array}\right.---\left(12\right)$

5. (be that A goes up the brachium pontis conducting mutually, following brachium pontis turn-offs to send on off state 100; B descends the brachium pontis conducting mutually, and last brachium pontis turn-offs; C descends the brachium pontis conducting mutually, and last brachium pontis turn-offs), the retention time is T _r

6. send on off state 110, the retention time is T _c

7. send on off state 010, the retention time is 2 * T _l

8. send on off state 110, the retention time is T _c

9. send on off state 100, the retention time is T _r

10. calculate new k+1 voltage instruction value V constantly by step 1 method _Ref ^K+1

11. if V _Ref ^K+1=V _Ref ^k, change step 5; Otherwise order $k<=k+1,$ Change step 2.Enter next PWM cycle, circulation is carried out.

PWM technology gained common-mode voltage experimental waveform is shown in Fig. 6 (c) among employing the present invention.As seen, the fluctuation range of common-mode voltage variation is 1/3rd of direct voltage about 40V.

For the ease of contrast, Fig. 6 (a) has provided the experimental waveform of common seven sections method space voltage vector PWM, and Fig. 6 (b) then is the experimental waveform of common five sections method space voltage vector PWM.As can be seen, seven sections method common-mode voltage peak-to-peak values of tradition equal DC bus-bar voltage from experimental waveform; Five sections method common-mode voltage fluctuation peak-to-peak values of tradition (sector) in the minizone are about 80V, but the global peaks peak value still is DC bus-bar voltage 120V.

As can be known, use PWM technology of the present invention in the experimental waveform contrast from Fig. 6, its common-mode voltage amplitude can be reduced to 1/3rd of conventional method, thereby greatly reduces the harm of common-mode voltage.Therefore, the relative conventional P WM technology of the present invention is suppressing common-mode voltage, is reducing aspects such as common mode disturbances and shaft voltage harm, and advantage is fairly obvious.

Should be pointed out that the above embodiments also are explanation rather than restriction the present invention, and those skilled in the art can design many embodiment under the range of condition that does not deviate from claims.

Claims (3)

1. two phase PWM modulation method that reduces common-mode voltage,

It is characterized in that this method is to realize with following steps in sequence with five sections symmetrical PWM methods in as the DSP of pwm signal generating unit in three-phase voltage-type inverter-electric motor system:

Step 1 in described DSP, is set current time k, obtains voltage instruction V by the variable voltage variable frequency control algolithm _Ref ^k,

Step 2 is according to voltage instruction V _Ref ^kPhase angle θ in the position in space, determine three effective vectors that it is adjacent, the described adjacent vector that has only a phase switch motion from an on off state to the another one on off state, that is: the V of being meant _Ref ^k=k _lV _l+ k _cV _c+ k _rV _r

k _l+k _c+k _r＝1，

Wherein, V _l, V _r, V _cBe according to described V _Ref ^kPhase angle θ in the position in space and definite adjacent fundamental space voltage vector, V _rAnd V _c, V _cAnd V _lBetween have only the switch motion of a phase,

k _l, k _c, k _rIt is respectively described adjacent vector V _l, V _c, V _rDuty ratio, be set point,

Step 3, set: the PWM cycle is T _PWM, note: T _p=T _PWM/ 2, DSP is calculated as follows V _l, V _r, V _cCorresponding action time T _l, T _r, and T _c:

$\left\{\begin{array}{c}{T}_l=k_l*T_p\\ T_c=k_c*T_p\\ T_r=k_r*T_p\end{array}\right.$

T _l+T _c+T _r＝T _p，

Step 4, DSP is starting resistor vector successively in the following manner:

Start described voltage vector V _r, send V _rCorresponding inverter switching states S _r, the retention time is T _r

Start described voltage vector V _c, send V _cCorresponding inverter switching states S _c, the retention time is T _c

Start described voltage vector V _l, send V _lCorresponding inverter switching states S _l, the retention time is 2 * T _l

Start described voltage vector V once more _c, send V _cCorresponding inverter switching states S _c, the retention time is T _c

Start described voltage vector V once more _r, send V _rCorresponding inverter switching states S _r, the retention time is T _rStep 5, DSP makes k → k+1, if V _Ref ^K+1=V _Ref ^k, then change step 4; Otherwise, change step 2, enter the next PWM cycle.

2. a kind of two phase PWM modulation method that reduces common-mode voltage according to claim 1 is characterized in that, in described step 4, the mode of DSP starting resistor vector is undertaken by following order successively: V _l→ V _c→ V _r→ V _c→ V _l

3. a kind of two phase PWM modulation method that reduces common-mode voltage according to claim 1 and 2 is characterized in that described T _p=T _PWM

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