CN100440294C - LCD unit with input pixel data reregulating circuit - Google Patents
LCD unit with input pixel data reregulating circuit Download PDFInfo
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Abstract
The present invention provides an LCD board unit with multiple source drivers which are divided into a first source driver group and a second source driver group in functions and respectively allocated to the first half part and the second half part of an LCD board. In order to correctly drive the LCD board in spite of the fact that the format of input pixel data is different or not, a pixel data readjustment circuit is provided to readjust the format of the input pixel data to a preset data format. The data readjustment circuit in front of the first source driver group and the second source driver group has the functions such as receiving 2N (N is a natural number) paths of pixel data, readjusting the order of the 2N paths of pixel data according to the preset data format, supplying the N paths of readjusted pixel data to the first source driver group, and supplying the other N paths of readjusted pixel data to the second source driver group.
Description
Invention field
The present invention relates generally to a kind of active array addressing liquid crystal display (LCD) unit, readjust the unit of circuit in particular to having pixel data, be used for will input the order of pixel data be adjusted into predetermined form so that correctly drive the LCD plate.
Correlation technique
LCD has been widely used in various electronic installations, for example television receiver, personal computer, PDA(Personal Digital Assistant), mobile telephone terminal, picture monitor or the like.Wherein, active array addressing LCD has obtained widespread use, and it has a plurality of active components (on-off element), correspondingly distributes to each pixel electrode, is used to control the voltage that is applied to above it.This active component is thin film transistor (TFT) (TFT) normally.Active array addressing LCD has the outstanding characteristic of high resolution, wide visual angle, high-contrast, multi-grey level or the like.
Along with the continuous development of LCD manufacturing technology, the LCD plate becomes increasing, will keep or improve picture element density simultaneously, and this is current development trend.Therefore, the number of pixels on each bar line constantly increases, and more and more needs to improve clock frequency.But along with the raising of clock frequency, it is more and more higher that traditional LCD equipment has run into the source electrode driver manufacturing cost, the difficulty that EMI (electromagnetic interference (EMI)) problem is more and more outstanding.
In order to solve the above-mentioned problem, the someone advises source electrode driver is divided into two groups, and pixel data is offered them with parallel mode.Therefore clock frequency is reduced by half.Such suggestion be disclosed in 5-210359 number and the 10-207434 Japanese patent application in.
Before introducing the present invention,, introduce earlier disclosed conventional art in the above-mentioned 5-210359 Japanese patent application tout court by with reference to figure 1.
Fig. 1 shows LCD plate 2 and peripheral block diagram.Around LCD plate 2, multiple source driver 3 is arranged, be used for driving the thin film transistor (TFT) in LCD plate 2 arrays.Source electrode driver 3 is divided into two groups: one group of 3L distributes to the left-half of LCD panel 2, and another group 3R distributes to the right half part of LCD panel 2.One road pixel data is offered interface 4,, utilize clock signal C K1 that the pixel data of input is divided into two-way pixel data S1 and S2 here.Also this clock signal C K1 is offered frequency divider 5, the clock rate of clock signal C K1 is reduced half, and the clock frequency that will reduce by half (speed) is sent as clock signal C K2.
Utilize clock signal C K2 that two-way pixel data S1 and S2 are offered controller 6, respectively these data are offered source electrode driver group 3L and 3R as S1U and S2U.In addition, controller 6 utilizes pixel data S1 or S2 to prepare a sampling commencing signal SP, and this signal SP is offered each set drive 3L and the top source electrode driver of 3R.Like this, pixel data S1U and S2U are shown by parallel.As mentioned above, this prior art is characterised in that source drive clock frequency can reduce by half.This can drive a very big LCD panel and not need to improve clock frequency with regard to meaning, meanwhile alleviates the EMI problem.
As mentioned above, in the above-mentioned prior art single channel pixel data is divided into source electrode driver 3L and the 3R that the two-way pixel data offers the left side and the right.Meanwhile, a unit is usually made with LCD plate 2, interface 4 and controller 6 by LCD plate manufacturer.Therefore, buy the LCD device manufacturer of this LCD plate unit and be forced to very reluctantly determine good form preparation pixel data for a long time, do like this and reduced the degree of freedom in the circuit design according to LCD plate manufacturer.The LCD device manufacturer wishes that it is not rare that the multichannel pixel data with different data format offers this phenomenon in LCD plate unit.But prior art above-mentioned can't satisfy these demands of user.Other prior art, also there is same difficulty above-mentioned in disclosed 10-207434 Japanese patent application.
The invention summary
Therefore, an object of the present invention is to provide a kind of LCD plate unit, it adopts a kind of improvement circuit, is used for the multichannel pixel data of input is readjusted to driving the data layout of two different source electrode driver groups.
In brief, for these purposes, adopted following technology, in these technology, provide the multiple source driver for liquid crystal display (LCD) plate unit, on function, they are divided into first group and the second source electrode driver group, distribute to first half-sum the second half of LCD plate respectively.In order to drive the LCD plate, and, provide a pixel data to readjust circuit, be used for the data layout of pixel data that will input to readjust and be predetermined data layout no matter which type of different-format the pixel data of input is.These data are readjusted the front of circuit in the first and second source electrode driver groups, its function is to be used for receiving 2N road (N is a natural number) pixel data, readjust the order of 2N road pixel data according to predetermined data layout, the N road pixel data that to readjust simultaneously offers the first source electrode driver group group, and the other N road pixel data that will readjust offers the second source electrode driver group.
On the one hand, what the present invention relates to is a kind of LCD (LCD) unit, and it comprises: liquid crystal display (LCD) plate; Be divided into the first and second source electrode driver groups, and distribute to the multiple source driver of first half-sum the second half of LCD plate respectively from function; And readjust circuit at the pixel data of the first and second source electrode driver group fronts, this pixel data is readjusted circuit and is received 2N road (N is a natural number) pixel data, readjust the order of this 2N road pixel data according to predetermined data layout, first group of N road pixel data readjusting is used for the first source electrode driver group, and second group of N road pixel data will readjusting is used for the second source electrode driver group.
The accompanying drawing summary
By following description, simultaneously with reference to the accompanying drawings, the features and advantages of the present invention will be perfectly clear, and in these accompanying drawings, similar element or part are with similar numeral, wherein:
Fig. 1 is a block diagram, and the conventional in layout of its bright from the principle LCD plate and peripheral cell thereof had been mentioned it in the explanation of beginning;
Fig. 2 is a block diagram of LCD plate unit in bright from the principle first embodiment of the present invention;
Fig. 3 A is the block diagram that explanation pixel data shown in Figure 2 is readjusted circuit details;
Fig. 3 B is a block diagram of an instantiation of block diagram shown in the key diagram 3A;
Among Fig. 4 A～4D each all is to be used to describe the sequential chart that how circuit works shown in Fig. 3 A;
In Fig. 5～7 each all is to be used to further describe the sequential chart that how circuit works shown in Fig. 3 A;
Fig. 8 illustrates the part source electrode driver of LCD plate shown in Figure 2;
Fig. 9 is a block diagram, and the pixel data in second embodiment of its bright from the principle the present invention is readjusted circuit;
Figure 10 is the block diagram that the part source electrode driver that uses in second embodiment of the present invention is described;
Among Figure 11 A～11F each all is the sequential chart how second embodiment of explanation the present invention works;
Among Figure 12 A～12C each all is the sequential chart of the 3rd embodiment of explanation the present invention; With
Among Figure 13 A～13C each all is the sequential chart of the 4th embodiment of explanation the present invention.
Preferred embodiment
Introduce first embodiment of the present invention below with reference to Fig. 2～8.At first, in time schedule controller 11, provide the pixel data directly related to readjust circuit (perhaps unit) 10 with the present invention with reference to figure 2.Described circuit 10 is positioned on the edge (periphery) of liquid crystal display (LCD) plate 14 in the front of multiple source driver 12.As in this area as you know, LCD plate 14 has been equipped with a plurality of active components (on-off element), form an array, each all takes the form of thin film transistor (TFT) (TFT) usually, be positioned near the point of crossing (coming) of source electrode (perhaps data) line and gate line, as shown in Figure 2 from gate drivers 16 extensions.When input on gate line when opening voltage, thin film transistor (TFT) conducting, the thin film transistor (TFT) by conducting imposes on pixel electrode 17 with data voltage.
According to first embodiment, multiple source driver 12 is divided into two groups of (part) 12L and 12R.One group of 12L distributes to the left-half of LCD panel 14, and another group 12R distributes to the right half part of LCD panel 14.Grey scale voltage generator 18 provides a plurality of gray-scale voltages, supply source driver 12.This gray level can be for example 8 grades, 16 grades, 32 grades ... perhaps 256 grades, readjust the sub-pixel data that circuit 10 provides (in just red (R), green (G) and blue (B) data) according to pixel data, select in them.Gray level this in being known in the art, therefore, will save to it further describe, to simplify this explanation.
By two pixel data passages (perhaps path) 20 and 22 two pixel data inputs 1 and 2 are offered pixel data and readjust circuit 10, the order of the pixel data that provides is provided, thereby is correctly driven the source electrode driver 12 that is divided into two groups of 12L and 12R.
The function of time schedule controller 11 is to extract a commencing signal (horizontal-drive signal) 23 from one of pixel data 1 and 2, and this signal 23 is offered two source electrode driver group 12L and 12R.Interchangeablely be, can in the proper circuit of controller 11 fronts, be ready to commencing signal above-mentioned, offer time schedule controller 11 simultaneously with pixel data 1 and 2 then.In addition, time schedule controller 11 also produces a gate drivers control signal.The generation of these signals (generation of commencing signal and gate drivers control signal just) is known in the art, and it does not have direct relation with the present invention, therefore in order to simplify the detailed description of having saved it.
With reference now to Fig. 3 A and 3B,, wherein at length show pixel data and readjust controller 10.As shown in the figure, controller 10 comprises a data phase regulator 24, two storeies 26 and 28, and wherein each all comprises a plurality of line storages (not shown among Fig. 3 A), four switch 30a～30d and on-off controller 32.Controller 32 utilizes the switch control data that offers it before this from the outside to control the switching manipulation of each switch 30a～30d.Fig. 3 B shows an example of data phase adjuster 24, and it comprises two triggers 34 and 36 under this particular case.Obviously, the operation of Fig. 3 A middle controller 10, for example with writing data into memory 34a～34d, or sense data therefrom, and phase data control etc., all be under the control of clock signal, to carry out.But, the application of these clock signals is not shown among Fig. 3 A in order to simplify accompanying drawing.
Below with reference to Fig. 3 A～3B, 4A～4D and 5～7, introduce the course of work that pixel data is readjusted circuit 10.Three kinds of forms of pixel data input 1 and 2 have been shown in Fig. 4 A～4C, have supposed that wherein the number of pixel data on the horizontal line is 2M, respectively they are numbered into 0,1,2 ..., 2M-1.As everyone knows, except control bit, the bit number of each pixel data equals three times (just R, G and B) of gray level bit number.In Fig. 4 A～4D, clock signal A is used for controlling the processing of each pixel data, clock signal B is with respect to 1/2 cycle of clock signal A phase shift (perhaps postponing).Fig. 4 D shows from pixel data and readjusts the output 1 of circuit 10 outputs and 2 data layout.In other words, should be according to readjusting pixel data input 1 and 2 shown in Fig. 4 D.
If pixel data input 1 and 2 is offered circuit 10, just there is no need to readjust the order of pixel data with the data layout shown in Fig. 4 A at all.Like this, on-off controller 32 is provided with switch 30a and 30b according to the switch control data that offered it in the past, so that directly select pixel data input 1 and 2, switch 30d is set simultaneously, and the output of switch 30a and 30b is exported 1 and 2 as pixel data.Do not need gauge tap 30c here.
When form shown in Fig. 4 B was correspondingly taked in pixel data input 1 and 2, on-off controller 32 was provided with switch 30c, so that pixel data input 1 is offered storer 26, switch 30a and 30b was set, thus the output of selection memory 26 and 28.In addition, 30d controls to switch, thereby alternately selects to be stored in the pixel data in storer 26 and 28, so that readjust pixel data, makes them take the data layout shown in Fig. 4 D.Below with reference to Fig. 5～7 in this case data are described in further detail.
With reference to figure 4C, arrange pixel data input 1 and 2 according to the mode shown in Fig. 4 B fully.But for input 1, input 2 has postponed 1/2 clock period.During this time, on-off controller 32 gauge tap 30c select data phase adjuster 24, allow data input 1 postpone 1/2 clock period, thereby make pixel data input 1 identical with two phase places of 2.Data phase adjuster 24 can adopt simple relatively traditional circuit shown in Fig. 3 B.When the negative edge of clock signal A arrives, pixel data is sent into trigger 34, after that, send next trigger 36 at the pixel data that the rising edge of clock signal A will be stored in the trigger 34, when offering trigger 36, clock signal A is inverted, and data input 1 then postpones 1/2 cycle.All the other operations shown in Fig. 4 C are with described identical with reference to the data layout 2 of figure 4B.
With reference to figure 5～7, wherein show sequential chart, be used for discussing the read/write operation of storer, and the data placement of the input of the data shown in Fig. 4 B 1 and 2.As mentioned above, each in the storer 26 and 28 all has a plurality of line storages, when the number of pixel data input is 2 as mentioned above, and, its number is 4 (just altogether 8).Supposing has line storage 1～4 and 5～8 respectively in storer 26 and 28.
Fig. 5 illustrates the memory write operation of first line data in the data input 1 and 2.As shown in the figure, the input 1 first the row on first half- pixel data 0,2 ..., M-2 is by continuous writing line storer 1, and is same, the pixel data of first row of input 2 the first half by writing line storer 2 continuously.Subsequently, the input 1 first the row pixel data M, M+2 ..., 2M-2 the second half by writing line storer 3 continuously, by similar mode, the input 2 first the row pixel data M+1, M+3 ..., 2M-1 the second half deposited in line storage 4 continuously.In these operating process, remaining line storage 5～8 is not carried out any data and write/read operation.Further, pixel data is readjusted circuit 10 without any data outputs (Fig. 2 and 3A).
The storer that Fig. 6 illustrates data input 1 and 2 second line data writes operation, and the storer read operation of data input 1 and 2 first line data.Except the line storage difference of using, be to carry out according to same mode fully with the write operation of the second line data writing line storer 5～8.Like this, further description must be repetition, therefore for simplicity they is saved.In the above-mentioned second row write operation, the pixel data that is stored in first row in the line storage 1～4 is read from line storage 1～4, as shown in Figure 6.Therefore, pixel data is readjusted first line data that circuit 10 can be readjusted input 1 and 2, and produces data output 1 and 2 according to the predetermined form shown in Fig. 4 D.
Fig. 7 illustrates data input 1 and 2 the third line memory of data write operations, and the memory read operation of second line data is shown simultaneously.Can understand these operations at an easy rate from above-mentioned description.
The part of bright from the principle each source electrode driver 12L of Fig. 8 and 12R.Commencing signal (horizontal-drive signal just) is applied to the first order of each shift register L1 and R1, with commencing signal right shift or translation, next impose on next shift register L2 and R2 respectively then according to shift pulse (not illustrating among the figure).With like this displacement after commencing signal offer corresponding latch LL1, LL2 ... with RL1, RL2 ... level.In these latchs each all has multistage, and its numbering equals the numbering of corresponding displaced register.Latch LL1, LL2, RL1, RL2 or the like latch continuously from pixel data and readjust the output 1 of circuit 10 generations and 2 pixel data according to commencing signal and clock signal (clock signal A just).All pixel datas in delegation all be stored in latch LL1, LL2 ..., RL1, RL2 ... after, determine gray-scale voltage with the pixel data that latchs, next gray-scale voltage is imposed on corresponding active component, for example well-known thin film transistor (TFT) in the prior art.
Below with reference to Fig. 9,10 and 11A～11F second embodiment of the present invention described.Pixel data in second embodiment is readjusted circuit 110 (Fig. 9) and is received four pixel datas inputs 1～4, and after the order that will import data is readjusted predetermined order, produces four pixel datas and export 1～4.Like this, second embodiment follows the difference of first embodiment to be the number difference of input and output data.
As shown in Figure 9, can take four pixel datas input 1～4 of the illustrated different-format of Figure 11 A～11E to offer data and readjust circuit 110.Usually, circuit 110 comprises the data phase adjuster 124 that wherein has switch, wherein has memory cell 126, switch 130d and the on-off controller 132 of switch, from external circuit switch control data is offered this on-off controller.Because therefore second extension that embodiment is first embodiment will describe second embodiment with reference to first embodiment.
To export 1～4 shown in Figure 11 F from the pixel data that circuit 110 produces, and be applied in to source electrode driver group 112L and 112R shown in Figure 10.The left-half and the right half part of LCD plate distributed in pixel data output 1～2 and 3～4 respectively.
Figure 10 shows the part of each source electrode driver 112L and 112R, and this figure is corresponding with Figure 10.As shown in Figure 8, a commencing signal (horizontal-drive signal just) is offered the first order of each shift register L1 ' and R1 ', after this with this commencing signal to right translation (displacement), offer next shift register L2 ' and R2 ' respectively according to clock signal (clock signal A) then.As mentioned above, because source electrode driver 112L and 112R are distributed in pixel data output 1～2 and 3～4 respectively, therefore might once just latch two continuous pixel datas.Therefore, the progression of each shift register L1 ', R1 ' or the like can reduce by half.Like this displacement after synchronizing signal be provided for continuous two stage latch LL1 ', LL2 ' ..., RL1 ', RL2 ' ...Therefore can latch a pair of pixel data simultaneously from each data output 1～2 and 3～4 of circuit 110.Ensuing operation with described with reference to figure 8 those are identical.
If pixel data input 1～4 is offered circuit 110 according to the form shown in Figure 11 A, just there is no need according to Figure 11 F like that to importing 1～4 order of readjusting pixel data.In this case, 132 gauge tap 130d of on-off controller, thus allow data input 1～4 by it.Switch 130d is corresponding to the switch 13d shown in Fig. 3 A.Obviously, the on-off controller 132 switch element 124s in the control data phase regulator 124 not.The data input that switch element 124s allows to offer it is passed through, and will introduce this point below.In addition, under above situation, on-off controller 132 is the switch element 126s in the control store unit 126 not.The function of switch element 126s is the switch 30c of Fig. 3 A.
When form that pixel data input 1～4 is taked shown in Figure 11 B, on-off controller 132 is provided with switch 124s, allows the data input 1～4 that provides by data phase adjuster 124, postpones because there is no need to allow data input 1 and 2 carry out data phase.Though do not illustrate in Fig. 9, in fact memory cell 126 has 16 line storages, and its quantity is compared with first embodiment and is doubled, because the data input has doubled.By just can understand order how to adjust data input 1～4 with reference to figure 5～7.That is to say that the difference between first embodiment and second embodiment is that the number of importing data and output data is doubled.
Take under the situation of form shown in Figure 11 C in pixel data input 1～4, on-off controller 132 is provided with switch 124s, and data input 1～4 is offered data phase adjuster 124, because input 1～2 must be postponed 1/2 clock period.Should be noted that importing 3～4 does not carry out any data phase adjustment.Data input 1～2 that postponed like this and the input 3～4 that did not postpone are offered memory cell 126 together.The operation of back with carry out in the input of the data shown in Figure 11 B 1～4 those are identical.
About the pixel data input 1～4 of the sort of form of Figure 11 D, readjust the operation of data order and follow at the input of data shown in Figure 11 B 1～4 those operations of being carried out basic identical.Difference between the both of these case (Figure 11 D and B) is that the line storage that switch 130d will select under the control of clock signal is different.
When form shown in Figure 11 E is taked in pixel data input 1～4, on-off controller 132 is provided with switch 124s, data input 1～4 is offered data phase adjuster 124, because input 1～2 must be postponed 1/2 clock period, as the sort of situation of Figure 11 C.Follow the input 3～4 that did not postpone to offer memory cell 126 together with postponing later data input 1～2 like this.Ensuing operation is with identical to data input 1～4 those operations of carrying out shown in Figure 11 D.
Below with reference to Figure 12 A～12C the 3rd embodiment of the present invention described.Under lab or in quality control portion test LCD plate and/or it is carried out fault diagnosis in, need left-half and right half part sometimes with same data check LCD plate.In addition, left-half and the right half part at the plate that will test shows that same data just are enough to check the working condition of display board sometimes.For this purpose,, utilize pixel data to readjust circuit 10 or 110 left-half and the same pixel datas of right half parts demonstration at the LCD plate according to the 3rd embodiment.
In Figure 12 A, have only pixel data 1 to be provided for circuit 10, Figure 12 C then illustrates the output of circuit 10.In this case, the line storage of mentioning in first embodiment 1 and 2 store input 1 first row the first half parts same pixel data 0,1,2 ..., M-1, after this, circuit 10 gauge tap 30a, 30b and 30d, thus produce the pixel data shown in Figure 12 C.Like this, same data are offered source electrode driver group 12L and 12R.Same discussion is applicable to this situation that only input of the data shown in Figure 12 B 2 is offered circuit 10.Much less, data are readjusted circuit 110 can be used to receive single pixel data, produces the data shown in Figure 12 C.
Below with reference to Figure 13 A～13C the 4th embodiment of the present invention described.In laboratory or quality control portion, the LCD plate tested and/or fault diagnosis in, need under showing normal condition, distribute to sometimes in half the pixel data of plate, check full line.This point can realize by show each pixel data two adjacent pixel unit.First-selected this technology when gray level changes on the whole piece horizontal line of checking the high pixel density plate is because can reduce the variation of gray level.
Figure 13 A only illustrates pixel data 1 is offered circuit 10, and Figure 13 C then illustrates the output of circuit 10.In this case, line storage 1 and 2 store input 1 first row the first half parts same pixel data 0,1,2 ..., M-1, then, circuit 10 gauge tap 30a, 30b and 30d, produce the pixel data shown in the 13C, so just same pixel data is offered among source electrode driver group 12L and the 12R two the adjacent source drivers 12 of each.This discussion is equally applicable to only data input 2 be offered the situation of circuit 10 shown in Figure 13 B.Obviously, data are readjusted circuit 110 and be can be used in the single pixel data of reception, produce the data shown in Figure 13 C.
As mentioned above, under the number of each pixel data input and output is 2 and 4 hypothesis, certain preferred embodiments has been described.But the number that the present invention can be used in each data input and output equally is the situation of 2N (N is the natural number greater than 2).Also have, the data phase adjustment needn't be readjusted in the circuit 10 (perhaps 110) in data and carry out, and in this case, phase regulator 24 (perhaps 124) is in the back of switch 30d (130d).
The front has provided four preferred embodiments and their some improvement.But also have other various improvement can not break away from protection scope of the present invention for the technician in this area, scope of the present invention just is defined by the claims.Therefore, embodiment given here and improvement are just illustrative, rather than restrictive.
Claims (8)
1. one kind has pixel data and readjusts the liquid crystal display of circuit (LCD) unit, and this pixel data is readjusted circuit and comprised:
A plurality of pixel data inputs, its number is 2N (N is a natural number), and can provide 2N road pixel data to it;
The data phase adjuster if having phase differential between the 2N road pixel data that is used for receiving in the pixel data input, is then eliminated this phase differential;
Memory storage is used to be stored in the 2N road pixel data that a plurality of pixel datas input receives, if wherein there is phase differential, this storer that then is operably connected is to receive the output of data phase adjuster;
First switchgear is used for optionally reading the pixel data that is stored in memory storage; And
The second switch device, it is followed after first switchgear, be used for readjusting the order of pixel data according to the tentation data form, offer half the first source electrode driver group that is assigned to the LCD panel with readjusting first group of later N road pixel data, and second group of N road pixel data will readjusting offers second half the second source electrode driver group that is assigned to the LCD panel.
2. one kind has pixel data and readjusts the liquid crystal display of circuit (LCD) unit, and this pixel data is readjusted circuit and comprised:
A plurality of pixel data inputs, its number is 2N (N is a natural number), and can provide 2N road pixel data to it;
Memory storage is used to be stored in the 2N road pixel data that a plurality of pixel datas input receives,
First switchgear is used for optionally reading the pixel data that is stored in memory storage; And
The second switch device, it is followed after first switchgear, be used for readjusting the order of pixel data according to the tentation data form, offer half the first source electrode driver group that is assigned to the LCD panel with readjusting first group of later N road pixel data, offer second half the second source electrode driver group that is assigned to the LCD panel and will readjust second group of later N road pixel data
Wherein, if between first and second groups of N road pixel datas of second switch device output, have phase differential, then before being provided to the LCD panel, it eliminates this phase differential.
3. one kind has pixel data and readjusts the liquid crystal display of circuit (LCD) unit, and this pixel data is readjusted circuit and comprised:
A plurality of pixel data inputs, its number is 2N (N is a natural number), and can provide the single channel pixel data to it;
Memory storage is used for being stored in the single channel pixel data of locating to receive that a plurality of pixel datas are imported;
Switchgear, be used for optionally reading the pixel data that is stored in memory storage, and generation two-way pixel data, each road pixel data is all identical with the single channel pixel data, in this two-way pixel data a road is provided for half the first source electrode driver group that is assigned to the LCD panel, and another road in this two-way pixel data is provided for second half the second source electrode driver group that is assigned to the LCD panel.
4. one kind has pixel data and readjusts the liquid crystal display of circuit (LCD) unit, and this pixel data is readjusted circuit and comprised:
A plurality of pixel data inputs, its number is 2N (N is a natural number), and can provide the single channel pixel data to it;
Memory storage is used for being stored in the single channel pixel data of locating to receive that a plurality of pixel datas are imported;
Switchgear, be used for optionally reading the pixel data that is stored in memory storage, and generate the two-way pixel data by each pixel data that duplicates in the single channel pixel data, in this two-way pixel data a road is provided for half the first source electrode driver group that is assigned to the LCD panel, and another road in this two-way pixel data is provided for second half the second source electrode driver group that is assigned to the LCD panel.
5. method of readjusting 2N road (N the is a natural number) pixel data that offers liquid crystal display (LCD) unit may further comprise the steps:
(a) at number be reception 2N road, a plurality of pixel datas input pixel data of 2N (N is a natural number);
(b) if between the 2N road pixel data that step (a) receives, have phase differential, then eliminate this phase differential;
(c) be stored in the 2N road pixel data that a plurality of pixel datas input receives, wherein, if having phase differential between this 2N road pixel data, then this phase differential is eliminated in step (b);
(d) optionally read in the pixel data that step (c) is stored; And
(e) readjust the order of pixel data according to the tentation data form, offer half the first source electrode driver group that is assigned to the LCD panel with readjusting first group of later N road pixel data, offer second half the second source electrode driver group that is assigned to the LCD panel and will readjust second group of later N road pixel data.
6. method of readjusting 2N road (N the is a natural number) pixel data that offers liquid crystal display (LCD) unit may further comprise the steps:
(a) at number be reception 2N road, a plurality of pixel datas input pixel data of 2N (N is a natural number);
(b) be stored in the 2N road pixel data that a plurality of pixel datas input receives;
(c) optionally read in the pixel data that step (b) is stored; And
(d) readjust the order of pixel data according to the tentation data form, offer half the first source electrode driver group that is assigned to the LCD panel with readjusting first group of later N road pixel data, and second group of N road pixel data will readjusting offers second half the second source electrode driver group that is assigned to the LCD panel
Wherein, if between first and second groups of N road pixel datas that step (d) generates, have phase differential, then before being provided to the LCD panel, it eliminates this phase differential.
7. readjust the method for the single channel pixel data that offers liquid crystal display (LCD) unit, may further comprise the steps:
(a) receive the single channel pixel data;
(b) be stored in the single channel pixel data that step (a) receives;
(c) optionally read in the single channel pixel data that step (b) is stored, so that generate the two-way pixel data, each road pixel data is all identical with the single channel pixel data, in this two-way pixel data a road is provided for half the first source electrode driver group that is assigned to the LCD panel, and another road in this two-way pixel data is provided for second half the second source electrode driver group that is assigned to the LCD panel.
8. readjust the method for the single channel pixel data that offers liquid crystal display (LCD) unit, may further comprise the steps:
(a) receive the single channel pixel data;
(b) be stored in the single channel pixel data that step (a) receives;
(c) optionally read in the single channel pixel data that step (b) is stored, so that generate the two-way pixel data by each pixel data that duplicates in the single channel pixel data, in this two-way pixel data a road is provided for half the first source electrode driver group that is assigned to the LCD panel, and another road in this two-way pixel data is provided for second half the second source electrode driver group that is assigned to the LCD panel.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB021401845A CN100440294C (en) | 2002-07-03 | 2002-07-03 | LCD unit with input pixel data reregulating circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB021401845A CN100440294C (en) | 2002-07-03 | 2002-07-03 | LCD unit with input pixel data reregulating circuit |
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| CN1466121A CN1466121A (en) | 2004-01-07 |
| CN100440294C true CN100440294C (en) | 2008-12-03 |
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| Application Number | Title | Priority Date | Filing Date |
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| CNB021401845A Expired - Fee Related CN100440294C (en) | 2002-07-03 | 2002-07-03 | LCD unit with input pixel data reregulating circuit |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN114283749B (en) * | 2021-12-30 | 2023-07-21 | 京东方科技集团股份有限公司 | Source driver, display panel, display device and data driving method |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61219023A (en) * | 1985-03-23 | 1986-09-29 | Sharp Corp | Liquid-crystal display device |
| JPH05200359A (en) * | 1992-01-28 | 1993-08-10 | Mitsubishi Heavy Ind Ltd | Method for coating hull block or the like |
| JPH10149140A (en) * | 1996-11-20 | 1998-06-02 | Hitachi Ltd | Liquid crystal driving device using large-scale integrated circuit |
| CN1204781A (en) * | 1997-04-28 | 1999-01-13 | 松下电器产业株式会社 | Crystal display device and driving method thereof |
| US5929925A (en) * | 1996-01-26 | 1999-07-27 | Sharp Kabushiki Kaisha | Display device for displaying images with different aspect ratios and/or positions |
-
2002
- 2002-07-03 CN CNB021401845A patent/CN100440294C/en not_active Expired - Fee Related
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61219023A (en) * | 1985-03-23 | 1986-09-29 | Sharp Corp | Liquid-crystal display device |
| JPH05200359A (en) * | 1992-01-28 | 1993-08-10 | Mitsubishi Heavy Ind Ltd | Method for coating hull block or the like |
| US5929925A (en) * | 1996-01-26 | 1999-07-27 | Sharp Kabushiki Kaisha | Display device for displaying images with different aspect ratios and/or positions |
| JPH10149140A (en) * | 1996-11-20 | 1998-06-02 | Hitachi Ltd | Liquid crystal driving device using large-scale integrated circuit |
| CN1204781A (en) * | 1997-04-28 | 1999-01-13 | 松下电器产业株式会社 | Crystal display device and driving method thereof |
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| Publication number | Publication date |
|---|---|
| CN1466121A (en) | 2004-01-07 |
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