CN100440288C - Organic EL display and active matrix substrate - Google Patents
Organic EL display and active matrix substrate Download PDFInfo
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- CN100440288C CN100440288C CNB2004800025821A CN200480002582A CN100440288C CN 100440288 C CN100440288 C CN 100440288C CN B2004800025821 A CNB2004800025821 A CN B2004800025821A CN 200480002582 A CN200480002582 A CN 200480002582A CN 100440288 C CN100440288 C CN 100440288C
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Abstract
An active matrix type organic EL display includes: a drive control element (Dr) having a first terminal connected to a first power source terminal (Vdd), a control terminal, and a second terminal for outputting drive current in accordance with the voltage between the first terminal and the control terminal; a capacitor (C) having one of the electrodes connected to the control terminal and capable of maintaining the voltage between the first terminal and the control terminal constant; and an organic EL element (OLED) connected between the second terminal and a second power source terminal (Vss). A switch between the second terminal and the control terminal consists of plurality of switches (Sw1a to Sw1c) connected in series so as to obtain a complete non-conductivity. By making the switch (Sw1a) of the control terminal side non-conductive earlier than the other switches (Sw1b, Sw1c), the potential shift amount caused by the capacity of the switch itself is reduced.
Description
Technical field
The present invention relates to display and array base palte, relate in particular to the organic EL of active matrix (electroluminescence) display and employed active-matrix substrate.
Background
Cathode-ray tube display is compared, owing to have such as compact appearance, advantage in light weight and low in energy consumption, so the needs of the flat-panel monitor of LCD representative increase just fast.Particularly, owing to can obtain satisfied display quality, the Active Matrix Display that utilizes the pixel with memory effect to preserve vision signal is used for various devices, such as portable information device.
In recent years, in flat-panel monitor, as the OLED display fast development of self-emission display, comparing it with LCD can increase response speed and visual angle.
Fig. 1 is the circuit diagram that the pixel circuit example of conventional OLED display is shown.This pixel circuit is disclosed in U.S. Patent No. 6373454B1 and following operation.
At first, cut-off switch Sw2.Under this state, Closing Switch Sw1 and Sw3 offer transistor Dr with the vision signal electric current I in that expects.At this moment, because transistor Dr is connected by switch S w1 diode, the grid of setting transistor Dr is to source voltage, so that the size of current that flows between source electrode and drain electrode equals electric current I in.After this, cut-off switch Sw1 and Sw3.The grid that is set to the transistor Dr consistent with electric current I in is kept by capacitor C1 to source voltage.By with upper type, stop write cycle.
Then, Closing Switch Sw2 is connected to organic EL OLED the drain electrode of transistor Dr.Because the grid of setting transistor Dr as described above is to source voltage, size flows to organic EL OLED with electric current I in electric current much at one.Therefore, light emissioning cycle begins.It should be noted that light emissioning cycle lasts till that begin next write cycle.
In above-mentioned display method, in light emissioning cycle, grid is remained in constant level ideally to source voltage.But if switch S w1 is disconnected by halves, then electric charge can move between the grid of transistor Dr and drain electrode, and grid changes to source voltage.As a result, relatively more difficult with the corresponding image demonstration of the vision signal that writes meeting.For example, show slinkingly the brightness meeting increase of aspect element.Under extreme case, show slinkingly the aspect element and can be considered to bright defective.
This problem not only is present in the OLED display that its pixel uses circuit shown in Figure 1.More particularly, above problem also can be present in pixel and not use the circuit that writes vision signal by current signal to use by voltage signal to write in the OLED display of circuit of vision signal.
Summary of the invention
The objective of the invention is to improve the display quality of active matrix OLED display.
According to a first aspect of the invention, a kind of active matrix OLED display is provided, and it comprises: the drive controlling element, and it comprises first end that is connected with first power end, control end, and the output size is corresponding to second end of the drive current of voltage between first end and the control end; Capacitor, its electrode is connected to control end, and can keep the voltage constant between first end and the control end; Organic EL, it is connected between second end and the second source end; And a plurality of first switches, they are series between second end and the control end.
According to a second aspect of the invention, a kind of active matrix OLED display is provided, and it comprises: the drive controlling element, and it comprises first end that is connected with first power end, control end, and the output size is corresponding to second end of the drive current of voltage between first end and the control end; Capacitor, its electrode is connected to control end, and can keep the voltage constant between first end and the control end; Organic EL, it is connected between second end and the second source end; And a plurality of first switches, they are series between second end and the control end, described a plurality of first switch is the field effect transistor of identical conduction type and has the grid that is connected to single sweep signal input end, and in described a plurality of first switches of series connection, the threshold value of all the other first switches of threshold ratio of first switch that is positioned at the end place of control on distolateral is darker.
According to a third aspect of the invention we, a kind of active matrix OLED display is provided, and it comprises: the drive controlling element, and it comprises first end that is connected with first power end, control end, and the output size is corresponding to second end of the drive current of the voltage between first end and the control end; Capacitor, its electrode is connected to control end, and can keep the voltage constant between first end and the control end; Organic EL, it is connected between second end and the second source end; And a plurality of first switches, they are series between second end and the control end, described a plurality of first switch is the field effect transistor of identical conduction type and has the grid that is connected to single sweep signal input end, and in described a plurality of first switches of series connection, the channel length of first switch that is positioned at the end place of control on distolateral is longer than the channel length of all the other first switches.
According to a forth aspect of the invention, a kind of active matrix OLED display is provided, and it comprises: the drive controlling element, and it comprises first end that is connected with first power end, control end, and the output size is corresponding to second end of the drive current of the voltage between first end and the control end; Capacitor, its electrode is connected to control end, and can keep the voltage constant between first end and the control end; Organic EL, it is connected between second end and the second source end; And a plurality of first switches, they are series between second end and the control end, the first sweep signal end, and it is connected to the control end of first switch that being positioned at the end place of control on distolateral in described a plurality of first switch; And the second sweep signal end, it is connected to the control end of all the other first switches in described a plurality of first switch, the field effect transistor that described a plurality of first switch is the identical conduction type, and in described a plurality of first switches of series connection, the channel area of first switch that is positioned at the end place of control on distolateral is littler than the channel area of all the other first switches.
According to a fifth aspect of the invention, a kind of active-matrix substrate is provided, it comprises: the drive controlling element, it comprises first end that is connected with first power end, control end, and the output size also should be connected to second end of second source end by organic EL corresponding to the drive current of the voltage between first end and the control end; Capacitor, its electrode is connected to control end, and can keep the voltage constant between first end and the control end; And a plurality of switches, they are series between second end and the control end.
Description of drawings
Fig. 1 is the circuit diagram that the pixel circuit example of conventional OLED display is shown;
Fig. 2 is the planimetric map of schematically illustrated active matrix OLED display according to first embodiment of the invention;
Fig. 3 is the planimetric map of the practical layout that pixel adopted in the schematically illustrated OLED display shown in Figure 2;
Fig. 4 is the planimetric map of the modification of schematically illustrated structure shown in Figure 3;
Fig. 5 is the planimetric map of practical layout of the pixel of schematically illustrated OLED display according to reference example;
Fig. 6 is the switch in the schematically illustrated a plurality of switches that can be used for comprising in the switches set and get rid of the cut-open view of structure example of the switch of the end of the control that is positioned at the drive controlling element on distolateral;
Fig. 7 is the cut-open view of structure example that schematically shows the switch of the control that is positioned at the drive controlling element in a plurality of switches that can be used for comprising in the switches set end on distolateral;
Fig. 8 is the planimetric map that schematically shows according to the OLED display of second embodiment of the invention;
Fig. 9 is the equivalent circuit diagram that adoptable pixel circuit example in the OLED display shown in Figure 8 is shown;
Figure 10 is the sequential chart that the driving method example of OLED display shown in Figure 8 is shown;
Figure 11 is the diagrammatic sketch that the waveform example that the signal of the signal input of delay element shown in Figure 9 and delay element exports is shown;
Figure 12 is the equivalent circuit diagram that another example of the pixel circuit that can be used by OLED display shown in Figure 8 is shown;
Figure 13 illustrates the signal that is input to delay element shown in Figure 12 and from the diagrammatic sketch of the waveform example of the signal of this delay element output;
Figure 14 is the equivalent circuit diagram that another example that can be used for the pixel circuit in the OLED display shown in Figure 8 is shown;
Figure 15 illustrates the signal that is input to delay element shown in Figure 14 and from the diagrammatic sketch of the waveform example of the signal of this delay element output;
Figure 16 illustrates the equivalent circuit diagram that a third embodiment in accordance with the invention can be used for the pixel circuit example in the active matrix OLED display;
Figure 17 illustrates the equivalent circuit diagram that can be used for the pixel circuit example in the active matrix OLED display according to fourth embodiment of the invention;
Figure 18 is the sequential chart of driving method example that the OLED display of the pixel circuit shown in Figure 17 that is used for pixel is shown;
Figure 19 illustrates the equivalent circuit diagram of another example that a fourth embodiment in accordance with the invention can be used for the pixel circuit of OLED display;
Figure 20 is the sequential chart of driving method example that the OLED display of the pixel circuit shown in Figure 19 that is used for pixel is shown;
Figure 21 illustrates the equivalent circuit diagram of another example that a fourth embodiment in accordance with the invention can be used for the pixel circuit of OLED display;
Figure 22 is the sequential chart of driving method example that the OLED display of the pixel circuit shown in Figure 21 that is used for pixel is shown;
Figure 23 is the equivalent circuit diagram that the pixel circuit example that can be used by OLED display is shown according to a fifth embodiment of the invention;
Figure 24 is the sequential chart of driving method example that the OLED display of the pixel circuit shown in Figure 23 that is used for pixel is shown; And
Figure 25 is the cut-open view that schematically shows spendable structure example in the organic EL plate of first to the 5th embodiment according to the present invention.
Embodiment
Describe several embodiments of the present invention in detail below with reference to accompanying drawing.In the accompanying drawing, identical label represents to present the component of identical or similar functions, and will save its description separately.
Fig. 2 is the planimetric map of schematically illustrated active matrix OLED display according to first embodiment of the invention.
Active matrix OLED display 1 shown in Figure 2 comprises organic EL plate DP and controller CNT.
Organic EL plate DP comprises the insulated substrate 2 such as glass substrate.Pixel PX is arranged on the main surface of substrate 2 by matrix form.Pixel PX limits the main lip-deep viewing area of substrate 2.Be arranged in the zone outside the viewing area, promptly in the outer peripheral areas as the sweep signal line drive YDR of driving circuit and vision signal line drive XDR.
Each pixel PX comprises organic EL OLED, drive controlling element Dr, capacitor C1, passes through switches set SwG, switch S w2 and switch S w3 that a plurality of switches of series connection form.As an example, switches set SwG comprises that three switch S w1a are to Sw1c.As an example, the p-channel TFT (thin film transistor (TFT)) as a kind of field effect transistor is used as drive controlling element Dr, switch S w1a to Sw1c (switches set SwG), switch S w2 and switch S w3.
Drive controlling element Dr, switch S w2 and organic EL OLED are series between power lead Vdd and the power lead Vss in this order, and they are used separately as power supply terminal, provide to pixel PX to make the luminous necessary electric energy of organic EL OLED.The current potential of power lead Vdd and power lead Vss for example is set to respectively+10V and 0V.
The end of capacitor C1 is connected to the control end (grid) of drive controlling element Dr.Potential difference (PD) between the grid of capacitor C1 maintenance drive controlling element Dr and the terminal (source electrode) of drive controlling element Dr, it is connected to power lead Vdd.Potential difference (PD) is corresponding to input signal.Capacitor C1 is connected between power lead Vdd and the grid as the control end of drive controlling element Dr.
Switch S w1a is series between the terminal (drain electrode) of the control end of drive controlling element Dr and drive controlling element Dr to Sw1c, and it is connected to switch S w2.Switch S w1a is connected to sweep signal line drive YDR to the control end (grid) of Sw1c by control line identical for each pixel rows.Switch S w1a is connected to scan signal line Scan1 to the control end of Sw1c, and this signal wire links to each other with the control end of switch S w3.Arrangement offers the scan signal line of switch S w1a to the control end of Sw1c with sweep signal, and irrelevant with scan signal line Scan1.
Grid as the control end of switch S w2 is connected to scan signal line Scan2.
Switch S w3 is connected between the terminal of the video signal cable Data that links to each other with vision signal line drive XDR and drive controlling element Dr, and it is connected to switch S w2.Grid as the control end of switch S w3 is connected to sweep signal line drive YDR by scan signal line Scan1.
Controller CNT is formed on the printed circuit board (PCB) that is arranged at outside organic EL plate DP and the operation of gated sweep signal line drive YDR and vision signal line drive XDR.Digital video signal and the synchronizing signal that provides from external device (ED) is provided controller CNT, and generates the vertical scanning control signal of control vertical scanning timing and the horizontal scanning control signal of controlling level scanning timing according to this synchronizing signal.Controller CNT offers sweep signal line drive YDR and vision signal line drive XDR with vertical scanning control signal and horizontal scanning control signal respectively.In addition, controller CNT and level and vertical scanning timing synchronously offer digital video signal vision signal line drive XDR.
In each horizontal scanning period, under the control of horizontal scanning control signal, vision signal line drive XDR converts digital video signal to simulating signal, and institute's video signal converted is offered a plurality of video signal cable Data abreast.In this example, vision signal line drive XDR offers video signal cable Data with vision signal as current signal.
Under the control of vertical scanning control signal, sweep signal line drive YDR sequentially provides sweep signal to a plurality of scan signal line Scan1, and its gauge tap Sw1a is to the switching of Sw1c and Sw3.Under the control of vertical scanning control signal, sweep signal line drive YDR also sequentially provides sweep signal to a plurality of scan signal line Scan2, the switching of its gauge tap Sw2.
In display 1, substrate 2, scan signal line Scan1, video signal cable Data, switch S w1a are to Sw1c, Sw2 and Sw3, drive controlling element Dr and capacitor C1 formation active-matrix substrate.As shown in Figure 2, this active-matrix substrate also can comprise sweep signal line drive YDR and vision signal line drive XDR.This active-matrix substrate also can comprise the electrode of each organic EL OLED.
The driving method of OLED display 1 then will be described.
In write cycle, at first, the sweep signal (sweep signal of high level in this case) that switch S w2 is set in without selection mode offers the scan signal line Scan2 that links to each other with the pixel PX that will select from sweep signal line drive YDR.In addition, switch S w1a is provided to the scan signal line Scan1 that links to each other with pixel PX to the sweep signal (low level sweep signal in this case) that Sw1c and Sw3 are set in selection mode.Therefore, switch S w2 is set in not on-state, and switch S w1a is set in conducting state to Sw1c and Sw3.
In this state, via drive controlling element Dr, switch S w3 and video signal cable Data, the steady current that equates with vision signal electric current I in of size offers conducting path from power lead Vdd to vision signal line drive XDR by vision signal line drive XDR.Because switch S w1a is in conducting state to Sw1c, the potential difference (PD) (grid is to source voltage) between the control end of power lead Vdd and drive controlling element Dr is set to the corresponding value with electric current I in.After this, switch S w1a is provided for scan signal line Scan1 to the sweep signal (in this case, the sweep signal of high level) that Sw1c and Sw3 are set in without selection mode, so that switch S w1a is set in not on-state to Sw1c and Sw3.The grid of the drive controlling element Dr that sets corresponding to electric current I in is kept by capacitor C1 to source voltage.Therefore, finish write cycle.
Then, the sweep signal (in this case, low level sweep signal) that switch S w2 is set in selection mode is provided for scan signal line Scan2, so that switch S w2 is set in conducting state.Because the grid of setting drive controlling element Dr as described above is to source voltage, almost identical with the electric current I in electric current of size flows to organic EL OLED.Therefore, light emissioning cycle begins.It should be noted that light emissioning cycle lasts till that begin next write cycle.
In this embodiment, the terminal of the drive controlling element Dr that links to each other with switch S w2 and the control terminal of drive controlling element Dr, promptly drain and gate is connected with each other to Sw1c by a plurality of switch S w1a that connect.For this reason, in light emissioning cycle, the voltage that applies between the drain and gate of drive controlling element Dr can be assigned to switch S w1a to Sw1c.As a result, in light emissioning cycle, electric charge is difficult between the drain and gate of drive controlling element Dr and moves, and any variation of sup.G in the source voltage.
Even during the short circuit when switch S w1a causes its source electrode and drains to one of Sw1c between,, also can guarantee the not on-state of whole switch S w1 as long as all the other TFT are normal.For this reason, can obtain redundancy at picture element defect.Therefore, can carry out gratifying display operation.Particularly, can suppress to show slinkingly the brightness increase of aspect element and the generation of picture element defect.
In display 1, for example when a plurality of switch S w1a that comprise among the switches set SwG when the switching from the conducting state to the not on-state of Sw1c is carried out simultaneously, mistake can appear showing, such as insufficient brightness of bright display element.Cause (termination) switching among the switch S w1a from the conducting state to the not on-state by size variation than more Zao in rest switch Sw1b and Sw1c according to sweep signal, can address this problem, wherein switch S w1a is a plurality of switch S w1a of comprising among the switches set SwG in the Sw1c one and be positioned at the control of the drive controlling element Dr end on distolateral.This will be described to the example of the timing of the switching of Sw1c control based on utilizing its threshold value to carry out switch S w1a.
Fig. 3 is the planimetric map of the practical layout that pixel PX is adopted in the schematically illustrated OLED display 1 shown in Figure 2.Fig. 4 is the planimetric map of the modification of schematically illustrated structure shown in Figure 3.Fig. 5 is the planimetric map of practical layout of the pixel of schematically illustrated OLED display according to reference example.
In structure shown in Figure 3, satisfy the relation that inequality provides: La＞Lb and La＞Lc (for example, La=4.5 μ m, Lb=Lc=3 μ m) to the transistorized channel length La of Sw1c to Lc as switch S w1a.Structure shown in Figure 4 and structure shown in Figure 3 are basic identical, and difference is that channel length La is to Lc be equal to each other (for example, La=Lb=Lc=3 μ m).Structure shown in Figure 5 and structure shown in Figure 3 are basic identical, and difference is only to have arranged a switch S w1, replaces three switch S w1a to Sw1c (for example, channel length L=3 μ m).
In structure shown in Figure 5, the drain and gate of drive controlling element Dr only connects by a switch S w1.For this reason, in light emissioning cycle, the source electrode of drive controlling element Dr all puts between the source electrode and drain electrode of switch S w1 to grid voltage.Therefore, when adopting structure shown in Figure 5, in light emissioning cycle, electric charge easily moves between the drain and gate of drive controlling element Dr, and the brightness that for example causes showing slinkingly the aspect element increases.In addition, if short circuit occurs between the source electrode of switch S w1 and drain electrode, then produce picture element defect.
On the other hand, in structure shown in Figure 4, the drain and gate of drive controlling element Dr connects to Sw1c by three switch S w1a of series connection.For this reason, in light emissioning cycle, the drain-to-gate voltage of drive controlling element Dr is assigned to three switch S w1a to Sw1c.Therefore, when adopting structure shown in Figure 4, in light emissioning cycle, electric charge is difficult between the drain and gate of drive controlling element Dr and moves.Therefore, as mentioned above, can suppress to show slinkingly any brightness increase of aspect element.
In the structure shown in the Figure 4 and 5, when the size of sweep signal becomes high level when stopping write cycle from low level, following phenomenon appears.
In structure shown in Figure 5, it is the capacitor that is connected between the grid of scan signal line Scan1 and drive controlling element Dr that switch S w1 shows as it.Change to from low level the process of high level in the size with sweep signal, electric charge is difficult between the drain and gate of drive controlling element Dr and moves.For this reason, the size along with sweep signal changes to high level from low level, the grid potential rising of drive controlling element Dr.But, in structure shown in Figure 5, because the electrostatic capacitance of this capacitor is significantly smaller than the electrostatic capacitance of capacitor C1, so the grid potential shift amount is very little.Therefore, grid potential moves the influence of image quality less.
On the other hand, in structure shown in Figure 4, because switch S w1a has identical threshold value to Sw1c, the switching from the conducting state to the not on-state is carried out simultaneously.For this reason, be set in not on-state up to switch S w1a fully to Sw1c, they just show as seems three capacitors in parallel between the control end of scan signal line Scan1 and drive controlling element Dr.In structure shown in Figure 4, the grid potential amount of movement is bigger three times than the grid potential amount of movement in Fig. 5 structure approximately.Structure according to shown in Figure 4 moves according to grid potential, mistake can occur showing.
On the contrary, in this embodiment, with compare among rest switch Sw1b and the Sw1c, cause (termination) switching from the conducting state to the not on-state according to the sweep signal size variation in switch S w1a earlier, wherein switch S w1a is a plurality of switch S w1a of comprising among the switches set SwG in the Sw1c one and be positioned at the control of the drive controlling element Dr end on distolateral.For example by design switch S w1a to Sw1c so that the threshold value of the threshold ratio switch S w1b of switch S w1a and Sw1c is darker, carry out timing and control.For example by setting as switch S w1a to the transistorized channel length La of Sw1c to Lc to satisfy inequality: the relation that La＞Lb and La＞Lc are given, carry out this threshold value control, as shown in Figure 3.
Under this timing control, it seems the capacitor that is connected to the grid of drive controlling element Dr that switch S w1a shows as, as above described with reference to figure 4.But, when switch S w1a is set in not on-state, the gate insulator of switch S w1b and Sw1c and drive controlling element Dr.For this reason, subsequently, the grid potential that switch S w1b and Sw1c will not mobile drive controlling element Dr.Ideally, in Sw1c, only switch S w1a causes that grid potential moves at switch S w1a.
When switch S w1a was considered to be connected in capacitor between the grid of scan signal line Scan1 and drive controlling element Dr, electrostatic capacitance and channel length La were proportional.For this reason, when adopting structure (La=4.5 μ m) shown in Figure 3, the influence that switch S w1a moves grid potential is about 1.5 times in the structure shown in Figure 4 (La=3 μ m).But, as mentioned above, when adopting structure shown in Figure 4, the grid potential of switch S w1a but also switch S w1b and the also mobile drive controlling element of Sw1c Dr not only.As a result, when adopting structure (La=4.5 μ m) shown in Figure 3, the grid potential amount of movement is about 1/2 in the structure shown in Figure 4 (La=Lb=Lc=3 μ m).
As mentioned above, according to present embodiment, can the sup.G current potential any more mobile, therefore, can move any demonstration mistake that causes by the sup.G current potential.Like this, according to present embodiment, any grid potential that can suppress the drive controlling element that leakage current causes changes, and the switch that is connected between the grid of drive controlling element Dr and drain electrode is in the OFF state simultaneously.In addition, according to present embodiment, by the OFF timing of each switch among the gauge tap group SwG, any grid potential of the drive controlling element Dr that voltage breakdown causes in the time of can suppressing cut-off switch changes.Therefore, can realize very high display quality.
In this embodiment, to Sw1c, the threshold value that is positioned at the switch S w1a at the control of the drive controlling element Dr place, end on distolateral preferably differs about 0.1 with those of rest switch Sw1b and Sw1c and arrives 0.8V for a plurality of switch S w1a of series connection.If threshold value is controlled by channel length, the channel length of switch S w1a preferably is about 1.3 to 3.0 times of channel length of rest switch Sw1b and Sw1c.When threshold value and channel length drop in the above scope, can switch S w1a and switch S w1b and Sw1c be switched to not on-state from conducting state by fully different timing, keep the source electrode of switch S w1a in the conducting state and the enough little resistance value between drain electrode simultaneously.
In above-mentioned example, utilize channel length, threshold value changes between switch S w1a and switch S w1b and Sw1c.Threshold value also can change by other method.For example, can between switch S w1a and switch S w1b and Sw1c, change impurity dose.For example, when the p-channel TFT was used as switch S w1a to Sw1c, the p type impurity dose in the raceway groove of switch S w1b and Sw1c was set to greater than the p type impurity dose in the switch S w1a raceway groove.Therefore, the threshold value of the comparable switch S w1a of threshold value of switch S w1b and Sw1c is more shallow.Like this, the threshold value of the threshold ratio switch S w1b of switch S w1a and Sw1c is darker.
Switch S w1a with different impurities dosage for example can form by the following method to Sw1c.In the normal TFT forming process, the number of times of impurity is configured to greater than in the channel region of switch S w1a in the channel region of switch S w1b and Sw1c.For example, at first at switch S w1a impurity in the channel region of Sw1c.Then, utilize the channel region of photoresist mask switch S w1a.Impurity in the channel region of switch S w1b and Sw1c once more.Adopt this process, the impurity dose in the raceway groove of switch S w1b and Sw1c is greater than the dosage of the p type impurity in the switch S w1a raceway groove.
When utilizing impurity dose between switch S w1a and switch S w1b and Sw1c, to change threshold value, the dosage advantageous variant about 1 * 10 between switch
11Cm
-2To 5 * 10
11Cm
-2In this case, compare with Sw1c with switch S w1b, switch S w1a can more earlier be set in not on-state.
Can be different with the threshold value of switch S w1b and Sw1c by the threshold value of another method change switch S w1a.
Fig. 6 is (a plurality of switch S w1a that comprise among the switches set SwG to Sw1c in) switch S w1b of schematically illustrated can be used for and Sw1c and get rid of the cut-open view of structure example of the switch of the end of the control that is positioned at drive controlling element Dr on distolateral.Fig. 7 schematically shows and can be used for the cut-open view of structure example that (a plurality of switch S w1a that comprise among the switches set SwG to Sw1c in) are positioned at the switch S w1c of the control of the drive controlling element Dr end on distolateral.
Switch shown in Figure 6 is upper gate (top-gate) type p channel TFT.This TFT comprises semiconductor layer, wherein is formed with source electrode 50a, drain electrode 50b and raceway groove 50c.The impurity of scheduled volume is injected source electrode 50a and drain electrode 50b.Raceway groove 50c is formed between source electrode and the drain electrode.Raceway groove 50c is an intrinsic.Perhaps, compare with drain electrode 50b with source electrode 50a, impurity injects raceway groove 50c with lower concentration.Gate insulating film 52 is formed on the raceway groove 50c.Grid G is arranged on the gate insulating film 52.Grid G is covered by interlayer dielectric film 54.Source electrode S and drain electrode D are formed on the interlayer dielectric film 54.Source electrode S and drain electrode D are connected respectively to source electrode 50a and drain electrode 50b via the through hole that forms in gate insulating film 52 and the interlayer dielectric film 54.
The structure of switch shown in Figure 7 and switch shown in Figure 6 are basic identical, and its difference is that dielectric film 59 is formed under the raceway groove 50c, and back grid BG is arranged under the dielectric film 59.The darker biasing of threshold value of switch S w1a is put on the grid BG of back.For example, the voltage between the source electrode 50a of switch S w1a and back grid BG is set to pact+2.0V and arrives+1.0V.
When structure shown in Figure 6 being used for switch S w1b and Sw1c and structure shown in Figure 7 is used for switch S w1a, the threshold ratio switch S w1b of switch S w1a and the threshold value of Sw1c are darker.Even in this case, switch S w1a can earlier be set in not on-state than switch S w1b and Sw1c.
Fig. 6 and 7 shows upper gate type TFT.Replace, also the bottom grid film transistor can be used as switch S w1a to Sw1c.In this case, when the back grid structure was used for switch S w1a, the threshold value of its threshold ratio switch S w1b and Sw1c was darker.Here, back grid is represented via the gate insulating film grid relative with control end with semiconductor layer.
In the above-described embodiments, switches set SwG comprises that three switch S w1a are to Sw1c.The number of switches that comprises among the switches set SwG can be two or more.In above embodiment, the p channel transistor can be used as all switches among the pixel PX.But, also can use the n channel transistor.Perhaps can mix p raceway groove and n channel transistor.
As mentioned above, the grid of drive controlling element Dr is connected to the switches set SwG of Sw1c with a plurality of switch S w1a of drain electrode by containing series connection.Therefore, can suppress the grid potential variation of drive controlling element Dr in the light emissioning cycle effectively.Therefore, can suppress any display operation mistake of not expecting.
Control end among the switches set SwG is connected to identical control line Scan1 and is controlled by identical sweep signal.In this case, in Sw1c, the threshold value of the switch S w1a at the place, end on the gate electrode side of drive controlling element Dr is set to darker than the threshold value of rest switch Sw1b and Sw1c at the switch S w1a of switches set SwG.Therefore, with comparing among rest switch Sw1b and the Sw1c, earlier cause the switching from the conducting state to the not on-state among the switch S w1a at the place, end on the gate electrode side of drive controlling element Dr according to the size variation of sweep signal.Therefore, the grid potential of not expecting that can minimize the drive controlling element Dr that the end of write cycle occurs changes, and can carry out gratifying display operation.
Then second embodiment of the present invention will be described.
In first embodiment, by the threshold value among the gauge tap group SwG, the switch S w1a that comprises among the switches set SwG is in Sw1c, and the switch S w1a on the gate electrode side of drive controlling element Dr is controlled so as to than rest switch Sw1b and Sw1c and earlier disconnects.In a second embodiment, the waveform that offers the sweep signal of switches set SwG by control realize with first embodiment in identical effect.
Fig. 8 is the planimetric map that schematically shows according to the OLED display of second embodiment of the invention.Fig. 9 illustrates the equivalent circuit diagram that can be used for adoptable pixel circuit example in the OLED display shown in Figure 8.With reference to figure 8, label AA represents the viewing area.
In the OLED display 1 according to second embodiment, each pixel PX has the delay element Dly that postpones and export input signal.In a second embodiment, the switch S w1a that comprises among the switches set SwG is controlled by delay element Dly to the OFF timing of Sw1c.
The switch S w1a that comprises among the switches set SwG is in Sw1c, and the control end of the switch S w1a at the place, end on the control of drive controlling element Dr is distolateral is directly connected to scan signal line Scan1, and it is provided to pixel PX with the sweep signal input end.Rest switch Sw1b that comprises among the switches set SwG and the control end of Sw1c are connected to scan signal line Scan1 via delay element Dly.
In this embodiment, if with in switch S w1b and Sw1c, compare the more switching of early stopping from the conducting state to the not on-state in switch S w1a, then switch S w1a can have identical channel region or different channel regions to Sw1c.Like this, switch S w1a can equate or difference to Lc to the channel length La of Sw1c.In addition, switch S w1a can have identical channel width or different channel widths to Sw1c.
As an example, the channel length La of switch S w1a is configured to shorter than the channel length Lc of the channel length Lb of switch S w1b and switch S w1c.For example, channel length La is configured to 3 μ m, and channel length Lb and Lc are configured to 4 to 9 μ m.Switch S w1a is set to 3 μ m to the channel width of Sw1c.
The switch S w1a that comprises in switches set SwG should postpone the switch S w1b of its OFF timing and the control end of Sw1c and be connected to sweep trace by delay element Dly in Sw1c.Adopt this structure, even the switch S w1a that comprises in switches set SwG is connected to identical scan signal line Scan1 to the control end of Sw1c, compare with Sw1c with rest switch Sw1b, in the switch S w1a of the gate electrode side that is connected to drive controlling element Dr, earlier cause the switching from the conducting state to the not on-state according to the size variation of sweep signal.Even in this embodiment, can obtain with first embodiment in identical effect.
In this embodiment, and compare among the switch S w3, earlier stop the switching from the conducting state to the not on-state among the switch S w1a.For example shown in Fig. 8 and 9, this can be connected to scan signal line Scan1 with the control end of switch S w3 by delay element Dly and be achieved.
Pixel PX shown in Figure 9 is used as delay element Dly with resistive element.The resistance of resistive element is several G Ω, for example about 1 to 2G Ω.The scope of resistive element for example is about 400 to 1000 μ m
-2
Can will for example have semiconductor layer by LDD (lightly doped drain) structure that forms with the low concentration implanted dopant or intrinsic semiconductor layer as resistive element.Here, low concentration is represented the lower impurity concentration of impurity concentration than injection in the source electrode of thin film transistor (TFT) and the drain electrode, for example about 1 * 10
11Cm
-2To 5 * 10
11Cm
-2Impurity concentration.Described concentration can equal the concentration in the raceway groove of thin film transistor (TFT).When using intrinsic semiconductor layer, can make the scope of delay element Dly littler.For example, when the TFT with upper gate type structure of utilizing polysilicon is used as switch and drive controlling element Dr, and polysilicon layer is during as the semiconductor layer that comprises among the delay element Dly, and the TFT manufacturing process can partly be used to make resistive element.
Then the driving method of OLED display 1 will be described with reference to Figure 10 and 11.
Figure 10 is the sequential chart that the driving method example of OLED display shown in Figure 8 is shown.Figure 11 illustrates to the input of the signal (solid line) of delay element shown in Figure 9 with from the diagrammatic sketch of the waveform example of signal (dotted line) output of delay element.
With reference to Figure 10, " Clk a " and " Start a " represents that respectively clock signal and slave controller CNT offer the waveform of the commencing signal of sweep signal line drive YDR." Data " represents a state, and wherein the vision signal that is provided to video signal cable Data from sweep signal line drive YDR changes each horizontal scanning period." Scan1 " and " Scan2 " expression offers the waveform of the sweep signal of scan signal line Scan1 and Scan2 respectively from sweep signal line drive YDR.With reference to Figure 10, for ease of explanation, the waveform of signal is a rectangle.In fact, because line resistance and electric capacity, the forward position of signal and back are along relaxing.
Sweep signal line drive YDR generates a pulse by clock signal and commencing signal, and it has and the corresponding width Tw-Starta of each horizontal scanning period.Clock signal line drive YDR sequentially offers scan signal line with this pulse, and as the ON signal, it is set in conducting state with switch S w1a to Sw1c and Sw3.The signal that sweep signal line drive YDR sequentially will transform the pulse acquisition offers scan signal line Scan2, and as the OFF signal, it is set in not on-state with switch S w2.
Shown in the sequential chart of Figure 10, can drive by the method identical with the method described among first embodiment according to the OLED display 1 of this embodiment.
In this embodiment, the control end that connects scan signal line Scan1 and switch S w1b, Sw1c and Sw3 by delay element Dly.Resistive element is as delay element Dly.As shown in figure 11, delay element Dly relaxes the forward position and the edge, back of the sweep signal that receives, and this sweep signal is outputed to the control end of switch S w1b, Sw1c and Sw3.On the other hand, be provided for the control end of switch S w1a with the identical sweep signal that is input to delay element Dly.
For example, even when the threshold value of the threshold value of switch S w1a and switch S w1b, Sw1c and Sw3 almost is equal to each other, by the OFF signal is provided to scan signal line Scan1 from sweep signal line drive YDR, the also comparable switch S w1b of switch S w1a, Sw1c and Sw3 earlier are set in not on-state.
In this embodiment, the channel region of switch S w1a can be less than the channel region of switch S w1b and switch S w1c.For example, as above art, switch S w1a can have identical channel width to Sw1c, and the channel length Lc of the channel length Lb of the comparable switch S w1b of channel length La of switch S w1a and switch S w1c is shorter.
Described in first embodiment, when be provided to from scan signal line Scan1 switch S w1a to the size of the sweep signal of Sw1c grid when low level becomes high level, because the stray capacitance between the grid of switch S w1a and drain electrode, the grid potential of drive controlling element Dr moves.At the channel region that makes switch S w1a hour, can reduce the grid potential amount of movement.Therefore, can more effectively avoid because grid potential moves any demonstration mistake that causes.
When the channel length of switch S w1a than the channel length of switch S w1b, Sw1c and Sw3 more in short-term, threshold ratio switch S w1b, the Sw1c of switch S w1a and the threshold value of Sw3 are more shallow.If be input to the waveform of signal of delay element Dly and less, then be difficult among the switch S w1a than the switching of in switch S w1b, Sw1c and Sw3, earlier finishing from the conducting state to the not on-state from the difference between the waveform of the signal of delay element Dly output.
When the bigger resistive element of resistance during, can make the waveform of the signal that is input to delay element Dly and bigger from the difference between the waveform of the signal of delay element Dly output as delay element Dly.For in switch S w1a than the switching of in switch S w1b, Sw1c and Sw3, earlier finishing from the conducting state to the not on-state, the resistive element that resistance is enough big is as delay element Dly.
When resistive element when the delay element Dly, can change the time lag of the OFF operation room of the OFF operation of switch S w1a and switch S w1b and Sw1c according to the resistance of delay element Dly.Time lag for example be set to 0.2 μ s or more than, more preferably be 1 μ s or more than.
In above example, resistive element is used as delay element Dly.Can change the signal waveform that is provided to the signal waveform of switch S w1a and is provided for switch S w1b and Sw1c by other method.For example, can be with diode as delay element Dly.
Figure 12 is the equivalent circuit diagram that another example of the pixel circuit that can be used by OLED display shown in Figure 8 is shown.
In pixel PX shown in Figure 12, connect into forward current is offered the diode of scan signal line Scan1 as delay element Dly from the control end of switch S w1b, Sw1c and Sw3.When pixel circuit shown in Figure 12 is used for OLED display 1 shown in Figure 8, can be by the same procedure driving display of describing among first embodiment or with reference to Figure 10 1.
Figure 13 illustrates the signal that is input to delay element shown in Figure 12 and from the diagrammatic sketch of the waveform example of the signal of this delay element output.
As shown in figure 13, when diode was used as delay element Dly, when the sweep signal that is provided to scan signal line Scan1 from sweep signal line drive YDR descended, forward current flow to delay element Dly.For this reason, the ON signal is offered the control end of switch S w1b, Sw1c and Sw3, and without any postponing or having from the less delayed on the back edge of sweep signal.When sweep signal rises, reverse bias is applied to delay element Dly, and leakage current flows to delay element Dly.For this reason, the OFF signal is offered the control end of switch S w1b, Sw1c and Sw3, and have from the delay in the forward position of sweep signal.Like this, even in pixel circuit shown in Figure 12, the OFF signal of control end that is provided to switch S w1b, Sw1c and Sw3 is from the OFF signal delay of the control end that offers switch S w1a.In addition, in this example, can obtain and the identical effect described in first embodiment.
When diode when the delay element Dly, can postpone the OFF signal and postpone the ON signal hardly., compare with the situation that the OFF signal all postpones for this reason, can carry out high speed and write with the ON signal.
In this embodiment, the TFT (that is, the TFT that diode connects) that grid is connected to source electrode can be used as delay element Dly, for example as shown in figure 12.
When the TFT of diode connection was used as delay element Dly, delay element Dly and switch S w1a can form in identical process simultaneously to Sw1c, Sw2 and Sw3.
When the TFT of diode connection is used as delay element Dly, can regulate the delay size of ON signal and the delay size of OFF signal according to the channel width W of the TFT that is used as delay element Dly and the ratio W/L of channel length L.
Can change the signal waveform that offers switch S w1a from the signal waveform that offers switch S w1b and Sw1c by another kind of method.For example, a pair of diode connected in parallel can be used as delay element Dly.
Figure 14 is the equivalent circuit diagram that another example that can be used for the pixel circuit in the OLED display shown in Figure 8 is shown.
In pixel PX shown in Figure 14, diode connected in parallel Da and Db are as delay element Dly between the control end of signal wire Scan1 and switch S w1b, Sw1c and Sw3.Diode Da connects into forward current is offered scan signal line Scan1 from the control end of switch S w1b, Sw1c and Sw3.Diode Db connects into the control end that forward current is offered switch S w1b, Sw1c and Sw3 from scan signal line Scan1.When pixel circuit shown in Figure 14 was used for OLED display 1 shown in Figure 8, display 1 can be by driving among first embodiment or with reference to the same procedure that Figure 10 describes.
Figure 15 illustrates the signal (solid line) that is input to delay element shown in Figure 14 and from the diagrammatic sketch of the waveform example of the signal (dotted line) of this delay element output.
As shown in figure 15, as diode Da and Db during as delay element Dly, when the sweep signal that offers scan signal line Scan1 from sweep signal line drive YDR descended, forward current flow to diode Da.The ON signal is offered the control end of switch S w1b, Sw1c and Sw3, wherein have from the delay on the back edge of sweep signal.When this sweep signal rose, forward current flow to diode Db.The OFF signal is offered the control end of switch S w1b, Sw1c and Sw3, wherein have from the delay in the forward position of sweep signal.Like this, equally in this example, can obtain and the identical effect described in first embodiment.
In this example, flow to ON signal and the OFF signal of the forward current of diode Da and Db as the control end that offers switch S w1b, Sw1c and Sw3.For this reason, the delay of OFF signal is controlled in the delay that can be independent of the ON signal.
In this example, the TFT that diode connects can be used as diode Da and Db, for example as shown in figure 14.When the p channel TFT of diode connection was used as diode Da and Db, diode Da and Db and switch S w1a can form in identical process simultaneously to Sw1c, Sw2 and Sw3.
When the TFT of diode connection is used as diode Da and Db, can regulate the delay size of ON signal and the delay size of OFF signal according to the channel width W of the TFT that is used as diode Da and Db and the ratio W/L of channel length L.
Then, the third embodiment of the present invention will be described.In a second embodiment, pixel PX adopts the current drive-type pixel circuit.In the 3rd embodiment, pixel PX adopts the voltage driven type pixel circuit.Except this point, the 3rd embodiment is identical with second embodiment.
Figure 16 illustrates the equivalent circuit diagram that a third embodiment in accordance with the invention can be used for the pixel circuit example in the active matrix OLED display.Pixel PX comprises organic EL OLED, drive controlling element Dr, capacitor C1, capacitor C2, delay element Dly, passes through switches set SwG, switch S w2 and switch S w3 that a plurality of switches of series connection form.As an example, switches set SwG comprises that three switch S w1a are to Sw1c.As an example, the p channel TFT is used as drive controlling element Dr, switch S w1a to Sw1c, switch S w2 and switch S w3.
Drive controlling element Dr, switch S w2 and organic EL OLED are series between power lead Vdd and the power lead Vss in this order.
The end of capacitor C1 is connected to the control end of drive controlling element Dr.Capacitor C1 keeps the grid of driver control element Dr and the potential difference (PD) between source electrode, and it is corresponding to input signal.Capacitor C1 is connected between power lead Vdd and the grid as the control end of drive controlling element Dr.
Switch S w1a is series between the described end of the control end of drive controlling element Dr and drive controlling element Dr to Sw1c, and it is connected to switch S w2.The control end of switch S w1a is directly connected to scan signal line Scan1.On the other hand, the control end of switch S w1b and Sw1c is connected to scan signal line Scan1 by delay element Dly.
The control end of switch S w2 is connected to scan signal line Scan2.
Switch S w3 and capacitor C2 are series between the control end of video signal cable Data and drive controlling element Dr.The control end of switch S w3 is connected to scan signal line Scan1 by delay element Dly.
When pixel PX adopts pixel circuit shown in Figure 16, use video signal line driving circuit XDR, it can offer video signal cable Data as vision signal with voltage signal.
In OLED display 1, substrate 2, scan signal line Scan1 and Scan2, video signal cable Data, power lead Vdd, switch S w1a be to Sw1c, Sw2 and Sw3, drive controlling element Dr, and capacitor C1 and C2, and delay element Dly forms active-matrix substrate.This active-matrix substrate also can comprise sweep signal line drive YDR and vision signal line drive XDR.This active-matrix substrate also can comprise the electrode of each organic EL OLED.
The OLED display 1 that employing is used for the pixel circuit shown in Figure 16 of pixel PX for example can be driven by following method.
In write cycle, at first, the ON signal that switch S w1a is set in selection mode to Sw1c and Sw3 is provided to the scan signal line Scan1 that links to each other with selected pixel PX from sweep signal line drive YDR.In addition, the OFF signal that switch S w2 is set in without selection mode is provided for the scan signal line Scan2 that links to each other with pixel PX.Therefore, switch S w2 is set in not on-state, and switch S w1a is set in conducting state to Sw1c and Sw3.
Under this state, the current potential of video signal cable Data is set in reset signal voltage Vrst by vision signal line drive XDR.Because switch S w1a is in conducting state to Sw1c, the potential difference (PD) (grid is to source voltage) between the control end of power lead Vdd and drive controlling element Dr is set to the threshold voltage vt h of drive controlling element Dr.
After this, switch S w1a is provided for scan signal line Scan1 to the OFF signal that Sw1c and Sw3 are set in without selection mode.At first, switch S w1a is set in not on-state.Then, switch S w1b, Sw1c and Sw3 are set in not on-state.After being set in not on-state, switch S w1a in switch S w3 is set in the cycle of not on-state, vision signal Vin is offered video signal cable Data from vision signal line drive XDR.If the electrostatic capacitance of capacitor C1 and C2 is equal to each other, then the grid potential of drive controlling element Dr changes an amount from threshold voltage vt h, and this amount equates with variable quantity from Vrst to Vin.
Then, the ON signal that switch S w2 is set in selection mode is provided for scan signal line Scan2, so that switch S w2 is set in conducting state.Because the grid of setting drive controlling element Dr as described above is to source voltage, size flows to organic EL OLED corresponding to the electric current of the difference of Vrst and Vin.Therefore, beginning light emissioning cycle.Light emissioning cycle continues, and begins up to next write cycle.
In this embodiment, the end of the drive controlling element Dr that links to each other with switch S w2 and the control end of drive controlling element Dr (that is the drain and gate of drive controlling element Dr) interconnect to Sw1c by a plurality of switch S w1a of series connection.For this reason, as in first embodiment, in light emissioning cycle, electric charge is difficult between the drain and gate of drive controlling element Dr and moves, and can sup.G any variation in the source voltage.
In this embodiment, switch S w1a earlier is set in not on-state than switch S w1b and Sw1c.Even in this embodiment, as in first embodiment, also can the sup.G current potential any more mobile.
Like this, equally in this embodiment, can obtain with first embodiment in identical effect, and can realize very high display quality.
In this embodiment, can use and to be independent of switch S w1a to the operation of Sw1c and the structure of the operation of gauge tap Sw3.For example, by using scan signal line Scan1, can gauge tap Sw1a to the operation of Sw1c, and can be independent of scan signal line Scan1 the scan signal line that gauge tap Sw3 operates is set.
In this embodiment, resistive element for example shown in Figure 16 can be used as delay element Dly.Perhaps, the diode described in second embodiment can be used as delay element Dly.
Then, the fourth embodiment of the present invention will be described.
In first to the 3rd embodiment, the switch that comprises among the switches set SwG is connected to identical control line.In the 4th embodiment, be independent of the control line that links to each other with the control end of rest switch, the control line be connected to switch (one of switch that comprises among the switches set SwG and be positioned at end on the gate electrode side of drive controlling element Dr) control end is set.In the 4th embodiment, adopt this structure, can realize with first to the 3rd embodiment in identical effect.
Figure 17 illustrates the equivalent circuit diagram that can be used for the pixel circuit example in the active matrix OLED display according to fourth embodiment of the invention.In this example, each switches set SwG comprises switch S w1a and Sw1b.In this example, scan signal line Scan1a is set, replaces scan signal line Scan1 to Scan1c.
The control end of switch S w3 is connected to scan signal line drive circuit YDR by scan signal line Scan1a.The control end of switch S w1a is connected to scan signal line drive circuit YDR by scan signal line Scan1b.The control end of switch S w1b is connected to scan signal line drive circuit YDR by scan signal line Scan1c.As an example, the p channel TFT is as switch S w1a, Sw1b, Sw2 and Sw3 and drive controlling element Dr.
The driving method of OLED display 1 then, is described with reference to Figure 18.
Figure 18 is the sequential chart of driving method example that the OLED display of the pixel circuit shown in Figure 17 that is used for pixel is shown.With reference to Figure 18, " Scan1a ", " Scan1b ", " Scan1c " and " Scan2 " represent to be provided to from sweep signal line drive YDR the waveform of the sweep signal of scan signal line Scan1a, Scan1b, Scan1c and Scan2 respectively.
During write operation, at first, the OFF signal (sweep signal of high level in this case) that switch S w2 is set in without selection mode offers the scan signal line Scan2 that links to each other with selected pixel PX from sweep signal line drive YDR.In this state, the ON signal (low level sweep signal in this case) that switch S w1a, Sw1b and Sw3 is set in selection mode is provided for the scan signal line Scan1a that links to each other with pixel PX to Scan1c.Therefore, switch S w2 is set in not on-state, and switch S w1a, Sw1b and Sw3 are set in conducting state.
In this case, the steady current that size equals vision signal electric current I in is provided to conducting path by vision signal line drive XDR, via drive controlling element Dr, switch S w3 and video signal cable Data from power lead Vdd to vision signal line drive XDR.Because switch S w1a and Sw1b are in conducting state, the potential difference (PD) (grid is to source voltage) between the control end of power lead Vdd and drive controlling element Dr is set in the corresponding value with electric current I in.
After this, at first, the OFF signal (in this case, the sweep signal of high level) that switch S w1a is set in without selection mode offers scan signal line Scan1b, so that switch S w1a is set in not on-state.Then, the OFF signal (in this case, the sweep signal of high level) that switch S w1b is set in without selection mode offers scan signal line Scan1c, so that switch S w1b is set in not on-state.At last, the OFF signal (in this case, the sweep signal of high level) that switch S w3 is set in without selection mode offers scan signal line Scan1a, so that switch S w3 is set in not on-state.
The grid of the drive controlling element Dr that sets accordingly with electric current I in is kept by capacitor C1 to source voltage.Therefore, finish write cycle.
Then, the ON signal (in this case, low level sweep signal) that switch S w2 is set in selection mode is provided for scan signal line Scan2, so that switch S w2 is set in conducting state.Because the grid of setting drive controlling element Dr as described above is to source voltage, the size electric current of electric current I in no better than flows to organic EL OLED.Therefore, light emissioning cycle begins.It should be noted that light emissioning cycle lasted till in next write cycle begins prerequisite for the OFF signal that switch S w2 is set in without selection mode.
Equally in this embodiment, can obtain the effect identical, and can realize very high display quality with first embodiment.
In this embodiment, the channel area of switch S w1a is littler than the channel area of switch S w1b.For example, switch S w1a can have identical channel width with Sw1b, and the channel length La of switch S w1a is shorter than the channel length Lb of switch S w1b.Adopt this structure, described in second embodiment, can more effectively avoid the grid potential of drive controlling element Dr to change.
In the 4th embodiment, in order to reduce the quantity of sweep trace, but common land uses the sweep trace of the blocked operation of the part of scanning line of blocked operation of gauge tap group SwG and gauge tap Sw3.
Figure 19 illustrates the equivalent circuit diagram of another example that a fourth embodiment in accordance with the invention can be used for the pixel circuit of OLED display.In pixel circuit shown in Figure 19, the control end of switch S w1b is connected to scan signal line Scan1a, and has saved scan signal line Scan1c.
Figure 20 is the sequential chart of driving method example that the OLED display of the pixel circuit shown in Figure 19 that is used for pixel is shown.More obvious as by between Figure 18 and 20, except switch S w1b and Sw3 utilize scan signal line Scan1a to carry out blocked operation simultaneously, the OLED display 1 that is used for the pixel circuit shown in Figure 19 of pixel can be driven by the identical method of the method for describing with reference Figure 18.Therefore, equally in this embodiment, can obtain with reference to Figure 17 and 18 same effect of describing.
When the TFT by different conduction types forms switch S w2 and Sw3, can further reduce the quantity of sweep trace.
Figure 21 illustrates the equivalent circuit diagram of another example that a fourth embodiment in accordance with the invention can be used for the pixel circuit of OLED display.In this example, the control end of switch S w1b and Sw2 is connected to scan signal line Scan1a, and has saved scan signal line Scan1c and Scan2.In this example, the transistor of identical conduction type is as switch S w1b and Sw3.As an example, the p channel TFT is as drive controlling element Dr and switch S w1a, Sw1b and Sw3, and the n channel TFT is as switch S w2.
Figure 22 is the sequential chart of driving method example that the OLED display of the pixel circuit shown in Figure 21 that is used for pixel is shown.More obvious as by between Figure 20 and 22, except by by scan signal line Scan1a identical sweep signal being offered switch S w1b, Sw2 and Sw3 controls blocked operation, the OLED display 1 that is used for the pixel circuit shown in Figure 21 of pixel can be driven by the identical method of the method for describing with reference Figure 20.Therefore, even in this example, also can obtain the effect of describing with reference to Figure 17 to 20.
Then, the fifth embodiment of the present invention will be described.In the 4th embodiment, pixel PX adopts the current drive-type pixel circuit.In the 5th embodiment, pixel PX adopts the voltage driven type pixel circuit.Except this point, the 5th embodiment is identical with the 4th embodiment.
Figure 23 is the equivalent circuit diagram that the pixel circuit example that can be used by OLED display is shown according to a fifth embodiment of the invention.Pixel PX comprises organic EL OLED, drive controlling element Dr, capacitor C1, capacitor C2, passes through switches set SwG, switch S w2 and switch S w3 that a plurality of switches of series connection form.As an example, switches set SwG comprises two switch S w1a and Sw1b.As an example, the p channel TFT is as drive controlling element Dr, switch S w1a, Sw1b and Sw2, and the n channel TFT is as switch S w3.
Drive controlling element Dr, switch S w2 and organic EL OLED are series between power lead Vdd and the power lead Vss in this order.
Capacitor C1 is connected between power lead Vdd and the grid as the control end of drive controlling element Dr.
Switch S w1a and Sw1b be series at the control end of drive controlling element Dr and an end of the drive controlling element that links to each other with switch S w2 between.The control end of switch S w1a is directly connected to scan signal line Scan1b.On the other hand, the control end of switch S w1b is connected to scan signal line Scan1c.
The control end of switch S w2 is connected to scan signal line Scan2.
Switch S w3 and capacitor C2 are series between the control end of video signal cable Data and drive controlling element Dr.The control end of switch S w3 is connected to scan signal line Scan1a.
When pixel PX adopts pixel circuit shown in Figure 23, use video signal line driving circuit XDR, it can offer video signal cable Data as vision signal with voltage signal.
The OLED display 1 that is used for the pixel circuit shown in Figure 23 of pixel PX in employing, substrate 2, scan signal line Scan1a are to Scan1c and Scan2, video signal cable Data, power lead Vdd, switch S w1a, Sw1b, Sw2 and Sw3, drive controlling element Dr and capacitor C1 and C2 formation active-matrix substrate.This active-matrix substrate also can comprise sweep signal line drive YDR and vision signal line drive XDR.This active-matrix substrate also can comprise the electrode of each organic EL OLED.
Then, will the driving method of OLED display 1 be described.
Figure 24 is the sequential chart of driving method example that the OLED display of the pixel circuit shown in Figure 23 that is used for pixel is shown.
In write cycle, at first, the ON signal that switch S w1a, Sw1b and Sw3 is set in selection mode is provided to the scan signal line Scan1a that links to each other with selected pixel PX to Scan1c from sweep signal line drive YDR.In addition, the OFF signal that switch S w2 is set in without selection mode is provided for the scan signal line Scan2 that links to each other with pixel PX.Therefore, switch S w2 is set in not on-state, and switch S w1a, Sw1b and Sw3 are set in conducting state.
In this state, the current potential of video signal cable Data is set to reset signal voltage Vrst by vision signal line drive XDR.Because switch S w1a and Sw1b are in conducting state, the potential difference (PD) (grid is to source voltage) between the control end of power lead Vdd and drive controlling element Dr is set in the threshold voltage vt h of drive controlling element Dr
After this, the OFF signal that switch S w1a is set in without selection mode is provided for scan signal line Scan1b.Then, the OFF signal that switch S w1b is set in without selection mode is provided for scan signal line Scan1c, so that switch S w1b is set in not on-state.
Subsequently, vision signal Vin is provided to video signal cable Data from vision signal line drive XDR.For example, if the electrostatic capacitance of capacitor C1 and C2 is equal to each other, the grid potential of drive controlling element Dr changes an amount from threshold voltage vt h, and this amount equals the variable quantity from Vrst to Vin.
Then, the OFF signal that switch S w3 is set in without selection mode is provided for scan signal line Scan1a, so that switch S w3 is set in not on-state.Simultaneously, the ON signal that switch S w2 is set in selection mode is provided for scan signal line Scan2, so that switch S w2 is set in conducting state.Because the grid of setting drive controlling element Dr as described above is to source voltage, size flows to organic EL OLED corresponding to the electric current of the difference of Vrst and Vin.Therefore, light emissioning cycle begins.It should be noted that light emissioning cycle lasts till that begin next write cycle.
As obvious by above description, equally in this embodiment, can obtain with first embodiment in identical effect, and can realize very high display quality.
Figure 25 is the cut-open view that schematically shows spendable structure example in the organic EL plate of first to the 5th embodiment according to the present invention.Figure 25 shows switch S w1a, the drive controlling element Dr of OLED display DP and the cross section of organic EL OLED.
Organic EL plate DP comprises printing opacity insulated substrate 2, such as glass substrate.The light that sends from organic EL OLED for example obtains by printing opacity insulated substrate 2 outside organic EL plate DP.
The semiconductor layer that forms pattern is arranged on the insulated substrate 2.These semiconductor layers for example are polysilicon layers.
In each semiconductor layer, form source electrode 50a and the drain electrode 50b of TFT, separate each other simultaneously.Regional 50c in the semiconductor layer between source electrode 50a and the drain electrode 50b is used as raceway groove.
Second conductive pattern is formed on the dielectric film 54.Second conductive pattern is as second electrode, video signal cable Data and the interconnection that is connected these parts of source electrode S, drain electrode D, capacitor C1.Source electrode S and drain electrode D are connected to source electrode 50a and the drain electrode 50b of TFT respectively via the through hole that forms in dielectric film 52 and 54.
The anode 62 of passivating film 56 and organic EL OLED sequentially is formed on second conductive pattern and the dielectric film 54.Anode 62 is connected to the drain D of switch S w2 via the through hole that forms in the passivating film 56.In this example, be used as the material of anode 62 such as the printing opacity conductor of ITO (tin indium oxide).
Insulation course 58 is formed on the passivating film 56.Insulation course 58 has through hole with the corresponding position of the middle body of anode 62.Insulation course 58 for example is the inorganic insulation layer with lyophily effect.
Insulation course 60 is formed on the insulation course 58.Insulation course 60 has through hole, its diameter greater than in the insulation course 58 with the through hole of the corresponding position of middle body of anode 62.Insulation course 60 for example is the organic insulator with liquid repellence effect.The polylayer forest of insulation course 58 and insulation course 60 forms one and cuts apart insulation course, and it has through hole with anode 62 corresponding positions.
Cushion 63 and luminescent layer 64 sequentially are formed in the through hole of cutting apart in the insulation course on the exposed anode 62.Cushion 63 is used to regulate from anode 62 to luminescent layer 64 hole and injects.Luminescent layer 64 is the films that contain the luminous organic compound that sends red, green or blue streak.
Negative electrode 66 is formed to be cut apart on insulation course and the luminescent layer 64 as the shared electrode of all pixels.Negative electrode 66 is by passivating film 56 and cut apart the contact hole (not shown) that forms in the insulation course and be connected to power lead Vss.For example, can be with the polylayer forest of protection conductive layer that comprises the main conductive layer of baric etc. and contain aluminium etc. as negative electrode 66.Each organic EL OLED comprises anode 62, cushion 63, luminescent layer 64 and negative electrode 66.
The light that luminescent layer 64 sends can extract the outside of organic EL plate DP from the sidepiece of negative electrode 66.In this case, negative electrode 66 is printing opacities.
Those skilled in the art will be easy to realize additional advantages and modifications.Therefore, aspect wideer in, shown in the present invention does not need and described specific detail and embodiment.Therefore, can carry out various modifications and do not deviate from the spirit or scope of general inventive concept, limit as appended claims and equivalent thereof.
Claims (15)
1. an active matrix OLED display is characterized in that, comprising:
The drive controlling element, it comprises first end that is connected with first power end, control end, and the output size is corresponding to second end of the drive current of voltage between first end and the control end;
Capacitor, its electrode is connected to control end, and can keep the voltage constant between first end and the control end;
Organic EL, it is connected between second end and the second source end; And
A plurality of first switches, they are series between second end and the control end;
In described a plurality of first switches of series connection, first switch that is positioned at the end place on control end one side is configured to earlier cause switching from the conducting state to the not on-state according to the variation of sweep signal size than all the other first switches.
2. display as claimed in claim 1 is characterized in that, further comprises the first sweep signal input end and the second sweep signal input end,
Wherein, in described a plurality of first switches, first switch that is positioned at the end place of control on distolateral is connected to the first sweep signal input end, all the other first switches are connected to the second sweep signal input end, and the channel area of first switch that is positioned at the end place of control on distolateral is less than the channel area of all the other first switches.
3. display as claimed in claim 1 is characterized in that, the control end of described a plurality of first switches is connected to a single sweep signal input end.
4. display as claimed in claim 3, it is characterized in that, the field effect transistor that described a plurality of first switch is the identical conduction type, and in described a plurality of first switches of series connection, the threshold value that is positioned at all the other first switches of threshold ratio of controlling first switch of locating distolateral end is darker.
5. display as claimed in claim 3, it is characterized in that, the field effect transistor that described a plurality of first switch is the identical conduction type, and in described a plurality of first switches of series connection, the channel length that is positioned at first switch of locating the distolateral end of control is longer than the channel length of all the other first switches.
6. an active matrix OLED display is characterized in that, comprising:
The drive controlling element, it comprises first end that is connected with first power end, control end, and the output size is corresponding to second end of the drive current of voltage between first end and the control end;
Capacitor, its electrode is connected to control end, and can keep the voltage constant between first end and the control end;
Organic EL, it is connected between second end and the second source end;
A plurality of first switches, they are series between second end and the control end,
The control end that wherein is positioned at first switch at the control of the drive controlling element place, end on distolateral is directly connected to the sweep signal input end, and the control end of all the other first switches is connected to the sweep signal input end by delay element; And
Postpone and export the delay element of input signal.
7. display as claimed in claim 6 is characterized in that delay element is a resistive element.
8. display as claimed in claim 7 is characterized in that resistive element is a poly-silicon pattern.
9. display as claimed in claim 6 is characterized in that delay element is a diode.
10. display as claimed in claim 6 is characterized in that, delay element comprises first diode and second diode in parallel, and the direction of first diode is opposite with the direction of second diode.
11. an active matrix OLED display is characterized in that, comprising:
The drive controlling element, it comprises first end that is connected with first power end, control end, and the output size is corresponding to second end of the drive current of the voltage between first end and the control end;
Capacitor, its electrode is connected to control end, and can keep the voltage constant between first end and the control end;
Organic EL, it is connected between second end and the second source end; And
A plurality of first switches, they are series between second end and the control end,
Described a plurality of first switch is the field effect transistor of identical conduction type and has the grid that is connected to single sweep signal input end, and in described a plurality of first switches of series connection, the threshold value of all the other first switches of threshold ratio of first switch that is positioned at the end place of control on distolateral is darker.
12. display as claimed in claim 11 is characterized in that, in described a plurality of first switches of series connection, first switch and all the other first switches of being positioned at the end place of control on distolateral have the threshold difference of 0.1V to the 0.8V scope.
13. an active matrix OLED display is characterized in that, comprising:
The drive controlling element, it comprises first end that is connected with first power end, control end, and the output size is corresponding to second end of the drive current of the voltage between first end and the control end;
Capacitor, its electrode is connected to control end, and can keep the voltage constant between first end and the control end;
Organic EL, it is connected between second end and the second source end; And
A plurality of first switches, they are series between second end and the control end,
Described a plurality of first switch is the field effect transistor of identical conduction type and has the grid that is connected to single sweep signal input end, and in described a plurality of first switches of series connection, the channel length of first switch that is positioned at the end place of control on distolateral is longer than the channel length of all the other first switches.
14. display as claimed in claim 13, it is characterized in that, in described a plurality of first switches of series connection, first switch that is positioned at the end place of control on distolateral has a channel length, and this channel length is in 1.3 to 3.0 times scope of the channel length of all the other first switches.
15. an active matrix OLED display is characterized in that, comprising:
The drive controlling element, it comprises first end that is connected with first power end, control end, and the output size is corresponding to second end of the drive current of the voltage between first end and the control end;
Capacitor, its electrode is connected to control end, and can keep the voltage constant between first end and the control end;
Organic EL, it is connected between second end and the second source end; And
A plurality of first switches, they are series between second end and the control end,
The first sweep signal end, it is connected to the control end of first switch that being positioned at the end place of control on distolateral in described a plurality of first switch; And
The second sweep signal end, it is connected to the control end of all the other first switches in described a plurality of first switch,
The field effect transistor that described a plurality of first switch is the identical conduction type, and in described a plurality of first switches of series connection, the channel area of first switch that is positioned at the end place of control on distolateral is littler than the channel area of all the other first switches.
Applications Claiming Priority (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP013383/2003 | 2003-01-22 | ||
| JP2003013383 | 2003-01-22 | ||
| JP137377/2003 | 2003-05-15 | ||
| JP139443/2003 | 2003-05-16 |
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| Publication Number | Publication Date |
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| CN1742307A CN1742307A (en) | 2006-03-01 |
| CN100440288C true CN100440288C (en) | 2008-12-03 |
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| Application Number | Title | Priority Date | Filing Date |
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| CNB2004800025821A Expired - Lifetime CN100440288C (en) | 2003-01-22 | 2004-01-19 | Organic EL display and active matrix substrate |
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| CN (1) | CN100440288C (en) |
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| US4623908A (en) * | 1982-04-01 | 1986-11-18 | Seiko Epson Kabushiki Kaisha | Thin film transistors |
| JPH0982969A (en) * | 1995-09-12 | 1997-03-28 | Toshiba Corp | Thin-film transistor and liquid-crystal display |
| US6104067A (en) * | 1996-08-02 | 2000-08-15 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device |
| EP1130565A1 (en) * | 1999-07-14 | 2001-09-05 | Sony Corporation | Current drive circuit and display comprising the same, pixel circuit, and drive method |
| US20010026251A1 (en) * | 2000-03-31 | 2001-10-04 | U.S. Philips Corporation | Display device having current-addressed pixels |
| WO2001091095A1 (en) * | 2000-05-22 | 2001-11-29 | Koninklijke Philips Electronics N.V. | Active matrix electroluminescent display device |
| JP2002221936A (en) * | 2000-10-24 | 2002-08-09 | Semiconductor Energy Lab Co Ltd | Light emission device and its driving method |
| CN1381033A (en) * | 2000-05-22 | 2002-11-20 | 皇家菲利浦电子有限公司 | Active matrix dispaly device |
| CN1388504A (en) * | 2001-05-30 | 2003-01-01 | 株式会社半导体能源研究所 | Display device and its driving method |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4623908A (en) * | 1982-04-01 | 1986-11-18 | Seiko Epson Kabushiki Kaisha | Thin film transistors |
| JPH0982969A (en) * | 1995-09-12 | 1997-03-28 | Toshiba Corp | Thin-film transistor and liquid-crystal display |
| US6104067A (en) * | 1996-08-02 | 2000-08-15 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device |
| EP1130565A1 (en) * | 1999-07-14 | 2001-09-05 | Sony Corporation | Current drive circuit and display comprising the same, pixel circuit, and drive method |
| US20010026251A1 (en) * | 2000-03-31 | 2001-10-04 | U.S. Philips Corporation | Display device having current-addressed pixels |
| WO2001091095A1 (en) * | 2000-05-22 | 2001-11-29 | Koninklijke Philips Electronics N.V. | Active matrix electroluminescent display device |
| CN1381033A (en) * | 2000-05-22 | 2002-11-20 | 皇家菲利浦电子有限公司 | Active matrix dispaly device |
| JP2002221936A (en) * | 2000-10-24 | 2002-08-09 | Semiconductor Energy Lab Co Ltd | Light emission device and its driving method |
| CN1388504A (en) * | 2001-05-30 | 2003-01-01 | 株式会社半导体能源研究所 | Display device and its driving method |
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| CN1742307A (en) | 2006-03-01 |
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