CN100435088C - 优化的标准带符号数字的系数乘法器 - Google Patents
优化的标准带符号数字的系数乘法器 Download PDFInfo
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- CN100435088C CN100435088C CNB2006100050006A CN200610005000A CN100435088C CN 100435088 C CN100435088 C CN 100435088C CN B2006100050006 A CNB2006100050006 A CN B2006100050006A CN 200610005000 A CN200610005000 A CN 200610005000A CN 100435088 C CN100435088 C CN 100435088C
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- 238000005457 optimization Methods 0.000 title description 4
- 230000004044 response Effects 0.000 claims abstract description 19
- 238000000034 method Methods 0.000 claims description 17
- 230000007717 exclusion Effects 0.000 claims description 10
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- 238000006073 displacement reaction Methods 0.000 description 12
- 230000008859 change Effects 0.000 description 5
- 238000007792 addition Methods 0.000 description 3
- 230000008569 process Effects 0.000 description 3
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- 238000005516 engineering process Methods 0.000 description 2
- 101150040096 SFT2 gene Proteins 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
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- 239000012467 final product Substances 0.000 description 1
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- 238000010295 mobile communication Methods 0.000 description 1
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/52—Multiplying; Dividing
- G06F7/523—Multiplying only
- G06F7/533—Reduction of the number of iteration steps or stages, e.g. using the Booth algorithm, log-sum, odd-even
- G06F7/5332—Reduction of the number of iteration steps or stages, e.g. using the Booth algorithm, log-sum, odd-even by skipping over strings of zeroes or ones, e.g. using the Booth Algorithm
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H17/00—Networks using digital techniques
- H03H17/02—Frequency selective networks
- H03H17/0223—Computation saving measures; Accelerating measures
- H03H17/0225—Measures concerning the multipliers
- H03H17/0226—Measures concerning the multipliers comprising look-up tables
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/544—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices for evaluating functions by calculation
- G06F7/5443—Sum of products
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H17/00—Networks using digital techniques
- H03H17/02—Frequency selective networks
- H03H17/0223—Computation saving measures; Accelerating measures
- H03H17/0227—Measures concerning the coefficients
- H03H17/023—Measures concerning the coefficients reducing the wordlength, the possible values of coefficients
- H03H2017/0232—Canonical signed digit [CSD] or power of 2 coefficients
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- General Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Mathematical Physics (AREA)
- Complex Calculations (AREA)
Abstract
Description
(表112)MUXSEL[11:0] | (表126)SIGN[2:0] | |
系数1 | 000001000111 | 011 |
系数2 | 001001101001 | 001 |
C1=-1/2<sup>5</sup>-1/2<sup>7</sup> | C6=-1/2<sup>8</sup> | C11=1/2<sup>0</sup>-1/2<sup>6</sup> |
C2=-1/2<sup>4</sup>-1/2<sup>8</sup> | C7=1/2<sup>3</sup>+1/2<sup>5</sup> | C12=1/2<sup>0</sup> |
C3=-1/2<sup>3</sup>+1/2<sup>5</sup> | C8=1/2<sup>1</sup>-1/2<sup>3</sup> | C13=1/2<sup>0</sup>-1/2<sup>3</sup> |
C4=-1/2<sup>3</sup>+1/2<sup>7</sup> | C9=1/2<sup>1</sup>+1/2<sup>3</sup> | C14=1/2<sup>1</sup>+1/2<sup>4</sup> |
C5=-1/2<sup>3</sup>+1/2<sup>5</sup> | C10=1/2<sup>0</sup>-1/2<sup>3</sup> | C15=1/2<sup>2</sup>-1/2<sup>5</sup> |
地址 | MUXSEL[5:3] | MUXSEL[2:0] |
0 | 100 | 010 |
1 | 010 | 100 |
2 | 001 | 010 |
3 | 001 | 011 |
4 | 001 | 010 |
5 | 101 | 100 |
6 | 001 | 010 |
7 | 001 | 001 |
8 | 001 | 001 |
9 | 001 | 000 |
a | 011 | 000 |
b | 101 | 000 |
c | 001 | 000 |
d | 010 | 001 |
e | 000 | 010 |
地址 | SIGN[1] | SIGN[0] |
0 | 1 | 1 |
1 | 1 | 1 |
2 | 1 | 0 |
3 | 1 | 0 |
4 | 1 | 0 |
5 | 0 | 1 |
6 | 0 | 0 |
7 | 1 | 0 |
8 | 0 | 0 |
9 | 1 | 0 |
a | 1 | 0 |
b | 0 | 0 |
c | 1 | 0 |
d | 0 | 0 |
e | 0 | 1 |
Claims (20)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/032,920 | 2005-01-11 | ||
US11/032,920 US7680872B2 (en) | 2005-01-11 | 2005-01-11 | Canonical signed digit (CSD) coefficient multiplier with optimization |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1801079A CN1801079A (zh) | 2006-07-12 |
CN100435088C true CN100435088C (zh) | 2008-11-19 |
Family
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB2006100050006A Expired - Fee Related CN100435088C (zh) | 2005-01-11 | 2006-01-11 | 优化的标准带符号数字的系数乘法器 |
Country Status (2)
Country | Link |
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US (1) | US7680872B2 (zh) |
CN (1) | CN100435088C (zh) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101156130B (zh) * | 2005-03-31 | 2010-05-19 | Nxp股份有限公司 | 正则符号数字乘法器 |
US8396913B2 (en) * | 2005-04-12 | 2013-03-12 | Nxp B.V. | Fast fourier transform architecture |
EP2608015B1 (en) | 2011-12-21 | 2019-02-06 | IMEC vzw | System and method for implementing a multiplication |
US9678749B2 (en) * | 2014-12-22 | 2017-06-13 | Intel Corporation | Instruction and logic for shift-sum multiplier |
CN110515585B (zh) * | 2019-08-30 | 2024-03-19 | 上海寒武纪信息科技有限公司 | 乘法器、数据处理方法、芯片及电子设备 |
CN111711431B (zh) * | 2020-04-07 | 2021-01-19 | 深圳市觅拓物联信息技术有限公司 | 减少数字滤波器csd系数中非零位的方法 |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1988008567A1 (en) * | 1987-05-01 | 1988-11-03 | General Electric Company | Truncated product partial canonical signed digit multiplier |
US5262974A (en) * | 1991-10-28 | 1993-11-16 | Trw Inc. | Programmable canonic signed digit filter chip |
CN1454347A (zh) * | 2000-10-16 | 2003-11-05 | 诺基亚公司 | 使用带符号的数位表示的乘法器和移位器 |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4816805A (en) * | 1987-02-02 | 1989-03-28 | Grumman Aerospace Corporation | Residue number system shift accumulator decoder |
US5117385A (en) * | 1990-03-16 | 1992-05-26 | International Business Machines Corporation | Table lookup multiplier with digital filter |
US5548542A (en) * | 1992-08-14 | 1996-08-20 | Harris Corporation | Half-band filter and method |
US5313414A (en) * | 1992-11-12 | 1994-05-17 | Vlsi Technology, Inc. | Canonical signed two's complement constant multiplier compiler |
US6505221B1 (en) * | 1999-09-20 | 2003-01-07 | Koninklijke Philips Electronics N.V. | FIR filter utilizing programmable shifter |
US6466633B1 (en) * | 2000-08-31 | 2002-10-15 | Shiron Satellite Communications (1996) Ltd. | Methods and apparatus for implementing a receiver filter with logarithmic coefficient multiplication |
KR100340048B1 (ko) * | 2000-10-26 | 2002-06-15 | 오길록 | 승산기를 사용하지 않는 유한 임펄스 응답 필터 장치 |
US7080115B2 (en) * | 2002-05-22 | 2006-07-18 | Broadcom Corporation | Low-error canonic-signed-digit fixed-width multiplier, and method for designing same |
-
2005
- 2005-01-11 US US11/032,920 patent/US7680872B2/en not_active Expired - Fee Related
-
2006
- 2006-01-11 CN CNB2006100050006A patent/CN100435088C/zh not_active Expired - Fee Related
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1988008567A1 (en) * | 1987-05-01 | 1988-11-03 | General Electric Company | Truncated product partial canonical signed digit multiplier |
US5262974A (en) * | 1991-10-28 | 1993-11-16 | Trw Inc. | Programmable canonic signed digit filter chip |
CN1454347A (zh) * | 2000-10-16 | 2003-11-05 | 诺基亚公司 | 使用带符号的数位表示的乘法器和移位器 |
Also Published As
Publication number | Publication date |
---|---|
CN1801079A (zh) | 2006-07-12 |
US20060155793A1 (en) | 2006-07-13 |
US7680872B2 (en) | 2010-03-16 |
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