CN100428211C - Circuits at sending end, circuits at receiving end, interface switching module, and interface switching method - Google Patents
Circuits at sending end, circuits at receiving end, interface switching module, and interface switching method Download PDFInfo
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- CN100428211C CN100428211C CNB2005101154192A CN200510115419A CN100428211C CN 100428211 C CN100428211 C CN 100428211C CN B2005101154192 A CNB2005101154192 A CN B2005101154192A CN 200510115419 A CN200510115419 A CN 200510115419A CN 100428211 C CN100428211 C CN 100428211C
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Abstract
An interface used on SATA or on SAS is prepared as utilizing transistor as impedance regulation component and utilizing impedance regulation mode to coordinate with external circuit and external layout design to let two SATA or two SAS connection interfaces be able to carry out switching-over automatically for making single system be able to have two SATA or two SAS connection interfaces simultaneously.
Description
Technical field
The present invention relates to a kind of computer transmission interface, especially refer to a kind of serial high-order technology adapter interface (serial advanced technology attachment that is applied to, hereinafter to be referred as SATA) or transmitting terminal circuit, receiving terminal circuit, transmission circuit and interface switching module and the method for serial high-order technology small computer systems interface (serial attached small computer system interface is hereinafter to be referred as SAS).
Background technology
Fig. 1 is the transmitting terminal circuit diagram in the middle of SATA and the SAS standard.Fig. 2 is the receiving terminal circuit figure in the middle of SATA and the SAS standard.
With reference to figure 1 and Fig. 2, transmitting terminal circuit 100 comprises a switch 110 and two variable resistors 101, sends data-signal TXD to produce one first transmission signal TXP and one second transmission signal TXN in order to receive one.Receiving terminal circuit 200 comprises a differential amplifier 210 and two variable resistors 101, receives data-signal RXD in order to receive one first received signal RXP and one second received signal RXN to produce one.In the middle of high speed serial signal interface specifications such as SATA and SAS, stipulate, 50 ohm differential impedance assembly 101 all must be arranged to meet impedance matching (impedance match) condition at transmitting terminal signal (TX signal) or receiving end signal (RX signal), guarantee that high-speed serial signals is at physical layer (physical layer) when carrying out data transmission, can not check mistake (cyclic redundancy check error) too much, cause the interface connection failure because of circulation is verbose.Yet known technology is to utilize precision resistance as the differential impedance assembly, can't accomplish the application of impedance modulation.
Traditionally, when main frame (host) or device (device) when needing similar and different connecting interface,, must be dependent on the assistance of a plurality of bridge-jointing units (bridge) as the path of data transfer.The present bridge-jointing unit of the high-speed serial signals of SATA and SAS, the mechanism that must use the framework of three or above physical layer transceiver (transceiver) just can accomplish the mutual switching of a plurality of high-speed serial signals, more complicated on the hardware design, cost is also higher.If a plurality of transmission interfaces can be incorporated into a unit, can significantly improve the convenience and reduction use cost of use.
Summary of the invention
Fundamental purpose of the present invention provides a kind of interface switching module, by impedance modulation (impedancemodulation), allows triangular web can have a plurality of identical or different connecting interfaces simultaneously.
For reaching above-mentioned purpose, interface switching module of the present invention is applied to have the system of dual serial signal transmission interface, comprises one first interface connector, one second interface connector and a transmission circuit.
The first interface connector has one first and transmits signal pin and a plurality of ground connection (GND) pin that signal and one second transmits signal pin (pin), one first received signal and one second received signal of signal, and these three ground connection pins are connected to the earth terminal of this system simultaneously.The second interface connector has four signal pins and a plurality of ground connection pin identical with the first interface connector, among three ground connection pins, has a ground connection pin suspension joint at least, four signal pins of the first interface connector are electrically connected to the corresponding signal pin of the second interface connector respectively, have at least a plurality of ground connection pins with the first interface connector to be electrically connected in the ground connection pin of the second interface connector.Transmission circuit is the current potential according at least one ground connection pin of suspension joint in the second interface connector, distinguishes whether the second interface connector has the signal input.When the second interface connector have signal when input, transmission circuit be the matched impedance of adjustment itself to high resistance, the signal of the second interface connector is exported via the first interface connector; And when the second interface connector did not have the signal input, transmission circuit is the extremely default resistance value of matched impedance of adjustment itself then, and the signal of transmission circuit is exported via the first interface connector.
Another object of the present invention is for providing a kind of interface switching method, be the system that is applied to have the first serial signal interface and the second serial signal interface, interface switching method comprises following steps: set up this system and have online that one first of the first serial signal interface installs; Judge whether one second device with first serial signal interface has been linked to this system; If second device has been connected to this system, then utilize an Auto-Sensing circuit that the equivalent impedance of all resistance units in the interface switching module all is tuned as a high impedance value and cut off online that this system and first installs, return determining step; And, then utilize the Auto-Sensing circuit that the equivalent impedance of all resistance units in the interface switching module all is tuned as online that a default resistance value carries out that this system and first installs if second device is not connected to this system, return determining step.
The present invention is with the differential impedance assembly of transistor (MOS) as transmitting terminal or receiving end in the physical layer transceiver, substitute tradition with resistance as the differential impedance assembly, simultaneously, utilize impedance modulation mode to reach the effect identical with resistance, allow the connected mode between identical high-speed serial signals have handoff functionality, and then can reach the application that a plurality of connecting interfaces switch mutually.
Description of drawings
Fig. 1 is the transmitting terminal circuit diagram in the middle of SATA and the SAS standard.
Fig. 2 is the receiving terminal circuit figure in the middle of SATA and the SAS standard.
Fig. 3 A is the circuit diagram of transmitting terminal circuit of the present invention.
Fig. 3 B is the circuit diagram of transmitting terminal circuit first embodiment of the present invention.
Fig. 3 C is the circuit diagram of transmitting terminal circuit second embodiment of the present invention.
Fig. 3 D is the circuit diagram of transmitting terminal circuit the 3rd embodiment of the present invention.
Fig. 4 A is the circuit diagram of receiving terminal circuit of the present invention.
Fig. 4 B is the circuit diagram of receiving terminal circuit first embodiment of the present invention.
Fig. 4 C is the circuit diagram of receiving terminal circuit second embodiment of the present invention.
Fig. 4 D is the circuit diagram of receiving terminal circuit the 3rd embodiment of the present invention.
Figure 5 shows that the circuit diagram of transmission circuit of the present invention.
Fig. 6 A is the framework calcspar with device one embodiment of interface switching module.
Fig. 6 B shows device A, the device B of tool interface switching module and graph of a relation and the signal flow between the terminal device.
Fig. 6 C is the interface switching method process flow diagram of interface switching module.
Embodiment
Fig. 3 A is the circuit diagram of transmitting terminal circuit of the present invention.With reference to figure 3A, transmitting terminal circuit 300 of the present invention is to be applied to SATA or SAS interface, comprises 322,332, two switch elements of two resistance units 321,331, an Auto-Sensing circuit 310 and a current source 341.
Just with a control signal activation or a forbidden energy, with the equivalent impedance of control or modulation resistance unit 322,332, and then the transmission of control data signal whether according to the current potential of the reference signal of an outside for Auto-Sensing circuit 310.Resistance unit 322,332 receives the control of this control signal, and when control signal was enabled, the equivalent impedance of resistance unit 322,332 was tuned as a default resistance value (for example 50 ohm); And when control signal during by forbidden energy, the equivalent impedance of resistance unit 322,332 is tuned as a high impedance value (Hi-Z).The input end of resistance unit 322,332 is connected to a voltage source Vcc, and output terminal is connected to switch element 321,331 respectively.Switch element 321,331 receives respectively and sends data-signal TXD and anti-phase transmission data-signal/TXD, and when resistance unit 322,332 is tuned as a default resistance value, control first transmits signal TXP and second and transmits the sense of current that signal TXN is exported, that is when switch element 321 conductings, electric current transmits signal TXN from second and flows out, and flows into and transmit signal TXP from first.And when resistance unit 322,332 was tuned as a high impedance value, it was high impedance status that the first transmission signal TXP and second transmits signal TXN, and no signal output.
Fig. 3 B is the circuit diagram of transmitting terminal circuit first embodiment of the present invention.With reference to figure 3B, transmitting terminal circuit 360 of the present invention comprises two heavier- duty PMOS transistor 322a, 332a, two heavier-duty nmos pass transistor 321a, 331a, an Auto-Sensing circuit 310 and current sources 341.Resistance unit 322 (332) among Fig. 3 A is to utilize a heavier-duty PMOS transistor 322a (332a) to implement in present embodiment.The present invention utilizes the characteristic of heavier-duty PMOS transistor itself, because of its when ohmic region (ohmic region) is worked, just be equivalent to a voltage dependent resistor, the present invention is according to the specification of transistor itself, utilize Auto-Sensing circuit 310 to adjust the transistor impedance, make its equivalent impedance equal 50 ohm.And transistor itself just is equivalent to the switch (equaling high impedance) of a cut-out when folder ends district (cutoffregion) work.In addition, the switch element 321 (331) among Fig. 3 A is to utilize a heavier-duty nmos pass transistor 321a (331a) to implement in present embodiment.Therefore, when the equivalent impedance of two heavier- duty PMOS transistor 322a, 332a equals 50 ohm, reach the condition of impedance matching, heavier-duty nmos pass transistor 321a (331a) must receive respectively and send data-signal TXD and anti-phase transmission data-signal/TXD, transmits the signal TXP and the second transmission signal TXN to export first.And when transistor 322a, 332a at folder when only distinguishing work, then first transmits signal TXP and second to transmit signal TXN be high impedance status, and no signal is exported.
Fig. 3 C is the circuit diagram of transmitting terminal circuit second embodiment of the present invention.With reference to figure 3C, transmitting terminal circuit of the present invention 370 is similar with transmitting terminal circuit 360, just many resistance 322b, 332b of two 50 ohm.Resistance unit 322 (332) among Fig. 3 A, in being to utilize one 50 ohm resistance 322b (332b) series connection one heavier-duty PMOS transistor 322a (332a) (shown in Fig. 3 C) to implement in the present embodiment, the heavier-duty PMOS transistor 322a (332a) of this moment is pure only as a switch, the resistance value of itself is very little, required 50 ohm of impedance matching are provided by resistance 322b, 332b fully.Other circuit is identical with Fig. 3 B, no longer repeat specification.
Fig. 3 D is the circuit diagram of transmitting terminal circuit the 3rd embodiment of the present invention.With reference to figure 3D, transmitting terminal circuit 380 of the present invention is similar with transmitting terminal circuit 370, in present embodiment, with the two place-exchange of the resistance 322b (332b) in the resistance unit 322 (332) and heavier-duty PMOS transistor 322a (332a), also can bring into play and transmitting terminal circuit 370 identical functions.
Fig. 4 A is the circuit diagram of receiving terminal circuit of the present invention.With reference to figure 4A, receiving terminal circuit 400 of the present invention is to be applied to SATA or SAS interface, comprises 322,332, two receiving elements of two resistance units 421,431, an Auto-Sensing circuit 310, a differential amplifier 210 and two current sources 441,442.
The input end of resistance unit 322,332 receives one first received signal RXP and one second received signal RXN respectively, and accepts the control of the control signal that Auto-Sensing circuit 310 produced simultaneously.When control signal was enabled, the equivalent impedance of resistance unit 322 (332) was tuned as a default resistance value (for example 50 ohm), and when control signal during by forbidden energy, the equivalent impedance of resistance unit 322 (332) is tuned as a high impedance value.The output head grounding of receiving element 421 (431), its input end 443 (444) is connected to current source 441 (442) respectively, input end 445 (446) receives the first received signal RXP and the second received signal RXN respectively, and produces the first differential wave DR1 and the second differential wave DR2 respectively at input end 443,444 in view of the above.Differential amplifier 210 receives the first differential wave DR1 and the second differential wave DR2, produces after two signal difference are amplified and receives data-signal RXD.As mentioned above, Auto-Sensing circuit 310 is that current potential according to the reference signal of outside is just with control signal activation or forbidden energy, with control or two resistance units of modulation 322,332 etc. the school resistance value, reach the purpose of impedance matching and then the reception of control data signal.
Fig. 4 B is the circuit diagram of receiving terminal circuit first embodiment of the present invention.With reference to figure 4B, receiving terminal circuit 460 of the present invention comprises two heavier-duty nmos pass transistor 322c, 332c, two heavier- duty PMOS transistor 421a, 431a, an Auto-Sensing circuit 310, a differential amplifier 210 and two current sources 441,442.Resistance unit 322 (332) and receiving element 421 (431) among Fig. 4 A are to utilize a heavier-duty nmos pass transistor 322c (332c) and a heavier-duty PMOS transistor 421a (431a) to implement in present embodiment.By the mode of Auto-Sensing circuit 310 with control signal activation or forbidden energy, coming the impedance of modulation heavier-duty nmos pass transistor 322c (332c) itself is 50 ohm or high impedance, sets up or cut off the reception of data-signal.When control signal during by forbidden energy, the equivalent impedance of transistor 322c, 332c is tuned as a high impedance value, make the electric current of win the received signal RXP and the second received signal RXN can't flow through nmos pass transistor 322c, 332c, PMOS transistor 421a, 431a can't conductings.When control signal is enabled, when the equivalent impedance of nmos pass transistor 322c, 332c is tuned as a default resistance value, the electric current of the first received signal RXP and the second received signal RXN can flow through nmos pass transistor 322c, 332c respectively, and the voltage of input end 445,446 dragged down, PMOS transistor 421a, 431a are able to conducting, and then produce the corresponding first differential wave DR1 and the second differential wave DR2.
Fig. 4 C is the circuit diagram of receiving terminal circuit second embodiment of the present invention.With reference to figure 4C, receiving circuit of the present invention 470 is similar with receiving terminal circuit 460, just many resistance 322b (332b) of two 50 ohm.Resistance unit 322 (332) among Fig. 4 A, in being to utilize one 50 ohm resistance 322b (332b) series connection one heavier-duty nmos pass transistor 322c (332c) (shown in Fig. 4 C) to implement in the present embodiment, the heavier-duty nmos pass transistor 322c (332c) of this moment is pure only as a switch, the resistance value of itself is very little, required 50 ohm of impedance matching are provided by resistance 322b, 332b fully.Other circuit is identical with Fig. 4 B, no longer repeat specification.
Fig. 4 D is the circuit diagram of receiving terminal circuit the 3rd embodiment of the present invention.With reference to figure 4D, receiving terminal circuit 480 of the present invention is similar with transmitting terminal circuit 470, in present embodiment, with the two place-exchange of the resistance 322b (332b) in the resistance unit 322 (332) and heavier-duty nmos pass transistor 322c (332c), also can bring into play and transmitting terminal circuit 470 identical functions.
In the practical application, need only utilize activation that an Auto-Sensing circuit 310 controls transmitting terminal circuit and receiving terminal circuit simultaneously and stop.Be illustrated in figure 5 as the circuit diagram of the transmission circuit of tool handoff functionality of the present invention.Transmission circuit 500 comprises an Auto-Sensing circuit 310, two resistance units 322, two resistance units 332, two 421,431, two switch elements of receiving element 321,331, a differential amplifier 210 and three current sources 341,441,442.Its function mode and Fig. 3 A, Fig. 4 A are identical, just two circuit are merged into one, by the 310 unified controls of an Auto-Sensing circuit.
In sum, the present invention is when integrated circuit (IC) indoor design, the physical layer transceiver utilizes transistor as the resistance value assembly, when removing to adjust transistorized equivalent impedance and become standard group to resist value (50 ohm) or high impedance (Hi-Z) with Auto-Sensing circuit 310 again, deciding channel is path or off state.When transistor is adjusted into the anti-value (50 ohm) of standard group, reach the condition of impedance matching, can link also Data transmission.When transistor is adjusted into high impedance value, can cut off the binding of terminal device and this system immediately.More than be referred to as impedance modulation mode.
Application of the present invention is contained the scope of striding and is comprised having SATA, the unit of SAS interface, and has a unit of other serial signal interface, high picture quantity multimedia interface (High Definition MultimediaInterface for example, HDMI), quick peripheral control interface (peripheral controller interfaceexpress, PCI-EXP), the Low Voltage Differential Signal transmission interface (low voltage differentialsignal, LVDS) etc.The present invention is in above-mentioned impedance modulation mode, cooperates external circuit and topological design, is applied in the system of two above transmission interfaces, reaches the purpose of switching mutually between a plurality of different serial signal transmission interfaces.Below how explanation the present invention reaches the application of switching mutually between two above transmission interfaces.
Fig. 6 A is the framework calcspar of an embodiment with device of interface switching module.With reference to figure 6A, interface switching module 630 of the present invention, be to use (or built-in) in the device 600 that two different serial signal transmission interfaces are arranged, device 600 includes a microprocessor 605, random access memory (not shown) and ROM (read-only memory) (not shown) or the like to carry out other computing or function.Interface switching module 630 comprises a SATA connector 610, an E-SATA connector 620 and a transmission circuit 500.In the present embodiment, transmission circuit 500 is integrated in same chip 606 with microprocessor 605, and is incorporated on the same printed circuit board (printed circuit board) with SATA connector 610 and E-SATA connector 620.
Therefore SATA connector 610 and the identical serial signal of E-SATA connector 620 transmission have first simultaneously and transmit signal pin and three ground connection (GND) pin (not shown) that signal TXP and second transmits signal pin (or pin position), the first received signal RXP and the second received signal RXN of signal TXN.Three ground connection pins of SATA connector 610 are connected to the earth terminal of printed circuit board (PCB) or this system simultaneously.One end of SATA connector 610 is connected to a SATA bus, and the other end is a slot, can accept to belong to the insertion (plug in) of cable (cable) 641 plugs of SATA device 640.E-SATA connector 620 also is connected to the SATA bus, but in three ground connection pins of E-SATA connector 620 suspension joint (floating) is arranged, and three ground connection pins of all the other two ground connection pins and SATA connector 610 are electrically connected.Four signal pin TXP, TXN, RXP, RXN of SATA bus are electrically connected to the corresponding pin of transmission circuit 500.As for, the ground connection pin of suspension joint then is electrically connected to Auto-Sensing circuit 310 in the E-SATA connector 620, as its reference signal of modulation impedance whether.The other end of E-SATA connector 620 is a slot, can accept to belong to the insertion (plug in) of cable 651 plugs of E-SATA device 650.When the plug of the cable 651 that is connected when E-SATA device 650 inserted, because three whole ground connection of ground connection pin in E-SATA cable 651 plugs, the plug of cable 651 inserted and promptly causes the ground connection pin current potential of suspension joint in the E-SATA connector 620 to be pulled low to 0.At this moment, the current potential that Auto-Sensing circuit 310 detects reference signal becomes 0, and the I/O with transmission circuit 500 becomes high impedance status immediately, and allows SATA device 640 be connected with E-SATA device 650.
An above embodiment who only switches between E-SATA interface and SATA interface for the present invention, in fact, the present invention can extend to general serial signal interface, as SAS, HDMI, PCI-EXP, LVDS or the like.Therefore, below the device among Fig. 6 A 600, E-SATA device 650 are replaced into device A660, device B670 and terminal device 680 respectively with SATA device 640 in Fig. 6 B, Fig. 6 C.
Fig. 6 B shows device A, the device B of tool interface switching module and graph of a relation and the signal flow between the terminal device.Fig. 6 C is the interface switching method process flow diagram of interface switching module.
With reference to figure 6B, 6C, initial, in step S661, device A660 is connected with terminal device 680 by the serial signal bus, mutually Data transmission.Then, in step S662, Auto-Sensing circuit 310 judges whether the insertion of device B670.Control circuit among Fig. 6 B promptly is reference signal (just among Fig. 6 A in the E-SATA connector 620 the ground connection pin of suspension joint), and Auto-Sensing circuit 310 utilizes the current potential of reference signal just to judge whether the insertion of device B670.When the current potential of reference signal is zero, expression has insertion or the connection of device B670, in step S663, the equivalent impedance that Auto-Sensing circuit 310 is adjusted resistance unit 322,332 immediately becomes high impedance value (impedance modulation mode) with being connected of shearing device A and terminal device 640, and allows device B670 and terminal device 680 carry out data transfer.Then, in step S664, Auto-Sensing circuit 310 continues the connection status of finder B670, gets back to step S662.In step S662, when the current potential of reference signal was 1, the plug of indication device B670 was pulled out.In step S665, the equivalent impedance that Auto-Sensing circuit 310 is adjusted resistance unit 322,332 immediately becomes normal impedance value (50 ohm) (impedance modulation mode) being connected with active device A660 and terminal device 680.At last, in step S666, device A660 and terminal device 680 carry out data transfer or exchange.Next, in step S664, Auto-Sensing circuit 310 continues the connection status of supervising device B670, and gets back to step S662.
According to the present invention, the framework emphasis of interface switching module 630 is at a shared serial signal bus, therefore, when device B exists, the device A of tool interface switching module just cuts off and being connected of terminal device, and when device B did not exist, the device A of tool interface switching module just activated and being connected of terminal device, with the conflict (conflict) of avoiding the serial signal bus.
In sum, consider and design under the factor of simplification and convenience at cost now, for the lsi development person, utilize the mode of impedance modulation to reach identical effect, not only can save the time and the cost of development, and can get rid of the noise (noise) that causes when inner high speed is switched and the problem of time sluggishness (timing delay).To system designer, only need to consider the hardware circuit layout, just can just accomplish by single component, can reduce the cost demand of product.
Above embodiment is only in order to explanation the present invention, and non-limiting the present invention.
Claims (23)
1. a transmitting terminal circuit is applied to a serial signal transmission interface, is to receive one to send data-signal to produce the first transmission signal and the second transmission signal, it is characterized in that this transmitting terminal circuit comprises:
One first resistance unit is the control that receives a control signal, and when this control signal was enabled, this first resistance unit was default resistance value, otherwise this first resistance unit is a high impedance value;
One first switch element is to be connected in described first resistance unit, and receives the control of described transmission data-signal and conducting or open circuit, and the tie point of this first switch element and described first resistance unit is one first output terminal;
One second resistance unit is the control that receives described control signal, and when this control signal was enabled, this second resistance unit was default resistance value, otherwise this second resistance unit is a high impedance value;
One second switch unit is to be connected in described second resistance unit, and receives the control of inversion signal of described transmission data-signal and conducting or open circuit, and the tie point of this second switch unit and described second resistance unit is one second output terminal; And
One Auto-Sensing circuit is to produce described control signal according to a reference signal;
Wherein, described first transmits signal and described second transmits signal by described first output terminal and the output of described second output terminal, and when described control signal is enabled, described first direction of current that transmits signal and the described second transmission signal is controlled by described transmission data-signal, and when described control signal during by forbidden energy, it is high impedance status that the described first transmission signal and described second transmits signal, and no signal output.
2. transmitting terminal circuit as claimed in claim 1, it is characterized in that, described first resistance unit and second resistance unit are transistor, its grid receives described control signal, drain electrode is connected to a voltage source, and the source electrode of described first resistance unit and second resistance unit is described first and second output terminal.
3. transmitting terminal circuit as claimed in claim 1 is characterized in that, described first resistance unit and second resistance unit all comprise:
One resistance, an end is connected to a voltage source, and its resistance value equals described default resistance value; And
One transistor, its grid receives described control signal, and drain electrode is connected to the other end of resistance, and source electrode is respectively described first output terminal and described second output terminal.
4. transmitting terminal circuit as claimed in claim 1 is characterized in that, described first resistance unit and aforementioned second resistance unit all comprise:
One transistor, its grid receives described control signal, and drain electrode is connected to a voltage source; And
One resistance, resistance value equal described default resistance value, and the one end is connected to this transistorized source electrode respectively, and the other end is respectively described first output terminal and described second output terminal.
5. transmitting terminal circuit as claimed in claim 1, it is characterized in that, described first switch element and described second switch unit are a transistor, its grid receives described transmission data-signal and inversion signal thereof respectively, drain electrode is connected to first resistance unit and second resistance unit respectively, and source electrode all is connected to a current source.
6. a receiving terminal circuit is applied to a serial signal transmission interface, receives one first received signal and one second received signal respectively and receives data-signal to produce one, it is characterized in that, comprises:
One first resistance unit is to receive described first received signal and a control signal, and when this control signal was enabled, this first resistance unit was a default resistance value, otherwise is a high impedance value;
One second resistance unit is to receive described second received signal and described control signal, and when control signal was enabled, this second resistance unit was a default resistance value, otherwise is a high impedance value;
One first receiving element is by described first received signal control and produce one first differential wave;
One second receiving element is by described second received signal control and produce one second differential wave;
One differential amplifier is to produce described reception data-signal after receiving described first differential wave and described second differential wave; And
One Auto-Sensing circuit produces described control signal according to a reference signal;
Wherein, when described control signal is not enabled, described first resistance unit and described second resistance unit are high impedance value, make the electric current of described first received signal and described second received signal can't flow through described first resistance unit and described second resistance unit.
7. receiving terminal circuit as claimed in claim 6, it is characterized in that described first resistance unit and described second resistance unit are a transistor, its grid receives described control signal, drain electrode receives described first received signal and described second received signal, and source ground.
8. receiving terminal circuit as claimed in claim 6 is characterized in that, described first resistance unit and second resistance unit all comprise:
One resistance, an end receive described first received signal and second received signal respectively, and its resistance value equals described default resistance value; And
One transistor, its grid receives described control signal, and drain electrode is connected to the other end of resistance, and source ground.
9. receiving terminal circuit as claimed in claim 6 is characterized in that, described first resistance unit and second resistance unit all comprise:
One transistor, its grid receives described control signal, and drain electrode receives described first received signal and second received signal respectively; And
One resistance, resistance value equal described default resistance value, and the one end connects transistorized source electrode, and other end ground connection.
10. receiving terminal circuit as claimed in claim 6, it is characterized in that described first receiving element and described second receiving element are a transistor, its grid receives described first received signal and described second received signal, drain electrode is connected to a current source, and source ground.
11. an interface switching module is applied to have the system of dual serial signal transmission interface, it is characterized in that, comprises:
One first interface connector has one first and transmits signal pin and a plurality of ground connection pin that signal and one second transmits signal pin, one first received signal and one second received signal of signal, and described ground connection pin is connected to the earth terminal of this system simultaneously;
One second interface connector, have four signal pins and a plurality of ground connection pin identical with the described first interface connector, among these a plurality of ground connection pins, has a ground connection pin suspension joint at least, four signal pins of the first interface connector are electrically connected to the corresponding signal pin of the second interface connector respectively, have at least these a plurality of ground connection pins with the first interface connector to be electrically connected in a plurality of ground connection pins of this of the second interface connector; And
One transmission circuit, current potential according to the ground connection pin of suspension joint described in the second interface connector, produce first and transmit the corresponding signal pin that signal and second transmits signal and exports the second interface connector to, simultaneously, receive first received signal and second received signal that the second interface connector is imported;
Described transmission circuit receives one on the one hand and sends data-signal to produce the first transmission signal and the second transmission signal, on the other hand, receives first received signal and second received signal and receives data-signal to produce one, and this transmission circuit comprises:
One first resistance unit is the control that receives a control signal, and when this control signal was enabled, this first resistance unit was default resistance value, otherwise this first resistance unit is a high impedance value;
One first switch element is to be connected in described first resistance unit, and receives the control of described transmission data-signal and conducting or open circuit, and the tie point of this first switch element and described first resistance unit is one first output terminal;
One second resistance unit is the control that receives described control signal, and when this control signal was enabled, this second resistance unit was default resistance value, otherwise this second resistance unit is a high impedance value;
One second switch unit is to be connected in described second resistance unit, and receives the control of inversion signal of described transmission data-signal and conducting or open circuit, and the tie point of this second switch unit and described second resistance unit is one second output terminal;
One the 3rd resistance unit is to receive described first received signal and described control signal, and when this control signal was enabled, the 3rd resistance unit was a default resistance value, otherwise is a high impedance value;
One the 4th resistance unit is to receive described second received signal and described control signal, and when this control signal was enabled, the 4th resistance unit was a default resistance value, otherwise is a high impedance value;
One first receiving element is by described first received signal control and produce one first differential wave;
One second receiving element is by described second received signal control and produce one second differential wave;
One differential amplifier is to produce described reception data-signal after receiving described first differential wave and second differential wave; And
One Auto-Sensing circuit, the current potential height according to the ground connection pin of suspension joint described in the second interface connector produces described control signal;
Wherein, described first and second transmits signal by described first output terminal and the output of described second output terminal, and when described control signal is enabled, the described direction of current that first and second transmits signal is controlled by described transmission data-signal, and when described control signal during by forbidden energy, it is high impedance status that described first and second transmits signal, and no signal output, simultaneously, described the 3rd resistance unit and the 4th resistance unit are high impedance value, make the electric current of described first received signal and second received signal can't flow through described the 3rd resistance unit and the 4th resistance unit.
12. interface switching module as claimed in claim 11, it is characterized in that described first resistance unit and second resistance unit are a transistor, its grid receives described control signal, drain electrode is connected to a voltage source, and source electrode is respectively described first output terminal and described second output terminal.
13. interface switching module as claimed in claim 11, it is characterized in that described the 3rd resistance unit and the 4th resistance unit are a transistor, its grid receives described control signal, drain electrode receives described first received signal and described second received signal, and source ground.
14. interface switching module as claimed in claim 11 is characterized in that, described first resistance unit and second resistance unit all comprise:
One resistance, an end is connected to a voltage source, and its resistance value equals described default resistance value; And
One transistor, its grid receives described control signal, and drain electrode is connected to the other end of this resistance, and source electrode is respectively described first output terminal and described second output terminal.
15. interface switching module as claimed in claim 11 is characterized in that, described first resistance unit and second resistance unit all comprise:
One transistor, its grid receives described control signal, and drain electrode is connected to a voltage source; And
One resistance, resistance value equal described default resistance value, and the one end is connected to this transistorized source electrode respectively, and the other end is respectively described first output terminal and described second output terminal.
16., it is characterized in that described the 3rd resistance unit and the 4th resistance unit all comprise as interface switching module as described in the claim 11:
One resistance, an end receive described first received signal and second received signal respectively, and its resistance value equals described default resistance value;
One transistor, its grid receives described control signal, and drain electrode is connected to the other end of resistance, and source ground.
17. interface switching module as claimed in claim 11 is characterized in that, described the 3rd resistance unit and the 4th resistance unit all comprise:
One transistor, its grid receives described control signal, and drain electrode receives described first received signal and second received signal respectively; And
One resistance, resistance value equal described default resistance value, and the one end is connected to transistorized source electrode, and other end ground connection.
18. interface switching module as claimed in claim 11, it is characterized in that, described first switch element and second switch unit are transistor, its grid receives described transmission data-signal and inversion signal thereof respectively, drain electrode is connected to described first resistance unit and described second resistance unit respectively, and source electrode all is connected to a current source.
19. interface switching module as claimed in claim 11, it is characterized in that described first receiving element and described second receiving element are transistor, its grid receives described first received signal and described second received signal, drain electrode is connected to a current source, and source ground.
20. an interface switching method is applied to have the system of an interface switching module, this interface switching module switches between one first serial signal transmission interface and one second serial signal transmission interface, it is characterized in that the method includes the steps of:
Set up this system and have online that one first of the first serial signal transmission interface installs;
Judge whether one second device with second serial signal transmission interface has been connected to this system;
If second device has been connected to this system, then utilize the Auto-Sensing circuit that the equivalent impedance of all resistance units in the interface switching module all is tuned as a high impedance value and cut off online that this system and first installs, return determining step; And
If second device is not connected to this system, then utilize the Auto-Sensing circuit that the equivalent impedance of all resistance units in the interface switching module all is tuned as a default resistance value and set up online that this system and first installs, return determining step.
21. interface switching method as claimed in claim 20 is characterized in that, described resistance unit is a transistor, or the resistance transistor of connecting.
22. interface switching method as claimed in claim 20, it is characterized in that the described first serial signal transmission interface is the wherein a kind of of serial high-order technology adapter interface, serial high-order technology small computer systems interface, high picture quantity multimedia interface, quick peripheral controller interface or Low Voltage Differential Signal transmission interface.
23. interface switching method as claimed in claim 20, it is characterized in that the described second serial signal transmission interface is the wherein a kind of of serial high-order technology adapter interface, serial high-order technology small computer systems interface, high picture quantity multimedia interface, quick peripheral controller interface or Low Voltage Differential Signal transmission interface.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2005101154192A CN100428211C (en) | 2005-11-03 | 2005-11-03 | Circuits at sending end, circuits at receiving end, interface switching module, and interface switching method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2005101154192A CN100428211C (en) | 2005-11-03 | 2005-11-03 | Circuits at sending end, circuits at receiving end, interface switching module, and interface switching method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1959660A CN1959660A (en) | 2007-05-09 |
| CN100428211C true CN100428211C (en) | 2008-10-22 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB2005101154192A Expired - Fee Related CN100428211C (en) | 2005-11-03 | 2005-11-03 | Circuits at sending end, circuits at receiving end, interface switching module, and interface switching method |
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| Country | Link |
|---|---|
| CN (1) | CN100428211C (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP5843656B2 (en) * | 2012-02-24 | 2016-01-13 | 三菱電機株式会社 | Information processing apparatus and information processing method |
| CN110784208B (en) * | 2019-09-25 | 2023-07-21 | 芯创智（北京）微电子有限公司 | Mixed mode transmitter circuit supporting HDMI and LVDS simultaneously |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH07221581A (en) * | 1994-02-01 | 1995-08-18 | Yokogawa Electric Corp | Bus terminator |
| CN1188281A (en) * | 1997-01-17 | 1998-07-22 | 三菱电机半导体软件株式会社 | Serial input/output circuit and serial bus interface circuit |
| CN1240963A (en) * | 1998-07-01 | 2000-01-12 | 致伸实业股份有限公司 | Peripheral interface converter suitable for general-purpose serial bus and its control method |
-
2005
- 2005-11-03 CN CNB2005101154192A patent/CN100428211C/en not_active Expired - Fee Related
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH07221581A (en) * | 1994-02-01 | 1995-08-18 | Yokogawa Electric Corp | Bus terminator |
| CN1188281A (en) * | 1997-01-17 | 1998-07-22 | 三菱电机半导体软件株式会社 | Serial input/output circuit and serial bus interface circuit |
| CN1240963A (en) * | 1998-07-01 | 2000-01-12 | 致伸实业股份有限公司 | Peripheral interface converter suitable for general-purpose serial bus and its control method |
Also Published As
| Publication number | Publication date |
|---|---|
| CN1959660A (en) | 2007-05-09 |
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