CN100423070C - OLED display with ping pong current driving circuit and simultaneous scanning of lines - Google Patents

OLED display with ping pong current driving circuit and simultaneous scanning of lines Download PDF

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Publication number
CN100423070C
CN100423070C CNB2005800006257A CN200580000625A CN100423070C CN 100423070 C CN100423070 C CN 100423070C CN B2005800006257 A CNB2005800006257 A CN B2005800006257A CN 200580000625 A CN200580000625 A CN 200580000625A CN 100423070 C CN100423070 C CN 100423070C
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electric current
signal
level
current
display
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CN1820298A (en
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白崎友之
尾崎刚
小仓润
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Soras Oled
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Casio Computer Co Ltd
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Abstract

A display drive apparatus includes a selection circuit which sets display pixels in a plurality of specific rows of the display panel in a selected state simultaneously with selection signals of said rows at least overlapping each other. A gradation signal generation circuit generates a gradation signal which controls a luminance gradation of each OLED display pixel based on the display data and sequentially supplies the generated gradation signal in a ping pong manner. A plurality of signal distribution circuits sequentially distribute the gradation signal supplied by the gradation signal generation circuit in accordance with the plurality of display pixels in each column at the timing of time-series supply. A plurality of current holding circuits individually hold the distributed gradation signal and simultaneously supply as the gradation current a current having a current value based on the held gradation signal to the display pixels in the plurality of simultaneously scanned rows.

Description

OLED display with ping pong current driving circuit and simultaneous scanning of lines
Invention field
The present invention relates to drive device for display, display equipment and drive controlling method thereof, and relate more specifically to be applied to the drive device for display of display panel, wherein on this panel, arrange a plurality of display pixels, each display pixel comprises the current-control type light-emitting component, by the electric current corresponding to video data is provided, it sends the light with predetermined luminance level; And the display equipment that comprises this drive device for display; And drive controlling method.
Technical background
Routinely, known light-emitting component escope (display equipment) comprises display pannel, wherein each display pixel comprises the current-control type light-emitting component, it is according to the current value of the drive current that provides, send light with predetermined luminance level, this display pixel is a two-dimensional arrangements, as organic electroluminescent device (hereinafter will be called " organic EL ") or light emitting diode (LED).
Especially, compare with widely used in recent years LCD device (LCD), adopt the light-emitting component escope of driven with active matrix pattern to have the higher demonstration speed of response, there is not field angle dependency, and can realize the high definition of high brightness/high-contrast, image quality, reduce power consumption and other advantages.In addition, the light-emitting component escope comprises light-emitting component type display pixel, and therefore requires backlight unlike LCD device.Therefore, the light-emitting component escope has fabulous characteristic, can further reduce thickness and weight, and has been furtherd investigate as display of future generation and develop.
Figure 18 is for illustrating in the prior art synoptic diagram of the structure example of the major part of the light-emitting component escope of employing driven with active matrix pattern.
Figure 19 is for illustrating in the prior art, is applied to adopt the equivalent circuit figure of the structure example of the display pixel in the light-emitting component escope of driven with active matrix pattern.
As shown in figure 18, in the prior art, the structure that adopts the light-emitting component escope of driven with active matrix pattern to have comprises: display panel 110P, wherein arrange a plurality of display pixel EMP with matrix form (n capable * m row).Each display pixel EMP for example comprises, near each point of crossing of multi-strip scanning line SL and many data line DL, have pixel-driving circuit and the current-control type light-emitting component (for example organic EL) described after a while, wherein the basic each other homeotropic alignment of SL and DL.Scanner driver 120P is connected with the sweep trace SL of display panel 110P, and by with predetermined timing, successively sweep signal Vsel is applied to every sweep trace SL, and the display pixel EMP of every row is set at selection mode.Signal driver 200P is connected with the data line DL of display panel 110P, and with predetermined timing, obtains video data, provides level electric current I pix corresponding to video data to every data line DL.
In this class display, the duty of scanner driver 120P and signal driver 200P is by for example scan control signal, data controlling signal and similar signal control, wherein the timing signal that is provided by the outside is provided in the generation of these signals, and corresponding to the level electric current of video data, the application by sweep signal is written in the display pixel that is set to selection mode in every row.As a result, each display pixel sends the light with predetermined luminance level, thereby shows the image information that hope obtains.
Adopt in the light-emitting component escope of driven with active matrix pattern at this type of, proposed polytype drive controlling mechanism or control method, these mechanism or method are controlled the luminous of above-mentioned current-control type light-emitting component.For example, known a kind of display that comprises pixel-driving circuit, wherein this circuit is made up of a plurality of switchgears, and these switchgears are controlled the luminous and light-emitting component of light-emitting component according to each display pixel of forming display panel.
For example, as shown in figure 19, this type of pixel-driving circuit specifically comprises: pixel-driving circuit DP1; And organic EL OEL, have the anode connection end that is connected with the drain terminal of the transistor Tr 124 of pixel-driving circuit DP1, and the cathode connection end that is applied with earth potential.Near each point of crossing of a pair of sweep trace SL1 that is arranged in parallel with each other and SL2 and data line DL, pixel-driving circuit DP1 comprises: the first transistor Tr121, have the grid terminal that is connected with sweep trace SL1, and the source terminal and the drain terminal that are connected with contact N121 with data line DL; Transistor seconds Tr122 has the source terminal and the drain terminal that are connected with contact N122 with contact N121; The 3rd transistor Tr 123 has the grid terminal that is connected with contact N122, the drain terminal that is connected with contact N121, and be applied with source terminal than high power supply voltage Vdd; The 4th transistor Tr 124 has the grid terminal that is connected with contact N122, and is applied with the source terminal than high power supply voltage Vdd.
In this example, among Figure 19, the first transistor Tr121 comprises n channel-type field effect thin film transistor (TFT), and in second to the 4th transistor Tr 122 to Tr124 each comprises p channel-type field effect thin film transistor (TFT).In addition, the CP1 representative is formed at the grid of third and fourth transistor Tr 123 and Tr124 and the stray capacitance between the source electrode.
In having the pixel-driving circuit DP1 of this class formation, by in predetermined timing, ON/OFF comprises four transistors (switchgear) of transistor Tr 121 to Tr124, and organic EL OEL stands following light emitting control.
That is to say, in pixel-driving circuit DP1, when scanner driver 120P by respectively sweep trace SL1 being used senior sweep signal Vsel1, sweep trace SL2 is used rudimentary sweep signal Vsel2, when display pixel is set at selection mode, make transistor Tr 121, Tr122 and Tr123 conducting, and flow through transistor Tr 121 and Tr123 corresponding to the level electric current I pix of video data, wherein signal driver 200P offers data line DL with video data.At this moment, because the part between the grid of transistor Tr 123 and the drain electrode is by transistor Tr 122 electrical shorts, Tr123 is operated in the saturation region.As a result, the current stage of level electric current I pix is changed into voltage level by transistor Tr 123, thereby generates predetermined voltage (write operation) between grid and source electrode.According to the voltage that generates between transistor Tr 123 grids and the source electrode, transistor Tr 124 conductings, predetermined drive currents are from high power supply voltage Vdd, by transistor Tr 124 and organic EL OEL, the inflow place electromotive force, thereby from organic EL emission light (light emission operation).
Subsequently, when for example, when senior sweep signal Vsel2 was applied to sweep trace SL2, transistor Tr 122 was closed.As a result, the voltage that generates between transistor Tr 123 grids and the source electrode is maintained by stray capacitance CP1.Then, when rudimentary sweep signal Vsel1 was applied to sweep trace SL1, transistor Tr 121 was closed.As a result, data line DL and pixel-driving circuit DP1 are broken by TURP.Therefore, pass through electric potential difference, the 4th transistor Tr 124 keeps conducting state continuously, wherein this electric potential difference is based on the voltage that remains among the stray capacitance CP1, predetermined drive currents is from high power supply voltage Vdd, by transistor Tr 124 and organic EL OEL, inflow place electromotive force, and the light emission operation of therefore lasting organic EL OEL.
Here, control offers the drive current of organic EL OEL by transistor Tr 124, make it have current value based on the brightness level of video data, and control light emission operation continue for example cycle of a frame, write in each display pixel up to level electric current corresponding to next video data.
The drive controlling method that has in the pixel-driving circuit of this type of circuit structure provides the level electric current to each display pixel (grid terminal of the 3rd transistor Tr 123), wherein this electric current has the specific current value corresponding to video data, the Control of Voltage drive current that this method also keeps based on the foundation current value, wherein this drive current has the light emission operation of predetermined luminance level by organic EL thereby influence.Therefore, this method is called electric current application model (or electric current is specified (specification) pattern).
Image pattern 19 is the same, the drive controlling method of same known employing voltage application model (or voltage designated mode), wherein this method level voltage that will have corresponding to the given voltage value of video data is applied to each display pixel, wherein each display pixel comprises pixel-driving circuit and organic EL, this method is according to the magnitude of voltage controlling and driving electric current of level voltage, wherein this electric current has the light emission operation of predetermined luminance level by organic EL OEL thereby influence.In the pixel-driving circuit that adopts this type of voltage designated mode, in the element characteristic (transistor or other channel impedance) of on-off element, produce irregular or fluctuation (degeneration), wherein this on-off element depends on external environment condition (environment temperature or other), service time and conditions of similarity, have selection function or light emitting drive function, make drive current be affected.Thereby pixel-driving circuit has a problem, wishes that exactly the characteristics of luminescence (showing with the predetermined luminance level) that obtains can not stablely for a long time in time realize.Perhaps, when forming each display pixel subtly, when realizing the high definition of display panel, the erratic behavior that constitutes in the operating characteristic (electric current between transistor and other source electrode and the drain electrode) of the on-off element of pixel-driving circuit becomes big, and therefore can not carry out suitable level control.Therefore, pixel-driving circuit has a kind of like this shortcoming, and the generation of erratic behavior causes the degeneration of image quality in the characteristics of luminescence of each display pixel exactly.
On the contrary, adopt the pixel-driving circuit of electric current designated mode to comprise the 3rd transistor Tr 123 (current/voltage-converted transistor), its current stage with the level electric current is converted to voltage level, and wherein this electric current is corresponding to the video data that offers each display pixel; And the 4th transistor Tr 124 (light emitting drive transistor), it provides the drive current with predetermined current value to organic EL OEL.Offer the current value of the drive current of organic EL OEL by setting, this pixel driving current can suppress the influence of erratic behavior in the operating characteristic of each transistor Tr 123 and Tr124, and therefore have an advantage, can solve the problem of the pixel-driving circuit that adopts the voltage designated mode exactly.
Yet, adopt the pixel-driving circuit of electric current designated mode to have following problem.
In based on each display pixel, video data with minimum brightness or relatively low brightness, write under the situation of level electric current (when rudimentary demonstration), must offer each display pixel corresponding to the luminance level of video data, marking current with small current value.
Here, because the operation that writes the level electric current in each display pixel is corresponding to being charged to predetermined voltage for capacity cell (constituting the maintenance electric capacity of wiring capacitance and display pixel), wherein this capacity cell colonizes on the data line, and the length of arrangement wire of data line is elongated owing to the increase of for example size of display panels.In addition, when the quantity of the display pixel that is connected with this data line increases, in the current value of level electric current diminishes, just, when realizing the demonstration of (effect with) even lower level, required time to data line charging is elongated, and therefore increases about the write operation required time of each display pixel.Write operation about each display pixel can not be finished in the default write time, and produces so-called insufficient write state, does not wherein reach steady state (SS) (state of saturation).As a result, display pixel can not be launched the light that has corresponding to the appropriate brightness level of video data, causes the degeneration of image quality.
In addition, when in order to realize the high definition of display panel, the quantity that is arranged in the sweep trace on the display panel increases, and the selection cycle of every sweep trace (write time just) is set at more in short-term, because the current value of level electric current reduces, the feasible abundant write operation that can not carry out about each display pixel, and produce insufficient write state, cause the degeneration of image quality or the high definition of restriction display panel.
Summary of the invention
At the drive device for display of the display pixel that drives display panel based on video data with comprise in the display equipment of this drive device for display, the present invention has an advantage, in each display pixel, write in the operation of level electric current exactly, the appearance of insufficient write state can be suppressed, and the high definition of display panel can be realized admirably.
In order to realize above-mentioned advantage, according to an aspect of the present invention, provide drive device for display, it drives the display pixel of a plurality of two-dimensional arrangements that constitute display panel based on video data, and this drive device for display comprises at least:
Select circuit, the display pixel in a plurality of particular rows of display panel is set at selection mode, have the overlapped at least cycle;
The level signal generating circuit produces the level signal, based on video data, controls the luminance level of each display pixel; And
The electric current write circuit, obtain marking current corresponding to display pixel in a plurality of particular rows, and, provide the level electric current that has based on the current value of level signal to the display pixel in a plurality of particular rows according to selecting circuit that display pixel is set at the timing of selection mode.
The electric current write circuit is preferably and forms the structure that is independent of display panel, or constitute by a plurality of field effect thin film transistor (TFT)s, wherein each transistor has the amorphous silicon semiconductor layer as the single raceway groove polarity of having of channel layer, perhaps constitute by a plurality of field effect thin film transistor (TFT)s that have as the polysilicon semiconductor layer of channel layer, and integrated with display panel.
Be preferably, the level signal generating circuit generates the marking current as the level signal, provide luminance level to display pixel corresponding to video data, and the electric current write circuit has the device that is used to generate and export the level electric current, and wherein this level electric current has and by electric current the opposite current polarity of marking current that part provides takes place.
Be preferably, select circuit to have, synchronously the display pixel on a plurality of particular rows of display panel is set at the device of selection mode based on single selection signal; The electric current write circuit has the timing that is used for according to by selection signal sets selection mode, provides the device of level electric current synchronously to display pixel in a plurality of particular rows; The level current occuring circuit has in time series, provides the device of level signal successively to the electric current write circuit, and wherein the level signal is corresponding to a plurality of display pixels in every row of display pixel in a plurality of particular rows; The electric current write circuit comprises a plurality of signal distribution circuits, provide this circuit according to the every row display pixel in a plurality of particular rows, and this circuit is according to a plurality of display pixels in every row, timing with the time series source, the level signal that order assignment is provided by the level signal generating circuit, and a plurality of current holding circuits, the level signal that independent maintenance is partly distributed by signal allocation, and the display pixel in a plurality of particular rows provides the electric current that has based on the current value of the level signal that has kept simultaneously, as the level electric current.On multistage, for each current holding circuit provides multistage signal maintenance/output, signal maintenance/output comprises the signal retaining part, the marking current that maintenance is distributed by signal distribution circuit, and comprise level electric current output, each of a plurality of display pixels in a plurality of particular rows of foundation in every row display pixel, output current is as the level electric current, and wherein this electric current is corresponding to the marking current that remains in the signal retaining part.By the operation of obtaining of carrying out on the one-level of signal retaining part in multistage signal maintenance/output and holding signal electric current, be controlled as and carry out simultaneously by the operation of level electric current output output level electric current at any other grade.
Be preferably, select circuit to have a kind of like this device, be used for by selecting signal application each particular row with the overlapping cycle successively in display panel, to be set at selection mode corresponding to the display pixel of a plurality of particular rows successively, and wherein select signal that the display pixel in every row is set at selection mode with overlapping cycle.The electric current write circuit has a kind of like this device, is used for the timing corresponding to the selection signal application of selecting circuit, provides the level electric current to each particular row with the overlapping cycle.The level signal generating circuit has a kind of like this device, is used in time series, provides the level signal successively to the electric current write circuit, and this layer utmost point signal is corresponding to a plurality of display pixels in every row display pixel in a plurality of particular rows.The electric current write circuit comprises a plurality of current holding circuits, it provides according to each the row display pixel in a plurality of particular rows, timing according to the time series source, the level signal that provides by the level signal generating circuit is provided successively, and provide the electric current that has based on the current value of level signal successively to each particular row, as the level electric current.According to a plurality of display pixels in every row display pixel in a plurality of particular rows, each current holding circuit comprises a plurality of electric current maintenance/outputs, and each electric current maintenance/output has the signal allocation part, according to the timing allocation marking current in time series source; Also comprise the signal retaining part, keep the marking current that partly distributes by signal allocation; And comprising level electric current output, it is exported corresponding to the electric current that remains on the marking current in the signal retaining part, as the level electric current.The output of being carried out by one of them level electric current output of electric current maintenance/output is based on the operation of the level electric current that remains on the marking current in the signal retaining part, with the marking current that keeps in the signal retaining part in another electric current maintenance/output partly distributing by signal allocation, and, be controlled as in overlapping cycle inter-sync and carry out based on the operation that the marking current that remains in the signal retaining part is exported the level electric current by level electric current output.
Be preferably, the signal retaining part comprises charge storage circuit, it is based on the marking current stored charge, and electric charge kept as the voltage composition, and level electric current output has the current mirror circuit structure, the electric current that generation and output have certain current value is as the level electric current, and wherein this current value corresponding to the current value of the level signal that is provided by the level signal generating circuit, has predetermined current ratio relatively.
In order to obtain above-mentioned advantage, another aspect according to display equipment of the present invention provides a kind of display equipment, and based on the video data displays image information, this display equipment comprises at least:
Display panel has multi-strip scanning line that is arranged in line direction and many data lines that are arranged in column direction, and near the point of crossing of multi-strip scanning line and many data lines, with a plurality of display pixels of matrix form arrangement;
Scanner driver will be set at selection mode corresponding to the display pixel of many particular scan, and wherein sweep trace is the part of the multi-strip scanning line of display panel at least, and selection mode has the overlapped at least cycle; And
Signal driver comprises the level signal generating circuit, and video data is offered this circuit, and it generates the level signal of the luminance level of each display pixel of control based on video data; And electric current write circuit, obtain marking current corresponding to display pixel, wherein display pixel is corresponding to many particular scan, and this circuit is set at the timing of selection mode according to scanner driver with display pixel, to display pixel, provide the level electric current that has based on the current value of level signal corresponding to many particular scan.
Be preferably, signal driver forms the structure that is independent of display panel, or by using each transistor wherein to have a plurality of field effect thin film transistor (TFT)s as the amorphous silicon semiconductor layer of the single raceway groove polarity of having of channel layer, perhaps a plurality of field effect thin film transistor (TFT)s that have as the polysilicon semiconductor layer of channel layer, thereby it is the electric current write circuit in the formation signal driver, and integrated with display panel in the single insulating substrate.
Be preferably, the level signal generating circuit generates the marking current as the level signal, provides luminance level corresponding to video data to display pixel.In addition, the electric current write circuit in the signal driver has the device that is used to generate and export the level electric current, and wherein the current polarity of this level electric current is opposite with the marking current that is taken place by electric current partly to provide.
Display pixel can comprise pixel-driving circuit, and it generates predetermined drive currents based on the level electric current from signal driver output, and the current-control type light-emitting component, and it has the light of predetermined luminance level based on the current value emission of drive current.
Can be by using the amorphous silicon semiconductor layer that wherein has single raceway groove polarity a plurality of field effect thin film transistor (TFT)s as channel layer, perhaps using wherein, polysilicon semiconductor layer is a plurality of field effect thin film transistor (TFT)s of channel layer, constitute pixel-driving circuit, and light-emitting component is for example organic electroluminescent device.
Display panel can have a plurality of data line group, wherein in these data lines, is confirmed as one group corresponding to many data lines of the sweep trace quantity of each scanline groups.Each data line group is arranged according to the zone between the multiple row display pixel of arranging with matrix form in the display panel, and display panel has a plurality of scanline groups, and wherein many particular scan are confirmed as one group.
Be preferably, scanner driver has a kind of like this device, by with the single scanning signal application in each scanline groups, be used for and will be selection mode corresponding to the display pixel synchronization settings of many particular scan, wherein this sweep signal is set at selection mode with display pixel.Level signal generating circuit in the signal driver has such device, be used in time series, provide level signal corresponding to a plurality of display pixels to the electric current write circuit successively, wherein this display pixel is corresponding to each scanline groups in every data line in each data line group.Electric current write circuit in the signal driver comprises: a plurality of signal distribution circuits, arrange according to each data line group, and,, distribute the level signal that provides by the level signal generating circuit successively according to every data line in each data line group with the timing in time series source; And a plurality of current holding circuits, the level signal that independent maintenance is partly distributed by signal allocation, and according to the timing that sweep signal is applied to each scanline groups, to have electric current based on the current value of the level signal that has kept synchronously and offer every data line in each data line group, as the level electric current.For each current holding circuit provides multistage signal maintenance/output, each signal maintenance/output comprises the signal retaining part, the level signal that maintenance is distributed by signal distribution circuit, and comprise level electric current output, it is according to every data line in each data line group, output has the electric current based on the current value of level signal, and as the level electric current, wherein this level signal remains in the signal retaining part.By the operation of carrying out on the one-level of signal retaining part in multistage signal maintenance/output of obtaining and keeping the level signal, and on other grades, be controlled as synchronous execution by the operation of level electric current output output level electric current.
Be preferably, scanner driver has a kind of device, by sweep signal being put on every particular scan successively with the overlapping cycle, be used for will being set at the selection mode with overlapping cycle corresponding to the display pixel of many particular scan successively, wherein this sweep signal is set at selection mode with display pixel.Electric current write circuit in the signal driver has a kind of device, is used for the timing of using corresponding to the sweep signal of scanner driver, provides the level electric current with the overlapping cycle to every data line of each data line group successively.
Be preferably, scanner driver has a kind of device, by sweep signal being applied to every particular scan successively with the overlapping cycle, be used for will being set at selection mode corresponding to the display pixel of many particular scan with the overlapping cycle, wherein this sweep signal is set at selection mode with display pixel.Level signal generating circuit in the signal driver has a kind of device, be used in time series, provide level signal corresponding to a plurality of display pixels to the electric current write circuit successively, wherein display pixel is corresponding to many particular scan in every data line in each data line group.The electric current write circuit comprises a plurality of current holding circuits, it provides according to each data line group, timing according to the time series source, the level signal that provides by the level signal generating circuit is provided successively, and the timing of using in sweep signal, every data line in each data line group provides the electric current that has corresponding to the current value of level signal successively, as the level electric current.According to each the bar data line in each data line group, for each current holding circuit provides a plurality of signal maintenance/outputs, each signal maintenance/output comprises the signal allocation part, it is in the timing in time series source, every data line according in each data line group distributes the level signal successively; The signal retaining part, the level signal that its maintenance is partly distributed by signal allocation; And level electric current output, output has the electric current based on the current value of level signal, and as the level electric current, wherein this level signal remains in the signal retaining part.In one of them of electric current maintenance/output, keep the level signal that partly distributes by signal allocation at the signal retaining part, with the operation of exporting by level electric current output based on the level electric current of level signal, and in any other electric current maintenance/output, operation by level electric current output output level electric current, wherein this level electric current is controlled as in overlapping cycle synchronisation and carries out based on the level signal that remains in the signal retaining part.
The signal retaining part can comprise charge storage circuit, stores the electric charge corresponding to the level signal, and electric charge is kept as the voltage composition.Level electric current output can have the current mirror circuit structure, generate and export and have the electric current of certain current value as the level electric current, wherein the corresponding current value of level signal that part provides takes place in this current value relatively with by electric current, has predetermined current ratio.
Driving method according to the display equipment in another aspect of the present invention that realizes above-mentioned target, display pixel corresponding to many particular scan is set to the selection mode that has the overlapping cycle at least, thereby video data is provided, and wherein this particular scan is at least the part of the multi-strip scanning line in the display panel.Generate level signal, the wherein luminance level of this each display pixel of level signal controlling based on video data.Obtain the level signal corresponding to display pixel, wherein this display pixel is corresponding to many particular scan.Generation has the level electric current based on the current value of level signal, according to display pixel is set at the timing of selection mode, the level electric current that generates is offered display pixel corresponding to many particular scan.Be provided and write the display pixel of level electric current, with based on the display brightness of the current value of level electric current and work.
The operation that generates the level signal generates marking current as the level signal, and this marking current provides luminance level corresponding to video data to display pixel.The operation that generation and output have based on the level electric current of the current value of level signal can comprise the generation electric current, and the electric current that generated of output is as the operation of level electric current, wherein the relative current value corresponding with the level signal of the electric current that should generate has predetermined current ratio.
Being set at display pixel, the operation of selection mode can comprise the operation that the single scanning signal Synchronization is applied to many particular scan, make and can will be selection mode corresponding to the display pixel synchronization settings of multi-strip scanning line, wherein this sweep signal is set at selection mode with display pixel.Provide the operation of level electric current to comprise the level electric current is offered operation corresponding to the display pixel of multi-strip scanning line synchronously.The level electric current is offered operation corresponding to the display pixel of multi-strip scanning line synchronously, can comprise that synchronous execution obtains and keep operation corresponding to the level signal of every sweep trace, and based on the level signal that obtains and keep in above-mentioned timing, the operation of output level electric current.
Be preferably, being set at display pixel, the operation of selection mode is applied to every particular scan with the overlapping cycle with sweep signal successively, feasible display pixel corresponding to the multi-strip scanning line is set at the selection mode with overlapping cycle successively, and wherein this sweep signal is set at selection mode with display pixel.Provide the operation of level electric current to be included in the timing that sweep signal is used, the level electric current is offered the operation of display pixel successively with the overlapping cycle, wherein display pixel is corresponding to every sweep trace.The level electric current is offered operation corresponding to the display pixel of multi-strip scanning line successively, with the operation that keeps level signal and output level electric current based on the level signal, and output is carried out with overlapping cycle synchronisation based on the operation of the level electric current of the level signal that keeps in above-mentioned timing.
The accompanying drawing summary
Fig. 1 illustrates the schematic block diagram of the complete structure of display equipment according to an embodiment of the invention;
Fig. 2 is the configuration diagram that the part of display equipment according to this embodiment shown in Figure 1 is shown;
Fig. 3 illustrates the block scheme that the structure example of part takes place electric current, and wherein this electric current generation part can be applied to the display equipment according to this embodiment shown in Figure 1;
Fig. 4 is the circuit structure diagram that the structure example of electric current maintenance/distribution portion is shown, and wherein this electric current maintenance/distribution portion can be applied to the display equipment according to this embodiment shown in Figure 1;
Fig. 5 A and 5B are the conceptual diagram that the exemplary operations of electric current maintenance/distribution portion is shown, and wherein this electric current maintenance/distribution portion can be applied to embodiment shown in Figure 1;
Fig. 6 is in the display equipment of explanation according to this embodiment shown in Figure 1, and drive controlling is operated the sequential chart of (drive controlling method);
Fig. 7 is the schematic structural diagram that illustrates according to the major part of another structure example of the display equipment of this embodiment shown in Figure 1;
Fig. 8 is the schematic structural diagram that illustrates according to the major part of another example of the display equipment of this embodiment shown in Figure 1;
Fig. 9 is the configuration diagram that illustrates according to the part of second embodiment of display equipment of the present invention;
Figure 10 is the circuit structure diagram that the structure example of electric current maintenance/distribution portion is shown, and wherein this electric current maintenance/distribution portion can be applied to the display equipment according to this embodiment shown in Figure 9;
Figure 11 A and 11B are the conceptual diagram that the exemplary operations of electric current maintenance/distribution portion is shown, and wherein this electric current maintenance/distribution portion can be applied to embodiment shown in Figure 9;
Figure 12 is the sequential chart that illustrates according to the drive controlling method of the display equipment of this embodiment shown in Figure 9;
Figure 13 is among second embodiment that illustrates according to display equipment of the present invention, the schematic structural diagram of the major part of another structure example;
Figure 14 is the circuit structure diagram that the physical circuit example of display pixel is shown, and wherein this display pixel can be applied to according to display equipment of the present invention;
Figure 15 A and 15B are the conceptual diagram that illustrates according to the drive controlling operation of the pixel-driving circuit of embodiment shown in Figure 9;
Figure 16 is the schematic block diagram that the structure example of display equipment is shown, and wherein the display pixel according to embodiment shown in Figure 14 can be applied to this display equipment;
Figure 17 is the schematic block diagram that another structure example of display equipment is shown, and wherein the display pixel according to embodiment shown in Figure 14 can be applied to this display equipment;
Figure 18 is for illustrating in the prior art schematic representation of the structure example of the major part of the light-emitting component escope of employing driven with active matrix pattern; And
Figure 19 is the equivalent circuit figure that the structure example of display pixel is shown, and wherein this display pixel is applied in the light-emitting component escope of available technology adopting driven with active matrix pattern.
Detailed Description Of The Invention
Hereinafter will describe according to display equipment of the present invention and drive controlling method thereof based on the embodiment that illustrates.
First embodiment of＜display equipment 〉
The schematic structure of display equipment will be at first described, wherein this display equipment can be applied to according to display driver means of the present invention.
Fig. 1 illustrates the schematic block diagram of the complete structure of display equipment according to an embodiment of the invention.
Fig. 2 is the configuration diagram that illustrates according to the major part of the display equipment of this embodiment.
As shown in Figure 1, display equipment 100 according to the present invention mainly has display panel 110A, scanner driver (selection circuit) 120A, part (level signal generating circuit) 130, electric current maintenance/distribution portion (electric current write circuit) 140A, system controller 150 and shows signal generation part 160 take place electric current.
As shown in Figure 2, display panel 110A has a plurality of display pixel EM basically, and its two-dimensional arrangements (n capable * m row) also is connected with selecting transistor Tr sel.Arrange a plurality of scanline groups SGi according to the display pixel EM in the multirow (being two row in the present embodiment), and (i drops on the interior positive integer of scope 1≤i≤n ', for example is provided in the approximate number of the total line number n among the display panel 110A for wherein many (in the present embodiment being two) sweep trace SLia and SLib; N ' and n are positive integer) be confirmed as one group.Foundation is corresponding to the display pixel EM in every row of each scanline groups SGi, arrange a plurality of data line group DGj, and (j is the positive integer that drops in scope 1≤j≤m for wherein many (in the present embodiment being two) data line DLja and DLjb, m is a positive integer, and is the total quantity of the pixel column of setting in display panel 110) be confirmed as one group.Each display pixel EM is provided in to constitute sweep trace SLia and the SLib of each scanline groups SGi, and constitutes near the point of crossing of the data line DLja of each data line group DGj and DLjb.
Scanner driver (selection circuit) 120A is connected with the scanline groups SGi of display panel 110A usually, and regularly predetermined, successively sweep signal Vsel is applied to each scanline groups SGi, with synchronization settings display pixel EM, wherein display pixel EM is corresponding to the multirow that is connected with scanline groups SGi (being two row in the present embodiment).
Part (level signal generating circuit) 130 takes place and obtains the video data corresponding to display pixel usually in electric current; wherein video data is provided by the shows signal generation part of describing after a while 160; display pixel is corresponding to the multirow (being two row in the present embodiment) of scanline groups SGi; and in time series, will offer electric current maintenance/distribution portion 140A about marking current (level signal) Ic of a plurality of corresponding row.
Electric current maintenance/distribution portion (electric current write circuit) 140A is connected with each data line group DGj of display panel 110A usually, in with predetermined time series regularly, distribution is by electric current generation part 130 that provide successively, corresponding to the marking current Ic of multirow (being two row in the present embodiment), and keep this electric current, and will offer the display pixel EM in the multirow (being two row in the present embodiment) synchronously based on the level electric current I pix of the marking current Ic that has kept according to every row.In this embodiment, electric current generation part 130 and electric current maintenance/distribution portion 140A constitute signal driver 200A.
System controller 150 generates and output scanning control signal and data controlling signal, the timing signal that provides based on for example shows signal generation part 160, the mode of operation of gated sweep driver 120A, electric current generation part 130 and electric current maintenance/distribution portion 140A at least.
The vision signal that shows signal generation part 160 provides based on for example outside of display equipment 100, generate video data (for example numerical data), and this video data offered electric current generation part 130, further generate or extract timing signal (system clock or similar signal) and this timing signal is offered system controller 150, wherein this timing signal is shown as image with video data in display panel 110A.
In structure shown in Figure 2, as structure example, electric current maintenance/distribution portion 140A and pel array are integrated on the dielectric base BASE, and a plurality of display pixel EM (pel array just) that constitute display panel 110A are formed in the substrate, but the invention is not restricted to this structure.For example, signal driver 200A can have the structure of driver chip, and assembling (encapsulation) is on substrate BASE.
The concrete structure of each structure will be described now.
(display panel)
For example, as shown in Figure 2, display panel 110A has a kind of structure, and wherein this display panel can be applied in the display equipment according to this embodiment, and in this structure, corresponding to each scanline groups SGi of two row with corresponding to each data line group DGj of a pixel column, be arranged to and be perpendicular to one another, wherein in two row, two sweep trace SLia that separate and SLib are confirmed as one group, in pixel column, two data line DLja and DLjb are confirmed as one group.The point of crossing of each display pixel EM and every sweep trace SLia and every data line DLja, and the point of crossing of every sweep trace SLib and every data line Dljb is connected.
In this embodiment, in structure shown in Figure 2, the display pixel EM in the odd-numbered line is connected with sweep trace SLia among each scanline groups SGi, and the display pixel EM in the even number line is connected with sweep trace SLib.
As shown in Figure 2, the line number about corresponding to the sweep trace that constitutes each scanline groups SGi the invention is not restricted to this structure, and wherein in this structure, each scanline groups SGi is corresponding to two row display pixel EM.For example, can adopt a kind of structure, wherein each scanline groups SGi is corresponding to the capable display pixel EM of k (k is the approximate number that is provided in total line number n in the display panel 110), and it selectively has n/k group (said n ' group just) scanline groups, for example, can use a kind of structure, wherein provide (single) scanline groups, and all the display pixel EM on screen are connected with scanline groups jointly according to the row (n is capable) that constitutes display panel 110A.In the case, all the display pixel EM on screen, the single scanning signal that is scanned driver 120A output is set at selection mode together.
Each display pixel EM has the grid terminal that is connected with every sweep trace SLia or SLib, and the source terminal that is connected with the drain terminal of each selection transistor Tr sel, wherein selects every data line DLja of transistor AND gate to be connected with DLjb.Each display pixel EM comprises the current-control type light-emitting component, and the level electric current I pix emission that provides based on electric current maintenance/distribution portion 140 by every data line DLja or DLjb and selection transistor Tr sel has the light of predetermined luminance level.
In having the display panel 110A of this class formation, by with sweep signal Vsel, from the scanner driver 120A that describes after a while, be applied to particular scan group SGi, the selection transistor Tr sel that is connected with SLib with many (two) bar sweep trace SLia that constitutes scanline groups SGi is by synchronous conducting, is set at selection mode together corresponding to the display pixel EM of multirow (two is capable).Be applied at sweep signal Vsel under the state (selection mode) of particular scan group SGi, by will be corresponding to the level electric current I pix of video data, from electric current generation part 130 and the electric current maintenance/distribution portion 140A that describes after a while, once all offer each data line group DGj, video data is written among the display element EM corresponding to multirow (two row), the selection transistor Tr sel by being switched on wherein, display element is set at selection mode simultaneously.Physical circuit example or comprise that the circuit operation of selecting transistorized display pixel EM will describe in detail after a while.
(scanner driver)
The scan control signal of scanner driver 120A by providing based on system controller 150, execution will be in (for example selects level, senior) sweep signal Vsel be applied to the operation of each scanline groups SGi successively, to be set at selection mode simultaneously corresponding to the display pixel EM of multirow (being two row in the present embodiment), wherein display pixel is connected with SLib with the sweep trace SLia that constitutes each scanline groups SGi.That is to say, for example, as shown in Figure 2, scanner driver 120A comprise shift module SB1, SB2 ... SBi ... SBn ', each is all according to each scanline groups SGi, comprise on multistage shift register and impact damper (in Fig. 2, n '=n/2; N is the total line number that is provided among the display panel 110A).When from the top of display panel 110A when the bottom is shifted successively, shift register output shift signal, the scan control signal (scanning start signal SST, scan clock signal SCK and similar signal) that provides based on the system controller of describing after a while 150, pass through impact damper, this shift signal is applied to each scanline groups SGi successively, as having the predetermined sweep signal Vsel that selects level (senior).
As mentioned above, for example, when adopting all display pixel EM that constitute display panel 110A with the structure that single line group SGi is connected, this type of shift module as shown in Figure 2 not necessarily, and regularly predetermined, based on scan control signal, by single scanning signal Vsel is applied to scanline groups SGi, all the display pixel EM on screen are set to selection mode together.
(electric current generation part)
Electric current generation part 130 is regularly predetermined, data controlling signal based on system controller 150 inputs, obtain after a while the video data that the shows signal generation part 160 described provides successively, wherein video data is corresponding to the multirow among the data line group DGj (being two row in the present embodiment) display pixel, data line group DGj is corresponding to scanline groups SGi, has marking current (level signal) Ic with generation corresponding to the current value of video data hierarchical value, and according to the every row in the time series, the marking current Ic with multirow offers electric current maintenance/distribution portion 140A successively.Electric current generation part 130 for a screen successively and repeat this operation.Will describe the concrete structure and the operation of electric current generation part 130 after a while in detail.
(electric current maintenance/distribution portion)
140A is in time series for electric current maintenance/distribution portion, based on data controlling signal in predetermined timing system controller 150 inputs, obtain the marking current Ic of the multirow that electric current generation part 130 provides successively, wherein this multirow is corresponding to each scanline groups SGi, this electric current maintenance/distribution portion is according to a plurality of display pixel EM in every row of each data line group DGj, independent holding signal electric current I c, and by using above-mentioned scanner driver 120, according to each scanline groups SGi is set at the timing of selection mode, to offer the display pixel EM of the multirow (being two row in the present embodiment) of each data line group DGj synchronously based on the level electric current I pix of the marking current Ic that has kept.
Particularly, for example, as shown in Figure 2, electric current maintenance/distribution portion 140A comprises a plurality of current dividing circuits 141 at least, each all provides according to being arranged in each the data line group DGj among the display panel 110A, and according to every among many (in the present embodiment being two) the data line DLja of each data line group DGi and the DLjb, in time series, the marking current Ic that distributes electric current generation part 130 to provide; And a plurality of current holding circuits 142, each all be provided as be arranged in display panel 110A in each data line group DGi be connected, and holding signal electric current I c concurrently, wherein this marking current is corresponding to many (in the present embodiment being two) data lines that distributed by current dividing circuit 141.
140A is in the timing based on data controlling signal for this electric current maintenance/distribution portion, obtain the marking current Ic of multirow (being two row in the present embodiment) successively, wherein these row are connected with SLib with the sweep trace SLia that constitutes each scanline groups SGi, this electric current maintenance/distribution portion is distributed and holding signal electric current I c according to every data line among each data line group SGi.Part 140A also generates the level electric current I pix based on the marking current Ic that has kept, and scanline groups SGi is being set at the timing of selection mode, by each data line group DGi, level electric current I pix is offered multirow (being two row in the present embodiment) display pixel EM synchronously.Will describe concrete structure and the operation of electric current maintenance/distribution portion 140A after a while in detail.
(system controller)
System controller 150 allows scanner driver 120A, electric current generation part 130 and electric current maintenance/distribution portion 140A are at predetermined timing working, to output to scanner driver 120A and electric current generation part 130 by scan control signal and data controlling signal with the Control work state, and output to electric current maintenance/distribution portion 140 by this electric current generation part 130, generation/output scanning signal Vsel, marking current Ic and level electric current I pix, the video data that shows signal generation part 160 is generated writes each display pixel EM, with therefrom luminous, and control display panel 110A, show predetermined image information based on vision signal.
(shows signal generation part)
Shows signal generation part 160 is according to every row of display panel 110A, from the vision signal that for example outside of display equipment 100 provides, extract the luminance level signal content, and the luminance level signal content is offered electric current generation part 130 as video data.In this embodiment, when vision signal comprises the timing signal composition, wherein this timing signal composition definition is as the Displaying timer of the image information of television broadcasting signal (composite video signal), shows signal generation part 160 can have the function of extracting the luminance level signal content, and extracts the timing signal composition and provide it to the function of system controller 150.In the case, system controller 150 generates scan control signal and the data controlling signal that offers scanner driver 120A, the timing signal that electric current generation part 130 or electric current maintenance/distribution portion 140 provide based on shows signal generation part 160.
The instantiation of part takes place in＜electric current 〉
Will describe the concrete structure example that part takes place electric current now, wherein this electric current generation part can be applied to the display equipment according to this embodiment.
Fig. 3 illustrates the block scheme that the structure example of part takes place electric current, and wherein this electric current generation part can be applied to the display equipment according to this embodiment.
For example, as shown in Figure 3, electric current generation part 130 comprises shift-register circuit 131, data register circuit 132, data latch circuit 133, D/A converter 134 and voltage-to-current conversion/current source circuit 135.Shift-register circuit 131 output shift signals, the shift clock signal CLK that provides based on system controller 150 is as data controlling signal simultaneously, successively displacement sampling start signal STR.Data register circuit 132 obtains the video data D0 to Dm of delegation (numerical data) that is provided by shows signal generation part 160 successively based on the incoming timing of shift signal.Data latch circuit 133 keeps the video data D0 to Dm of delegation that is obtained by data register circuit 132 based on data bolt signal STB.D/A converter 134 is converted to predetermined analog signal voltage (tapping voltage Vpix) based on the level reference voltage V0 to Vp that is provided by not illustrated supply unit with the video data D0 to Dm that has kept.Voltage-to-current conversion/current source circuit 135, generation is corresponding to marking current (level signal) Ic of the video data that is converted to analog signal voltage, and on time series, according to each the data line group DGj that is arranged in the display panel 110, the output enable signal OE that provides based on system controller 150, for the multirow that is connected with each scanline groups SGi, will offer electric current maintenance/distribution portion 140A successively corresponding to the marking current Ic of the display pixel EM in every row.
The instantiation of＜electric current maintenance/distribution portion 〉
Will describe the instantiation of electric current maintenance/distribution portion now, wherein this electric current maintenance/distribution portion can be applied to the display equipment according to this embodiment.
Fig. 4 is the circuit structure diagram that the structure example of electric current maintenance/distribution portion is shown, and wherein this electric current maintenance/distribution portion can be applied to the display equipment according to this embodiment.
In this example, a structure example only is described, this example can be applied to the display equipment according to this embodiment, and the invention is not restricted to this circuit structure.
For example, as shown in Figure 4, each current dividing circuit (signal allocation part) 141 that constitutes electric current maintenance/distribution portion 140A comprises switching transistor Tr41a and switching transistor Tr41b.In switching transistor Tr41a, marking current Ic from 130 outputs of electric current generation part, offer an end (source terminal) of current path, the other end of current path (drain terminal) is connected with the first output contact N41a that extends to current holding circuit 142, and first electric current as data controlling signal that is provided by system controller 150 obtains signal WTodd and is applied to control terminals (grid terminal).In switching transistor Tr41b, the marking current Ic of electric current generation part 130 outputs offers an end (source terminal) of current path, the other end of current path (drain terminal) is connected with the second output contact N41b that extends to current holding circuit 142, and second electric current that provides as data controlling signal obtains signal WTevn and is applied to control terminals (grid terminal).
Each current holding circuit 142 that constitutes electric current maintenance/distribution portion 140A has a structure, wherein the bolt on two-stage part (signal maintenances/output) 142a and 142c jointly with two-stage on bolt part (signal maintenance/output) 142b and 142d walk abreast and provide, wherein 142a jointly is connected with data line DLja is parallel with 142c, and offer 142a and 142c jointly by the marking current Ic that the first output contact N41a provides by current dividing circuit 141, and 142b jointly is connected with data line DLjb is parallel with 142d, and offers 142b and 142d by current dividing circuit 141 jointly by the marking current Ic that the second output contact N41b provides.
For example, as shown in Figure 4, each bolt part 142a (or 142c) comprising: transistor Tr 42a (or Tr42c), have the output contact N41a that is connected current dividing circuit 141 and the current path (source electrode-drain electrode) between the contact N42a (or N42c), and have the control terminals (grid) that are applied with the first bolt signal LCup (or second bolt signal LClw); Transistor Tr 43a (or Tr43c) has the current path that is connected between contact N42a (or N42c) and the contact N43a (or N43c), and has the control terminals that are applied with the first bolt signal LCup (or second bolt signal LClw); Transistor Tr 44a (or Tr44c), wherein an end of current path is connected with contact N42a (or N42c), and predetermined simultaneously low potential voltage (Vcc) put on its other end, and the control terminals is connected with contact N43a (or N43c); Transistor Tr 45a (or Tr45c), wherein an end of current path is connected with contact N42a (or N42c), and its other end is connected with data line DLja simultaneously, and the second bolt signal LClw (or first bolt signal LCup) is applied to control terminals; And memory capacitance Ca (or Cc), be connected contact N43a (or N43c) and low potential voltage (Vcc).
For example, as shown in Figure 4, similar bolt part 142a and 142c, above-mentioned each bolt part 142b (or 142d) comprising: transistor Tr 42b (or Tr42d), wherein current path (source electrode-drain electrode) is connected between the output contact N41b and contact N42b (or N42d) of current dividing circuit 141, and the first bolt signal LCup (or second bolt signal LClw) puts on control terminals (grid); Transistor Tr 43b (or Tr43c), wherein current path is connected between contact N42b (or N42d) and the contact N43b (or N43d), and the first bolt signal LCup (or second bolt signal LClw) is applied to control terminals (grid); Transistor Tr 44b (or Tr44d), wherein an end of current path is connected with contact N42b (or N42d), and predetermined simultaneously low potential voltage (Vcc) put on its other end, and the control terminals is connected with contact N43b (or N43d); Transistor Tr 45b (or Tr45d), wherein an end of current path is connected with contact N42b (or N42d), and its other end is connected with data line DLjb simultaneously, and the second bolt signal LClw (or first bolt signal LCup) puts on the control terminals; And memory capacitance Cb (or Cd), be connected contact N43b (or N43d) and low potential voltage (Vcc).
In this embodiment, although according to each transistor Tr 41a, Tr41b in the current dividing circuit of this embodiment, be not limited to particular type with each transistor Tr 42a to Tr45a, Tr42b to Tr45b, Tr42c to Tr45c and Tr42d to Tr45d in the current holding circuit 142, for example, also can use with the n channel-type field effect thin film transistor (TFT) of amorphous silicon layer as channel layer, or with the field effect thin film transistor (TFT) of polysilicon layer as channel layer.In the case, as shown in Figure 2, electric current maintenance/distribution portion 140A can be integrated in dielectric base BASE with pel array and go up formation display panel 110A.In addition, being provided in each memory capacitance Ca to Cd among each bolt part 142a to 142d can be the capacity cell that is formed at the grid of each transistor Tr 44a to Tr44d and the stray capacitance between the source electrode or provides separately.
In above-mentioned current holding circuit 142, memory capacitance Ca to Cd constitutes according to signal retaining part of the present invention and charge storage circuit, and transistor Tr 44a to Tr44d and Tr45a to Tr45d constitute according to level electric current output of the present invention.
The operation of＜electric current maintenance/distribution portion 〉
The operation of the electric current maintenance/distribution portion with this class formation will be described now.
Fig. 5 A and 5B are the conceptual diagram that the routine operation of the electric current maintenance/distribution portion that can be applied to this embodiment is shown.
In this example, for the bolt part 142a to 142d that constitutes each current holding circuit 142, reason for convenience, will provide about the illustrating and describing of the side that provides bolt part 142a and 142c, but also carry out identical operations in a side that provides bolt part 142b and 142d.
Operation according to the electric current maintenance/distribution portion 140A (current dividing circuit 141 and current holding circuit 142) of this embodiment has: the electric current batch operation of distributing signal electric current (level signal) Ic, wherein this signal by current dividing circuit 141 in time series, based on the display pixel that writes multirow (being two row among this embodiment), offer output contact N41a one side and output contact N41b one side from electric current generation part 130, wherein this display pixel rows is corresponding to each bar sweep trace SLia and SLib of constituting scanline groups SGi; Synchronous with the electric current batch operation, in constituting the bolt part 142a and 142b or bolt part 142c and 142d of current holding circuit 142, obtain and the electric current of the marking current Ic that keeps having distributed keeps operation; And keep operating synchronous with electric current, based on the marking current Ic that remains in the electric current maintenance operation, carry out from the bolt part 142a that constitutes current holding circuit 142 and 142b and bolt part 142c and the 142d another electric current output function of exporting level electric current I pix synchronously to each bar data line DLja and the DLjb of composition data line group DGj.Electric current maintenance operation and electric current output function are controlled as between the bolt part 142a that constitutes current holding circuit 142 and 142b and bolt part 42c and 142d and selectively repeat, according to all the scanline groups SGi among the display panel 110A, repeat the electric current batch operation simultaneously.
That is to say, at video data based on the every row of foundation, in the cycle of the marking current Ic that obtains on bolt part one side that constitutes current holding circuit 142 and keep being provided by electric current generation part 130, the opposite side in the bolt part reads and exports level electric current I pix simultaneously.Therefore, carried out basically and obtained based on the marking current Ic of video data with to the operation of the data line group DGj of every row output level electric current I pix.
Each circuit structure that now will reference current maintenance/distribution portion specifically describes each operation.
(electric current batch operation)
In the electric current batch operation, in current dividing circuit 141, provide to senior by setting selectively from system controller 150, first and second electric currents as data controlling signal obtain signal WTodd and WTevn, one of switch Tr41a and Tr41b be by conducting successively, and corresponding to the marking current Ic of display pixel EM in every row, in time series, synchronous with the timing of actuating switch, from 130 outputs of electric current generation part.As a result, according to every capable distributing signal electric current I c, and by each output contact N41a or N41b, output to single bolt part 142a and 142c or the 142b and the 142d of the electric current retaining part 142 that formation describes after a while.
(electric current keeps the output function of operation/electric current)
In current holding circuit 142 (bolt part 142a to 142d), provide to senior by setting selectively from system controller 150, first and second bolt signal LCup and the LClw as data controlling signal, with parallel bolt part 142a and the 142c that is connected of output contact N41a, and with the parallel bolt part 142b that is connected of output contact N41b and 142d (bolt part 142a and 142b or bolt part 142c and 142d) one of them is set to electric current and keeps mode of operation, and remaining bolt part (bolt part 142c and 142d or bolt part 142a and 142b) is set to the electric current output function state of description after a while.
Keep in the operation at electric current, (owing to reason easily, bolt part 142a and 142c are shown separately) shown in Fig. 5 A, the first bolt signal LCup is set to senior, and the second bolt signal LClw is set to rudimentary.As a result, in the bolt part 142a that is connected with output contact N41a, transistor Tr 42a, Tr43a and Tr44a conducting, and transistor Tr 45a closes.At this moment, because the part between the grid of transistor Tr 44a and the drain electrode is by transistor Tr 43a electrical short, transistor Tr 44a is operated in the saturation region.Therefore, provide by electric current generation part 130, and output to the marking current Ic of output contact N41a by the switch Tr41a of current dividing circuit 141, transistor Tr 42a and Tr44a by bolt part 142a, flow to a low potential voltage (Vcc) side, and the current stage of marking current Ic is converted into the grid of transistor Tr 44a and the voltage level between the source electrode, makes marking current Ic deposit among the memory capacitance Ca as electric charge.
In the electric current output function, shown in Fig. 5 B, the first bolt signal LCup is set to rudimentary, and the second bolt signal LClw is set to senior.As a result, in bolt part 142a, transistor Tr 42a and Tr43a close, and transistor Tr 45a conducting.At this moment, electromotive force (high voltage) is maintained among the N43a of contact, and wherein this electromotive force is based on being kept operation to deposit electric charge (marking current Ic) among the memory capacitance Ca in by electric current, so transistor Tr 44a continues conducting work.Therefore, be arranged in the data line DLja in display panel 110 (not shown), transistor Tr 45a and Tr44a by bolt part 142a, (Vcc) be connected with low potential voltage, and level electric current I pix flows by this way, pull to bolt part 142a (current holding circuit 142) from data line DLja one side (display pixel EM one side just).
In addition, be set to rudimentary at the first bolt signal LCup, the second bolt signal LClw is set to senior state (just, the electric current output function state of above-mentioned bolt part 142a) under, transistor Tr 42c and Tr43c conducting, the part between the grid of transistor Tr 44c and the drain electrode be by transistor Tr 43a electrical short, make with the parallel bolt part 142c that is connected of output contact N41a in, transistor Tr 44c is in the saturation region conducting, and transistor Tr 45c closes.Therefore, the marking current Ic that outputs to output contact N41a flows to a low potential voltage (Vcc) side by transistor Tr 42c and the Tr44c of bolt part 142c, the current stage of marking current Ic is converted into the grid of transistor Tr 44c and the voltage level between the source electrode, makes marking current Ic deposit among the memory capacitance Cc as electric charge.
That is to say that be set to electric current at one of bolt part 142a and 142c and keep in the cycle of mode of operation, another is an electric current output function state by synchronization settings.Same this type of mode of operation of carrying out in the combination of not illustrated bolt part 142b and 142d.
Provided description about example, function (current polarity inversion section) wherein is provided, generate (switching current direction) negative level electric current I pix, corresponding to the marking current Ic that provides by electric current generation part 130 with positive polarity, and from data line (display pixel) layback level electric current I pix, to tackle the circuit structure of the pixel-driving circuit of describing after a while, wherein this pixel-driving circuit offers according to the display pixel EM among the electric current maintenance/distribution portion 140A of this embodiment.Yet, the invention is not restricted to this, can have a kind of structure, wherein generate level electric current I pix, and level electric current I pix is according to the circuit structure of display pixel EM, by data line (display pixel) with positive polarity.
Notice on the market and to distribute and available nearly all current known driving circuit (corresponding to electric current generation part) all has the structure of exporting the level signal (marking current) with positive polarity, and therefore have the electric current maintenance/distribution portion of said structure by application, can easily generate the level electric current that direction of current is converted by the current known driver.
The drive controlling method of＜display equipment 〉
Drive controlling operation (drive controlling method) in the display equipment with said structure will be described now.
Fig. 6 is the sequential chart of explanation according to the operation of the drive controlling in the display equipment of this embodiment (drive controlling method).
In this example, will provide description with reference to each structure of aforementioned display device device.
In having the display equipment of said structure, by using shows signal generation part 160, at first from vision signal, extract the video data that comprises numerical data, wherein this video data allows each display pixel (light-emitting component) EM that constitutes display panel 110A to send the light with predetermined luminance grade, the video data that has extracted is offered electric current generation part 130 successively, as the serial data corresponding to every row of display panel 110A.
Offer the video data (numerical data) of electric current generation part 130, in timing based on the data controlling signal of importing by system controller 150, be converted into marking current (level signal) Ic, and the electric current maintenance/distribution portion 140A that provides according to being arranged in the every column data line group DGj among the display panel 110A is provided corresponding to video data.
In this example, for example, every row according to each display pixel EM that is connected with DLjb with each bar data line DLja of composition data line group DGj, marking current Ic from 130 outputs of electric current generation part, in time series, be that unit exports with data line group DGj corresponding to the every row among the display panel 110A.
As shown in Figure 6, in electric current maintenance/distribution portion 140A, carry out the electric current batch operation.In the electric current batch operation, marking current Ic corresponding to display pixel EM is obtained successively, wherein display pixel is arranged in the multirow (being two row among this embodiment) of the every row of foundation, timing the data controlling signal that provides based on system controller 150 (first and second electric currents obtain signal WTodd and WTevn), the transistor of conducting current dividing circuit 141 or switch Tr41a and Tr41b selectively, marking current Ic offers the bolt part 142a (or 142c) and the bolt part 142b (or 142d) of current holding circuit 142 successively.
Then, therewith regularly synchronously, based on the data controlling signal (first senior bolt signal LCup and the second rudimentary bolt signal LClw) that system controller 150 provides, the bolt part 142a of current holding circuit 142 and 142b are set to electric current and keep mode of operation.As a result, only offer the cycle of each bolt part 142a and 142b, just carry out electric current successively and keep operation at marking current Ic.Keep in the operation at electric current, be stored among each memory capacitance Ca and the Cb based on the electric charge of marking current Ic, wherein this marking current is corresponding to the display pixel EM in each row (for example, first row and second is gone).
As shown in Figure 6, be accompanied by the signal level that suitable setting first and second electric currents obtain signal WTodd and WTevn and the first and second bolt signal LCup and LClw, in bolt part 142a and 142b and bolt part 142c and 142d, selectively repeat this type of electric current batch operation and electric current and keep operation.Therefore, remain on successively in each current holding circuit 142 corresponding to the marking current Ic based on the display pixel EM of video data in two row.
Subsequently, after electric current keeps operation, based on the data controlling signal (first rudimentary bolt signal LCup and the second senior bolt signal LClw) that system controller 150 provides, the bolt part 142a of current holding circuit 142 and 142b are set to electric current output function state.As a result, in each bolt part 142a and 142b, carry out the electric current output function.In the electric current output function, level electric current I pix is by each bar data line DLja and DLjb of composition data line group DGj, offered the display pixel EM in each row (for example, first row and second row) synchronously, wherein this level electric current is based on the electric charge that is stored among each memory capacitance Ca and the Cb.
Therefore, by the data line group DGj of every row, from electric current maintenance/distribution portion 140A output level electric current I pix, in the timing of the scan control signal that provides based on system controller 150, senior sweep signal Vsel puts on specific scanline groups SGi from scanner driver 120A.The result, all selection transistor Tr sel that conducting and each the bar sweep trace SLia that constitutes this scanline groups SGi are connected with SLib, data line DLja and DLjb by each data line group DGj (for example offer multirow, two row that comprise first row and second row) the level electric current I pix of the display pixel EM in, be written into each display pixel EM, thereby execution has the light emission operation of predetermined luminance level based on level electric current I pix.
In addition, in each bolt part 142a and 142b, in the cycle of carrying out the electric current output function, as shown in Figure 6, based on the data controlling signal (first rudimentary bolt signal LCup and the second senior bolt signal LClw) that system controller 150 provides, the bolt part 142c of current holding circuit 142 and 142d are set to electric current and keep mode of operation.As a result, carry out electric current successively and keep operation.In this operation, in each bolt part 142c and 142d, the marking current Ic of the every row that continues to provide from electric current generation part 130 is provided, electric charge based on marking current Ic is stored among each memory capacitance Cc and the Cd, wherein this marking current is corresponding to the display pixel EM in each row (for example, the third line and fourth line).
Then, after the electric current output function in bolt part 142a and 142b, system controller 150 is set at the first bolt signal LCup senior once more, is set at the second bolt signal LClw rudimentary.As a result, bolt part 142a and 142b are set at electric current maintenance mode of operation once more.Therefore, in each bolt part 142a and 142b, carry out the electric current output function.In the electric current output function, be stored among each capacitor C a and the Cb based on the electric charge of marking current Ic, wherein this marking current is corresponding to the display pixel EM in each row (for example, fifth line and the 6th row).
In addition, at this moment, when the bolt part 142c of current holding circuit 142 and 142d are set to electric current output function state, carry out the electric current output function, wherein pass through each bar data line DLja and DLjb of composition data line group DGj based on the level electric current I pix of electric charge, offered the display pixel EM in each row (for example, the third line and fourth line) synchronously, wherein electric charge is stored among each memory capacitance Cc and the Cd with aforementioned timing.
The result, among the bolt part 142a and 142b and bolt part 142c and 142d on the two-stage that constitutes each current holding circuit 142, wherein provide this current holding circuit according to each row among the electric current maintenance/distribution portion 140A, according to the scheduled operation cycle, alternately repeat to carry out synchronously the control that electric current keeps operation and electric current output function.Therefore, executable operations wherein continues to obtain in current holding circuit and keeps corresponding to the marking current Ic by every capable video data of electric current generation part 130 outputs, and the display pixel in multirow provides synchronously, as level electric current I pix.
Therefore, constitute this embodiment in such a way, by single scanning signal application that scanner driver is sent in a plurality of display pixel two-dimensional arrangements display panel wherein, make the display pixel in the multirow (being two row among this embodiment) be set at selection mode together, and, in predetermined timing (for example, a scan period), obtain successively and keep video data by signal driver, and offered each display pixel synchronously corresponding to the level electric current of multirow corresponding to the display pixel in the multirow.Therefore, compare with the known drive control method that a sweep signal is applied to a sweep trace, the quantity (line number of selecteed display pixel) of the sweep trace that regularly drives at single scanning becomes several times, and writes the required time of level electric current can be set to several times (being twice among this embodiment) basically in display pixel.
In addition, because the data line that is arranged in every row forms data line group, wherein many (among this embodiment being two) data lines are confirmed as one group, than the structure of in row, arranging the known display device of a data line, can greatly reduce (being 1/2 among this embodiment) and comprise the capacitive component that keeps electric capacity, wherein keep electric capacity to parasitize every data line and be present in each display pixel, or the stray capacitance of driving transistors.Therefore, can reduce in each display pixel, writing the required time of level electric current that offers every data line, perhaps can suppress the delay of this write time.
As a result, can guarantee in each display pixel, to write the sufficiently long time of video data.Therefore, when the display panel increased in size or when realizing high definition, perhaps even with the low-level display image time, the wiring capacitance of data line can be charged to predetermined voltage satisfactorily, thereby eliminates the non-abundant write state of video data.In addition, can allow each display pixel to launch the light that has corresponding to the suitable luminance level of video data, and can greatly reduce the luminance level (erratic behavior of demonstration) that in display panel, generates, thereby improve image quality.
Constitute the present invention in such a way, the sweep trace that is arranged in each row forms scanline groups, wherein many (among this embodiment being two) sweep traces are confirmed as one group, and by using the single scanning signal, the display pixel of multirow (being two row among this embodiment) is set at selection mode together.Therefore, can greatly reduce, and can reduce the quantity (being 1/2 among this embodiment) of the link between display panel and the scanner driver widely from the quantity (being 1/2 this embodiment) of scanner driver to the sweep signal of display panel output.The result, even in display panel, realize high definition, also can suppress the increase of the output terminal quantity of chip for driving, and can prevent that the spacing (gap) between the terminals from diminishing, thereby simplify the positional precision of the Connection Step of driver chip, or reduce the quantity of step.
In addition, when amorphous silicon layer or polysilicon layer are applied as each transistor that constitutes electric current maintenance/distribution portion as the field effect thin film transistor (TFT) of channel layer, electric current maintenance/distribution portion can be integrated on the same substrate with display panel (pel array), and increase that can restraining device quantity, thereby keep the cost decreases of display equipment.
This example has below been described, wherein scanline groups is arranged as corresponding to for example two the row in display pixel, and will be arranged as corresponding to the data line group of the display pixel in two row, make by using the single scanning signal, display pixel in two row can be selection mode by synchronization settings, as first embodiment according to the display equipment of this embodiment.Yet the invention is not restricted to this.Another structure example according to the display equipment of this embodiment will be described now.
Fig. 7 is the schematic structural diagram that illustrates according to the major part of another structure example of the display equipment of this embodiment.
Fig. 8 is the schematic structural diagram that illustrates according to the major part of another structure example of the display equipment of this embodiment.
That is to say, for example, as shown in Figure 7, display panel 110A can be configured to have each the scanline groups SGi that arranges for corresponding to two row or multirow (four lines), and each data line group DLj, wherein data line group comprises many (four) data line DLja to DLjd, and its quantity (four) is corresponding to a plurality of row, and arranges according to each pixel column.By using single scanning signal Vsel, the display pixel EM in the multirow (four lines) can be selection mode by synchronization settings.
In addition, as shown in Figure 8, as structure (layout format of sweep trace) for the scanline groups of arranging corresponding to multirow, for example, in display panel 110A, can be regardless of the sweep trace SLi of extension (drawn) (turning) that turns up the soil, and be connected jointly with display pixel EM in the multirow (two row).
Second embodiment of＜display equipment 〉
Second embodiment according to display equipment of the present invention will be described with reference to the drawings now.
Fig. 9 is the configuration diagram that illustrates according to the major part of second embodiment of display equipment of the present invention.
Here, the structure that is equal to structure among first embodiment is represented by identical or similar reference marker, therefore omits its explanation.
Display equipment according to above-mentioned first embodiment comprises: display panel wherein is arranged with corresponding to each scanline groups SGi of multirow with corresponding to each data line group DGj that comprises many data lines of multirow; And corresponding to the peripheral circuit of display panel (comprising that the scanner driver and the signal driver of part and electric current maintenance/distribution portion take place electric current).Display equipment according to second embodiment comprises: display panel wherein is arranged with every sweep trace providing according to every row and corresponding to each data line group that comprises many data lines of multirow; And corresponding to the peripheral circuit of display panel (comprising that the scanner driver and the signal driver of part and electric current maintenance/distribution portion take place electric current).
As shown in Figure 9, generally include according to the display panel 110B of this embodiment: a plurality of display pixel EM, with two-dimensional arrangements (n capable * m row), and by selecting transistor Tr sel to be connected to each other; (q is the positive integer that drops in scope 1≤q≤n to the multi-strip scanning line SLq that arranges according to the display pixel EM in each row; N is a positive integer, and is the total line number of setting in the display panel 110 of pixel); And a plurality of data line group DGj, arrange according to the display pixel EM in each row, and wherein many (among this embodiment being two) data line DLja and DLjb (j is the positive integer that drops in scope 1≤j≤m; M is a positive integer, and the total columns of pixel for setting in the display panel 110) be confirmed as one group.Each display pixel EM is arranged on each point of crossing of sweep trace SLq and data line DLja that constitutes each data line group DGj and DLjb.
Scanner driver (selection circuit) 120B sweep trace SLq common and among the display panel 110B is connected, and regularly predetermined, sweep signal Vsel is applied to every sweep trace SLq successively, is set at selection mode successively with the display pixel EM that will be connected with sweep trace SLi in every row (delegation).
Electric current generation part 130 generates marking current (level signal) Ic usually, and according to the video data that shows signal generation part 160 provides, this marking current has corresponding to the current value based on the luminance level value of video data.
Electric current maintenance/distribution portion 140B each data line group DGj common and among the display panel 110B is connected.Part 140B obtains in time series corresponding to marking current Ic each row (among this embodiment be two row), that provided by electric current generation part 130, and, will be applied to the display pixel EM in the multirow (being two row among this embodiment) successively based on the level electric current I pix of marking current Ic regularly predetermined.In this embodiment, electric current generation part 130 and electric current maintenance/distribution portion 140B constitute signal driver 200B.
Notice, in structure as shown in Figure 9, electric current maintenance/distribution portion 140B and pel array are integrated on the dielectric base BASE, the a plurality of display pixel EM that wherein constitute display panel 110B (just, pel array) is formed in this substrate as structure example, but the invention is not restricted to this.For example, signal driver 200B can have the structure of driver chip, and assembling (encapsulation) is on substrate BASE.After a while details will be described.
The concrete structure of each structure will be described now.
(display panel)
For example, as shown in Figure 9, display panel 110 has a kind of like this structure, wherein this display panel can be applied in the display equipment according to this embodiment, and in this structure, be confirmed as one group and corresponding to every sweep trace SLq of each pixel column and each data line group DGj with two data line DLja and DLjb corresponding to a pixel column, above-mentioned sweep trace and data line are arranged to and are perpendicular to one another, and the point of crossing of the data line DLja in display pixel EM and odd-numbered scan lines SLi and the every row, and the point of crossing of the data line DLjb in even-line interlace line SLi and the every row is connected.
In this embodiment, in structure shown in Figure 9, be configured to have two data line DLja and the DLjb that is defined as a group although be arranged in data line group DGj in every row, the invention is not restricted to this, and two or more data lines can be confirmed as one group.In the case, when the quantity of the data line of composition data line group DGj be q (just, the quantity of data line DLj1 to DLjq is q) time, a kind of structure is provided, wherein the point of crossing of the first data line DLj1 in the sweep trace in display pixel EM and the every row and the every row is connected, wherein this row can be removed the line number and surplus 1 and calculate (first with q, q+1,2q+1, ... every sweep trace of row), the point of crossing of the second data line DLj2 in sweep trace in display pixel EM and the every row and the every row is connected, wherein this row can and surplus 2 and calculate (second with the same manner, q+2,2q+2, ... every sweep trace of row), display pixel is connected with identical relation with data line, and the point of crossing of q (the last item) the data line DLjq in the sweep trace in display pixel EM and the every row and the every row is connected, wherein this row can and surplus 0 and calculate (q with the same manner, 2q, 3q ... every sweep trace of row).
In addition, display pixel EM among similar Fig. 2, each display pixel EM has a kind of like this structure usually, wherein grid terminal is connected with every sweep trace SLi, source terminal connects with the drain terminal of the selection transistor Tr sel that is connected with every data line DLja or DLjb, and comprise the current-control type light-emitting component, wherein based on the level electric current I pix by selecting transistor Tr sel to provide, emission has the light of predetermined luminance level.
In having the display panel 110B of this class formation, by sweep signal Vsel is applied to sweep trace SLi the particular row from the scanner driver 120B that describes after a while, the transistor Tr sel of the selection of sweep trace SLi connection is switched on therewith, and the display pixel EM in this journey is set at selection mode together.At this in the selection mode, when the level electric current I pix corresponding to video data is offered particular data line among each data line group DGj synchronously, by the selection transistor Tr sel that has been switched on, video data is write in the display pixel that is set to selection mode in this journey synchronously.
(scanner driver)
The scan control signal that scanner driver 120B provides based on system controller 150, carry out successively and will select level (just, senior) sweep signal Vsel be applied to every sweep trace SLq, make the display pixel EM that is connected with every sweep trace SLi in every row be selection mode, and the display pixel EM in the adjacent lines is selection mode by synchronization settings in predetermined period at least by synchronization settings.That is to say, for example as shown in Figure 9, scanner driver 120 comprise shift module SB1, SB2 ..., SBi ... SBn, in that each shift module all comprises shift register and impact damper according to (being the n level among this embodiment) on each bar sweep trace SLq multistage.Pass through shift register, the shift signal of time output successively is shifted toward the bottom from top in display panel 110, be applied to every sweep trace SLq by each impact damper, as having the predetermined sweep signal Vsel that selects level (senior), the scan control signal (scanning start signal SST, scan clock signal SCK and similar signal) that provides based on system controller 150 of this scanning grade wherein.Here, in this embodiment, in having the scanner driver of said structure, for example, scan clock signal SCK is set to regular time width, wherein this time width is set selection mode (the select time width of every row of application scanning signal Vsel) according to every row in predetermined period (horizontal scanning period), and scanning start signal SST is set to the select time width of two row (two horizontal scanning periods).The result, have two the row time widths shift signal each shift module SB1, SB2 ..., SBi ... be shifted between the SBn, and in predetermined period,, be applied to adjacent at least sweep trace SLi in overlapping mode based on the sweep signal Vsel of shift signal.
(electric current generation part)
Electric current generation part 130 has and the identical structure of electric current generation part 130 among as shown in Figure 3 first embodiment, and a screen is repeated operation successively.In this operation, electric current generation part 130 is at the predetermined video data that regularly obtains successively, wherein this video data is corresponding to the display pixel of the multirow among each data line group DGj (being two row among this embodiment), data controlling signal based on system controller 150 inputs, provide this video data by shows signal generation part 160, and generation has marking current (level signal) Ic corresponding to the current value of video data luminance level value, and, provide the marking current Ic of multirow successively to electric current maintenance/distribution portion 140B according to whenever being listed in the time series.
(electric current maintenance/distribution portion)
Electric current maintenance/distribution portion 140B regularly obtains successively and keeps multirow marking current Ic corresponding to each data line group DGj predetermined, wherein in time series, data controlling signal based on system controller 150 inputs provides this marking current by electric current generation part 130.The display pixel EM of part 140B in every row provides marking current Ic as level electric current I pix synchronously, and wherein by each data line group DGj, display pixel is set to selection mode.
Particularly, for example, as shown in Figure 9, electric current maintenance/distribution portion 140B comprises a plurality of at least electric current maintenance/distributor circuits 143, provides according to being arranged in each data line group DGj among the display panel 110B.In addition, electric current maintenance/distribution portion 140B is in the timing that every sweep trace SLq is set at selection mode, according to many among each data line group DGj (in the present embodiment being two) data line DLja and DLjb, distribute and the retention time sequence in the marking current Ic that provides by electric current generation part 130, and provide level electric current I pix successively based on the marking current Ic that has kept to the display pixel EM of each bar data line DLja and DLjb.
Notice, will describe concrete structure and the operation of electric current maintenance/distribution portion 140B after a while in detail.
The instantiation of＜electric current maintenance/distribution portion 〉
The instantiation that can be applied to according to the electric current maintenance/distribution portion of the display equipment of this embodiment will be described now.
Figure 10 illustrates the circuit structure diagram that can be applied to according to the structure example of the electric current maintenance/distribution portion of the display equipment of this embodiment.
Notice, only describe to be applied to here, and the invention is not restricted to this example according to the structure example in the display equipment of this embodiment.
Dispose the electric current maintenance/distributor circuit 143 that each constitutes electric current maintenance/distribution portion 140B, for example as shown in figure 10, so that it has secondary bolt part, this secondary bolt partly comprises retaining part (signal maintenance/output) 143a that is connected with data line DLja and the bolt that is connected with data line DLjb part (signal maintenance/output) 143b, and these parts 143a jointly walks abreast with the marking current Ic of electric current generation part 130 outputs that provide with 143b and is connected.Data line DLja and DLjb constitute each data line group DGj.
For example, as shown in figure 10, electric current maintenance/distribution portion 143a comprises transistor Tr 46a, wherein the marking current Ic of electric current generation part 130 outputs offers an end (source electrode or drain electrode) of current path, its other end is connected with contact N46a, and first electric current obtains signal WTodd and is applied to control terminals (grid); Transistor Tr 47a, wherein current path is connected between contact N46a and the contact N47a, and first electric current obtains signal WTodd and is applied to control terminals; Transistor Tr 48a, wherein an end of current path is connected with contact N46a, and (Vcc) be connected, the control terminals are connected with contact N47a its other end with low potential voltage; Transistor Tr 49a, wherein an end of current path is with (Vcc) be connected, its other end is connected with data line DLja, and the control terminals are connected with contact N47a with low potential voltage; And memory capacitance Ce, be connected contact N47a and low potential voltage (Vcc).
In addition, electric current maintenance/distribution portion 143b comprises equally, for example as shown in figure 10, transistor Tr 46b, wherein the marking current Ic of electric current generation part 130 outputs offers an end (source electrode or drain electrode) of current path, its other end is connected with contact N46b, and second electric current obtains signal WTevn and is applied to control terminals (grid); Transistor Tr 47b, wherein current path is connected between contact N46b and the contact N47b, and second electric current obtains signal WTevn and is applied to control terminals; Transistor Tr 48b, wherein an end of current path is connected with contact N46b, and (Vcc) be connected, the control terminals are connected with contact N47b its other end with low potential voltage; Transistor Tr 49b, wherein (Vcc) be connected, its other end is connected with data line DLjb an end of current path, and the control terminals are connected with contact N47b with low potential voltage; And memory capacitance Cf, be connected contact N47b and low potential voltage (Vcc).
Here, in electric current maintenance/distribution portion 140B according to this embodiment, for example, amorphous silicon layer is as the n channel-type field effect thin film transistor (TFT) of channel layer, or polysilicon layer can be used as each transistor Tr 46a to Tr49a and Tr46b to Tr49b as the field effect thin film transistor (TFT) of channel layer.In the case, as shown in Figure 9, electric current maintenance/distribution portion 140B can be integrated on the dielectric base BASE that constitutes display panel 110B with pel array.
In addition, each the memory capacitance Ce and the Cf that offer each bolt part 143a and 143b are formed at the grid of each transistor Tr 49a and 49b and the stray capacitance between the source electrode, or the capacity cell that provides separately.
In electric current maintenance/distributor circuit 143, memory capacitance Ce and Cf constitute according to signal retaining part of the present invention and charge storage circuit, transistor Tr 46a, Tr47a, Tr46b and Tr47b constitute according to signal allocation part of the present invention, and transistor Tr 48a, Tr49a, Tr48b and Tr49b constitute according to level electric current output of the present invention.
Will explain the electric current maintenance/distribution portion that has said structure among the present invention now.
Figure 11 A and 11B are conceptual diagram, and the routine operation of the electric current maintenance/distribution portion that can be applied to this embodiment is shown.
Operation according to the electric current maintenance/distribution portion 140B (electric current maintenance/distributor circuit 143) of this embodiment has: electric current maintenance/output function, each bolt part 143a and 143b by electric current maintenance/distributor circuit 143, in time series, obtain successively by electric current the marking current Ic based on video data that part provides takes place, wherein this video data is corresponding to the display pixel in two row, generate level electric current I pix based on marking current (level signal) Ic, and, export the signal of generation separately to each bar data line DLja and the DLjb of composition data line group DGj regularly predetermined; And electric current output maintenance operation, in electric current maintenance/output function, continue output level electric current I pix for predetermined period.Electric current maintenance/distribution portion 140B is controlled as between the parallel bolt part 143a and 143b that connects, and alternately repeats electric current maintenances/output function and electric current output keeps operating with the cycle of overlapping.As a result, in electric current maintenance/output function, can be set to and overlap from output cycle of the level electric current I pix of each bolt part 143a and 143b output.
Each circuit structure in now will reference current maintenance/distribution portion specifically describes this operation.
In electric current maintenance/distributor circuit 143 (bolt part 143a and 143b), first and second electric currents that provide as data controlling signal from system controller 150 obtain signal WTodd and WTevn is set at senior selectively.The result, one of bolt part 143a and 143b (bolt part 143a or 143b) are set to electric current maintenance/output function state, wherein obtain marking current Ic, and output is corresponding to the level electric current I pix of marking current Ic, and another bolt part (bolt part 143b or 143a) is set to electric current output maintenance mode of operation, and wherein the output state of the level electric current I pix in the electric current maintenance/output function state of aforementioned timing is extended.
Particularly, in electric current maintenance/output function, shown in Figure 11 A, first electric current obtains signal WTodd and is set to seniorly, and second electric current obtains signal WTevn and is set to rudimentary.As a result, at bolt part 143a, transistor Tr 46a and Tr47a are switched on, and the part between the grid of transistor Tr 48a and the drain electrode is by transistor Tr 47a electrical short, so transistor Tr 48a is switched in the saturation region.The result, the marking current that electric current generation part 130 provides (level signal) Ic, transistor Tr 46a and Tr48a by bolt part 143a, flow to a low potential voltage (Vcc) side, and the current stage of marking current Ic is converted into the grid of transistor Tr 48a and the voltage level between the source electrode, makes marking current Ic deposit among the memory capacitance Ce as electric charge.
At this moment, along with electric charge deposits memory capacitance Ce in, increase by contact N47a place electromotive force, the transistor Tr 48a and the Tr49a that constitute current mirror circuit are switched on, level electric current I pix flows in such a way, be that level electric current I pix is by transistor Tr 49a, by (Vcc) direction (just to low potential voltage from data line Dlja one layback, from display pixel EM one side direction bolt part 143a), wherein this level electric current has the scheduled current ratio of setting with respect to marking current Ic in current mirror circuit.
Keep in the operation in electric current output, shown in Figure 11 B, first electric current obtains signal WTodd and is set to rudimentaryly, and second electric current obtains signal WTevn and is set to senior.As a result, in bolt part 143a, transistor Tr 46a and Tr47a are closed.At this moment, owing to by electric current maintenance/output function, be maintained at N47a place, contact based on the electromotive force (high voltage) that is stored in the electric charge (marking current Ic) among the memory capacitance Ca, transistor Tr 49a continues conducting state.Therefore, keep this mode of operation, wherein level electric current I pix by from data line DLja one layback to bolt part 143a (electric current maintenance/distributor circuit 143).
In addition, obtaining signal WTodd at first electric current is set to rudimentary, second electric current obtains signal WTevn and is set to senior state (just, the electric current output of above-mentioned bolt part 143a keeps mode of operation) in, transistor Tr 46b and Tr47b are switched on, part between the grid of transistor Tr 48b and the drain electrode is by transistor Tr 47b electrical short, make with the parallel bolt part 143b that is connected of bolt part 143a in, transistor Tr 48b is switched in the saturation region.Therefore, carry out electric current maintenance/output function.In this operation, marking current Ic is by transistor Tr 46b and the Tr48b of bolt part 143b, flow to low voltage potential (Vcc), the current stage of marking current Ic is converted into the grid of transistor Tr 48b and the voltage level between the source electrode, makes marking current Ic deposit among the memory capacitance Cf as electric charge.In addition, increase along with contact N47b place electromotive force, the transistor Tr 48b and the Tr49b that constitute current mirror circuit are switched on, level electric current I pix flows in such a way, be that level electric current I pix is by transistor Tr 49b, by (a Vcc) side (just, from display pixel EM one side direction bolt part 143b), wherein this level electric current I pix has scheduled current ratio with respect to marking current Ic to low potential voltage from data line DLjb one layback.
That is to say that one of them was set in the cycle of electric current maintenance/output function state at bolt part 143a and 143b, another part is set at electric current output simultaneously and is kept mode of operation.
Notice the description that provides about example, in example, generate negative level electric current I pix, it is corresponding to the marking current Ic with positive polarity that is provided by electric current generation part 130, and the layback level electric current I pix of the data line (display pixel) from electric current maintenance/distribution portion 140B is to tackle the circuit structure of describing after a while that is provided in the pixel-driving circuit among the display pixel EM.Yet electric current maintenance/distribution portion 140B can have a kind of structure, wherein generate the level electric current I pix with positive polarity, and level electric current I pix is according to the circuit structure of display pixel EM, by data line (display pixel).
The drive controlling method of＜display equipment 〉
Will explain the drive controlling operation in the display equipment with said structure now.
Figure 12 is the sequential chart that illustrates according to the drive controlling method of the display equipment of this embodiment.
In having the display equipment of said structure, by shows signal generation part 160, at first from vision signal, extract the video data that comprises numerical data, video data is used for making that each display pixel (light-emitting component) EM that constitutes display panel 110B has the predetermined luminance level, the video data that has extracted then offers electric current generation part 130 successively, as the serial data corresponding to every row of display panel 110B.
Timing at the data controlling signal of importing based on system controller 150, the video data that offers electric current generation part 130 is converted into the marking current (level signal) corresponding to video data, and outputs to the electric current maintenance/distribution portion 140B that is provided with according to being arranged in the every column data line group DGj among the display panel 110B.
In electric current maintenance/distribution portion 140B, as shown in figure 12, based on the data controlling signal (the first senior electric current obtains signal WTodd and the second rudimentary electric current obtains signal WTevn) that system controller 150 provides, the bolt part 143a of electric current maintenance/distributor circuit 143 is set to electric current maintenance/output function state.As a result, carry out electric current maintenance/output function.In this operation, obtain marking current Ic for delegation's (for example, first row) corresponding to the display pixel EM in every row, deposited among the memory capacitance Ce based on the electric charge of marking current Ic.Simultaneously, based on the current ratio that is stored in the electric charge among the memory capacitance Ce and sets by current mirror circuit (transistor Tr 48a and Tr49a), generation has the level electric current I pix of predetermined current value, the level electric current I pix that generates offers each the display pixel EM in this journey (first row) by every data line DLja.
Subsequently, after electric current maintenance/output function, based on the data controlling signal (the first rudimentary electric current obtains signal WTodd and the second senior electric current obtains signal WTevn) that system controller 150 provides, the bolt part 143a of electric current maintenance/distributor circuit 143 is set to electric current output and keeps mode of operation.As a result, carry out electric current output and keep operation.In this operation,, continue to offer each display pixel EM in this journey (first row) based on the level electric current I pix that is stored in the electric charge (marking current Ic just) among the memory capacitance Ce by every data line DLja among the bolt part 143a.
On the other hand, as shown in figure 12, in bolt part 143a, in the cycle of carrying out electric current output maintenance operation, based on the data controlling signal (the first rudimentary electric current obtains signal WTodd and the second senior electric current obtains signal WTevn) that system controller 150 provides, the bolt part 143b of electric current maintenance/distributor circuit 143 is set to electric current maintenance/output function.As a result, carry out electric current maintenance/output function.In this operation, the marking current Ic for next line (for example, second goes) that continues to provide by electric current generation part 130 is provided in bolt part 143b, electric charge deposits among the memory capacitance Cf.Simultaneously, based on the current ratio that is stored in the electric charge among the memory capacitance Cf and sets by current mirror circuit (transistor Tr 48b and Tr49b), generation has the level electric current I pix of predetermined current value, and the level electric current I pix of generation offers each the display pixel EM in this journey (second row) subsequently.
Then, the output of electric current in bolt part 143a keeps after the operation, and system controller 150 obtains first electric current signal WTodd once more and is set at seniorly, second electric current is obtained signal WTevn be set at rudimentary.As a result, bolt part 143a is set at electric current maintenance/output function state once more.Therefore, carry out electric current maintenance/output function.In this operation, the electric charge based on marking current Ic of next line (for example, the third line) is deposited among the memory capacitance Ce.Simultaneously, the level electric current I pix based on the current ratio that is stored in the electric charge among the memory capacitance Ce and is set by current mirror circuit by every data line DLja, offers each display pixel in this journey (the third line).
In addition, at this moment, when the bolt part 142b of electric current maintenance/distribution portion 143 is set to electric current output maintenance mode of operation, carries out electric current output and keep operation.In this operation, by every data line DLjb,, offer each display pixel EM of delegation, wherein an object of behavior electric current maintenance/output function (second row) based on the level electric current I pix that deposits the electric charge among the memory capacitance Cf in aforementioned timing in.
The result, in electric current maintenance/distribution portion 140B, with bolt part 143a on the two-stage that provides according to every row and the scheduled operation cycle between the 143b, alternately repeat to carry out simultaneously the control of electric current maintenance/output function and electric current output maintenance operation, wherein this bolt partly constitutes each electric current maintenance/distributor circuit 143.As a result, carry out this operation, wherein in current holding circuit, continue to obtain and the marking current Ic that provides successively by electric current generation part 130 corresponding to every capable video data is provided, simultaneously, marking current Ic is offered the display pixel in every row synchronously, as level electric current I pix.
Therefore, data line group DLj by every row, level electric current I pix exports from electric current maintenance/distribution portion 140B, senior sweep signal Vsel, in predetermined period, in the timing of the scan control signal that provides based on system controller 150,, be applied to adjacent at least sweep trace SLq from scanner driver 120 in overlapping mode.The result, data line DLja by each data line group DLj and DLjb and the grading current Ipix that provides successively, (for example be written into corresponding to the multirow of each bar sweep trace SLi, two row that comprise first row and second row) among the display pixel EM in, carry out light emission operation with predetermined luminance level based on level electric current I pix.
As mentioned above, in this embodiment, by sweep signal is applied to wherein to have adjacent scanning lines at least the display panel of display pixel of a plurality of two-dimensional arrangements in overlapping mode from scanner driver in predetermined period, display pixel in every row is set at selection mode successively, by signal driver, obtain successively and keep video data corresponding to the display pixel in every row in each bolt part.Simultaneously, the level electric current of every row is offered each display pixel successively.Therefore, can be write synchronously in the display pixel in the multirow based on the level electric current of video data, wherein multirow has simple structure, comprises the bolt part corresponding to many data lines that constitute the data line group in each row, thereby the level electric current write time is set at long basically.
Particularly, as shown in Figure 9, in this structure, the data line group that wherein is arranged in every row comprises two data lines and two bolt parts, it is provided in the electric current maintenance/distribution portion according to each data line group, may be with one-period, wherein this cycle is 1/2 of the scan period is selected display pixel in the particular row cycle, be set at next line in select the cycle of display pixel overlapping.That is to say, may be only in cycle corresponding to the quantity of the data line of composition data line group, be set in adjacent lines selection cycle overlapping.
In addition, similar first embodiment than the known display device of arranging a data line in delegation, can greatly reduce the quantity (being 1/2 among this embodiment) of the display pixel that is connected with every data line of composition data line group in every row.Therefore, can reduce capacitive component, wherein this capacitive component comprises the maintenance electric capacity that is provided in the display element or the stray capacitance of driving transistors, therefore can reduce in display pixel, writing the required time of level electric current that offers data line, perhaps can suppress the delay of this write time.
Notice, dispose this embodiment in such a way, promptly pass through signal driver, in each bolt part, obtain and keep video data corresponding to the display pixel in every row, simultaneously, generate the level electric current of every row, and offer each display pixel successively, therefore can carry out the bolt operation in the electric current maintenance/distributor circuit (bolt part) apace.If because signal delay or similar delay, the timing of bolt operation departs from, just there is the possibility that hinders display operation.
Thereby, in this embodiment, to carry out the bolt of the video data (marking current) in the electric current maintenance/distributor circuit (bolt part) with less electric current fast and operate, the current mirror circuit structure is applied to the output stage of every data line.As a result, the current value (absolute value) of level electric current can be controlled simply, obtaining big electric current, and the delay in the bolt operation can be suppressed.
As mentioned above, in Fig. 9, constitute each transistor of each the electric current maintenance/distributor circuit 143A among the electric current maintenance/distribution portion 140B, comprise the n channel-type field effect thin film transistor (TFT) of amorphous silicon semiconductor layer as channel layer, perhaps polysilicon semiconductor layer is as the field effect thin film transistor (TFT) of channel layer, and this electric current maintenance/distribution portion 140B and pel array be integrated on the dielectric base BASE, and a plurality of display pixel EM that wherein constitute display panel 110B are formed in this substrate.Yet, the invention is not restricted to this structure.
For example, the present invention can have a kind of structure, and the signal driver that part and electric current maintenance/distribution portion take place comprising electric current is the independent driver chip, and this driver chip assembling (encapsulation) is in the substrate of display panel.
Now will brief explanation structure example in the case.
Figure 13 is among second embodiment that illustrates according to display equipment of the present invention, the schematic structural diagram of the major part of another structure example.
Here, the structure that is equal to the aforementioned structure exemplary construction is represented by similar or identical reference marker, therefore simplifies and explains.
In Figure 13, comprise that the signal driver 200C of electric current maintenance/distribution portion 140B and electric current generation part 130 is configured to the independent driver chip.Here, for example, the electric current maintenance/distributor circuit 143 among Figure 13 comprises a plurality of field effect transistors or the similar device that is formed on the monocrystal silicon substrate.The driver chip that constitutes this signal driver 200C is configured to assembling (encapsulation) on the substrate BASE that constitutes display panel 110B.
The physical circuit example of＜display pixel 〉
The physical circuit example that can be applied to according to the display pixel of display equipment of the present invention will be described with reference to the drawings now.
Figure 14 is the circuit structure diagram that the physical circuit example of display pixel is shown, and wherein this display pixel can be applied to according to display equipment of the present invention.
Figure 15 A and 15B are the conceptual diagram that illustrates according to the drive controlling operation of the pixel-driving circuit of this embodiment.
Figure 16 is the schematic block diagram that the structure example of display equipment is shown, and wherein the display pixel according to this embodiment can be applied to this display equipment.
Figure 17 is the schematic block diagram that another structure example of display equipment is shown, and wherein the display pixel according to this embodiment can be applied to this display equipment.
As shown in figure 14, display pixel EM ' (the related structure of describing that comprises display pixel EM and selection transistor Tr sel with first embodiment) is configured to have usually: pixel-driving circuit DC, sweep signal Vsel based on scanner driver 120A or 120B application, display pixel EM ' is set at selection mode, in selection mode, the level electric current I pix that provides by electric current maintenance/ distribution portion 140A or 140B is provided, and will passes to light-emitting component corresponding to the drive current of level electric current I pix; And the current-control type light-emitting component, comprise EL element or OEL element, the drive current that it provides based on pixel-driving circuit DC, emission has the light of predetermined luminance level.
For example, as shown in figure 14, pixel-driving circuit DC comprises: n channel transistor Tr11, wherein control terminals (grid terminal) and sweep trace SLi (corresponding to describing with aforementioned each embodiment is related, constitute the sweep trace SLia and SLib or SLq of scanline groups SGi) be connected, current path (source electrode-drain electrode) is connected with contact N11 with power lead VL; N channel transistor Tr12 wherein controls terminals and is connected with sweep trace SLi, and current path and data line DLj (describing every the data line DLja of composition data line group DGj or DLjb with aforementioned each embodiment is related) are connected with contact N12; N channel transistor Tr13 wherein controls terminals and is connected with contact N11, and current path is connected with contact N12 with power lead VL; And be connected electric capacity (maintenance electric capacity) Cs between contact N11 and the contact N12.The anode connection end of organic EL OEL is connected with contact N12, and the cathode connection end of this element is connected with the ground terminals.Here, capacitor C s is formed at the grid of transistor Tr 13 and the stray capacitance between the source electrode.In addition, transistor Tr 12 corresponding to the selection transistor Tr sel of the related description of aforementioned each embodiment.
By for example, in as a round-robin scan period Tsc, synchronously the display pixel EM ' in the multirow is set at selection mode, the light emitting drive control of the light-emitting component (organic EL OEL) of execution in having the pixel-driving circuit DC of this class formation, make that the selection mode of display pixel is overlapping in predetermined period, and setting selection cycle (write operation cycle) Tse, wherein be written into as the voltage composition and keep corresponding to the drive current Ipix of video data, also set non-selection cycle (light emission operation cycle) Tnse, wherein based on the voltage composition that in selection cycle Tse, writes and keep, provide drive current to organic EL, have the light (Tse=Tse+Tnse) of predetermined luminance level with emission corresponding to video data.
(selection cycle)
That is to say, in the selection cycle Tse of display pixel EM ', by senior sweep signal Vsel is applied to particular scan SLi from scanner driver, display pixel EM ' in the multirow at first is set at selection mode by synchronous (or overlapping in predetermined period), simultaneously, rudimentary supply voltage Vsc is applied to the power lead VL of the display pixel in the multirow.In addition, regularly synchronously, corresponding to the video data of the display pixel EM ' in the multirow, the level electric current I pix with negative polarity offers every data line DLj from electric current maintenance/distribution portion therewith.
As a result, shown in Figure 15 A, the transistor T R11 and the Tr12 that constitute pixel-driving circuit DC are switched on, and rudimentary supply voltage Vsc is applied to contact N11 (that is to say the end of the grid terminal of transistor Tr 13 and capacitor C s).In addition, carry out the operation that level electric current I pix is pulled to electric current maintenance/distribution portion by data line DL.As a result, the electromotive force voltage level that is lower than rudimentary supply voltage Vsc is applied to contact N12 (that is to say the other end of the source terminal of transistor Tr 13 and capacitor C s).
In this way, generate electric potential difference at (between the grid and source electrode of transistor Tr 13) between contact N11 and the N12.As a result, transistor Tr 13 is switched on, and from power lead VL, by transistor Tr 13, contact N12, transistor T R12 and data line DL, flows to electric current maintenance/distribution portion corresponding to the write current Ia of level electric current I pix.
At this moment, electric charge deposits among the capacitor C s, and keeps (charging) as the voltage composition, and wherein this electric charge is corresponding to the electric potential difference of (between the grid and source electrode of transistor Tr 13) generation between contact N11 and the N12.In addition, supply voltage Vsc is applied to power lead VL, and wherein this voltage Vsc has not the voltage level of electromotive force above Ground, and write current Ia is controlled as on the direction of data line DL and flows.Therefore, the electromotive force (earth potential) that the electromotive force that is applied to organic EL anode connection end (contact N12) becomes and is lower than the cathode connection end, reversed bias voltage is applied to organic EL OEL.Therefore, drive current does not flow through organic EL OEL, and does not carry out light emission operation.
(non-selection cycle)
Subsequently, non-selection cycle Tnsec after selection cycle Tse finishes, rudimentary sweep signal Vsel is applied to particular scan SLi from scanner driver, make the display pixel in the multirow be set to non-selected state, senior supply voltage Vsc is applied to the power lead VL of the display pixel in the multirow.In addition, therewith regularly synchronously, stop operation by the pulling level electric current I pix of electric current maintenance/distribution portion execution.
As a result, shown in Figure 15 B, the transistor Tr 11 and the Tr12 that constitute pixel-driving circuit DC are closed, and interrupt to contact N11 (end of the grid terminal of transistor Tr 13 and capacitor C s just) applied power source voltage Vsc.In addition, owing to the operation of the pulling level electric current I pix that carries out by electric current maintenance/distribution portion, interrupt to contact N12 (other end of the source terminal of transistor Tr 13 and capacitor C s just) applied voltage level.Therefore, capacitor C s keeps being stored in the electric charge in the selection cycle.
When capacitor C s keeps charge voltage in this way in write operation, the electric potential difference of (between the grid and source electrode of transistor Tr 13) between holding contact N11 and the N12, so transistor Tr 13 is kept conducting state.In addition, owing to have above Ground that the supply voltage Vsc of the voltage level of electromotive force uses to power lead VL, be applied to the electromotive force (earth potential) that the electromotive force of the anode connection end (contact N12) of organic EL OEL becomes and is higher than the cathode connection end.
Therefore, predetermined drive currents Ib flows to organic EL OEL from power lead VL by transistor Tr 13 and contact N12 on the direction of forward bias, and organic EL OEL is luminous.Here, because the electric potential difference of the electric potential difference (charge voltage) that capacitor C s keeps corresponding to will import transistor Tr 13 into corresponding to the write current Ia of level electric current I pix the time, the drive current Ib that flows through organic EL OEL has the current value identical with write current Ia.
The result, among the non-selection cycle Tnse after selection cycle Tse, based on voltage composition corresponding to the video data that in selection cycle Tse, writes (level electric current I pix), continue to provide drive current by transistor Tr 13, organic EL OEL ongoing operation, emission has the light corresponding to the luminance level of video data.
Then, based on the drive controlling operation of aforementioned display device device, all the sweep trace SLi for constituting display panel 110A or 110B repeat above-mentioned sequence of operations successively.As a result, write the video data about a screen of display panel, emission has the light of predetermined luminance level, and shows the image information that hope obtains.
Here, in image driver circuitry DC according to this embodiment, owing to can have the transistor of identical raceway groove polarity (n channel-type) by use, transistor formed Tr11 to Tr13, just can use the n channel-type field effect thin film transistor (TFT) of amorphous silicon layer as channel layer, perhaps polysilicon layer is as the field effect thin film transistor (TFT) of channel layer, the circuit structure of similar electric current maintenance/distribution portion (current dividing circuit, current holding circuit and electric current maintenance/distributor circuit) 140A and 140B.In the case, electric current maintenance/ distribution portion 140A and 140B and display panel 110A and 110B can be integrated in the single insulating substrate.Especially, when constituting display panel and electric current maintenance/distribution portion, can make field effect thin film transistor (TFT) by using definite amorphous silicon manufacturing technology with stable operation characteristic by the n channel-type field effect thin film transistor (TFT) of using the use amorphous silicon semiconductor layer relatively inexpensively.Therefore, even realize the high definition of display panel or increase the size of display panel, also can be easily and realize display equipment admirably with good image quality.
Here, as the structure that predetermined power source voltage Vcs is applied to the power lead VL among the pixel-driving circuit DC according to this embodiment, with respect to the described structure of Fig. 2, for example as shown in figure 16, may use a kind of structure admirably, wherein the power supply driver 170A that is connected with each source line group VGi is provided in the outer peripheral areas of display panel 110C, in this zone, each the bar sweep trace SLia and the SLib parallel arranged that comprise each source line group VGi and each the scanline groups SGi of power lead VLia and VLib, and, with synchronous from the timing of scanner driver 120A output scanning signal Vsel, power control signal based on system controller 150 inputs, supply voltage Vcs with scheduled voltage is applied to each source line group VGi from power supply driver 170A.
In addition, with respect to the described structure of Figure 13, for example as shown in figure 17, may use a kind of structure admirably, wherein the power supply driver 170B that is connected with every power lead VLi is provided in the outer peripheral areas of display panel 110D, in this zone, every sweep trace SLi parallel arranged in every power lead VLi and the every row, and, with synchronous from the timing of scanner driver 120B output scanning signal Vsel, based on the power control signal of system controller 150 inputs, have the supply voltage Vcs of scheduled voltage, be applied to every power lead VLi from power supply driver 170B.
Notice, about circuit structure corresponding to the electric current application scheme, provided description, wherein comprise three transistors in this circuit structure as pixel-driving circuit DC, and in display pixel EM ', by data line DLj, (just in the direction of electric current maintenance/distribution portion, the direction of signal driver) goes up pulling level electric current I pix, but the invention is not restricted to this embodiment.As long as display equipment has the light emitting control transistor and writes oxide-semiconductor control transistors, wherein this light emitting control transistor controls provides drive current to light-emitting component, this writes the write operation of oxide-semiconductor control transistors control level electric current, and this display equipment keeps the level electric current (write current) corresponding to video data, and then based on the level electric current, conducting light emitting control transistor is to provide the level electric current, thereby allow the light-emitting component emission to have the light of predetermined luminance level, just may use the display equipment that comprises pixel-driving circuit and have another kind of circuit structure, wherein be applied to this pixel-driving circuit to major general's electric current application model.For example, the present invention can have a kind of four transistorized circuit structures that for example comprise, perhaps has a kind of circuit structure, pass through data line, on the direction of display pixel (pixel-driving circuit), from electric current maintenance/distribution portion one side (signal driver one side just) conduction level electric current.
In addition, although provide description about this structure, wherein use organic EL as the light-emitting component that constitutes the display pixel in the previous embodiment in this structure, display equipment according to the present invention also is not limited thereto.So long as according to the current value of the drive current that provides, emission has the current-control type light-emitting component of the light of predetermined luminance level, just may be the same with above-mentioned organic EL, and application examples such as light emitting diode or any other light-emitting component admirably.

Claims (47)

1. drive device for display, it drives the display pixel of a plurality of two-dimensional arrangements that constitute display panel based on video data, and this drive device for display comprises at least:
The level signal generating circuit generates the level signal based on this video data, and this level signal is used to control the luminance level of each display pixel;
Select circuit, this each display pixel separately in a plurality of particular rows of this display panel is set at the selection mode that the level electric current based on this level signal is write, and, at least a portion cycle is set at the overlapped cycle, and this at least a portion cycle is that the display pixel with each row in these a plurality of particular rows is set at least a portion cycle in cycle of selection mode; And
The electric current write circuit, it extracts and this corresponding level signal of display pixel in these a plurality of particular rows, and according to being set at the cycle of selection mode by this selection circuit, display pixel in these a plurality of particular rows provides the level electric current that has based on the current value of this level signal, and provides simultaneously in this overlapping cycle.
2. drive device for display according to claim 1, wherein this electric current write circuit has the structure that is independent of this display panel at least.
3. drive device for display according to claim 1, wherein this electric current write circuit and this display panel are integrated at least.
4. drive device for display according to claim 1, wherein this electric current write circuit has a plurality of field effect thin film transistor (TFT)s at least, and wherein each transistor has single raceway groove polarity, and has the amorphous silicon layer as channel layer.
5. drive device for display according to claim 1, wherein this electric current write circuit has a plurality of field effect thin film transistor (TFT)s at least, and wherein each transistor has the polysilicon layer as channel layer.
6. drive device for display according to claim 1, wherein this level signal generating circuit generates the marking current as this level signal, and this marking current provides luminance level corresponding to this video data to this display pixel.
7. drive device for display according to claim 1, wherein this electric current write circuit has the device that is used to generate and export this level electric current, and wherein this level electric current has and by this electric current the opposite current polarity of this marking current that part provides takes place.
8. drive device for display according to claim 1, wherein this selection circuit has based on single selection signal this display pixel in these a plurality of particular rows of this display panel is set at this device of selection mode simultaneously, and
This electric current write circuit has according to this selection signal this display pixel is set at this timing of selection mode, and this display pixel in these a plurality of particular rows provides the device of this level electric current simultaneously.
9. drive device for display according to claim 8, wherein this level signal generating circuit have in time series to this electric current write circuit provide successively with these a plurality of particular rows in every device that is listed as this corresponding level signal of a plurality of display pixels in this display pixel, and
This electric current write circuit has:
A plurality of signal distribution circuits, it is in this timing in this time series source, and this level signal that is provided by this level signal generating circuit is provided these a plurality of display pixels according in every row successively; And
A plurality of current holding circuits, it keeps this this level signal that is partly distributed by this signal allocation separately, and this display pixel in these a plurality of particular rows provides the electric current that has based on the current value of this maintenance level signal simultaneously, as this level electric current;
According to every this display pixel that is listed as in these a plurality of particular rows, provide this signal distribution circuit and this current holding circuit.
10. drive device for display according to claim 9, wherein each current holding circuit has the signal maintenance/output on multistage, this signal maintenance/output comprises: the signal retaining part, be listed as each of a plurality of these display pixels in this display pixel according to every in this a plurality of particular rows, keep marking current by this signal distribution circuit distribution; And level electric current output, it is exported corresponding to the electric current that remains on this marking current in this signal retaining part, as this level electric current,
Wherein, be controlled as with the operation of on any other grade, exporting this level electric current and carry out synchronously by this level electric current output by the operation of carrying out on the one-level of this signal retaining part in this multistage signal maintenance/output of obtaining and keeping this marking current.
11. drive device for display according to claim 10, wherein this signal retaining part comprises charge storage circuit, and it is based on this marking current stored charge, and this electric charge is kept as the voltage composition.
12. drive device for display according to claim 10, wherein this level electric current output has the current mirror circuit structure, its generation and output have the electric current of a current value as this level electric current, wherein this current value has predetermined current ratio with respect to the corresponding current value of this level signal that provides with this level signal generating circuit.
13. drive device for display according to claim 1, wherein this selection circuit has a kind of like this device, each of these a plurality of particular rows that are used for to select signal to be applied to this display panel with this overlapping cycle successively, wherein this selection signal is set at this selection mode with this display pixel in every row, thereby will be set at this selection mode corresponding to this display pixel of these a plurality of particular rows successively with this overlapping cycle.
14. drive device for display according to claim 13, wherein this electric current write circuit has a kind of like this device, be used for timing, provide this level electric current successively with this overlapping cycle each in these a plurality of particular rows at this this selection signal of selection circuit application.
15. drive device for display according to claim 13, wherein this level signal generating circuit has a kind of like this device, be used in time series, provide this level signal successively to this electric current write circuit, wherein this level signal is corresponding to every a plurality of these display pixels that are listed as in this display pixel in these a plurality of particular rows, and
This electric current write circuit comprises according to respectively being listed as this display pixel and a plurality of current holding circuits of providing in these a plurality of particular rows, it is according to the timing in this time series source, this level signal of providing by this level signal generating circuit is provided successively, and in these a plurality of particular rows each provide the electric current that has based on the current value of this level signal successively, as the level electric current.
16. drive device for display according to claim 15, wherein each this current holding circuit comprises:
The signal allocation part, it is according to this marking current of timing allocation in this time series source; And
According to the every a plurality of electric current maintenance/outputs that are listed as a plurality of these display pixels in this display pixel in these a plurality of particular rows, each this electric current maintenance/output has: signal retaining part, this marking current that its maintenance is partly distributed by this signal allocation; And level electric current output, it is exported corresponding to the electric current that remains on this marking current in this signal retaining part, as the level electric current;
Wherein, having two kinds of operations to be controlled as in this overlapping cycle carries out simultaneously, promptly, by one of them this level electric current output output in this electric current maintenance/output based on the operation of this level electric current that remains on this marking current in this signal retaining part, with this marking current that in this signal retaining part of another electric current maintenance/output, keeps partly distributing by this signal allocation, and by the operation of this level electric current output output based on this level electric current that remains on this marking current in this signal retaining part.
17. drive device for display according to claim 16, wherein this signal retaining part comprises charge storage circuit, and it is based on this marking current stored charge, and this electric charge is kept as the voltage composition.
18. drive device for display according to claim 16, wherein this level electric current output has the current mirror circuit structure, its generation and output have the electric current of a current value, as this level electric current, wherein this current value has predetermined current ratio with respect to the corresponding current value of this level signal that provides with this level signal generating circuit.
19. a display equipment, based on the video data displays image information, this display equipment comprises at least:
Display panel, many data lines that it has the multi-strip scanning line that is arranged in line direction and is arranged in column direction, and near the point of crossing of this multi-strip scanning line and these many data lines, with a plurality of display pixels of matrix form arrangement;
Scanner driver, it will be set at the selection mode that the level electric current based on this video data is write corresponding to this display pixel of many particular scan, the part of these many particular scan multi-strip scanning line that is this display panel at least wherein, and, at least a portion cycle is set at the overlapped cycle, and this at least a portion cycle is that the display pixel with each row in these a plurality of particular rows is set at least a portion cycle in cycle of selection mode; And
Signal driver, it comprises: level signal generating circuit, video data are provided for this level signal generating circuit, and generate the level signal of the luminance level of each display pixel of control based on this video data; And electric current write circuit, it obtains the level signal corresponding to this display pixel, wherein this display pixel is corresponding to these many particular scan, and this electric current write circuit is according to being set at the cycle of selection mode by this scanner driver, provide the level electric current that has based on the current value of this level signal to display pixel, and in this overlapping cycle, provide simultaneously corresponding to these many particular scan.
20. display equipment according to claim 19, wherein this signal driver has the structure that is independent of this display panel at least.
21. display equipment according to claim 19, wherein this display panel and this electric current write circuit in this signal driver at least are formed in the single insulating substrate.
22. display equipment according to claim 19, wherein this electric current write circuit in this signal driver has the device that is used to generate and export this level electric current, and wherein this level electric current has and by this electric current the opposite current polarity of this marking current that part provides takes place.
23. display equipment according to claim 19, wherein this electric current write circuit has a plurality of field effect thin film transistor (TFT)s at least, and wherein each transistor has single raceway groove polarity, and has the amorphous silicon layer as channel layer.
24. display equipment according to claim 19, wherein this electric current write circuit has a plurality of field effect thin film transistor (TFT)s at least, and wherein each transistor has the polysilicon layer as channel layer.
25. display equipment according to claim 19, wherein this level signal generating circuit generates the marking current as this level signal, and this marking current provides luminance level corresponding to this video data to this display pixel.
26. display equipment according to claim 19, wherein this display pixel comprises:
Pixel-driving circuit, this level electric current based on from this signal driver output generates predetermined drive currents; And
The current-control type light-emitting component, based on the current value of this drive current, emission has the light of predetermined luminance level.
27. display equipment according to claim 26, wherein this pixel-driving circuit has a plurality of field effect thin film transistor (TFT)s, and each transistor has single raceway groove polarity, and as the amorphous silicon layer of channel layer.
28. display equipment according to claim 26, wherein this driving circuit has a plurality of field effect thin film transistor (TFT)s, and each transistor has the polysilicon layer as channel layer.
29. display equipment according to claim 26, wherein this light-emitting component is an organic electroluminescent device.
30. display equipment according to claim 19, wherein this display panel has a plurality of data line group, each data line group has many data lines, and these many data lines are corresponding to the sweep trace quantity of each scanline groups in these many data lines that are confirmed as a set.
31. display equipment according to claim 30, wherein each data line group is arranged in this display panel in each zone between the row of a plurality of these display pixels of arranging with matrix form.
32. display equipment according to claim 30, wherein this display panel has a plurality of scanline groups, and each scanline groups has many particular scan that are defined as a set,
This scanner driver has the device of single scanning signal application in each scanline groups, being set at selection mode simultaneously corresponding to this display pixel of these many particular scan, wherein this single scanning signal is set at selection mode with this display pixel
This level signal generating circuit in this signal driver has a kind of device, be used in time series, provide this level signal to this electric current write circuit successively corresponding to a plurality of display pixels, wherein these a plurality of display pixels are corresponding to each scanline groups in every data line of each data line group, and
This electric current write circuit in this signal driver comprises: a plurality of signal distribution circuits, and the timing in this time series source according to every data line in each data line group, distributes this level signal that is provided by this level signal generating circuit successively; And a plurality of current holding circuits, this level signal that its independent maintenance is partly distributed by this signal allocation, and according to the timing that this sweep signal is applied to each scanline groups, to have electric current based on the current value of this maintenance level signal and offer every data line in each data line group synchronously, as the level electric current, provide this signal distribution circuit and this current holding circuit according to each this data line group.
33. display equipment according to claim 32, wherein each this current holding circuit has multistage signal maintenance/output, each this signal maintenance/output comprises: the signal retaining part, it keeps this level signal that is distributed by this signal distribution circuit according to every data line of each data line group; And level electric current output, its output has electric current based on the current value of this level signal as this level electric current, and wherein this level signal remains in this signal retaining part,
Wherein by the operation of obtaining and keeping this level signal on the one-level of this signal retaining part in this multistage signal maintenance/output, and the operation of on other grades, exporting this level electric current by this level electric current output, be controlled as synchronous execution.
34. display equipment according to claim 33, wherein this signal retaining part comprises charge storage circuit, and it stores the electric charge corresponding to this level signal, and this electric charge is kept as the voltage composition.
35. display equipment according to claim 33, wherein this level electric current output has the current mirror circuit structure, its generation and output have the electric current of a current value as this level electric current, wherein this current value with respect to the corresponding current value of this level signal that provides by this level signal generating circuit, have predetermined current ratio.
36. display equipment according to claim 30, wherein this scanner driver has a kind of device, be used for successively sweep signal being applied to every of this many particular scan with this overlapping cycle, thereby will be set at this selection mode corresponding to this display pixel of these many particular scan successively with this overlapping cycle, wherein this sweep signal is set at this selection mode with this display pixel, and
This electric current write circuit in this signal driver has a kind of device, is used for using at this scanner driver the timing of this sweep signal, successively this level electric current is offered every data line of each data line group with this overlapping cycle.
37. display equipment according to claim 30, wherein this scanner driver has a kind of device, be used for successively sweep signal being applied to every of this many particular scan with this overlapping cycle, thereby will be set at this selection mode corresponding to this display pixel of these many particular scan successively with this overlapping cycle, wherein this sweep signal is set at this selection mode with this display pixel
This level signal generating circuit in this signal driver has a kind of device, be used in time series, provide this level signal to this electric current write circuit successively corresponding to these a plurality of display pixels, wherein these a plurality of display pixels are corresponding to these many particular scan in every data line of each data line group, and
This electric current write circuit has a plurality of current holding circuits, each this current holding circuit provides according to each data line group, timing according to this time series source, this level signal of providing by this level signal generating circuit is provided successively, and in timing corresponding to this sweep signal of application, every data line to each data line group provides the electric current that has corresponding to the current value of this level signal successively, as this level electric current.
38. according to the described display equipment of claim 37, wherein according to every data line in each data line group, each current holding circuit comprises a plurality of electric current maintenance/outputs, this electric current maintenance/output has: the signal allocation part, timing in this time series source, according to every data line in each data line group, distribute this level signal successively; The signal retaining part, this level signal that its maintenance is partly distributed by this signal allocation; And level electric current output, its output has the electric current based on the current value of this level signal, and as the level electric current, wherein this level signal remains in this signal retaining part,
Wherein, having two kinds of operations to be controlled as in this overlapping cycle carries out simultaneously, promptly, this level signal that maintenance is partly distributed by this signal allocation in this signal retaining part in one of this electric current maintenance/output, and by the operation of this level electric current output output, and in any other electric current maintenances/output, export operation based on the level electric current of this level signal that in this signal retaining part, keeps by this level electric current output based on this level electric current of this level signal.
39. according to the described display equipment of claim 38, wherein this signal retaining part comprises charge storage circuit, it stores the electric charge corresponding to this level signal, and this electric charge is kept as the voltage composition.
40. according to the described display equipment of claim 38, wherein this level electric current output has the current mirror circuit structure, its generation and output have the electric current of a current value, as this level electric current, wherein this current value with respect to the corresponding current value of this level signal that part provides takes place by this electric current, have predetermined current ratio.
41. the driving method of a display equipment, based on the video data displays image information,
This display equipment has display panel, this display panel has the multi-strip scanning line that is arranged in line direction and is arranged in many data lines of column direction, and be arranged near the point of crossing of this multi-strip scanning line and many data lines, and arrange a plurality of display pixels with matrix form
This driving method comprises at least:
Receive this video data, and generate the level signal of controlling the luminance level of each display pixel based on video data;
To be set at the selection mode that the level electric current based on this video data is write corresponding to this display pixel of many particular scan, wherein these many particular scan are at least the part of the multi-strip scanning line in this display panel;
Be set at this work of selection mode, comprise the work that is set at the overlapped cycle at least a portion cycle, this at least a portion cycle is that the display pixel with each row in these a plurality of particular rows is set at least a portion cycle in cycle of selection mode;
Obtain this level signal corresponding to this display pixel, wherein this display pixel is corresponding to these many particular scan, generation has this level electric current based on the current value of this level signal, and according to being set at this cycle of selection mode, this level electric current is offered display pixel corresponding to these many particular scan;
In this overlapping cycle, provide this level electric current to display pixel simultaneously corresponding to these many particular scan; And
Make this display pixel with based on the display brightness of the current value of this level electric current and work, wherein this level electric current is provided and writes in this display pixel.
42. according to the driving method of the described display equipment of claim 41, the operation that wherein is used to generate this level signal generates marking current as this level signal, this marking current provides luminance level corresponding to this video data to this display pixel.
43., wherein generate and export the operation that has based on this level electric current of the current value of this level signal and comprise according to the driving method of the described display equipment of claim 41:
Generation has the electric current of a current value, and exports the operation of this electric current that has generated as this level electric current, and wherein this current value has predetermined current ratio with respect to the current value corresponding with this level signal.
44. driving method according to the described display equipment of claim 41, wherein this display pixel is set at this operation of selection mode comprise the operation that the single scanning signal is applied to simultaneously these many particular scan, make and to be set at this selection mode corresponding to this display pixel of this multi-strip scanning line simultaneously, wherein this single scanning signal is set at selection mode with this display pixel, and
Provide the operation of this level electric current to comprise, this level electric current is offered operation corresponding to this display pixel of this multi-strip scanning line simultaneously according to this timing of using this sweep signal.
45. according to the driving method of the described display equipment of claim 44, wherein this level electric current is offered synchronously operation, comprises the operation of its following operation of execution synchronously corresponding to this display pixel of this multi-strip scanning line:
Obtain and keep operation corresponding to this level signal of every sweep trace; And
Based on this level signal that obtains in above-mentioned timing and keep, the operation of exporting this level electric current.
46. driving method according to the described display equipment of claim 41, wherein this display pixel is set at this operation of selection mode successively sweep signal is applied to every of many particular scan with the overlapping cycle, make and to be set at this selection mode successively corresponding to this display pixel of this multi-strip scanning line with this overlapping cycle, wherein this sweep signal is set at this selection mode with this display pixel, and
Provide the operation of this level electric current to comprise, using the timing of this sweep signal, this level electric current is offered operation corresponding to this display pixel of every of this multi-strip scanning line successively with this overlapping cycle.
47. according to the driving method of the described display equipment of claim 46, wherein this level electric current is offered successively operation, carries out in overlapping cycle inter-sync corresponding to this display pixel of this multi-strip scanning line:
Keep this level signal and output operation based on this level electric current of this level signal; With the operation of output based on this level electric current of this level signal that keeps in above-mentioned timing.
CNB2005800006257A 2004-05-28 2005-05-26 OLED display with ping pong current driving circuit and simultaneous scanning of lines Expired - Fee Related CN100423070C (en)

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