CN100417098C - Method for detecting E1/T1 connection error - Google Patents
Method for detecting E1/T1 connection error Download PDFInfo
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- CN100417098C CN100417098C CNB2005100284860A CN200510028486A CN100417098C CN 100417098 C CN100417098 C CN 100417098C CN B2005100284860 A CNB2005100284860 A CN B2005100284860A CN 200510028486 A CN200510028486 A CN 200510028486A CN 100417098 C CN100417098 C CN 100417098C
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Abstract
The present invention discloses an E1/T1 connection error detection method which relates to E1/T1 technique. When normal data is transmitted, the present invention can also monitor that whether the E1/T1 generates connection errors in a real-time mode, and what kinds of connection errors are generated at the same time. Test signals are received and transmitted by utilizing idle or reserved bit positions according to an agreement by using an HDLC controller in the present invention. When the test signals which are transmitted by an end can be received, the occurrence of a loop back connection method is judged. When two devices are directly connected by the E1/T1 or the information of the frame structure of the E1/T1 is transmitted by a middle device in a transparent mode, FDLbits in the ESF frame of the T1 or idle bits (Sa bits) in zero time slot NFAS signals of the PCM frame of the E1 are used for transmitting the test signals. When the middle device is without a signal transparent transmitting function of the frame structure of the E1/T1, the idle time slot or the combination of the idle time slot can be used for transmitting the test signals. The test signals can uniquely identify every E1/T1 physical link, for example, the test signals can be generated according to a link index number code. When test signals of other links are received, the occurrence of a crossed pair wire connection method is judged.
Description
Technical field
The present invention relates to the E1/T1 technology, particularly the connection error detection technique of E1/T1.
Background technology
At present, in the Iub interface of NodeB and base station controller, often adopt the E1/T1 mode to connect.E1 is the bandwidth rates standard of the pulse code modulation multiplex system digital hierarchy primary group (or claiming the mirror group) in Europe, and it comprises the channel of 32 64kbit/s, and the bandwidth rates of primary group is 2.048Mbit/s.China also adopts this standard.The frame length of an E1 is 256 bit, is divided into 32 time slots, and a time slot is 8 bit.Per second has the frame of 8k E1 by interface, i.e. 8K*256=2048kbps.Each time slot accounts for 8bit in the E1 frame, 8*8k=64k promptly contains 32 64K among an E1.E1 has framing, becomes multi-frame and three kinds of modes of framing not, and the 0th time slot is used for the transmission frame synchrodata in the E1 of framing, and all the other 31 time slots can be used for secured transmission of payload data; In becoming the E1 of multi-frame, except the 0th time slot, the 16th time slot is used for command transmitting, have only the the 1st to 15, the 17 to the 31st totally 30 time slots can be used for secured transmission of payload data; And in the E1 of framing not, all 32 time slots all can be used for secured transmission of payload data.In the E1 channel, 8bit forms a time slot (TS), has formed a frame (F) by 32 time slots, and 16 frames are formed a multi-frame (MF).In a frame, TS0 is mainly used in and transmits frame alignment signal (FAS).
T1 and E1 are similar, be a kind of pulse code modulation multiplex system digital hierarchy primary group bandwidth rates standard of (or claiming the mirror group), different is that it is the standard of North America, Japan, comprise 24 telephone channels (each channel is 64kbit/s), bandwidth rates is 1.544Mbit/s.
But in the transmission of E1/T1, may there be physical connection mistake as shown in Figure 1 and Figure 2.Fig. 1 is the crossed pair connected mode, and Fig. 2 is the connected mode that part of links is in loopback.In order to improve the reliability of Iub transmission maintenance, can directly in physical layer, carry out the loopback detection of E1/T1.
Communication apparatus initiatively sends pseudo noise code and tests on physical link, if the pseudo noise code that sends can correctly be received by this communication apparatus, think that then there is loopback in physical link.Can realize the loopback detection of E1/T1 by the mode that on physical link, initiatively sends pseudo noise code.
In actual applications, there is following problem in such scheme: when the connection error of physics and be not the loopback connected mode, but during the crossed pair connected mode, can't detect by the mode that sends pseudo noise code on physical link.That is to say that this detection mode can only realize the loopback detection of E1/T1, can not realize the detection of crossed pair.In addition, loopback detection must be an offline mode, and the transmission that can't walk abreast of test data and normal business datum can't be obtained E1/T1 in real time and whether is in wrapped state.
Cause the main cause of this situation to be, test data is to generate by the chip of physical layer is autonomous, so the content of test data is uncontrollable, also just can't add the information with specific meanings in test data.Therefore, it can only discern the pseudo noise code that oneself sends, and can't discern the pseudo noise code that other links send.As shown in Figure 1, when there is the connected mode of crossed pair in physical equipment, even link 2 has received the pseudo noise code that is used to test that link 1 sends, also can treat as normal Data Receiving to this pseudo noise code, thereby can't discern the connection error whether physical equipment exists crossed pair.In addition, owing to be subjected to the restriction of chip, send pseudo noise code and need take all E1/T1 time slots, therefore, loopback detection must be an offline mode, also just can't obtain E1/T1 in real time and whether be in wrapped state.
Summary of the invention
In view of this, main purpose of the present invention is to provide a kind of E1/T1 connection error detection method, makes whether can monitor E1/T1 in normal data transfer in real time connection error occurs, has occurred for which kind of connection error.
For achieving the above object, the invention provides a kind of E1/T1 connection error detection method, comprise following steps:
Be positioned at the equipment of E1/T1 physical link one end, presetting the bit that presets of time slot, send preset test signals to the E1/T1 physical link, this test signal can uniquely be discerned each the bar E1/T1 physical link in the system of E1/T1 place;
If in the described test signal that bit can receive that this equipment the port is sent that presets that presets time slot, judge that then the loopback connection has appearred in this E1/T1 physical link; If preset presetting bit and can receiving the test signal of representing other E1/T1 physical link of time slot described, judge that then the crossed pair connection has appearred in the E1/T1 physical link;
Wherein, described preset time slot to preset bit be idle or keep according to agreement.
Wherein, under the T1 pattern, if described E1/T1 physical link is direct-connected two equipment, perhaps the E1/T1 physical link the intermediate equipment of process be transparent transmission to the E1/T1 frame structure information, then can use the FDL bits (Facility Data Link Bits) in the ESF frame (Extend Superframe) of T1 to transmit described test signal.
In this external described method, under the E1 pattern, if described E1/T1 physical link is direct-connected two equipment, perhaps the E1/T1 physical link the intermediate equipment of process be transparent transmission to the E1/T1 frame structure information, then can use the idle bit Sa bits (SpareBits) in the E 1PCM frame 0 time slot NFAS signal to transmit described test signal.
In this external described method, middle also when not possessing the intermediate equipment of E1/T1 frame structure signal transparent transmission function if described E1/T1 physical link is when connecting two equipment, can use idle time slot or the described test signal of its combination of transmitted in the transmission.
In this external described method, the equipment of the described E1/T1 of being positioned at physical link one end is received and dispatched the signal on the E1/T1 physical link by the High level data link control controller.
In this external described method, described test signal is received and dispatched to become HDLC frame mode.
In this external described method, described test signal is received and dispatched in non-HDLC frame mode.
In this external described method, described test signal can be encoded according to the call number of E1/T1 physical link.
By relatively finding, the main distinction of technical scheme of the present invention and prior art is, use the hdlc controller utilization free time or, the loopback connection occurred if can receive the test signal that local terminal is sent out then be judged to be according to the bit transmitting-receiving test signal that agreement keeps.Two equipment rooms are when direct-connected or intermediate equipment is to E1/T1 signal transparent transmission with E1/T1, can be with FDL bits (Facility Data Link Bits) in the ESF frame (Extend Superframe) of T1 or idle bit Sa bits (Spare Bits) transmitted test signal in the E1PCM frame 0 time slot NFAS signal.When the intermediate equipment that does not possess E1/T1 frame structure signal transparent transmission function is arranged, available free time slot or the described test signal of its combination of transmitted
Test signal can each bar E1/T1 physical link of unique identification, for example can produce according to the link index numbers coding; If receive the opposite end non-preset the test signal of link then be judged to be the crossed pair connection has appearred.
Difference on this technical scheme, brought comparatively significantly beneficial effect, promptly because used hdlc controller to carry out the transmitting-receiving of test signal, so can control the content and the used bit of transmitting-receiving of test signal, thereby can avoid used time slot of normal data transfer and bit, when real-time monitoring E1/T1 connection error to the transmission of normal data without any influence.The proposition of " FDL Bits " or " Sa bits " makes more practicability of the solution of the present invention.
Because test signal can each bar E1/T1 physical link of unique identification, so can detect loopback connection and crossed pair connection exactly.
Description of drawings
Fig. 1 is the connected mode of crossed pair among the E1;
Fig. 2 is the connected mode that part of links is in loopback among the E1;
Fig. 3 is the direct-connected schematic diagram of two communication apparatus among the T1;
Fig. 4 is the method flow diagram according to the detection two communication apparatus physical links of first embodiment of the invention;
Fig. 5 is an ESF frame control bit schematic diagram among the T1;
Fig. 6 is the connection diagram of a plurality of transparent transmission equipment of two communication apparatus process among the E1;
Fig. 7 is the method flow diagram according to the detection two communication apparatus physical links of second embodiment of the invention;
Fig. 8 is the structural representation of basic frame among the E1;
Fig. 9 is the connection diagram of a plurality of non-transparent transmission equipment of two communication apparatus process among the E1/T1;
Figure 10 is the method flow diagram according to the detection two communication apparatus physical links of third embodiment of the invention.
Embodiment
For making the purpose, technical solutions and advantages of the present invention clearer, the present invention is described in further detail below in conjunction with accompanying drawing.
In first embodiment of the present invention,, when two communication apparatus are direct-connected (as shown in Figure 3), can detect the connection error that whether has physics in the T1 link according to method flow diagram as shown in Figure 4 when under the T1 pattern.Following mask body is introduced the step of this flow process.
As shown in Figure 4, in step 410, High level data link control controller (hdlc controller) is received and dispatched test signal at " FDL Bits " to the T1 physical link." FDL Bits " is under the T1 pattern, the reservation position in the ESF frame.In the ESF frame, 24 control bits are arranged, wherein, 12 control bits (1,3,5,7,9,11,13,15,17,19,21) are left the data link communication usefulness of sending and receiving devices end for, are called " FDL Bits " (as shown in Figure 5).Because the FDL Bits of T1 also is not used in transmitting user data, under the direct-connected situation of two communication apparatus, Data Control position FDL Bits can be not shared by other equipment yet, so, can utilize " FDL Bits " to come the bearing test signal, can realize by the bit that hdlc controller is controlled the bearing test data.Here said test signal is a preset test signals, just is a unique test signal of each link setting in advance, and this test signal can generate according to place system and link index numbers coding, to guarantee its uniqueness.That is to say that test signal can be discerned each the bar T1 physical link in the system of T1 place uniquely, the content that sends test massage is controlled by hdlc controller.Need to prove that the reception of test signal is carried out synchronously with transmission, and is controlled by hdlc controller.In addition, the send mode of test signal is also controlled by HDLC, can be that the framing mode also can be non-framing mode.The framing mode is exactly that the form of test signal with the HDLC frame encapsulated, and functions such as the initial end mark of address identification/frame/CRC generation and verification are provided for each test signal.Receiving equipment can take out complete data between frame start mark and frame end mark.Non-framing mode directly sends data without any additional information exactly, periodically sends test massage in link usually.
Then, enter step 420, judge whether the test signal that the port receives is the test signal that the port sends.Because in step 410, the test signal that is sent by hdlc controller control generates according to the link index numbers coding, can uniquely discern each the bar T1 physical link in the system of T1 place, so, hdlc controller is after receiving test signal on the FDL Bits of Data Control position, as long as just can judge according to the information in the test signal whether this test signal is the test signal that the port sends.If the test signal that the test signal that receives is exactly a port to send so just enters step 430; Otherwise, enter step 440.
In step 430, report T1 loopback error message.Because in step 420, learnt that the signal that hdlc controller receives is exactly the test signal that the port sends, there is loopback in the physical link that the port place is described, so, send a loopback error message, inform the higher level in network operation maintenance centre or the equipment, there is loopback in the physical link at the port place.
In step 440, judge whether the test signal that the port receives is the test signal (test signal that port sent of other link beyond the link of the port place) of other links of representative.Because in step 410, the test signal that is sent by hdlc controller control generates according to the link index numbers coding, can uniquely discern each the bar T1 physical link in the system of T1 place.Whether so hdlc controller is after receiving test signal on the FDL Bits of Data Control position, can judge according to this signal is that opposite equip. presets the test signal that port sends.If not, just can judge this test signal according to the uniqueness of test signal is that port sends, and enters step 450; If, illustrate that the connection link of the port is normal, get back to step 410, continue to receive and dispatch test signal at Data Control position FDL Bits to the T1 physical link by hdlc controller.
In step 450, report crossed pair connection error message.Just send a message, inform the higher level in network operation maintenance centre or the equipment, the physical link at the port place exists crossed pair to connect.Because in step 440, having judged the test signal that the port receives is to represent the test signal of other links, and can be according to the uniqueness of test signal, learn this test signal by which port is sent, so, in the message that reports, can also comprise the information that there are crossed pair connection error in the port and which port.
Because that present embodiment uses is Data Control position FDL Bits, this is the special bit that keeps, normal data can not used, so can avoid used time slot of normal data transfer and bit, transmission to normal data does not have any impact, thereby the link that can monitor in real time among the T1 connects.In addition, the content owing to controlled test signal by hdlc controller makes the data link among the test signal unique identification T1.So, can detect in the link connection whether have loopback connection and crossed pair connection exactly, or even which port to have the crossed pair connection with.
The following describes the second embodiment of the present invention.
When under the E1 pattern, when two communication apparatus connect through a plurality of transparent transmission equipment (as shown in Figure 6), can detect the connection error that whether has physics in the E1 link according to method flow diagram as shown in Figure 7.The E1 frame structure signal of E1 frame structure signal that transparent transmission equipment is exported and input is on all four, and in other words, from the result of input and output, the effect to the E1/T1 signal frame structure of transparent transmission equipment is " transparent ".
As shown in Figure 7, in step 710, hdlc controller is received and dispatched test signal at " Sa_BIT " to the E1 physical link." Sa_BIT " is under the E1 pattern, the reservation position (as shown in Figure 8) of basic frame.Because 0 time slot of E1 also is not used in transmitting user data, under the situation that two communication apparatus connect through a plurality of transparent transmission equipment, 0 time slot can be not shared by other equipment yet, so, can utilize " Sa_BIT " in 0 time slot to come the bearing test signal.Here said test signal is a preset test signals, and pre-setting method is identical with step 410.In addition, identical with step 410 is, the content that sends test massage is controlled by hdlc controller, the bit of the transmitting-receiving of test signal and bearing test data is also controlled by hdlc controller, the send mode of test signal is also controlled by HDLC, can be into HDLC frame or non-HDLC frame, and the acceptance of test signal is synchronous with sending.This step only is that with the difference of step 410 bit of bearing test signal is different, and this step is used " Sa_BITS ", and step 410 is used is " FDL Bits " in the ESF frame.
In step 720, hdlc controller judges whether this test signal is the test signal that the port sent, and determination methods is identical with step 420, does not repeat them here after receiving test signal on " Sa_BIT " of 0 time slot.If the test signal that this test signal is a port to be sent just enters step 730; If not, just enter step 740.
In step 730, report E1 loopback error message.This step is identical with step 430, does not repeat them here.
In step 740, hdlc controller judges whether this test signal is the test signal of other links of representative, and determination methods is identical with step 440, does not repeat them here after receiving test signal on " Sa_BIT " of 0 time slot.If this test signal is to represent the test signal of other links, just can judge this test signal according to the uniqueness of test signal is that port sends, and enters step 750; If not, illustrate that the connection link of the port is normal, get back to step 710, continue to receive and dispatch test signal at " Sa_BIT " of 0 time slot to the E1 physical link by hdlc controller.
In step 750, report crossed pair connection error message.This step is identical with step 450, does not repeat them here.
The present embodiment and first embodiment are basic identical, and difference only is that first embodiment is under the T1 pattern, utilizes FDL bits to come the bearing test signal, and present embodiment is under the E1 pattern, utilizes " Sa_BIT " of 0 time slot to come the bearing test signal.So present embodiment can arrive the action effect of first embodiment fully.
The following describes the third embodiment of the present invention.
When under the E1/T1 pattern, when two communication apparatus connect through a plurality of non-transparent transmission equipment (as shown in Figure 9), can detect the connection error that whether has physics in the E1/T1 link according to method flow diagram as shown in figure 10.
In step 1010, hdlc controller at one's leisure the combination of crack or idle time slot to E1/T1 physical link transmitting-receiving test signal.Owing to there are other equipment in the transmission, and this equipment transparent transmission not, so other equipment during 0 time slot can be transmitted are shared.Therefore, can only utilize the combination of idle time slot or idle time slot to E1/T1 physical link transmitting-receiving test signal.In the present embodiment, idle time slot can be selected the 16th time slot, because the 16th time slot among the E1/T1 is often given over to signaling control purposes by telecom operators.So, can in the 16th time slot, specify several bits to come the bearing test signal.If the 15th time slot also is not by the idle time slot of customer use, partial bit bit combination in the 15th, 16 time slots of free time can be worked the bit that is used as the bearing test signal so.Here said test signal is a preset test signals, and pre-setting method is identical with step 410.In addition, identical with step 410 is, the content that sends test massage is controlled by hdlc controller, the bit of the transmitting-receiving of test signal and bearing test data is also controlled by hdlc controller, the send mode of test signal is also controlled by HDLC, can be framing or non-framing mode, and the acceptance of test signal be synchronous with sending.This step only is that with the difference of step 410 bit of bearing test signal is different, and this step is used the designated bit position in the combination of idle time slot or idle time slot, and step 410 is used is " FDL Bits " in the ESF frame.
In step 1020, hdlc controller judges whether this test signal is the test signal that the port sent, and determination methods is identical with step 420, does not repeat them here after receiving test signal on the designated bit position in the combination of crack or idle time slot at one's leisure.If the test signal that this test signal is a port to be sent just enters step 1030; If not, just enter step 1040.
In step 1030, report E1 loopback error message.This step is identical with step 430, does not repeat them here.
In step 1040, hdlc controller judges whether this test signal is the test signal of other links of representative, and determination methods is identical with step 440, does not repeat them here after receiving test signal on the designated bit position in the combination of crack or idle time slot at one's leisure.If this test signal is to represent the test signal of other links, just can judge this test signal according to the uniqueness of test signal is that port sends, and enters step 1050; If not, illustrate that the connection link of the port is normal, get back to step 1010, continue by hdlc controller at one's leisure the designated bit position in crack or the combination of idle time slot to E1 physical link transmitting-receiving test signal.
In step 1050, report crossed pair connection error message.This step is identical with step 450, does not repeat them here.
The present embodiment and first embodiment are basic identical, difference only is that first embodiment is under the T1 pattern, utilizing " FDL Bits " to come bearing test signal, present embodiment is under the E1/T1 pattern, utilizes the designated bit position in the combination of idle time slot or idle time slot to come the bearing test signal.So present embodiment can arrive the action effect of first embodiment fully.
Though by with reference to some preferred embodiment of the present invention, the present invention is illustrated and describes, those of ordinary skill in the art should be understood that and can do various changes to it in the form and details, and without departing from the spirit and scope of the present invention.
Claims (8)
1. an E1/T1 connection error detection method is characterized in that, comprises following steps:
Be positioned at the equipment of E1/T1 physical link one end, presetting the bit that presets of time slot, send preset test signals to the E1/T1 physical link, this test signal can uniquely be discerned each the bar E1/T1 physical link in the system of E1/T1 place;
If in the described test signal that bit can receive that this equipment the port is sent that presets that presets time slot, judge that then the loopback connection has appearred in this E1/T1 physical link; If preset presetting bit and can receiving the test signal of representing other E1/T1 physical link of time slot described, judge that then the crossed pair connection has appearred in the E1/T1 physical link;
Wherein, described preset time slot to preset bit be idle or keep according to agreement.
2. E1/T1 connection error detection method according to claim 1, it is characterized in that, under the T1 pattern, if described E1/T1 physical link is direct-connected two equipment, perhaps the E1/T1 physical link the intermediate equipment of process be transparent transmission to the E1/T1 frame structure information, then use " FDL bits " in " ESF " frame of T1 to transmit described test signal.
3. E1/T1 connection error detection method according to claim 1, it is characterized in that, under the E1 pattern, if described E1/T1 physical link is direct-connected two equipment, perhaps the E1/T1 physical link the intermediate equipment of process be transparent transmission to the E1/T1 frame structure information, then use the idle bit " Sa bits " in E1 " PCM " the frame 0 time slot NFAS signal to transmit described test signal.
4. E1/T1 connection error detection method according to claim 1, it is characterized in that, if described E1/T1 physical link is when connecting two equipment, when there is the intermediate equipment that does not possess E1/T1 frame structure signal transparent transmission function the centre, use idle time slot or the described test signal of its combination of transmitted in the transmission.
5. according to each described E1/T1 connection error detection method in the claim 1 to 4, it is characterized in that the equipment of the described E1/T1 of being positioned at physical link one end is received and dispatched the signal on the E1/T1 physical link by the High level data link control controller.
6. E1/T1 connection error detection method according to claim 5 is characterized in that described test signal is received and dispatched in High-Level Data Link Control frame mode.
7. E1/T1 connection error detection method according to claim 5 is characterized in that, described test signal is received and dispatched in non-High-Level Data Link Control frame mode.
8. E1/T1 connection error detection method according to claim 1 is characterized in that described test signal is encoded according to the call number of E1/T1 physical link and place system.
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN101145890B (en) * | 2007-03-06 | 2010-06-02 | 中兴通讯股份有限公司 | An automatic extraction and recording device for periodic performance report |
| CN101360131B (en) * | 2007-08-02 | 2011-12-07 | 中兴通讯股份有限公司 | Method for accurately locating communication control port error |
| CN101442765B (en) * | 2007-11-21 | 2012-02-29 | 大唐移动通信设备有限公司 | Method and apparatus for implementing link connectivity detection |
| CN101860889B (en) * | 2009-04-09 | 2012-10-03 | 大唐移动通信设备有限公司 | Method for detecting IMA E1 link hybrid lines, device and system |
| CN101835186A (en) * | 2010-03-01 | 2010-09-15 | 华为技术有限公司 | Detection method and detection device of misconnection of Yuanyang lines and base station subsystem |
| CN101883377B (en) * | 2010-06-24 | 2015-06-03 | 中兴通讯股份有限公司 | Detection method and system of misconnection fault of E1 line or T1 line, and base station |
| CN102833767B (en) * | 2011-06-16 | 2017-05-10 | 中兴通讯股份有限公司 | Self-loop processing method and device |
| CN102388582B (en) * | 2011-08-29 | 2014-05-07 | 华为技术有限公司 | Transmission method for adding idle bit, transmitter and network system |
| CN103546340B (en) * | 2013-09-29 | 2016-10-05 | 西安邮电大学 | A kind of method detecting the connection of IMA crossed pair |
| CN109547403B (en) * | 2018-09-29 | 2021-04-06 | 江苏新质信息科技有限公司 | Method for in-band message communication of E1 channel password equipment |
| CN110620692A (en) * | 2019-09-25 | 2019-12-27 | 北京格林威科科技有限公司 | 2M cross misconnection monitoring and alarm identification system for multiple link sides of 2M switching equipment |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH09229989A (en) * | 1996-02-23 | 1997-09-05 | Fujitsu Ltd | Communication system |
| US20020102050A1 (en) * | 2000-12-20 | 2002-08-01 | Chauvin Jean Guy | Apparatus and method for control messaging in an optical network |
| US20030051198A1 (en) * | 2001-08-16 | 2003-03-13 | Biewenga Alexander Sebastian | Electronic circuit and method for testing |
| CN1467945A (en) * | 2002-05-30 | 2004-01-14 | ��ʿͨ��ʽ���� | Optical communication node and optical network system |
| CN1505326A (en) * | 2002-12-02 | 2004-06-16 | 深圳市中兴通讯股份有限公司 | Error code detection apparatus and method for digital exchange system |
-
2005
- 2005-08-04 CN CNB2005100284860A patent/CN100417098C/en not_active Expired - Fee Related
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH09229989A (en) * | 1996-02-23 | 1997-09-05 | Fujitsu Ltd | Communication system |
| US20020102050A1 (en) * | 2000-12-20 | 2002-08-01 | Chauvin Jean Guy | Apparatus and method for control messaging in an optical network |
| US20030051198A1 (en) * | 2001-08-16 | 2003-03-13 | Biewenga Alexander Sebastian | Electronic circuit and method for testing |
| CN1467945A (en) * | 2002-05-30 | 2004-01-14 | ��ʿͨ��ʽ���� | Optical communication node and optical network system |
| CN1505326A (en) * | 2002-12-02 | 2004-06-16 | 深圳市中兴通讯股份有限公司 | Error code detection apparatus and method for digital exchange system |
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