CN100405851C - Motion vector prediction multiplex design method in multi-mode standard decoder - Google Patents
Motion vector prediction multiplex design method in multi-mode standard decoder Download PDFInfo
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Abstract
The present invention relates to a motion vector prediction multiplex design method in a multi-mode standard decoder. (1) An avs_flag mark is sent to an MVP module by firmware; (2) the form of a subpartition embedded below a partition is adopted for the motion vector prediction; (3) adjacent information modules are obtained, the number of a frame field adaptive mark is set, so that two different standards can be processed in the same way, and accordingly, multiplexing can be realized; (4) by the design of reference macroblock information, the movement information of parallel macroblocks is always obtained from a first reference picture in a motion information cache of a reference picture macroblock and is always kept in the first reference picture during update. (5) the design for an updating mechanism of the data flow of adjacent blocks enables the information content of adjacent blocks needed for multiplexing to be reduced to the minimum, and the number of times for reading an external memory is reduced. The method of the present invention has the advantages that the compatibility of MVP functions of two AVS video coding standards is realized; not only the correctness is ensured, but also the hardware area of a decoder is greatly reduced. By verification, the cache on a chip can be reduced by 75%, the resource occupancy condition is 70% that for independently and simultaneously realizing two standards, and the real-time decoding for a high-definition picture can be realized.
Description
Technical field
The present invention relates to a kind of motion vector prediction multiplex design method, particularly a kind of motion-vector prediction (MVP) multiplex design method in multi-mode standard decoder H.264/AVS.
Background technology
AVS is that Chinese first has the digital audio/video encoding and decoding standard of independent intellectual property right, and full name is " an information technology advanced audio/video encoding standard ".H.264 be the video encoding standard that video joint working group (JVT) exploitation that the relevant video coding expert by two International Standards Organization of ITU-T and ISO constitutes jointly is formulated, these two kinds of standards as compared with the past video compression standard on code efficiency has all had significant raising, but meanwhile hardware realizes that complexity of decoding also rises thereupon, brings certain challenge to hardware designs.
In real-time high definition video decoding computing, need a large amount of arithmetic logics and have a large amount of intermediate data to preserve and to read.Especially will realize supporting simultaneously AVS to reach the H.264 high definition decoder of standard, if simply with two decoders stacks, its area will be very huge.In this case, the correlation that how to make full use of standard realizes that the at utmost multiplexing of decoder just becomes more and more important.
Summary of the invention
Technical problem to be solved by this invention is to provide a kind of AVS that can support simultaneously to reach H.264 motion-vector prediction (MVP) multiplex design method of the high definition decoder of standard at above-mentioned prior art present situation.
The present invention solves the problems of the technologies described above the technical scheme that is adopted: motion vector prediction multiplex design method in a kind of multi-mode standard decoder, it is characterized in that: (1) sends to avs_flag sign of motion-vector prediction module by firmware, reach the H.264 foundation of two kinds of digital audio/video encoding and decoding standards as distinguishing AVS, can make the described two kinds of standards of same resume module; (2) form of the nested down sub-piece circulation of piecemeal circulation is adopted in the major cycle of block motion vector prediction, algorithm that can compatible described two kinds of standards; (3) get in the adjacent block information module, utilize the frame field adaptive sign is put number, make two kinds of various criterions can carry out same treatment, realize multiplexing fully; (4) get the design of reference macroblock information, all movable informations of parallel macro block always first reference picture from reference picture macro block movable information buffer memory are got, also always be saved in first reference picture during renewal, simplified the logic of access, improved the speed of access; (5) to the design of adjacent blocks of data stream update mechanism, only upgrade closely adjacent adjacent block, it is minimum that multiplexing required adjacent block amount of information is reduced to, and it is right only to read upper right macro block during renewal, deposits in the buffer memory of left adjacent macro block, has reduced and has read the external memory number of times.
Compared with prior art, the invention has the advantages that, realized H.264 and the compatibility of two kinds of video encoding standard MVP of AVS function, not only guaranteed correctness, and can reduce the decoder hardware area significantly.Empirical tests can reduce buffer memory on 75% the sheet, and occupation condition is to realize simultaneously 70% of two standards realizing the real-time decoding to high-definition image separately.
Embodiment
Embodiment describes in further detail the present invention below in conjunction with accompanying drawing.
Motion vector prediction multiplex design method in a kind of multi-mode standard decoder comprises:
1.MVP module, can be divided into input module, motion-vector prediction major cycle module, piece motion prediction module according to the character of data flow, gets the adjacent block information module, get reference macroblock information and output module, its multiplex design method:
1) input module: comprise " read command module (read cmd fifo) ", " reading residual information module (read vldfifo) ", they transmit command and residual information respectively.At first send an avs_flag sign when firmware (firmware) sends sequence-level information, all modules thereafter all indicate the different part of distinguishing in two standards by this, make two standards of same resume module.
2) motion-vector prediction major cycle module:, and in macro block, Module Division can be become several fritters with sub-partition by partition because the minimum task that each module (for example MVP module, IQ module etc.) is independently finished when No. two system divides of whole phoenix core is the decode procedure of a macro block.The fritter that does not have sub-partition among the AVS, that is to say the division that does not have 8x8 following, in addition and macroblock partitions H.264 be duplicate, therefore circulation can be made the form of nested sub-partition under the partition, just passable as long as solution AVS does not have the son division to allow AVS ignore subcycle.The algorithm of the compatible two kinds of standards of design energy overlaps the independently logical block of circulative metabolism minimizing 33% than design two like this.
3) piece motion prediction module (block mv prediction): the processing method to two standards is basic identical, and only AVS the amount of calculation here is much bigger, need not particular design.
4) get adjacent block information module (GetNeighborBlkInfo:get neighbor block information): only need when AVS, the frame field adaptive sign be changed to 0, just can accomplish and H.264 identical processing method.Thereby two kinds of various criterions can be carried out same treatment, realize multiplexingly fully, have lowered 50% logical block than independent design.
5) get reference macroblock information: comprise three modules, get image level information (GetColPicInfo), get macroblock layer information (getMBColocated) and get three modules of piece level information (get4x4Colocated).Because parallel reference picture can reach 5 frames (with regard to level among its main profile is more than 4.0) H.264, and only use the back of frame decoding recently among the AVS, so do not exist among the AVS and go to seek the problem which width of cloth reference picture it belongs to when getting parallel macro block to reference frame.That is to say the problem that not consider that the above information of macro block is preserved.So only give tacit consent to when multiplexing become to walk abreast macro block information always first reference picture from reference picture macro block information buffer memory get, and also always be saved in first reference picture when upgrading.Design can be simplified the logic of access like this, improves the speed of access.
6) output module: comprise output to chip external memory (memory access), reference picture is obtained module (RDR) and loop filter module (deblock loop filter) three parts, two kinds of standard treatment methods of this three part are basic identical, need not to carry out particular design.
2. the design of adjacent blocks of data update mechanism, it is minimum that the amount of information of the adjacent block of required preservation when multiplexing is reduced to, and do not had the preservation of redundant information; Reduced to go to read the number of times of external memory simultaneously.
1) the multiplexing interior cache size of sheet is added up:
(1) information of adjacent block motion vector and reference key:
Each fritter needs to preserve the information of (just will go sheet to get): 39bits * 2=78 (bits) outward;
Adjacent block needs to preserve: 38 * 78=2964 (bits)
Current macro is preserved needs: 32 * 78=2496 (bits)
Need altogether: 2964+2496=5460 (bits)
(2) information of reference listing:
Need to preserve two tabulations of current band and, need altogether: 26 * 6 * 2 * 5 * 2=3120 (bits) with reference to two tabulations of the band at parallel macro block place
(3) information of fifo queue (fifo):
Need to preserve at least: cmd_mvp_fifo:27 * 32=864 (bits);
vld_mvp_fifo：32×28＝896(bits)；
Need altogether: 864+894=1760 (bits);
(4) total cache size is: 5460+3120+1760=10340 (bits)
If to AVS with H.264 design buffer memory on the sheet separately, the information of so required adjacent block motion vector and the information of reference key and reference listing will be preserved respectively, always the size of buffer memory can be: 5460*2+3120*1.2+1760=16424 (bits),
As seen reduced buffer memory on 37% the sheet after multiplexing.
2) process of Geng Xining:
(1) initialization procedure before the current macro decoding:
Eight fritters of last adjacent macro block centering are saved in the right buffer memory (buffer) of upper left adjacent macro block;
Eight fritters of upper right adjacent macro block centering are read in the right buffer memory of adjacent macro block (buffer);
From external memory, read the information of eight right fritters of upper right macro block.
(2) after the current macro decoding is finished:
The piece that may be used for reference in the adjacent macro block in a left side is saved in outside the sheet;
The piece that needs in the current decoding block to preserve is stored in the buffer memory (buffer) of left adjacent macro block.
Under this update mechanism, each macro block reads the adjacent block information that external memory only is 4 fritters (need read 8 when for the left column macro block), also needs to read 16 parallel little block messages when for the direct decoding pattern.The information of 2 fritters of each read-write under 128 bandwidth.
Because be the little block message of only access and current macro " closely adjacent ", be realize being correctly decoded institute must and minimum neighborhood information, reduced by 75% amount of information than all 16 fritters of macro block of access, also reduced to 25% so visit the number of times of external memory accordingly.
Claims (1)
1. motion vector prediction multiplex design method in the multi-mode standard decoder is characterized in that:
(1) sends to avs_flag sign of motion-vector prediction module by firmware, reach the H.264 foundation of two kinds of digital audio/video encoding and decoding standards, can make the described two kinds of standards of same resume module as distinguishing AVS;
(2) form of the nested down sub-piece circulation of piecemeal circulation is adopted in the major cycle of block motion vector prediction, algorithm that can compatible described two kinds of standards;
(3) get in the adjacent block information module, utilize the frame field adaptive sign is put number, make described two kinds of various criterions can carry out same treatment, realize multiplexing fully;
(4) get the design of reference macroblock information, all movable informations of parallel macro block always first reference picture from reference picture macro block movable information buffer memory are got, also always be saved in first reference picture during renewal, simplified the logic of access, improved the speed of access;
(5) to the design of adjacent blocks of data stream update mechanism, only upgrade closely adjacent adjacent block, it is minimum that multiplexing required adjacent block amount of information is reduced to, and it is right only to read upper right macro block during renewal, deposits in the buffer memory of left adjacent macro block, has reduced and has read the external memory number of times.
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| WO2007081139A1 (en) | 2006-01-09 | 2007-07-19 | Lg Electronics Inc. | Inter-layer prediction method for video signal |
| BRPI0706378A2 (en) * | 2006-01-09 | 2011-03-22 | Lg Eletronics Inc | interlayer prediction method for video signal |
| CN101516066B (en) * | 2008-02-18 | 2011-02-23 | 中国移动通信集团公司 | Data flow transmission method and mobile communication system |
| CN101674487B (en) * | 2008-09-10 | 2011-11-23 | 中兴通讯股份有限公司 | Video coding method and video coding device |
| CN102348114B (en) * | 2010-07-30 | 2013-12-04 | 中国科学院微电子研究所 | Intra predictor structure in multimode video decoder |
| US8755437B2 (en) * | 2011-03-17 | 2014-06-17 | Mediatek Inc. | Method and apparatus for derivation of spatial motion vector candidate and motion vector prediction candidate |
| US10701391B2 (en) * | 2017-03-23 | 2020-06-30 | Qualcomm Incorporated | Motion vector difference (MVD) prediction |
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