CN100399379C - Display panel related electronic apparatus and driving method - Google Patents

Display panel related electronic apparatus and driving method Download PDF

Info

Publication number
CN100399379C
CN100399379C CNB2005100747129A CN200510074712A CN100399379C CN 100399379 C CN100399379 C CN 100399379C CN B2005100747129 A CNB2005100747129 A CN B2005100747129A CN 200510074712 A CN200510074712 A CN 200510074712A CN 100399379 C CN100399379 C CN 100399379C
Authority
CN
China
Prior art keywords
data
signal line
group
signal
display panel
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CNB2005100747129A
Other languages
Chinese (zh)
Other versions
CN1687981A (en
Inventor
张哲志
洪集茂
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
AU Optronics Corp
Original Assignee
AU Optronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by AU Optronics Corp filed Critical AU Optronics Corp
Priority to CNB2005100747129A priority Critical patent/CN100399379C/en
Publication of CN1687981A publication Critical patent/CN1687981A/en
Application granted granted Critical
Publication of CN100399379C publication Critical patent/CN100399379C/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Landscapes

  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

The present invention relates to a display panel which comprises a first signal line, a first data signal line, a first scanning line interlaced with the first data signal line, a first pixel unit coupling the first data signal line with the first scanning line, a first switch element provided with a first terminal coupled with the first line, a first storage capacitor coupled between the second terminal of the first switch element and a ground terminal, and a second switch element coupled between the first storage capacitor and the first signal line.

Description

Display panel and relevant electronic installation and driving method, image display device
Technical field
The present invention is relevant for a kind of display panel, especially about a kind of display panel that can keep in from the video data of data driver.
Background technology
1A figure is the synoptic diagram of a conventional display panels, and 1B figure is the driving sequential chart of conventional display panels.As shown in 1A figure, general conventional display panels has K bar scan signal line G1~GK, N bar data signal line DL1~DLN, a plurality of pixel cell P11~PNK, scanner driver and data driver.Scanner driver is driven sweep signal wire G1~GK in order, makes pixel cell P11~PNK to be driven according to the video data that data driver is output on the data signal line.For instance, when scan signal line G1 is scanned driver and starts, export video data on data signal line DL1~DLN to, will drive the pixel cell P11~PN1 that is connected with scan signal line G1 by data driver.In like manner as can be known, when scan signal line G2 is scanned driver and starts, export video data on data signal line DL1~DLN to, will drive the pixel cell P12~PN2 that is connected with scan signal line G2 by data driver.The rest may be inferred, when scan signal line GK is scanned driver and starts, exports video data on data signal line DL1~DLN to by data driver, will drive the pixel cell P1K~PNK that is connected with scan signal line GK.
In general, data driver is a plurality of drive integrated circults (IC) that comprise corresponding to data signal line DL1~DLN, and each drive IC is used to drive the signal wire of prearranged number.Heal greatly when the data signal line number, then increase of the number of required drive IC and the required flexible printed circuit board of drive IC (FPC) also can increase.Therefore, in manufacture process, all can increase in flexible printed circuit board to man-hour panel on welding the man-hour of welding (bonding) drive IC.
Summary of the invention
In view of this, one of purpose of the present invention is to store video data or preliminary filling data from data driver, uses the number that reduces required drive IC in the data driver.
For reaching above-mentioned purpose, the invention provides a kind of display panel, comprise that first signal wire, first data signal line, first sweep trace are staggered with this first data signal line; First pixel cell is to couple this first data signal line and this first sweep trace; First on-off element has first end and couples this first data signal line; First storage capacitors is coupled between second end and earth terminal of this first on-off element; And the second switch element, be coupled between this first storage capacitors and this first signal wire.
According to above-mentioned purpose, the present invention also provides a kind of driving method of display panel, comprise at first at M during the cycle, M-1 is stored in N first group of data in first storage capacitors in advance during the cycle, by N bar data signal line, be sent to N the first corresponding pixel cell, and use and drive this N the first corresponding pixel cell, simultaneously with on the secondary signal line from second group of data storing of data driver to individual second storage capacitors of corresponding N.And at M+1 during the cycle, with these stored second group of data in this N second storage capacitors, by this N bar data signal line, be sent to corresponding N second pixel cell, and use and drive this corresponding N second pixel cell, simultaneously with on first signal wire from the 3rd group of data storing of this data driver to this corresponding N first storage capacitors.
Description of drawings
1A figure is existing display panel.
1B figure is the control timing figure of existing display panel.
2A and 2B figure are the display panel of the embodiment of the invention.
The 3rd figure is the control timing figure of display panel of the present invention.
The 4th figure is another control timing figure of display panel of the present invention.
The 5th figure is the another control timing figure of display panel of the present invention.
The 6th figure is the electronic installation of the embodiment of the invention.
Label declaration
100: display panel; 110: scanner driver;
120: data driver; 130: array of pixels;
200: electronic installation; 210: shell;
220: power supply unit;
G1~GK: scan signal line; SL1~SLN: signal wire;
DL1~DL6: data signal line; P11~PNK: pixel cell;
C11~C62: capacitor; M11~M64: on-off element;
SWC1~SWC12: signal control circuit;
Godd, Geven, Gr, Gg, Gb: control signal;
D10r~D18r, D10g~D18g, D10b~D18b, D20r~D28r, D20g~D28g, D20b~D28b: video data;
D11r~D18r, D11g~D18g, D11b~D18b, D21r~D28r, D21g~D28g, D21b~D28b: preliminary filling data.
Embodiment
For above and other objects of the present invention, feature and advantage can be become apparent, a preferred embodiment cited below particularly, and cooperate appended diagram, be described in detail below:
2A and 2B figure are synoptic diagram that shows display panel of the present invention.In this figure, with general array of pixels commonly used, for example 1024 * 768 array of pixels or 800 * 600 array of pixels do not illustrate; Array of pixels only to simplify, 6 * 4 of 2A and 2B figure array of pixels for example, the explanation of doing to list.As shown in the figure, display panel 100 comprises scanner driver 110, data driver 120, array of pixels 130 and a plurality of signal control circuit SWC1~SWC12.
Scanner driver 110 is used for the control signal according to time schedule controller (not shown), scanning element array 130, i.e. the scan signal line G1~G4 of sequential start array of pixels 130.In the present embodiment, scanner driver 110 is in one scan in the cycle, one of only can start among the scan signal line G1~G4 of array of pixels 130 person.Also according to the control signal of this time schedule controller (not shown), by signal wire SL1~SL4, output data is to array of pixels 130 for data driver 120.
Array of pixels 130 comprises data signal line DL1~DL6, scan signal line G1~G4 and a plurality of pixel cell P11~P64.Each pixel cell comprises switching transistor, storage capacitors and liquid crystal capacitance, and wherein this switching transistor is to have a control end to couple that corresponding scan signal line, first end couple corresponding data signal line and second end couples corresponding storage capacitors and liquid crystal capacitance.Each pixel cell is to couple corresponding data signal line and corresponding scan signal line, for instance, pixel cell P11 couples data signal line DL1 and scan signal line G1, pixel cell P21 system couples data signal line DL2 and scan signal line G1, and pixel cell P31 couples data signal line DL3 and scan signal line G1, the rest may be inferred for rest of pixels unit P14~P64, is not repeated in this.
(SWC1~SWC12) includes first on-off element, second switch element and capacitor to each signal control circuit, and each signal control circuit is to be arranged between the signal wire and a data signal line of data driver.For instance, signal control circuit is that SWC1 is arranged between data signal line DL1 and the signal wire SL1, signal control circuit SWC2 be arranged between data signal line DL1 and the signal wire SL2, signal control circuit SWC3 be arranged between data signal line DL2 and the signal wire SL1, signal control circuit SWC4 is arranged between data signal line DL2 and the signal wire SL2, the rest may be inferred for all the other signal control circuit SWC5~SWC12, is not repeated in this.Be noted that, the first on-off element M11, M21, M31, M41, M51 and the M61 of signal control circuit SWC1, SWC3, SWC5, SWC7, SWC9 and SWC11 are coupled to control signal Godd, and the first on-off element M13, M23, M33, M43, M53 and the M63 of signal control circuit SWC2, SWC4, SWC6, SWC8, SWC10 and SWC12 are coupled to control signal Geven.In addition, the second switch element M12 of signal control circuit SWC1, SWC2, SWC7 and SWC8, M14, M42, M44 are that the second switch element M22, M24, M52, the M54 that are coupled to control signal Gr, signal control circuit SWC3, SWC4, SWC9 and SWC10 are coupled to control signal Gg, and second switch element M32, M34, M62, the M64 of signal control circuit SWC5, SWC6, SWC11 and SWC12 are coupled to control signal Gb.
In an embodiment of the present invention, the on-off element of use is to constitute by low temperature polycrystalline silicon (LTPS) technology or amorphous silicon technology, and data driver lies in the scan period, to one of I haven't seen you for ages in signal wire person, transmits three batch datas in regular turn.The present invention makes data driver can utilize two signal line to transmit three video datas that data signal line is required in the array of pixels by the action of signal control circuit.
First embodiment
The 3rd figure is the control timing figure of display panel of the present invention.The type of drive of display panel of the present invention please refer to 2A and 2B figure and the 3rd figure, is illustrated as follows.
When cycle PD1, scanner driver 110 starts scan signal line G1, on-off element M11, M21, M31, M41, M51 and M61 are according to the control of control signal Godd and conducting, but on-off element M13, M23, M33, M43, M53 and M63 are according to the control of control signal Geven and not conducting.Because on-off element M11, M21, M31, M41, M51 and M61 are according to the control of control signal Godd and conducting, so formerly the video data that is stored among capacitor C11, C21, C31, C41, C51 and the C61 can be by on-off element M11~M61 the cycle, export data signal line DL1~DL6 respectively to, be used for pixel cell P11~P61 that driven sweep signal wire G1 is connected.
On the other hand, data driver 120 is to cooperate control signal Gr, Gg and Gb, export video data D10r, D10g, D10b, D20r, D20g and D20b in regular turn on data signal line SL2 and SL4, make video data D10r, D10g, D10b, D20r, D20g and D20b to be stored in respectively among capacitor C12, C22, C32, C42, C52 and the C62.Careful, when data driver 120 is exported video data D10r and D20r respectively on signal wire SL2 and SL4 the time, on-off element M14 and M44 can be because control signal Gr and conducting makes that video data D10r and the D20r on signal wire SL2 and the SL4 can be stored to respectively among capacitor C12 and the C42.When data driver 120 is exported video data D10g and D20g respectively on signal wire SL2 and SL4 the time, on-off element M24 and M54 can be because control signal Gg and conducting makes that video data D10r and the D20r on signal wire SL2 and the SL4 can be stored to respectively among capacitor C22 and the C52.When data driver 120 is exported video data D10b and D20b respectively on signal wire SL2 and SL4 the time, on-off element M34 and M64 can be because control signal Gb and conducting makes that video data D10b and the D20b on signal wire SL2 and the SL4 can be stored to respectively among capacitor C32 and the C62.Since this moment on-off element M13, M23, M33, M43, M53 with M63 according to the control of control signal Geven and not conducting, so video data D10r, the D10g, D10b, D20r, D20g and the D20b that are stored among capacitor C12, C22, C32, C42, C52 and the C62 can not export on data signal line DL1~DL6.
When cycle PD2, scanner driver 110 starts scan signal line G2, on-off element M11, M21, M31, M41, M51 and M61 be according to the control of control signal Godd and not conducting, and on-off element M13, M23, M33, M43, M53 and M63 are according to the control of control signal Geven and conducting.Because on-off element M13, M23, M33, M43, M53 and M63 are according to the control of control signal Geven and conducting, so can be by on-off element M13~M63 at video data D10r, D10g, D10b, D20r, D20g and D20b that cycle PD1 is stored among capacitor C12, C22, C32, C42, C52 and the C62, export data signal line DL1~DL6 respectively to, be used for pixel cell P12~P62 that driven sweep signal wire G2 is connected.
On the other hand, data driver 120 is to cooperate control signal Gr, Gg and Gb, export video data D11r, D11g, D11b, D21r, D21g and D21b in regular turn on data signal line SL1 and SL3, make video data D11r, D11g, D11b, D21r, D21g and D21b to be stored in respectively among capacitor C11, C21, C31, C41, C51 and the C61.Careful, when data driver 120 is exported video data D11r and D21r respectively on signal wire SL1 and SL3 the time, on-off element M12 and M42 can be because control signal Gr and conducting makes that video data D11r and the D21r on signal wire SL1 and the SL3 can be stored to respectively among capacitor C11 and the C41.When data driver 120 is exported video data D11g and D21g respectively on signal wire SL1 and SL3 the time, on-off element M22 and M52 can be because control signal Gg and conducting makes that video data D11g and the D21g on signal wire SL1 and the SL3 can be stored to respectively among capacitor C21 and the C51.When data driver 120 is exported video data D11b and D21b respectively on signal wire SL1 and SL3 the time, on-off element M32 and M62 can be because control signal Gb and conducting makes that video data D11b and the D21b on signal wire SL1 and the SL3 can be stored to respectively among capacitor C31 and the C61.Since this moment on-off element M11, M21, M31, M41, M51 with M61 system according to the control of control signal Godd and not conducting, so video data D11r, the D11g, D11b, D21r, D21g and the D21b that are stored among capacitor C11, C21, C31, C41, C51 and the C61 can not export on data signal line DL1~DL6.
The rest may be inferred, when cycle PD3, when cycle PD2, be stored in capacitor C11, C21, C31, C41, video data D11r among C51 and the C61, D11g, D11b, D21r, D21g and D21b can be by on-off element M11~M61, export data signal line DL1~DL6 respectively to, be used for pixel cell P13~P63 that driven sweep signal wire G3 is connected, and data driver 120 is to export video data D12r in regular turn, D12g, D12b, D22r, D22g and D22b are stored in capacitor C12 respectively on data signal line SL2 and SL4, C22, C32, C42, among C52 and the C62.
When cycle PD4, when cycle PD3, be stored in capacitor C12, C22, C32, C42, video data D12r among C52 and the C62, D12g, D12b, D22r, D22g and D22b can be by on-off element M13~M63, export data signal line DL1~DL6 respectively to, be used for pixel cell P14~P64 that driven sweep signal wire G4 is connected, and data driver 120 is to export video data D13r in regular turn, D13g, D13b, D23r, D23g and D23b are stored in capacitor C11 respectively on data signal line SL1 and SL3, C21, C31, C41, among C51 and the C61.The action of display panel 100 in cycle PD5~PD8 is similar to cycle PD1~PD4, is not repeated in this.
In the present embodiment, data driver is in one-period, video data is stored in the capacitor of signal control circuit by a signal line, and during with last cycle, the video data that is stored to by another signal line in the capacitor of signal control circuit exports on the data signal line corresponding in the array of pixels.Therefore, display panel can transmit three video datas that data signal line is required in the array of pixels by two signal line among the present invention.In other words, the line number signal that connects data driver can reduce, and the number of drive IC can also reduce in the data driver.
Second embodiment
The 4th figure is another control timing figure of display panel of the present invention.The type of drive of display panel of the present invention with reference to 2A and 2B figure and the 4th figure, is illustrated as follows.
When cycle PD1, scanner driver 110 is to start scan signal line G1, on-off element M11, M21, M31, M41, M51 and M61 be according to the control of control signal Godd and conducting, but on-off element M13, M23, M33, M43, M53 and M63 are according to the control of control signal Geven and not conducting.Data driver 120 cooperates control signal Gr, Gg and Gb, export in regular turn video data D10r, D10g and D10b to signal wire SL1, video data D11r, D11g, D11b to signal wire SL2, video data D20r, D20g and D20b to signal wire SL3, and video data D21r, D21g and D21b are to signal wire SL4.
When data driver 120 is exported video data D10r, D11r, D20r and D21r respectively on signal wire SL1, SL2, SL3 and SL4 the time, on-off element M12 and M42 meeting conducting owing to control signal Gr, so pixel cell P11 can the previous cycle of basis be stored in the video data of capacitor C11 and the video data D10r on the signal wire SL1 is driven; And pixel cell P41 can the previous cycle of basis be stored in the video data of capacitor C41 and the video data D20r on the signal wire SL3 is driven.Simultaneously, on-off element M14 and M44 also can the conductings owing to control signal Gr, therefore make video data D11r and D21r on signal wire SL2 and the SL4 to be stored to respectively among capacitor C12 and the C42.
When data driver 120 is exported video data D10g, D11g, D20g and D21g respectively on signal wire SL1, SL2, SL3 and SL4 the time, on-off element M22 and M52 meeting conducting owing to control signal Gg, so pixel cell P21 can the previous cycle of basis be stored in the video data of capacitor C21 and the video data D10g on the signal wire SL1 is driven; And pixel cell P51 can the previous cycle of basis be stored in the video data of capacitor C51 and the video data D20g on the signal wire SL3 is driven.Simultaneously, on-off element M24 and M54 also can the conductings owing to control signal Gg, therefore make video data D11g and D21g on signal wire SL2 and the SL4 to be stored to respectively among capacitor C22 and the C52.
When data driver 120 is exported video data D10b, D11b, D20b and D21b respectively on signal wire SL1, SL2, SL3 and SL4 the time, on-off element M32 and M62 meeting conducting owing to control signal Gb, so pixel cell P31 can the previous cycle of basis be stored in the video data of capacitor C31 and the video data D10b on the signal wire SL1 is driven; And pixel cell P61 can the previous cycle of basis be stored in the video data of capacitor C61 and the video data D20b on the signal wire SL3 is driven.Simultaneously, on-off element M34 and M64 also can the conductings owing to control signal Gb, therefore make video data D11b and D21b on signal wire SL2 and the SL4 to be stored to respectively among capacitor C32 and the C62.
When cycle PD2, scanner driver 110 is to start scan signal line G2, on-off element M11, M21, M31, M41, M51 and M61 be according to the control of control signal Godd and not conducting, and on-off element M13, M23, M33, M43, M53 and M63 are according to the control of control signal Geven and conducting.Data driver 120 is to cooperate control signal Gr, Gg and Gb, export in regular turn video data D12r, D12g and D12b to signal wire SL1, video data D11r, D11g, D11b to signal wire SL2, video data D22r, D22g and D22b to signal wire SL3, and video data D21r, D21g and D21b are to signal wire SL4.
When data driver 120 is exported video data D12r, D11r, D22r and D21r respectively on signal wire SL1, SL2, SL3 and SL4 the time, on-off element M14 and M44 can be because control signal Gr and conductings, so pixel cell P12 can be stored in the video data D11r of capacitor C12 and the video data D11r on the signal wire SL2 is driven according to cycle PD1; And pixel cell P42 can be stored in the video data D21r of capacitor C42 and the video data D21r on the signal wire SL4 is driven according to cycle PD1.Simultaneously, on-off element M12 and M42 also can the conductings owing to control signal Gr, therefore make video data D12r and D22r on signal wire SL1 and the SL3 to be stored to respectively among capacitor C11 and the C41.
When data driver 120 is exported video data D12g, D11g, D22g and D21g respectively on signal wire SL1, SL2, SL3 and SL4 the time, on-off element M24 and M54 can be because control signal Gg and conductings, so pixel cell P22 can be stored in the video data D11g of capacitor C22 and the video data D11g on the signal wire SL2 is driven according to cycle PD1; And pixel cell P52 can be stored in the video data D21g of capacitor C52 and the video data D21g on the signal wire SL4 is driven according to cycle PD1.Simultaneously, on-off element M22 and M52 also can the conductings owing to control signal Gg, therefore make video data D12g and D22g on signal wire SL1 and the SL3 to be stored to respectively among capacitor C21 and the C51.
When data driver 120 is exported video data D12b, D11b, D22b and D21b respectively on signal wire SL1, SL2, SL3 and SL4 the time, on-off element M34 and M64 can be because control signal Gb and conductings, so pixel cell P32 can be stored in the video data D11b of capacitor C32 and the video data D11b on the signal wire SL2 is driven according to cycle PD1; And pixel cell P62 can be stored in the video data D21b of capacitor C62 and the video data D21b on the signal wire SL4 is driven according to cycle PD1.Simultaneously, on-off element M32 and M62 also can the conductings owing to control signal Gb, therefore make video data D12b and D22b on signal wire SL1 and the SL3 to be stored to respectively among capacitor C31 and the C61.
The rest may be inferred, when cycle PD3, data driver 120 is stored in video data D12r, D12g, D12b, D22r, D22g and the D22b among capacitor C11, C21, C31, C41, C51 and the C61 according to video data D12r, D12g, D12b, D22r, D22g and D22b on signal wire SL1 and the SL3 and when the cycle PD2, by data signal line DL1~DL6, pixel cell P13~P63 that driven sweep signal wire G3 is connected.Data driver 120 is exported video data D13r, D13g, D13b, D23r, D23g and D23b more in regular turn on data signal line SL2 and SL4, is stored in respectively among capacitor C12, C22, C32, C42, C52 and the C62.
When cycle PD4, data driver 120 is video data D13r, D13g, D13b, D23r, D23g and the D23b that is stored in according to video data D13r, D13g, D13b, D23r, D23g and D23b on signal wire SL2 and the SL4 and when the cycle PD3 among capacitor C12, C22, C32, C42, C52 and the C62, by data signal line DL1~DL6, pixel cell P14~P64 that driven sweep signal wire G4 is connected.Data driver 120 is exported video data D14r, D14g, D14b, D24r, D24g and D24b more in regular turn on data signal line SL1 and SL3, is stored in respectively among capacitor C11, C21, C31, C41, C51 and the C61.The action of display panel in cycle PD5~PD8 is similar to cycle PD1~PD4, is not repeated in this.
In the present embodiment, data driver is in continuous two cycles, produces identical data on same signal line in regular turn, makes display panel except the advantage of first embodiment, more can increase the charging times of capacitor in the signal control circuit, to avoid voltage distortion.
The 3rd embodiment
The 5th figure is the another control timing figure of display panel of the present invention.The type of drive of display panel of the present invention with reference to 2A and 2B figure and the 5th figure, is illustrated as follows.
When cycle PD1, scanner driver 110 is to start scan signal line G1, on-off element M11, M21, M31, M41, M51 and M61 be according to the control of control signal Godd and conducting, but on-off element M13, M23, M33, M43, M53 and M63 are according to the control of control signal Geven and not conducting.Data driver 120 is to cooperate control signal Gr, Gg and Gb, export in regular turn video data D10r, D10g and D10b to signal wire SL1, preliminary filling data D11r, D11g, D11b to signal wire SL2, video data D20r, D20g and D20b to signal wire SL3, and preliminary filling data D21r, D21g and D21b are to signal wire SL4.
When data driver 120 difference output data D10r, D11r, D20r and D21r are on signal wire SL1, SL2, SL3 and SL4, on-off element M12 and M42 meeting conducting owing to control signal Gr, so pixel cell P11 can the previous cycle of basis be stored in the preliminary filling data of capacitor C11 and the video data D10r on the signal wire SL1 is driven; And pixel cell P41 can the previous cycle of basis be stored in the preliminary filling data of capacitor C41 and the video data D20r on the signal wire SL3 is driven.Simultaneously, on-off element M14 and M44 also can the conductings owing to control signal Gr, therefore make preliminary filling data D11r and D21r on signal wire SL2 and the SL4 to be stored to respectively among capacitor C12 and the C42.
When data driver 120 difference output data D10g, D11g, D20g and D21g are on signal wire SL1, SL2, SL3 and SL4, on-off element M22 and M52 meeting conducting owing to control signal Gg, so pixel cell P21 can the previous cycle of basis be stored in the preliminary filling data of capacitor C21 and the video data D10g on the signal wire SL1 is driven; And pixel cell P51 can the previous cycle of basis be stored in the preliminary filling data of capacitor C51 and the video data D20g on the signal wire SL3 is driven.Simultaneously, on-off element M24 and M54 also can the conductings owing to control signal Gg, therefore make preliminary filling data D11g and D21g on signal wire SL2 and the SL4 to be stored to respectively among capacitor C22 and the C52.
When data driver 120 is exported video data D10b, D11b, D20b and D21b respectively on signal wire SL1, SL2, SL3 and SL4 the time, on-off element M32 and M62 meeting conducting owing to control signal Gb, so pixel cell P31 can the previous cycle of basis be stored in the preliminary filling data of capacitor C31 and the video data D10b on the signal wire SL1 is driven; And pixel cell P61 can the previous cycle of basis be stored in the preliminary filling data of capacitor C61 and the video data D20b on the signal wire SL3 is driven.Simultaneously, on-off element M34 and M64 also can the conductings owing to control signal Gb, therefore make preliminary filling data D11b and D21b on signal wire SL2 and the SL4 to be stored to respectively among capacitor C32 and the C62.
When cycle PD2, scanner driver 110 is to start scan signal line G2, on-off element M11, M21, M31, M41, M51 and M61 be according to the control of control signal Godd and not conducting, and on-off element M13, M23, M33, M43, M53 and M63 are according to the control of control signal Geven and conducting.Data driver 120 is to cooperate control signal Gr, Gg and Gb, in regular turn output data D12r, D12g and D12b to signal wire SL1, video data D11r, D11g, D11b to signal wire SL2, preliminary filling data D22r, D22g and D22b to signal wire SL3, and video data D21r, D21g and D21b are to signal wire SL4.
When data driver 120 difference output data D12r, D11r, D22r and D21r are on signal wire SL1, SL2, SL3 and SL4, on-off element M14 and M44 can be because control signal Gr and conductings, so pixel cell P12 can be stored in the preliminary filling data D11r of capacitor C12 and the video data D11r on the signal wire SL2 is driven according to cycle PD1; And pixel cell P42 can be stored in the preliminary filling data D21r of capacitor C42 and the video data D21r on the signal wire SL4 is driven according to cycle PD1.Simultaneously, on-off element M12 and M42 also can the conductings owing to control signal Gr, therefore make preliminary filling data D12r and D22r on signal wire SL1 and the SL3 to be stored to respectively among capacitor C11 and the C41.
When data driver 120 is exported video data D12g, D11g, D22g and D21g respectively on signal wire SL1, SL2, SL3 and SL4 the time, on-off element M24 and M54 can be because control signal Gg and conductings, so pixel cell P22 can be stored in the preliminary filling data D11g of capacitor C22 and the video data D11g on the signal wire SL2 is driven according to cycle PD1; And pixel cell P52 can be stored in the preliminary filling data D21g of capacitor C52 and the video data D21g on the signal wire SL4 is driven according to cycle PD1.Simultaneously, on-off element M22 and M52 also can the conductings owing to control signal Gg, therefore make preliminary filling data D12g and D22g on signal wire SL1 and the SL3 to be stored to respectively among capacitor C21 and the C51.
When data driver 120 difference output data D12b, D11b, D22b and D21b are on signal wire SL1, SL2, SL3 and SL4, on-off element M34 and M64 can be because control signal Gb and conductings, so pixel cell P32 can be stored in the preliminary filling data D11b of capacitor C32 and the video data D11b on the signal wire SL2 is driven according to cycle PD1; And pixel cell P62 can be stored in the preliminary filling data D21b of capacitor C62 and the video data D21b on the signal wire SL4 is driven according to cycle PD1.Simultaneously, on-off element M32 and M62 also can the conductings owing to control signal Gb, therefore make preliminary filling data D12b and D22b on signal wire SL1 and the SL3 to be stored to respectively among capacitor C31 and the C61.
The rest may be inferred, when cycle PD3, data driver 120 is stored in preliminary filling data D12r, D12g, D12b, D22r, D22g and the D22b among capacitor C11, C21, C31, C41, C51 and the C61 according to video data D12r, D12g, D12b, D22r, D22g and D22b on signal wire SL1 and the SL3 and when the cycle PD2, by data signal line DL1~DL6, pixel cell P13~P63 that driven sweep signal wire G3 is connected.Data driver 120 is exported preliminary filling data D13r, D13g, D13b, D23r, D23g and D23b more in regular turn on data signal line SL2 and SL4, is stored in respectively among capacitor C12, C22, C32, C42, C52 and the C62.
When cycle PD4, data driver 120 is stored in preliminary filling data D13r, D13g, D13b, D23r, D23g and the D23b among capacitor C12, C22, C32, C42, C52 and the C62 according to video data D13r, D13g, D13b, D23r, D23g and D23b on signal wire SL2 and the SL4 and when the cycle PD3, by data signal line DL1~DL6, pixel cell P14~P64 that driven sweep signal wire G4 is connected.Data driver 120 is exported preliminary filling data preliminary filling data D14r, D14g, D14b, D24r, D24g and D24b more in regular turn on data signal line SL1 and SL3, is stored in respectively among capacitor C11, C21, C31, C41, C51 and the C61.The action of display panel in cycle PD5~PD8 is to similar in cycle PD1~PD4, is not repeated in this.
In the present embodiment, data driver is in one-period, will corresponding to following one-period required video data the preliminary filling data storing to the capacitor of signal control circuit, and during following one-period, required video data is exported on the data signal line, be used to cooperate stored preliminary filling data to drive display unit.Preliminary filling data system can be the overdrive voltage signal corresponding with required video data.For instance, when video data was a 3V voltage signal, the overdrive voltage signal can be the voltage signal that multiply by set multiple, for example 3.3V or the like.Therefore, this embodiment more can be by the voltage that improves the preliminary filling data, to avoid the duration of charging deficiency except the advantage of first, second embodiment.
In display panel of the present invention, per two signal line can drive three data signal lines in the array of pixels in the data driver, so can reduce the number of required drive IC in the data driver.Therefore, the required flexible printed circuit board of drive IC can also reduce, and in manufacture process, and all can reduce with welding the man-hour of welding drive IC flexible printed circuit board to the man-hour on the panel.
In above-mentioned three embodiment, be to utilize two signal line to cooperate 3 control signal Gr, Gg, Gb to reach the effect that makes three data signal line starts and reach demonstration; But the present invention and non-limiting two signal line of can only using are controlled 3 data signal lines, can also for example use two signal line to cooperate four control signals to reach the effect of controlling four data signal line starts and reaching demonstration; Same, also can use two signal line to cooperate five control signals to reach the effect of controlling five data signal line starts and reaching demonstration; Certainly, also can use two signal line to cooperate six control signals to reach the effect of controlling six data signal line starts and reaching demonstration.In other words, can use 2 signals to cooperate N control signal wire to reach the effect of controlling N bar data signal line start and reaching demonstration.In the array of pixels of one A * B, N can for for example 3,4,5...... etc. is arbitrarily greater than 2 but be less than or equal to the positive integer of A/2.
In above-mentioned three embodiment, lie in the output signal of utilizing signal wire in cycle of effect and cooperate three control signal Gr, Gg, Gb to capture signal respectively; Just be to utilize a signal line in embodiment, but including 3 signals in one-period illustrates, but the present invention is defined in to send 3 signals in the one-period, also can be (3 * M) inferior signals, wherein, in other words M=1,2,3,4,5,6,7,8,9.... can be increased in the sweep frequency in the one-period.
The 6th figure is an electronic installation of the embodiment of the invention.Electronic installation 200 is to use aforesaid display panel, and display panel 100 can be display panels, but is not limited to this.Electronic installation 200 can be portable apparatus, for example PDA(Personal Digital Assistant), notebook computer, flat computer, mobile phone or display ... or the like.In general, electronic installation 200 is to have shell 210, display panel 100 and power supply unit 220, and power supply unit 220 is used to provide supply voltage to display panel 100, and display panel is used for show image.
Though the present invention discloses as above with preferred embodiment; so it is not to be used to limit the present invention, any those skilled in the art, without departing from the spirit and scope of the present invention; when can doing a little change and retouching, so protection scope of the present invention is as the criterion when looking appended the claim person of defining.

Claims (27)

1. display panel comprises:
First signal wire;
First data signal line;
First sweep trace is staggered with this first data signal line;
First pixel cell couples this first data signal line and this first sweep trace;
First on-off element has first end and couple this first data signal line, and a control end receives one first control signal;
First storage capacitors is coupled between second end and earth terminal of this first on-off element; And
The second switch element is coupled between this first storage capacitors and this first signal wire, and has a control end and receive one second control signal;
The secondary signal line;
The 3rd on-off element has that first end couples this first data signal line and a control end receives one the 3rd control signal;
Second storage capacitors is coupled between second end and this earth terminal of the 3rd on-off element; And
The 4th on-off element is coupled between this second storage capacitors and this secondary signal line, and has a control end and receive this second control signal, and
Other N-1 bar data signal line, this N-1 bar data signal line is connected with the secondary signal line with first signal wire with same connected mode, wherein N 〉=3.
2. display panel according to claim 1, wherein this first pixel cell comprises pixel cell on-off element, pixel cell storage capacitors and liquid crystal capacitance, wherein this pixel cell on-off element has first end and couples this first data signal line, second end couples this pixel cell storage capacitors and this liquid crystal capacitance, and control end couples this first sweep trace.
3. display panel according to claim 1 wherein also comprises:
Second data signal line;
Second pixel cell is to couple this second data signal line and this first sweep trace;
The 5th on-off element has first end and couple this second data signal line, and a control end couples this first control signal;
The 3rd storage capacitors is coupled between second end and this earth terminal of the 5th on-off element; And
The 6th on-off element is coupled between the 3rd storage capacitors and this first signal wire, and has a control end and couple the 4th control signal.
4. display panel according to claim 3 also comprises:
Minion is closed element, have first end and couple this second data signal line, and a control end couples the 3rd control signal;
The 4th storage capacitors is coupled to this minion and closes between second end and this earth terminal of element; And
Octavo is closed element, is coupled between the 4th storage capacitors and this secondary signal line, and has a control end and couple the 4th control signal.
5. display panel according to claim 4 wherein also comprises:
The 3rd data signal line;
The 3rd pixel cell is to couple the 3rd data signal line and this first sweep trace;
The 9th on-off element has first end and couples the 3rd data signal line, and a control end couples this first control signal;
The 5th storage capacitors is coupled between second end and this earth terminal of the 9th on-off element; And
The tenth on-off element is coupled between the 5th storage capacitors and this first signal wire, and has a control end and couple the 5th control signal.
6. display panel according to claim 5 also comprises:
The 11 on-off element has first end and couple the 3rd data signal line, and a control end couples the 3rd control signal;
The 6th storage capacitors is coupled between second end and this earth terminal of the 11 on-off element; And
Twelvemo is closed element, is coupled between the 6th storage capacitors and this secondary signal line, and has a control end and couple the 5th control signal.
7. display panel according to claim 6 comprises that also the one scan driver couples this first sweep trace.
8. display panel according to claim 6, also comprise a data driver couple this first, this second with the 3rd data signal line.
9. display panel according to claim 6, wherein this first to the 5th control signal is provided by driver.
10. display panel according to claim 7, wherein this first to the 5th control signal is provided by this scanner driver.
11. display panel according to claim 1, wherein this display panel is a display panels.
12. display panel according to claim 1, wherein this display panel is an organic LED display panel.
13. an electronic installation comprises:
Display panel as claimed in claim 1; And
Power-supply unit is used to supply power to above-mentioned display panel.
14. electronic installation according to claim 13, wherein above-mentioned display panel are display, notebook computer device, mobile phone, flat computer or personal digital assistant.
15. a driving method is applied to display panel, comprises the following steps:
At M during the cycle, M-1 is stored in N first group of data in first storage capacitors in advance during the cycle, by N bar data signal line, be sent to N the first corresponding pixel cell, and use and drive this N the first corresponding pixel cell, simultaneously with on the secondary signal line from second group of data storing of data driver to individual second storage capacitors of corresponding N; And
At M+1 during the cycle, with these stored second group of data in this N second storage capacitors, by this N bar data signal line, be sent to corresponding N second pixel cell, and use and drive this corresponding N second pixel cell, simultaneously with on first signal wire from the 3rd group of data storing of this data driver to this corresponding N first storage capacitors.
16. driving method according to claim 15, wherein these the second group of data on this secondary signal line are to be stored in order in N second storage capacitors of this correspondence, and the 3rd group of data on this first signal wire are to be stored in order in this corresponding N first storage capacitors.
17. driving method according to claim 15, wherein N is an integer and greater than 2.
18. driving method according to claim 16, wherein these first group of data, second group of data, the 3rd group of data are video data.
19. driving method according to claim 16, also be included in this M in the cycle, with on this first signal wire from the 4th group of data of this data driver, by this N bar data signal line, be sent to this N the first corresponding pixel cell, make that this N the first corresponding pixel cell driven by a N batch data and the 4th group of data.
20. driving method according to claim 19, also be included in this M+1 in the cycle, with on this secondary signal line from the 5th group of data of this data driver, by this N bar data signal line, be sent to this N the second corresponding pixel cell, make that this N the second corresponding pixel cell driven by these second group of data and the 5th group of data.
21. driving method according to claim 20, wherein at this M in the cycle, the 4th group of data on this first signal wire are to be sent to this N the first corresponding pixel cell in order, and in the cycle, the 5th group of data on this secondary signal line are to be sent to this N the second corresponding pixel cell in order at this M+1.
22. driving method according to claim 21, wherein these first group of data is identical video data with the 4th group of data, and these second group of data is identical video data with the 5th group of data.
23. driving method according to claim 21, wherein the 4th group of data and the 5th group of data are video data, and these first group of data is the overdrive voltage signal corresponding to the 4th group of data, and these second group of data is the overdrive voltage signal corresponding to the 5th group of data.
24. an image display device comprises:
Data driver;
N bar data signal line; And
One group of signal control circuit is coupled between this data driver and this N bar data signal line, in order in horizontal scanning period, by the video data of K signal line reception from this data driver, and input to this N bar data signal line, wherein K and N are all positive integer, N>K and
Figure C2005100747120005C1
Be not integer, and N K = 3 2 ,
Wherein this group signal control circuit is during the cycle, with first group of data that M-1 prestored during the cycle, to input to this N bar data signal line in M, stores on this K signal line second group of data from this data driver simultaneously.
25. image display device according to claim 24, wherein this group signal control circuit is according to one group of external signal, stores this second group of data in order, and simultaneously these first group of data is inputed to this N bar data signal line.
26. image display device according to claim 24, wherein this group signal control circuit comprises two on-off elements and a storage capacitors.
27. image display device according to claim 24, wherein this group signal control circuit is formed by low temperature polycrystalline silicon or amorphous silicon technology.
CNB2005100747129A 2005-05-31 2005-05-31 Display panel related electronic apparatus and driving method Expired - Fee Related CN100399379C (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CNB2005100747129A CN100399379C (en) 2005-05-31 2005-05-31 Display panel related electronic apparatus and driving method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CNB2005100747129A CN100399379C (en) 2005-05-31 2005-05-31 Display panel related electronic apparatus and driving method

Publications (2)

Publication Number Publication Date
CN1687981A CN1687981A (en) 2005-10-26
CN100399379C true CN100399379C (en) 2008-07-02

Family

ID=35306022

Family Applications (1)

Application Number Title Priority Date Filing Date
CNB2005100747129A Expired - Fee Related CN100399379C (en) 2005-05-31 2005-05-31 Display panel related electronic apparatus and driving method

Country Status (1)

Country Link
CN (1) CN100399379C (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11455969B2 (en) 2010-02-18 2022-09-27 Semiconductor Energy Laboratory Co., Ltd. Display device and electronic device

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107068046A (en) * 2017-04-19 2017-08-18 京东方科技集团股份有限公司 Display panel and display device

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02126285A (en) * 1988-11-05 1990-05-15 Sharp Corp Liquid crystal driving circuit
EP0686960A2 (en) * 1994-06-06 1995-12-13 Canon Kabushiki Kaisha Display and its driving method
JPH086528A (en) * 1994-06-20 1996-01-12 Hitachi Ltd Flat panel display device
CN1118469A (en) * 1994-02-17 1996-03-13 青木一男 Color panel display
US5657044A (en) * 1993-11-19 1997-08-12 Ricoh Company, Ltd. Liquid crystal display converter
CN1346123A (en) * 2000-09-29 2002-04-24 三洋电机株式会社 Driver for indicator
JP2004191793A (en) * 2002-12-13 2004-07-08 Hitachi Displays Ltd Liquid crystal display device

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02126285A (en) * 1988-11-05 1990-05-15 Sharp Corp Liquid crystal driving circuit
US5657044A (en) * 1993-11-19 1997-08-12 Ricoh Company, Ltd. Liquid crystal display converter
CN1118469A (en) * 1994-02-17 1996-03-13 青木一男 Color panel display
EP0686960A2 (en) * 1994-06-06 1995-12-13 Canon Kabushiki Kaisha Display and its driving method
JPH086528A (en) * 1994-06-20 1996-01-12 Hitachi Ltd Flat panel display device
CN1346123A (en) * 2000-09-29 2002-04-24 三洋电机株式会社 Driver for indicator
JP2004191793A (en) * 2002-12-13 2004-07-08 Hitachi Displays Ltd Liquid crystal display device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11455969B2 (en) 2010-02-18 2022-09-27 Semiconductor Energy Laboratory Co., Ltd. Display device and electronic device
TWI780931B (en) * 2010-02-18 2022-10-11 日商半導體能源研究所股份有限公司 Display device and electronic device
US11769462B2 (en) 2010-02-18 2023-09-26 Semiconductor Energy Laboratory Co., Ltd. Display device and electronic device

Also Published As

Publication number Publication date
CN1687981A (en) 2005-10-26

Similar Documents

Publication Publication Date Title
US8330688B2 (en) Display control drive device and display system
KR100643432B1 (en) Apparatus for driving a plurality of display units using common driving circuits
CN104637447B (en) Data drive circuit, electric compensation method, array base palte and display device
TWI543133B (en) Liquid crystal display device and driving method thereof
CN101118357B (en) Display device
CN100533533C (en) Level conversion circuit, display device and cellular terminal apparatus
CN101110203B (en) Image display devices and driving method thereof
CN102411910B (en) Display device and adjustment method for picture display direction thereof
CN101110200A (en) Driving circuit
CN100399379C (en) Display panel related electronic apparatus and driving method
CN102637420B (en) Display control driver and method for testing the same
CN101405640A (en) Display device and electronic apparatus
CN113035108B (en) Display apparatus
CN101295462A (en) Electronic system having display panel
CN101540148B (en) Driving device for liquid crystal display and related output enable signal transfer device
JP2004109595A (en) Display device and its driving method
US8542174B2 (en) Display panel and driving method thereof
CN101571630B (en) Liquid crystal display device
CN101499241A (en) Data access system and data access method
CN103137057A (en) Image display system and grid drive circuit
CN101162303A (en) Data access interface and method having multi-power output module and data access interface and method of sequencing input module
CN101504826A (en) Driver integrated circuit for reducing coupling voltage and liquid crystal display device applying the same
CN100365681C (en) Display panel and related electronic device and driving method
CN101587676A (en) Data access method of time schedule controller for flat panel display
JPH07104704A (en) Driving method for active matrix type liquid crystal display and power source voltage converting circuit

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20080702