CN100399224C - A current source with very high output impedance - Google Patents

Abstract

A current source with extremely high output impedance, including a current source generating circuit and an equivalent negative resistance generating circuit, wherein the current source generating circuit can be composed of all current source circuits such as Cascode current mirror, Wilson current mirror or Widlar current source , used to generate positive resistance and reference current; the equivalent negative resistance generating circuit is composed of a gate-drain short-circuited PMOS transistor, an NMOS transistor and an amplifier, used to generate equivalent negative resistance, which is designed to make the equivalent negative resistance The absolute value of is slightly larger than the aforementioned positive resistance value; then the equivalent negative resistance is connected in parallel with the aforementioned positive resistance to obtain a very high output impedance, which can reach an order of magnitude of 10 ⁹ ohms. And the frequency characteristic and temperature characteristic of the output current of the current source with extremely high output impedance described in the present invention are good.

Description

A current source with very high output impedance

technical field

The invention belongs to the field of electronic technology, and in particular relates to the current source technology in the field of power supply technology.

Background technique

The current source is a circuit whose output current remains constant as the voltage changes. It is an important part of the analog integrated circuit and has a wide range of demands in the analog integrated circuit. For current, there are no losses on long metal wires, but for voltage, current sources are preferred in complex analog circuits with long metal wires. The fourth chapter of "Analysis and Design of Analog Integrated Circuits" (4 ^th Edition) written by Paul R.Gray et al., published by John Wiley & Sons of the United States in 2001, introduces various types of current sources. As stated in the book, The current source can be used both as a bias element and as an active load for the amplifier stage. Among them, the output impedance of the current source is an important parameter of the current source circuit, and the higher the output impedance, the more stable the output current of the current source is. Therefore, in high-precision integrated circuits, the design of high-impedance current sources is very important. Moreover, due to the wide range of applications of modern electronic systems and the harsher environment, the reference current source is required to work reliably in a wide temperature range (-25 ° C ~ 125 ° C) and a wide power supply voltage range. In the prior art, a bandgap circuit is generally used to realize a constant voltage source (see voltage source), such as KNLeung, PKTMok.A Sub-1-V15-ppm/℃ CMOS bandgap voltage reference without requiring low threshold voltage device, IEEE Journal of Solid-State Circuits. 2002, 37(4): 526-530.

The output impedance of a common current source circuit is on the order of mega-ohms, and its current output is not stable enough. In order to improve the output impedance of the current source, a conventional method is to connect a high resistance resistor R in series with the equivalent positive output impedance ro of the current source, so that the total output impedance R _out = r _o + R (as shown in Figure 1) . But this will consume a large voltage margin, and at the same time, increase the power supply voltage.

There are some problems in the actual current source circuit, such as the output impedance is not large enough, and the stable output current needs to be realized at a higher voltage.

Contents of the invention

The purpose of the present invention is to propose a current source with a very high output impedance, while the current source should have a smaller minimum operating voltage (Vomin) to stabilize the output current, good current stability and frequency response characteristics and small temperature coefficient.

A current source with extremely high output impedance proposed by the present invention includes a current source generating circuit, and is characterized in that it also includes an equivalent negative resistance generating circuit, the equivalent negative resistance generating circuit and the current source generating circuit Phase-parallel connection produces extremely high output impedance. Wherein, the current source generating circuit is used to generate a positive resistance and a reference current; the equivalent negative resistance generating circuit is used to generate an equivalent negative resistance. The current source generation circuit can be implemented with all current mirror and current source circuits.

The technical solution of the present invention is essentially to use the parallel structure of two positive and negative resistors with very similar absolute values to realize the extremely high output impedance of the current source. Suppose the output impedance of the current source generation circuit is r _o , and the equivalent resistance of the equivalent negative resistance generation circuit is r ₂ , then the total output impedance of the two circuits in parallel $R_{\mathrm{out}}=\frac{r_o{r}_2}{{\mathrm{<figure-callout\; id="0"\; label="r"\; filenames="C20051002112200162.png,C20051002112200172.png"\; state="\{\{state\}\}">r</figure-callout>}}_0+{\mathrm{<figure-callout\; id="2"\; label="r"\; filenames="C20051002112200162.png,C20051002112200163.png"\; state="\{\{state\}\}">r</figure-callout>}}_2},$ By properly calculating and setting |r ₂ | slightly larger than |r _o |, a current source with extremely high output impedance can be obtained, and its output impedance is R _out .

Among them, the current source generation circuit that generates positive resistance and reference current can be all current mirror and current source circuits such as Cascode current mirror, Wilson current mirror and Widlar current source.

Among them, the current source generation circuit can be realized by Cascode current mirror, including:

(1) A current reference source Iref1 is used to generate a constant current, one end of which is connected to an external power supply, and the other end is connected to the drain of the NMOS transistor M3.

(2) Four NMOS transistors (M1, M2, M3 and M4) are used to form a cascode current mirror to generate two currents. The NMOS transistors M1 and M2 form a mirror transistor, and the NMOS transistors M3 and M4 form a mirror transistor. The sources of the two mirrored NMOS transistors (M1 and M2) are grounded, their gates are connected to each other, and connected to the drain of the NMOS transistor M1, the drain of the NMOS transistor M1 is connected to the source of the NMOS transistor M3, and the NMOS transistor The drain of M2 is connected to the source of NMOS transistor M4; the gates of the other two mirrored NMOS transistors (M3 and M4) are connected to each other and to the drain of NMOS transistor M3, and the drain of NMOS transistor M3 passes through the current reference The source Iref1 is connected to an external power supply.

Among them, the current source generation circuit can be realized by Wilson current mirror, including:

(1) A current reference source Iref1 is used to generate a constant current, one end of which is connected to an external power supply, and the other end is connected to the drain of the NMOS transistor M3.

(2) Four NMOS transistors (M1, M2, M3 and M4) are used to form a Wilson current mirror to generate two currents. The NMOS transistors M1 and M2 form a mirror transistor, and the NMOS transistors M3 and M4 form a mirror transistor. The sources of the two mirrored NMOS transistors (M1 and M2) are grounded, their gates are connected to each other, and connected to the drain of the NMOS transistor M2, the drain of the NMOS transistor M1 is connected to the source of the NMOS transistor M3, and the NMOS transistor The drain of M2 is connected to the source of NMOS transistor M4; the gates of the other two mirrored NMOS transistors (M3 and M4) are connected to each other and to the drain of NMOS transistor M3, and the drain of NMOS transistor M3 passes through the current reference The source Iref1 is connected to an external power supply.

Among them, the current source generation circuit can be implemented with a Widlar current source, including:

(1) Two NMOS transistors (M1 and M2) and two resistors (R1 and R2), the gates of the two NMOS transistors are connected to each other, and connected to the drain of the NMOS transistor M1, and the source of the NMOS transistor M1 is grounded, The drain of the NMOS transistor M1 is connected to the external power supply through the resistor R1; the source of the NMOS transistor M2 is connected to the ground through the resistor R2.

The equivalent negative resistance generation circuit of the present invention comprises:

(1) A PMOS transistor M5, the gate and drain of the PMOS transistor M5 are short-circuited to form a diode connection, and its drain is connected to the drain of the NMOS transistor M6.

(2) An NMOS transistor M6 is used to provide a bias current to the PMOS transistor M5. The gate of the NMOS transistor M6 is connected to the bias voltage signal Vbias1 , the source thereof is connected to the ground, and the drain of the NMOS transistor M6 is connected to the drain of the NMOS transistor M5 .

(3) A CMOS amplifier A1 for converting the drain-source equivalent impedance of the PMOS transistor M5 into the equivalent negative resistance of the equivalent negative resistance generating circuit. The input terminal of the CMOS amplifier A1 is connected to the source of the PMOS transistor M5, and the output terminal of the CMOS amplifier A1 is connected to the gate and drain of the PMOS transistor M5.

Wherein, the CMOS amplifier A1 in the equivalent negative resistance generating circuit may include:

A PMOS transistor M7 and an NMOS transistor M10 constitute a first-stage amplifier for first-stage amplification of signals; a PMOS transistor M11 and an NMOS transistor M8 constitute a second-stage amplifier for second-stage amplification of signals; Two NMOS transistors (M9 and M12) constitute the third-stage amplifier; the gate of the PMOS transistor M7 is used as the input terminal of the CMOS amplifier A1, its source is connected to an external power supply, and its drain is connected to the gate of the NMOS transistor M8 The gate of the NMOS transistor M10 is short-circuited to the drain, and connected to the drain of the PMOS transistor M7, and the source of the NMOS transistor M10 is connected to the ground; the gate of the PMOS transistor M11 is short-circuited to the drain, and simultaneously connected to The drain of the NMOS transistor M8 is connected to the gate of the NMOS transistor M9; the gate of the NMOS transistor M8 is connected to the drain of the PMOS transistor M7 and the drain of the NMOS transistor M10 at the same time, and the drain of the NMOS transistor M8 is connected to the PMOS transistor The drain of M11 is connected to the gate of NMOS transistor M9, the source of NMOS transistor M8 is connected to ground; the source of NMOS transistor M9 is connected to the drain of NMOS transistor M12, and the drain of NMOS transistor M9 is connected to an external power supply connected; the gate of the NMOS transistor M12 is connected to the bias voltage signal Vbias1, and the source of the NMOS transistor M12 is connected to the ground.

The equivalent negative resistance generating circuit of the present invention is connected in parallel with the current source generating circuit to generate extremely high output impedance of the entire current source. Its specific connection relationship is:

1. If the current source generating circuit is a current source generating circuit based on a Cascode current mirror, the connection relationship between the two is: the drain of the NMOS transistor M4 is connected to the source of the PMOS transistor M5 and the gate of the PMOS transistor M7 at the same time; the entire The output terminal of the current source is the common connection point of the drain of the NMOS transistor M4, the source of the PMOS transistor M5 and the gate of the PMOS transistor M7.

2. If the current source generating circuit is a current source generating circuit based on the Wilson current mirror, the connection relationship between the two is: the drain of the NMOS transistor M4 is connected to the source of the PMOS transistor M5 and the gate of the PMOS transistor M7 at the same time; The output terminal of the current source is the common connection point of the drain of the NMOS transistor M4, the source of the PMOS transistor M5 and the gate of the PMOS transistor M7.

3. If the current source generating circuit is a Widlar current source, the connection relationship between the two is: the drain of the NMOS transistor M2 is connected to the source of the PMOS transistor M5 and the gate of the PMOS transistor M7 at the same time; the output terminal of the entire current source is A common connection point of the drain of the NMOS transistor M2, the source of the PMOS transistor M5, and the gate of the PMOS transistor M7.

It should be noted that the equivalent negative resistance described in the present invention is not made of special materials or devices, but is realized by common CMOS amplifier circuits and MOS transistors.

A current source circuit with extremely high output impedance described in the present invention has the following advantages:

1. The output impedance of the current source is greatly increased, making the output current more stable with the change of the output voltage.

2. Vomin is improved, so that the output current can be stabilized at a lower voltage. As shown in Figure 9, it can be seen from the Vomin comparison diagram of the output current of the Wilson current mirror that if the equivalent negative resistance generating circuit is not added, Vomin≈2.105V; but after adding the equivalent negative resistance generating circuit, it can be seen that Vomin decreases So, Vomin≈1.483V. As shown in Figure 10, it can be seen from the Vomin comparison diagram of the output current of the Cascode current mirror that if the equivalent negative resistance generating circuit is not added, Vomin≈2.100V; but after adding the equivalent negative resistance generating circuit, it can be seen that Vomin decreases So, Vomin≈1.465V.

3. The current source generation circuit of the present invention is composed of current mirrors and current source circuits such as common Cascode current mirrors, Wilson current mirrors, and Widlar current sources. It has a simple structure, occupies a small chip area, and consumes low power consumption.

4. The extremely high output impedance circuit structure proposed by the invention makes the output current of the current source very stable, and its frequency response characteristic is good.

5. The temperature coefficient of the output current of the extremely high output impedance current source proposed by the present invention is very small, and the temperature coefficient is 10.6ppm/°C in a wide temperature range (-40°C ~ +145°C).

Description of drawings:

FIG. 1 is a schematic circuit diagram of a conventional current source with high output impedance.

Fig. 2 is a structural block diagram of a current source with extremely high output impedance according to the present invention.

Fig. 3 is a schematic diagram of a current source circuit with extremely high output impedance using a Cascode current mirror as a current source generating circuit.

Fig. 4 is a schematic diagram of a current source circuit with extremely high output impedance using a Wilson current mirror as a current source generating circuit.

FIG. 5 is a schematic diagram of a current source circuit with extremely high output impedance using a Widlar current source as a current source generating circuit.

FIG. 6 is a circuit diagram of the CMOS amplifier A1 in the equivalent negative resistance generating circuit.

FIG. 7 is a graph showing the relationship between the output current and the output voltage of a current source with a very high output impedance using a Cascode current mirror as a current source generating circuit. Curve 1 is the relationship between the output current of the reference current source and the output voltage, and curve 2 is the relationship between the output current and the output voltage of the present invention.

FIG. 8 is a graph showing the relationship between output current and output voltage of a current source with extremely high output impedance using a Wilson current mirror as a current source generating circuit. Curve 1 is the relationship between the output current of the reference current source and the output voltage, and curve 3 is the relationship between the output current and the output voltage of the present invention.

Fig. 9 is a comparison of the Vomin of the output current of a current source with a very high output impedance using the Cascode current mirror as the current source generating circuit and the Vomin of the output current of the Cascode current mirror. Wherein, curve 5 is the output current of the Cascode current mirror, and curve 4 is the output current of the current source of the present invention.

Fig. 10 is a comparison of the Vomin of the output current of a current source with a very high output impedance using the Wilson current mirror as the current source generating circuit and the Vomin of the output current of the Wilson current mirror. Wherein, curve 7 is the output current of the Wilson current mirror, and curve 6 is the output current of the current source of the present invention.

Fig. 11 is a frequency characteristic curve of the output current of a current source with extremely high output impedance using a Cascode current mirror as a current source generating circuit.

FIG. 12 is a frequency characteristic curve of the output current of a current source with extremely high output impedance using a Wilson current mirror as a current source generating circuit.

Fig. 13 is a temperature characteristic curve of the output current of a current source with extremely high output impedance using a Cascode current mirror as a current source generating circuit.

FIG. 14 is a temperature characteristic curve of the output current of a current source with extremely high output impedance using a Wilson current mirror as a current source generating circuit.

Detailed ways

The present invention uses the negative resistance technology to realize the current source of high output impedance. Its structural block diagram is shown in FIG. 2 , including a reference current source circuit and a negative resistance generating circuit. The reference current source circuit is used to generate a positive resistance and a reference current to realize a large resistance. This reference current source can be implemented with all current mirror and current source circuits.

Here we only take the cascode current mirror circuit as an example to illustrate the principle:

The current source generation circuit is implemented with a Cascode current mirror, including:

(1) A current reference source Iref1 is used to generate a constant current, one end of which is connected to an external power supply, and the other end is connected to the drain of the NMOS transistor M3.

(2) Four NMOS transistors (M1, M2, M3 and M4) are used to form a cascode current mirror to generate two currents. The NMOS transistors M1 and M2 form a mirror transistor, and the NMOS transistors M3 and M4 form a mirror transistor. The sources of the two mirrored NMOS transistors (M1 and M2) are grounded, their gates are connected to each other, and connected to the drain of the NMOS transistor M1, the drain of the NMOS transistor M1 is connected to the source of the NMOS transistor M3, and the NMOS transistor The drain of M2 is connected to the source of NMOS transistor M4; the gates of the other two mirrored NMOS transistors (M3 and M4) are connected to each other and to the drain of NMOS transistor M3, and the drain of NMOS transistor M3 is connected to the reference Source one end of Iref1.

The negative resistance generation circuit includes:

(1) A PMOS transistor M5, the gate and source of the PMOS transistor M5 are short-circuited to form a diode connection, and its drain is connected to the drain of the NMOS transistor M6.

(2) An NMOS transistor M6 is used to provide a bias current to the PMOS transistor M5. The gate of the NMOS transistor M6 is connected to the bias voltage signal Vbias1 , the source thereof is connected to the ground, and the drain of the NMOS transistor M6 is connected to the drain of the NMOS transistor M5 .

(3) The CMOS amplifier A1 is used to convert the drain-source equivalent impedance of the PMOS transistor M5 into the equivalent negative resistance of the equivalent negative resistance generating circuit. The input terminal of the CMOS amplifier A1 is connected to the source of the PMOS transistor M5, and the output terminal of the CMOS amplifier A1 is connected to the gate and drain of the PMOS transistor M5.

Wherein, the CMOS amplifier A1 in the equivalent negative resistance generation circuit includes:

A PMOS transistor M7 and an NMOS transistor M10 constitute a first-stage amplifier for first-stage amplification of signals; a PMOS transistor M11 and an NMOS transistor M8 constitute a second-stage amplifier for second-stage amplification of signals; Two NMOS transistors (M9 and M12) constitute the third-stage amplifier; the gate of the PMOS transistor M7 is used as the input terminal of the CMOS amplifier A1, its source is connected to an external power supply, and its drain is connected to the gate of the NMOS transistor M8 The gate of the NMOS transistor M10 is short-circuited to the drain, and connected to the drain of the PMOS transistor M7, and the source of the NMOS transistor M10 is connected to the ground; the gate of the PMOS transistor M11 is short-circuited to the drain, and simultaneously connected to The drain of the NMOS transistor M8 is connected to the gate of the NMOS transistor M9; the gate of the NMOS transistor M8 is connected to the drain of the PMOS transistor M7 and the drain of the NMOS transistor M10 at the same time, and the drain of the NMOS transistor M8 is connected to the PMOS transistor The drain of M11 is connected to the gate of NMOS transistor M9, the source of NMOS transistor M8 is connected to ground; the source of NMOS transistor M9 is connected to the drain of NMOS transistor M12, and the drain of NMOS transistor M9 is connected to an external power supply connected; the gate of the NMOS transistor M12 is connected to the bias voltage signal Vbias1, and the source of the NMOS transistor M12 is connected to the ground.

The connection relationship between the current source generation circuit and the equivalent negative resistance generation circuit is: the drain of the NMOS transistor M4 is connected to the source of the PMOS transistor M5 and the gate of the PMOS transistor M7 at the same time; the output end of the entire current source is an NMOS transistor A common connection point of the drain of M4, the source of the PMOS transistor M5 and the gate of the PMOS transistor M7.

The principle of the extremely high output impedance of the above embodiment:

(1). The design method of the current source with the high output impedance of the band negative resistance that the present invention proposes is to utilize the equivalent positive output impedance R _cm of the current source to connect an equivalent negative resistance R _gain in parallel, so:

${\mathrm{<span\; class="notranslate">\; R</span>}}_{\mathrm{<span\; class="notranslate">\; out</span>}}<span\; class="notranslate">\; =</span>\frac{{\mathrm{<span\; class="notranslate">\; R</span>}}_{\mathrm{<span\; class="notranslate">\; cm</span>}}{\mathrm{<span\; class="notranslate">\; R</span>}}_{\mathrm{<span\; class="notranslate">\; gain</span>}}}{{\mathrm{<span\; class="notranslate">\; R</span>}}_{\mathrm{<span\; class="notranslate">\; cm</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; R</span>}}_{\mathrm{<span\; class="notranslate">\; gain</span>}}}<span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; )</span>$

Where R _cm is the positive resistance and R _gain is the equivalent negative resistance. The |R _gain | is slightly larger than |R _cm |, and a current source R _out with a high resistance value can be obtained.

(2). The cascode current mirror in the above-mentioned current source generation circuit shown in Figure 3, its AC small signal output impedance is determined by the following formula:

R _cm ≈ g _m4 R _ds4 R _ds2 (1)

(3). The gate of the PMOS transistor M5 in Fig. 3 is connected to the drain, and the gate and drain of the PMOS transistor M5 are connected to the drain of the NMOS transistor M6, and the gate of the NMOS transistor M6 is connected to the bias voltage signal contact V _biasl , the source of which is connected to the ground, and the NMOS transistor M6 is used to provide a bias current to the PMOS transistor M5. The equivalent output impedance of the PMOS transistor M5 is R _ds5 , that is, the negative feedback resistance is R _ds5 . The CMOS amplifier A1 shown in FIG. 4 is a CMOS amplifier composed of three stages of amplification. The first stage is a common-source inverting amplifier stage, and its voltage gain is A _V1 ≈-g _m7 /g _m10 ; the second stage is also a common-source inverting amplifier stage, and its voltage gain is A _V2 ≈-g _m8 /g _m11 ; The third stage is a positive amplification stage with a common drain, and its voltage gain is A _V3 ≈g _m9 /(g _m9 +g _mb9 ). The total voltage gain of the operational amplifier (A1) is therefore:

${\mathrm{<span\; class="notranslate">\; A</span>}}_{\mathrm{<span\; class="notranslate">\; V</span>}}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; A</span>}}_{\mathrm{<span\; class="notranslate">\; <figure-callout\; id="1"\; label="V"\; filenames="C20051002112200151.png,C20051002112200162.png"\; state="\{\{state\}\}">V</figure-callout></span>}\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; \&CenterDot;</span>{\mathrm{<span\; class="notranslate">\; A</span>}}_{\mathrm{<span\; class="notranslate">\; <figure-callout\; id="2"\; label="V"\; filenames="C20051002112200162.png,C20051002112200163.png"\; state="\{\{state\}\}">V</figure-callout></span>}\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; \&CenterDot;</span>{\mathrm{<span\; class="notranslate">\; A</span>}}_{\mathrm{<span\; class="notranslate">\; <figure-callout\; id="3"\; label="V"\; filenames="C20051002112200173.png"\; state="\{\{state\}\}">V</figure-callout></span>}\mathrm{<span\; class="notranslate">\; 3</span>}}<span\; class="notranslate">\; =</span><span\; class="notranslate">\; (</span><span\; class="notranslate">\; -</span>\frac{{\mathrm{<span\; class="notranslate">\; g</span>}}_{\mathrm{<span\; class="notranslate">\; m</span>}\mathrm{<span\; class="notranslate">\; 7</span>}}}{{\mathrm{<span\; class="notranslate">\; g</span>}}_{\mathrm{<span\; class="notranslate">\; m</span>}\mathrm{<span\; class="notranslate">\; 10</span>}}}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; (</span><span\; class="notranslate">\; -</span>\frac{{\mathrm{<span\; class="notranslate">\; g</span>}}_{\mathrm{<span\; class="notranslate">\; m</span>}\mathrm{<span\; class="notranslate">\; 8</span>}}}{{\mathrm{<span\; class="notranslate">\; g</span>}}_{\mathrm{<span\; class="notranslate">\; m</span>}\mathrm{<span\; class="notranslate">\; 11</span>}}}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; (</span>\frac{{\mathrm{<span\; class="notranslate">\; g</span>}}_{\mathrm{<span\; class="notranslate">\; m</span>}\mathrm{<span\; class="notranslate">\; 9</span>}}}{{\mathrm{<span\; class="notranslate">\; g</span>}}_{\mathrm{<span\; class="notranslate">\; m</span>}\mathrm{<span\; class="notranslate">\; 9</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; g</span>}}_{\mathrm{<span\; class="notranslate">\; mb</span>}\mathrm{<span\; class="notranslate">\; 9</span>}}}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; =</span>\frac{{\mathrm{<span\; class="notranslate">\; g</span>}}_{\mathrm{<span\; class="notranslate">\; m</span>}\mathrm{<span\; class="notranslate">\; 7</span>}}{\mathrm{<span\; class="notranslate">\; g</span>}}_{\mathrm{<span\; class="notranslate">\; m</span>}\mathrm{<span\; class="notranslate">\; 8</span>}}{\mathrm{<span\; class="notranslate">\; g</span>}}_{\mathrm{<span\; class="notranslate">\; m</span>}\mathrm{<span\; class="notranslate">\; 9</span>}}}{{\mathrm{<span\; class="notranslate">\; g</span>}}_{\mathrm{<span\; class="notranslate">\; m</span>}\mathrm{<span\; class="notranslate">\; 10</span>}}{\mathrm{<span\; class="notranslate">\; g</span>}}_{\mathrm{<span\; class="notranslate">\; m</span>}\mathrm{<span\; class="notranslate">\; 11</span>}}<span\; class="notranslate">\; (</span>{\mathrm{<span\; class="notranslate">\; g</span>}}_{\mathrm{<span\; class="notranslate">\; m</span>}\mathrm{<span\; class="notranslate">\; 9</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; g</span>}}_{\mathrm{<span\; class="notranslate">\; mb</span>}\mathrm{<span\; class="notranslate">\; 9</span>}}<span\; class="notranslate">\; )</span>}<span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 2</span>}<span\; class="notranslate">\; )</span>$

As shown in Figure 3, the equivalent resistance seen from the source of the PMOS transistor (M5) is:

${\mathrm{<span\; class="notranslate">\; R</span>}}_{\mathrm{<span\; class="notranslate">\; gain</span>}}<span\; class="notranslate">\; =</span>\frac{{\mathrm{<span\; class="notranslate">\; <figure-callout\; id="5"\; label="R\; ds"\; filenames="C20051002112200162.png,C20051002112200172.png"\; state="\{\{state\}\}">R</figure-callout></span><figure-callout\; id="5"\; label="R\; ds"\; filenames="C20051002112200162.png,C20051002112200172.png"\; state="\{\{state\}\}">\; </figure-callout>}}_{\mathrm{<span\; class="notranslate">\; </span>}}}{\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; A</span>}}_{\mathrm{<span\; class="notranslate">\; V</span>}}}<span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 3</span>}<span\; class="notranslate">\; )</span>$

(4). The equivalent resistance seen at the output current _Iout port of the current source of high output impedance of the present invention is:

${\mathrm{<span\; class="notranslate">\; R</span>}}_{\mathrm{<span\; class="notranslate">\; eq</span>}}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; R</span>}}_{\mathrm{<span\; class="notranslate">\; out</span>}}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; R</span>}}_{\mathrm{<span\; class="notranslate">\; cm</span>}}<span\; class="notranslate">\; /</span><span\; class="notranslate">\; /</span>{\mathrm{<span\; class="notranslate">\; R</span>}}_{\mathrm{<span\; class="notranslate">\; gain</span>}}<span\; class="notranslate">\; =</span>\frac{{\mathrm{<span\; class="notranslate">\; R</span>}}_{\mathrm{<span\; class="notranslate">\; cm</span>}}<span\; class="notranslate">\; \&Center\; Dot;</span>{\mathrm{<span\; class="notranslate">\; R</span>}}_{\mathrm{<span\; class="notranslate">\; gain</span>}}}{{\mathrm{<span\; class="notranslate">\; R</span>}}_{\mathrm{<span\; class="notranslate">\; cm</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; R</span>}}_{\mathrm{<span\; class="notranslate">\; gain</span>}}}<span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 4</span>}<span\; class="notranslate">\; )</span>$

The gain Av of the operational amplifier is slightly greater than 1 through parameter design, so that R _gain is an equivalent negative resistance. The absolute value of R _gain is designed to be slightly greater than the absolute value of R _cm , so that the denominator R _cm + R _gain of _Req becomes slightly smaller than 0, thereby obtaining a very large positive resistance _Req and realizing the high output impedance of the current source The purpose is to greatly improve the output current stability of the current source. The output impedance R _cm of the Cascode current mirror circuit designed by the present invention =30.1552M, the output impedance R _gain of the equivalent negative resistance generation circuit =-30.7058M, and the total output impedance R _eq of the high impedance current source designed by the present invention = 1.6817G.

(5). The output current characteristic curve of the high output impedance current source using the Cascode current mirror as the current source generating circuit of the present invention is shown in FIG. 7 . According to the comparison of Vomin of the output current of the high output impedance current source using the Cascode current mirror as the current source generating circuit shown in Figure 8, the Vomin of the pure Cascode current mirror without negative resistance compensation is 2.100V but with negative resistance compensation After the circuit, the Vomin of the high output impedance current source designed by the present invention is reduced to Vomin≈1.465V.

The frequency response characteristic curve of the output current of the high output impedance current source using the Cascode current mirror as the current source generating circuit of the present invention is shown in FIG. 11 , and the frequency bandwidth is 1.04 GHz.

The relationship between the output current and temperature of the high output impedance current source using the Cascode current mirror as the current source generating circuit of the present invention is shown in FIG. 13 . In the temperature range of -40°C to 145°C, the temperature coefficient of the current is only 10.6ppm/°C, and its temperature characteristics are very good.

The output current characteristic curve of the high output impedance current source using the Wilson current mirror as the current source generating circuit of the present invention is shown in FIG. 8 . According to the comparison of Vomin of the output current of the high output impedance current source of the current source generating circuit using the Wilson current mirror as shown in Figure 10, the Vomin of the pure Wilson current mirror without negative resistance compensation is ≈2.105V; but adding a negative resistance After the compensation circuit, the Vomin of the high output impedance current source designed in the present invention is reduced to Vomin≈1.483V.

The frequency response characteristic curve of the output current of the high output impedance current source using the Wilson current mirror as the current source generating circuit of the present invention is shown in FIG. 12 , and the frequency bandwidth is 1.03 GHz.

The relationship between the output current and temperature of the high output impedance current source using the Wilson current mirror as the current source generating circuit of the present invention is shown in FIG. 14 . In the temperature range of -40°C to 145°C, the temperature coefficient of the current is only 10.6ppm/°C, and its temperature characteristics are very good.

Claims (9)

1. A current source with extremely high output impedance, comprising a current source generating circuit, characterized in that it also includes an equivalent negative resistance generating circuit, the equivalent negative resistance generating circuit is connected in parallel with the current source generating circuit , the absolute value of the equivalent negative resistance generated by the equivalent negative resistance generating circuit is slightly larger than the positive resistance generated by the current source generating circuit. 2. A kind of current source with extremely high output impedance according to claim 1, it is characterized in that, described equivalent negative resistance generating circuit comprises a PMOS transistor M5, an NMOS transistor M6 and an amplifier, the amplifier's The voltage gain is slightly greater than 1; the connection relationship is: the gate and drain of the PMOS transistor M5 are short-circuited, and its drain is connected to the drain of the NMOS transistor M6; the gate of the NMOS transistor M6 is connected to the bias voltage signal Vbias1, and its source The pole is connected to the ground, the drain of the NMOS transistor M6 is connected to the drain of the NMOS transistor M5; the input terminal Vi of the amplifier is connected to the source of the PMOS transistor M5, and the output terminal Vo of the amplifier is connected to the gate of the PMOS transistor M5 and Drain connected. 3. A kind of current source with very high output impedance according to claim 2, it is characterized in that, described amplifier is CMOS amplifier A1, and described CMOS amplifier A1 comprises a PMOS transistor M7 and a NMOS transistor M10 constituted A first-stage amplifier; a second-stage amplifier composed of a PMOS transistor M11 and an NMOS transistor M8; a third-stage amplifier composed of two NMOS transistors M9 and M12; the gate of the PMOS transistor M7 is used as the input terminal of the CMOS amplifier A1, and its source The pole is connected to the external power supply, and its drain is connected to the gate of NMOS transistor M8; the gate and drain of NMOS transistor M10 are short-circuited, and connected to the drain of PMOS transistor M7, and the source of NMOS transistor M10 is connected to The gate of the PMOS transistor M11 is short-circuited to the drain, and simultaneously connected to the drain of the NMOS transistor M8 and the gate of the NMOS transistor M9; the gate of the NMOS transistor M8 is simultaneously connected to the drain of the PMOS transistor M7 and the gate of the NMOS transistor M9. The drain of the NMOS transistor M10 is connected, the drain of the NMOS transistor M8 is connected with the drain of the PMOS transistor M11 and the gate of the NMOS transistor M9 at the same time, the source of the NMOS transistor M8 is connected to the ground; the source of the NMOS transistor M9 It is connected with the drain of the NMOS transistor M12, and the drain of the NMOS transistor M9 is connected with an external power supply; the gate of the NMOS transistor M12 is connected with the bias voltage signal Vbias1, and the source of the NMOS transistor M12 is connected with the ground. 4. A kind of current source with extremely high output impedance according to claim 1, it is characterized in that, described current source generating circuit is Cascode current mirror, and described Cascode current mirror is made of four NMOS transistors M1, M2, M3 and M4 and a current reference source Iref1, NMOS transistor M1 and NMOS transistor M2 constitute a mirror transistor, NMOS transistor M3 and NMOS transistor M4 constitute a mirror transistor; the sources of the two mirrored NMOS transistors M1 and M2 are grounded, and their gates They are connected to each other and connected to the drain of NMOS transistor M1, the drain of NMOS transistor M1 is connected to the source of NMOS transistor M3, the drain of NMOS transistor M2 is connected to the source of NMOS transistor M4; the other two mirrored NMOS transistors The gates of M3 and M4 are connected to each other and to the drain of the NMOS transistor M3, and the drain of the NMOS transistor M3 is connected to an external power source through the current reference source Iref1. 5. A kind of current source with very high output impedance according to claim 1, it is characterized in that, described current source generating circuit is Wilson current mirror, and described Wilson current mirror is made of four NMOS transistors M1, M2, M3 and M4 and a current reference source Iref1, NMOS transistor M1 and NMOS transistor M2 constitute a mirror transistor, NMOS transistor M3 and NMOS transistor M4 constitute a mirror transistor; the sources of the two mirrored NMOS transistors M1 and M2 are grounded, and their gates They are connected to each other and connected to the drain of NMOS transistor M2, the drain of NMOS transistor M1 is connected to the source of NMOS transistor M3, the drain of NMOS transistor M2 is connected to the source of NMOS transistor M4; the other two mirrored NMOS transistors The gates of M3 and M4 are connected to each other and to the drain of the NMOS transistor M3, and the drain of the NMOS transistor M3 is connected to an external power source through the current reference source Iref1. 6. A kind of current source with very high output impedance according to claim 1, it is characterized in that, described current source generating circuit is Widlar current source, and described Widlar current source is made of two NMOS transistors M1, M2 and two Composed of two resistors R1 and R2, the gates of the two NMOS transistors M1 and M2 are connected to each other and to the drain of the NMOS transistor M1, the source of the NMOS transistor M1 is grounded, and the drain of the NMOS transistor M1 is connected to the external power supply through the resistor R1 connection; the source of the NMOS transistor M2 is connected to the ground through the resistor R2. 7. A kind of current source with extremely high output impedance according to claim 3, it is characterized in that, described current source generation circuit is Cascode current mirror, and described Cascode current mirror is made of four NMOS transistors M1, M2, M3 and M4 and a current reference source Iref1, NMOS transistor M1 and NMOS transistor M2 constitute a mirror transistor, NMOS transistor M3 and NMOS transistor M4 constitute a mirror transistor; the sources of the two mirrored NMOS transistors M1 and M2 are grounded, and their gates They are connected to each other and connected to the drain of NMOS transistor M1, the drain of NMOS transistor M1 is connected to the source of NMOS transistor M3, the drain of NMOS transistor M2 is connected to the source of NMOS transistor M4; the other two mirrored NMOS transistors The gates of M3 and M4 are connected to each other and to the drain of the NMOS transistor M3, and the drain of the NMOS transistor M3 is connected to an external power supply through the current reference source Iref1; The drain of the NMOS transistor M4 is connected to the source of the PMOS transistor M5 and the gate of the PMOS transistor M7 at the same time; the output end of the entire current source is the drain of the NMOS transistor M4, the source of the PMOS transistor M5 and the gate of the PMOS transistor M7 common connection point. 8. A kind of current source with very high output impedance according to claim 3, it is characterized in that, described current source generating circuit is Wilson current mirror, and described Wilson current mirror is made of four NMOS transistors M1, M2, M3 and M4 and a current reference source Iref1, NMOS transistor M1 and NMOS transistor M2 constitute a mirror transistor, NMOS transistor M3 and NMOS transistor M4 constitute a mirror transistor; the sources of the two mirrored NMOS transistors M1 and M2 are grounded, and their gates They are connected to each other and connected to the drain of NMOS transistor M2, the drain of NMOS transistor M1 is connected to the source of NMOS transistor M3, the drain of NMOS transistor M2 is connected to the source of NMOS transistor M4; the other two mirrored NMOS transistors The gates of M3 and M4 are connected to each other and to the drain of the NMOS transistor M3, and the drain of the NMOS transistor M3 is connected to an external power supply through the current reference source Iref1; The drain of the NMOS transistor M4 is connected to the source of the PMOS transistor M5 and the gate of the PMOS transistor M7 at the same time; the output end of the entire current source is the drain of the NMOS transistor M4, the source of the PMOS transistor M5 and the gate of the PMOS transistor M7 common connection point. 9. A kind of current source with extremely high output impedance according to claim 3, it is characterized in that, described current source generation circuit is Widlar current source, and described Widlar current source is made of two NMOS transistors M1, M2 and two resistors Composed of R1 and R2, the gates of the two NMOS transistors M1 and M2 are connected to each other and connected to the drain of the NMOS transistor M1, the source of the NMOS transistor M1 is grounded, and the drain of the NMOS transistor M1 is connected to an external power supply through a resistor R1; The source of the NMOS transistor M2 is connected to the ground through the resistor R2; The drain of the NMOS transistor M2 is simultaneously connected to the source of the PMOS transistor M5 and the gate of the PMOS transistor M7; the output terminals of the entire current source are the drain of the NMOS transistor M2, the source of the PMOS transistor M5, and the gate of the PMOS transistor M7 common connection point.

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