CN100389552C - Timing estimating apparatus and method in direct sequence spread spectrum communication system - Google Patents
Timing estimating apparatus and method in direct sequence spread spectrum communication system Download PDFInfo
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- CN100389552C CN100389552C CNB2006100995231A CN200610099523A CN100389552C CN 100389552 C CN100389552 C CN 100389552C CN B2006100995231 A CNB2006100995231 A CN B2006100995231A CN 200610099523 A CN200610099523 A CN 200610099523A CN 100389552 C CN100389552 C CN 100389552C
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Abstract
This invention relates to a timing estimation device in a direct sequence spread spectrum communication system including: a matching filter, a three-way correlator, an accumulating process module and a timing estimator. This invention also relates to a timing estimation method including: a capture circuit utilizes the over sample signals output by the matching filter to capture spread spectrum codes, the three-way correlator operates in each symbol period and stores the related values output by the correlator, carrying out data unblock to the received symbols and computing coherent or non-coherent accumulation value and the timing estimator computes the timing deviation of the received signals by binomial interpolation and outputs it.
Description
Technical field
The present invention relates to timing estimating apparatus and method in a kind of direct sequence spread spectrum communication system, especially a kind of behind the direct sequence spread spectrum communication system spread spectrum code acquisition, can carry out the timing estimating apparatus and the method for timing estimation more accurately.Belong to the timing simultaneous techniques field in the communication.
Background technology
In the Direct-Spread communication system, must at first carry out the synchronous of spreading code, could correct demodulated received signal.So-called spreading code synchronously, be meant the autocorrelation performance that utilizes spreading code, adjust the local spread spectrum code sequence phase place of receiver, make it consistent with the phase place of received signal spread spectrum code sequence.Usually catch and follow the tracks of two processes being divided into synchronously of spreading code.After catching, local spreading code and received signal spreading code timing offset are usually at ± T
cIn/the 2M, T wherein
cBe the spread-spectrum code chip width, M is the over-sampling rate of the signal behind the overmatching filter.Catch the initial synchronisation that has realized spreading code.In order to improve demodulation performance, need on the basis of catching, further improve the sign indicating number synchronization accuracy, this normally realizes with code tracking.Code tracking is meant that dynamically to keep this synchronous, and makes the spreading code timing offset little process of trying one's best.
The incoherent lead-lag track loop of the normal employing of code tracking, through selecting the optimum sampling value as adjusting signal behind the loop filter, adopt incoherent lead-lag track loop to carry out the synchronous circuit structure of timing as shown in Figure 1 the difference of the incoherent correlation of two correlators of lead-lag output.This incoherent lead-lag track loop comprises that homophase matched filter 1, quadrature matched filter 2, interpolation filter 3, No. three correlators are punctual correlator 4, lag correlation device 5, leading correlator 6, and die lifter 7, also comprise and be used to generate the sign indicating number generator 10 of adjusting signal, correlation delivery when lag correlation device 5 and leading correlator 6 calculate again by a loop filter 8 and a sign indicating number clock 9, finally obtains to be used for selecting the adjustment signal of optimum sampling value.The timing accuracy of this mode is decided by loop filter bandwidth, and when loop filter bandwidth during than broad, timing accuracy is often not high enough.And the structure of this reaction type needs the regular hour could make loop-locking, is not suitable for the situation of burst communication.
In order to adapt to the situation of burst communication, can also directly carry out the estimation of timing offset, select optimum sampling value or interpolation to obtain the optimum sampling value according to the timing offset of estimating then.For the wide-band spread spectrum communication system, sample rate is low, algorithm advantages of simplicity and high efficiency timing estimation method is necessary, can effectively reduce the realization difficulty like this, but the method for estimation of existing many timing offset or simple inadequately, perhaps need higher sample rate, be difficult to satisfy the requirement of wide-band spread spectrum communication system.
Summary of the invention
The objective of the invention is at the defective in the above-mentioned existing timing estimation method, timing estimating apparatus and method in a kind of direct sequence spread spectrum communication system are provided, both can carry out timing estimation to Direct Sequence Spread Spectrum Signal, and sample rate is low, algorithm is simply efficient.
For achieving the above object, the invention provides the timing estimating apparatus in a kind of direct sequence spread spectrum communication system, comprising:
Matched filter is used to receive the in-phase signal and the orthogonal signalling of input, the output oversampled signals;
No. three correlators link to each other with described matched filter, are used to export the correlation of three different timing deviation correspondences;
The accumulation process module links to each other with described No. three correlators, is used to calculate the coherent accumulation value or the noncoherent accumulation value of the correlation of described three different timing deviation correspondences;
Timing estimator links to each other with described accumulation process module, is used for carrying out the binomial interpolation calculation according to the coherent accumulation value or the noncoherent accumulation value of the output of accumulation process module, obtains and correlation maximum moment corresponding.
In technique scheme, described matched filter can further comprise:
The in-phase branch matched filter links to each other with described No. three correlators, is used to receive the in-phase signal of input, and the output oversampled signals;
The quadrature branch matched filter links to each other with described No. three correlators, is used to receive the orthogonal signalling of input, and the output oversampled signals.
Described No. three correlators also further comprise:
Punctual correlator links to each other with described accumulation process module, is used for catching in each symbol period output the correlation on punctual road, back;
Leading correlator links to each other with described accumulation process module, is used for catching in each symbol period output the correlation on leading road, back;
The lag correlation device links to each other with described accumulation process module, is used for catching in each symbol period output the correlation on hysteresis road, back.
When the operating state that is in coherent manner, described accumulation process module can also comprise;
Several relevant processors link to each other with described No. three correlators, are used for the correlation of data block is carried out the phase place elimination and eliminates symbol-modulated information, and the output value of real part;
Several accumulators link to each other with timing estimator with corresponding described several relevant processors, are used for the value of real part of described output is added up, and output coherent accumulation value.
When the operating state that is in incoherent mode, described accumulation process module further comprises:
Several incoherent processors link to each other with described No. three correlators, are used for the correlation of described No. three correlators output is carried out modulo operation or asks the computing of mould side, and the mould or the mould side of output correlation;
Several accumulators link to each other with timing estimator with corresponding described several incoherent processors, are used for the mould or the mould side of described correlation are added up, and output noncoherent accumulation value.
For achieving the above object, the present invention also provides the timing estimation method in a kind of direct sequence spread spectrum communication system, may further comprise the steps:
Step 3 is carried out deblocking to the symbol that receives, and calculates coherent accumulation value or noncoherent accumulation value;
Based on technique scheme, the present invention utilizes simple binomial interpolation to obtain timing offset deblocking then.The estimated accuracy of timing offset can be improved by the length that increases deblocking.Over-sampling rate M minimum can get 2, and the high workload of whole device this moment is at the twice spreading rate, for the receiver of wide-band spread spectrum communication system provides a kind of simple and effective timing estimation method and device.For incoherent mode, data and carrier phase information are not suitable for system's initial synchronisation owing to not needing to know.If adopt coherent manner, for the Resistant DS Spread Spectrum System that has adopted the high-gain coding, this feedforward timing estimation mode with the deblocking stores processor, can utilize the output of decoder to feed back to the timing estimation module, improve the precision of timing estimation, carry out the associating iteration of timing estimation and decoding, thereby make that regularly synchronization performance is better than traditional non-coherent code ring greatly.
Below by drawings and Examples, technical scheme of the present invention is described in further detail.
Description of drawings
Fig. 1 carries out regularly synchronous electrical block diagram for existing incoherent lead-lag track loop.
Fig. 2 is the circuit basic structure schematic diagram of the timing estimating apparatus in the direct sequence spread spectrum communication system of the present invention.
Fig. 3 is the circuit concrete structure schematic diagram of the timing estimating apparatus in the direct sequence spread spectrum communication system of the present invention.
Fig. 4 is the structural representation of incoherent processor in the timing estimating apparatus of the present invention.
Fig. 5 is the structural representation of relevant processor in the timing estimating apparatus of the present invention.
Fig. 6 is the basic procedure schematic diagram of the timing estimation method in the direct sequence spread spectrum communication system of the present invention.
Fig. 7 is the schematic flow sheet of the embodiment under incoherent mode of the timing estimation method in the direct sequence spread spectrum communication system of the present invention.
Fig. 8 is the schematic flow sheet of the embodiment under coherent manner of the timing estimation method in the direct sequence spread spectrum communication system of the present invention.
Embodiment
In order to adapt to the situation of burst communication, the present invention directly carries out the estimation of timing offset, and in order to realize higher timing accuracy, the present invention utilizes the mode of deblocking and binomial interpolation to obtain timing offset, has improved estimated accuracy effectively.The present invention both can adopt coherent manner as requested, also can adopt incoherent mode.If be operated under the coherent manner, utilized the feedback information of decoding to carry out iteration estimation and decoding, performance is better than conventional method usually greatly.
As shown in Figure 2, be the circuit basic structure schematic diagram of the timing estimating apparatus in the direct sequence spread spectrum communication system of the present invention, comprise the matched filter 12, No. three correlators 14, accumulation process module 15 and the timing estimator 16 that link to each other in turn.After wherein signal enters matched filter, can improve signal to noise ratio, the M sampling signal of output enters No. three correlators 14 and carries out related operation, obtain the correlation on punctual road, leading road and hysteresis road, and then calculate the coherent accumulation value or the noncoherent accumulation value of the correlation of above three different timing deviation correspondences by accumulation process module 15; Last timing estimator 16 obtains and correlation maximum moment corresponding carrying out interpolation calculation according to the coherent accumulation value or the noncoherent accumulation value of 15 outputs of accumulation process module.The timing offset of Huo Deing can be used for carrying out signal recovery, the signal after the acquisition synchronously at last.
As shown in Figure 3, circuit concrete structure schematic diagram for the timing estimating apparatus in the direct sequence spread spectrum communication system of the present invention, wherein matched filter is divided into in-phase branch matched filter 1 and quadrature branch matched filter 2 according to the difference of entering signal, receive in-phase signal and orthogonal signalling respectively, can improve the signal to noise ratio of entering signal then, carry out spread spectrum code acquisition by capture circuit 13 with M sampling signal again, the timing offset of catching punctual road, back is no more than ± T
c/ 2M.No. three correlator correspondences three kinds of different timing deviations, comprise the punctual correlator 4 on punctual road, the lag correlation device 5 on hysteresis road and the leading correlator 6 on leading road, and wherein leading road and hysteresis road are with respect to the leading T of punctual road difference
c/ M and hysteresis T
c/ M.
Timing estimating apparatus of the present invention can divide other processing at coherent detection mode and incoherent detection mode, when the information of not knowing carrier phase and data symbol, can adopt incoherent mode, and adopt incoherent processor, as shown in Figure 4, be the structural representation of incoherent processor in the timing estimating apparatus of the present invention.Under incoherent working method; at first the mark signal of receiving is carried out piecemeal; three correlations of No. three correlators output are by three die lifters or ask mould side's device to carry out modulo operation or ask the computing of mould side then; the mould or the mould side of three correlations that utilizes 18 pairs in accumulator to belong to the symbol correspondence of a data block then carries out adding up for N time, thereby obtains the accumulated value of punctual, hysteresis and leading three tunnel incoherent correlations.
If the information of known carrier wave phase place and data symbol or their estimated value can adopt coherent manner, and adopt relevant processor, as shown in Figure 5, be the structural representation of relevant processor in the timing estimating apparatus of the present invention.Under relevant working method, behind deblocking, utilize the information (carrier phase of Gu Jiing for example of carrier phase
) and the information of data symbol (for example by the information of decoder feedback
) phase place of data block and the influence of symbol-modulated are eliminated, and obtain relevant correlation.The real part of three correlations that belongs to the symbol correspondence of a data block by 18 pairs in accumulator carries out adding up for N time again, thereby obtains the accumulated value of punctual, hysteresis and leading three tunnel coherent correlation values.
Based on above timing estimating apparatus, the present invention also provides the method for timing estimation in the direct sequence spread spectrum communication system, and as shown in Figure 6, the basic procedure schematic diagram for the timing estimation method in the direct sequence spread spectrum communication system of the present invention may further comprise the steps:
Specifically describe the operating process under different operating mode of the present invention below.
Under incoherent working method, adopt incoherent processor to carry out the accumulation process of correlation, as shown in Figure 7, schematic flow sheet for the embodiment under incoherent mode of the timing estimation method in the direct sequence spread spectrum communication system of the present invention, in the present embodiment, related input signal is the Direct swquence spread spectrum signal, and frequency expansion sequence is to be that 127 gold sign indicating number (GOLD) sequence obtains by zero padding in the cycle, and the cycle is 128.And adopt the QPSK modulation, and information rate is 512kbps, and character rate is 256kps, and spreading ratio is 128, and the employing code length is the LDPC sign indicating number of 1056,1/2 code checks.The channel that adopts is an additive white Gaussian noise channel.
The base-band analog signal of process demodulation by filter enters the A/D converter and is transformed into baseband digital signal, baseband digital signal carries out the correction of residual frequency deviation to signal under the control of carrier synchronization device, the signal after the correcting residual frequency deviation enters matched filter and carries out optimum reception.Signal after the reception carries out over-sampling with 2 sampling speed, and referring to the step 201 of Fig. 7, the capture circuit of receiver carries out spread spectrum code acquisition to 2 times of oversampled signals of matched filter output; Behind spread spectrum code acquisition, No. three correlators carry out related operation at each symbol period to local spreading code and the oversampled signals corresponding with punctual road, leading road and hysteresis road, obtain punctual, leading and three tunnel the correlation of lagging behind, referring to the step 202 of Fig. 7; Step 203, with after receiving to symbol carry out deblocking, be divided into the data block of predetermined length, wherein the length of data block is relevant with the precision of the last fixed pattern deviation that obtains, if the length of increase data block then can improve the estimated accuracy of timing offset; Step 204 under incoherent mode, is carried out modulo operation with the correlation that obtains, and the mould of output correlation; Step 205 adds up the mould of correlation, and output noncoherent accumulation value; Step 206, timing estimator go out the timing offset estimated value of received signal by the binomial interpolation calculation.
In the time of muting, when timing offset is 0, be that incoherent or relevant correlation all is maximum, the relation curve of correlation and timing offset is approximately parabola, again according to the correlation of three different timing deviation correspondences of No. three correlators output, moment corresponding when utilizing the binomial interpolation calculation to go out the correlation maximum, this is best timing offset constantly; For noisy situation, the mode by deblocking and accumulated correlation values improves signal to noise ratio, and obtains more accurate timing estimation value.The timing offset of supposing No. three correlators is respectively τ
-1, τ
0And τ
1, τ wherein
0For catching the timing offset of the punctual road remnants in back, τ
-1=τ
0-T
c/ M, τ
1=τ
0+ T
c/ M.The accumulated value of (incoherent/relevant) correlation of corresponding three road N symbol is R
N(τ
-1), R
N(τ
0) and R
N(τ
1), timing estimation then
Can be expressed as:
T wherein
s=T
c/ M is the sampling interval, and in the present invention, the M minimum can be 2, at this moment T
sBe T
c/ 2.
The burst that is adopted in the present embodiment, modulation system, channel etc. are not as enforcement restrictive condition of the present invention, and only provide a kind of mode that realizes, and the present invention is not limited to above implementation condition.Present embodiment is suitable for the synchronously preliminary of system.
When the information of known carrier wave phase place and data symbol or estimated value, can carry out the processing of coherent manner, the Resistant DS Spread Spectrum System that is generally used for high-gain coding is the schematic flow sheet of the embodiment under coherent manner of the timing estimation method in the direct sequence spread spectrum communication system of the present invention as shown in Figure 8.
Step 301 in the present embodiment, 302 and a last embodiment approximate, in step 303, the symbol that receives is carried out deblocking, be divided into the data block of predetermined length, the tentation data block length is 1056, promptly per 1056 symbols are finished a timing offset and are estimated; In the step 304, the coherent value of data block is carried out phase place eliminate and eliminate symbol-modulated information, and the output value of real part.The carrier estimation device can carry out carrier phase estimation more accurately according to the output of last LDPC decoder, different with a last embodiment, behind spread spectrum code acquisition, do not carry out initial timing estimation, but directly the correlation on punctual road is exported to the LDPC decoder.In each iteration afterwards, the carrier phase that the iteration of last time is obtained
Estimated value with data symbol
Be input to relevant processor and carry out the phase place elimination and eliminate symbol-modulated information,, and in step 305, utilize accumulator to carry out adding up for N time, utilize the binomial interpolation calculation to go out timing offset in the final step 306 at last with real part output.The timing offset that calculates is used for carrying out signal and recovers, and the signal of recovery enters the LDPC decoder, and then carries out iteration next time.
From above-mentioned two embodiment as can be seen, what the present invention adopted is a kind of timing estimation method of feed forward type, and the process and the timing estimation of decoding iteration can be combined, not only on efficient, also improved the effect of timing estimation, thereby burst communication has been had good effect from estimated accuracy.In addition, if be operated under the coherent manner, utilized the feedback information of decoding to carry out iteration estimation and decoding, performance is better than conventional method usually greatly.
Should be noted that at last: above embodiment is only in order to illustrate that technical scheme of the present invention is not intended to limit; Although with reference to preferred embodiment the present invention is had been described in detail, those of ordinary skill in the field are to be understood that: still can make amendment or the part technical characterictic is equal to replacement the specific embodiment of the present invention; And not breaking away from the spirit of technical solution of the present invention, it all should be encompassed in the middle of the technical scheme scope that the present invention asks for protection.
Claims (6)
1. the timing estimating apparatus in the direct sequence spread spectrum communication system is characterized in that, comprising:
Matched filter is used to receive the in-phase signal and the orthogonal signalling of input, the output oversampled signals;
No. three correlators link to each other with described matched filter, are used to export the correlation of three different timing deviation correspondences;
The accumulation process module links to each other with described No. three correlators, is used to calculate the coherent accumulation value or the noncoherent accumulation value of the correlation of described three different timing deviation correspondences;
Timing estimator links to each other with described accumulation process module, is used for carrying out the binomial interpolation calculation according to the coherent accumulation value or the noncoherent accumulation value of the output of accumulation process module, obtains and correlation maximum moment corresponding;
Described matched filter comprises:
The in-phase branch matched filter links to each other with described No. three correlators, is used to receive the in-phase signal of input, and the output oversampled signals;
The quadrature branch matched filter links to each other with described No. three correlators, is used to receive the orthogonal signalling of input, and the output oversampled signals;
Described No. three correlators comprise:
Punctual correlator links to each other with described accumulation process module, is used for catching in each symbol period output the correlation on punctual road, back;
Leading correlator links to each other with described accumulation process module, is used for catching in each symbol period output the correlation on leading road, back;
The lag correlation device links to each other with described accumulation process module, is used for catching in each symbol period output the correlation on hysteresis road, back.
2. the timing estimating apparatus in the direct sequence spread spectrum communication system according to claim 1 is characterized in that, described accumulation process module further comprises:
Several relevant processors link to each other with described No. three correlators, are used for the correlation of data block is carried out the phase place elimination and eliminates symbol-modulated information, and the output value of real part;
Several accumulators link to each other with timing estimator with corresponding described several relevant processors, are used for the value of real part of described output is added up, and output coherent accumulation value.
3. the timing estimating apparatus in the direct sequence spread spectrum communication system according to claim 1 is characterized in that, described accumulation process module further comprises:
Several incoherent processors link to each other with described No. three correlators, are used for the correlation of described No. three correlators output is carried out modulo operation or asks the computing of mould side, and the mould or the mould side of output correlation;
Several accumulators link to each other with timing estimator with corresponding described several incoherent processors, are used for the mould or the mould side of described correlation are added up, and output noncoherent accumulation value.
4. the timing estimation method in the direct sequence spread spectrum communication system is characterized in that, may further comprise the steps:
Step 1, capture circuit utilize M times of oversampled signals of in-phase signal matched filter and orthogonal signalling matched filter output to carry out spread spectrum code acquisition, and the timing offset of catching the back signal is at+T
c/ 2M and-T
cBetween/the 2M, wherein said M is the natural number more than or equal to 2, T
cBe the spread-spectrum code chip width;
Step 2, behind spread spectrum code acquisition, at the punctual correlator of each symbol period utilization, leading correlator and lag correlation device local spreading code and the oversampled signals corresponding with punctual road, leading road and hysteresis road are carried out related operation, and store the correlation of described No. three correlators output, described leading correlator with respect to punctual correlator with leading T
cThe mode of/M phase place is carried out correlation value calculation, described lag correlation device with respect to punctual correlator with hysteresis T
cThe mode of/M phase place is carried out correlation value calculation; T wherein
cBe the spread-spectrum code chip width, M is one more than or equal to 2 natural number;
Step 3 is carried out deblocking to the symbol that receives, and calculates coherent accumulation value or noncoherent accumulation value;
Step 4, timing estimator goes out the timing offset estimated value of described received signal by the binomial interpolation calculation, and exports.
5. the timing estimation method in the direct sequence spread spectrum communication system according to claim 4 is characterized in that, described step 3 is specially:
Step 31 is carried out deblocking with the symbol that receives, and is divided into the data block of predetermined length;
Step 32 under incoherent mode, is carried out the correlation that obtains delivery or is asked the computing of mould side, and the mould or the mould side of output correlation;
Step 33 adds up the mould or the mould side of described correlation, and output noncoherent accumulation value.
6. the timing estimation method in the direct sequence spread spectrum communication system according to claim 4 is characterized in that, described step 3 is specially:
Step 31 ', the symbol that receives is carried out deblocking, be divided into the data block of predetermined length;
Step 32 ', under coherent manner, the correlation of data block is carried out phase place eliminate and eliminate symbol-modulated information, and the output value of real part;
Step 33 ', the value of real part of described output is added up, and output coherent accumulation value.
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| JP5151872B2 (en) * | 2007-12-27 | 2013-02-27 | セイコーエプソン株式会社 | Correlation calculation processing execution method, control circuit, signal processing circuit, and positioning device |
| CN102065043B (en) * | 2010-12-09 | 2013-01-30 | 北京理工大学 | Frequency domain parallel demodulation method in high-speed communication system |
| CN102281630A (en) * | 2011-08-25 | 2011-12-14 | 江苏东大通信技术有限责任公司 | Three-carrier frequency timing tracking method for code division multiple access (CDMA) system and base station positioning scheme |
| CN106100693B (en) * | 2016-05-31 | 2018-05-08 | 东南大学 | A kind of direct sequence signal chip width method of estimation |
| JP6906966B2 (en) * | 2017-01-27 | 2021-07-21 | ラピスセミコンダクタ株式会社 | Signal detection circuit and signal detection method |
| GB201806730D0 (en) * | 2018-04-25 | 2018-06-06 | Nordic Semiconductor Asa | Matched filter bank |
| CN108768444B (en) * | 2018-06-08 | 2020-08-04 | 西安电子科技大学 | Anti-blocking type interference hybrid spread spectrum method |
| CN112600588B (en) * | 2020-12-08 | 2022-04-01 | 西安思丹德信息技术有限公司 | Non-integer period spread spectrum communication capturing method |
| CN113904763B (en) * | 2021-10-09 | 2023-04-11 | 四川安迪科技实业有限公司 | Low-delay partial iteration blind symbol synchronization method |
| CN117938339A (en) * | 2024-03-21 | 2024-04-26 | 北京融为科技有限公司 | Self-adaptive capturing method and device for PPM signal guide code |
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