CN100385361C

CN100385361C - Power source supply structure more than one group of power voltage for low power consumption applications

Info

Publication number: CN100385361C
Application number: CNB021551049A
Authority: CN
Inventors: 王雄伟
Original assignee: Shanghai Beiling Co Ltd
Current assignee: Shanghai Beiling Co Ltd
Priority date: 2002-12-13
Filing date: 2002-12-13
Publication date: 2008-04-30
Anticipated expiration: 2022-12-13
Also published as: CN1508642A

Abstract

The present invention relates to a power supply structure for more than one group of power voltage used in situations with low power consumption, which comprises more than one group of power voltage, a standard CMOS digital circuit (3) and an electrically erasable and programmable read only memory circuit (4), wherein the standard CMOS digital circuit (3) and the electrically erasable and programmable read only memory circuit are respectively connected with the corresponding power voltage. Control signals output by the standard CMOS digital circuit (3) pass through a Schmitt trigger (41) to be input into a high voltage generator circuit (42). When the power supply structure is adopted, the circuit can work normally with small quiescent current if the power voltage varies within the range of 3 to 5V. The power supply structure can be applied to situations with low power consumption.

Description

Be applied to the energy supply structure of one group of above supply voltage of low-power consumption occasion

Technical field

The present invention relates to a kind of energy supply structure, relate in particular to the energy supply structure of the low speed paper tape reader static power disspation circuit that is used for one group of above supply voltage.

Technical background

Because technology itself, in conventional sub-micron, deep-submicron digital CMOS process, the voltage that is added on NMOS and the PMOS grid must could guarantee the reliability of device below the magnitude of voltage of a certain regulation; And in similar EEPROM technology, can produce high voltage bearing NMOS and PMOS to satisfy the designing requirement of eeprom circuit.Therefore, if when the cmos digital circuit that adopts deep submicron process and eeprom circuit are combined, if the externally fed magnitude of voltage of entire circuit just must convert outer power voltage EXT VDD to the builtin voltage vdd! that can guarantee the device reliably working with an electric pressure converter greater than the upper limit of the magnitude of voltage that guarantees device energy reliably working in the digital CMOS circuit (as shown in Figure 1).Because EEPROM is being carried out when erasable, dynamic current can reach several milliamperes, so require the electric pressure converter 1 among Fig. 1 that extraordinary stabilizing voltage characteristic is arranged, promptly output voltage changes with the change of load driving electric current hardly.Reaching extraordinary stabilizing voltage characteristic, is cost to increase quiescent dissipation: have the electric pressure converter 1 of good voltage regulation performance among Fig. 1, under the situation with any output load not, quiescent current has just reached the order of magnitude of hundreds of microampere.In non-low-power consumption application scenario, it is very suitable adopting structure shown in Figure 1; But require to adopt structure shown in Figure 1 just unworkable in the low-power consumption application scenario of several these orders of magnitude of microampere at quiescent current to entire circuit.

Summary of the invention

Technical matters to be solved by this invention provides a kind of energy supply structure that is used for one group of above supply voltage, makes that it is very little that the quiescent current of entire circuit still can reach when needing bigger dynamic current, at several these orders of magnitude of microampere.

In order to solve the problems of the technologies described above, the invention provides a kind of energy supply structure that is applied to one group of above supply voltage of low-power consumption occasion, comprise one group of above supply voltage, and the digital circuit and the Electrically Erasable Read Only Memory circuit that are connected with corresponding supply voltage respectively, described Electrically Erasable Read Only Memory circuit comprises high-voltage generator circuit, described Electrically Erasable Read Only Memory circuit also comprises: a Schmidt trigger that is connected with high-voltage generator circuit, the control signal of described digital circuit output is imported high-voltage generator circuit again through behind the Schmidt trigger.Described standard CMOS digital circuit adopts the CMOS logical organization.

One of actual design is adopted 0.35um CMOS﹠amp; The circuit of EEPROM technology, when adopting existing energy supply structure, entire circuit has following characteristic:

When external input voltage was 3～5V, internal voltage output was approximately 3V

External input voltage is when 3V is following, and internal voltage output is substantially equal to external input voltage

When static, electric current is about 200uA

During dynamic duty, internal voltage output changes with output current hardly

● conclusion: circuit fully can operate as normal, but can't be applied to the low-power consumption occasion

When adopting energy supply structure of the present invention, entire circuit has following characteristic:

Input voltage is 5V, and quiescent current is about 9uA

Input voltage is 3V, and quiescent current is about 1.5uA

Input voltage is 3V, and when the output current of electric pressure converter B was 600uA, internal voltage output was 2.5V

● conclusion: when supply voltage changed in the scope of 3～5V, circuit can operate as normal, and quiescent current is very little, can be applied to the low-power consumption occasion.

Description of drawings

The synoptic diagram of the existing energy supply structure of Fig. 1.

The conversion block diagram of Fig. 2 high pressure generator.

Fig. 3 is the energy supply structure that is applied to one group of above supply voltage of low-power consumption occasion.

Embodiment

Adopting energy supply structure shown in Figure 1 why unworkable in the low-power consumption application scenario, is because due to the characteristic of " big quiescent current exchanges the high voltage stability ability for " of electric pressure converter 1 (VOLTAGE_CONVERTAGE_1) itself.To the electric pressure converter of big quiescent current must be changed into the minimum electric pressure converter of quiescent current in the low-power consumption applications.But be not that the electric pressure converter 2 (VOLTAGE_CONVERTAGE_1) that simple electric pressure converter 1 with big quiescent current is transformed into little quiescent current has just solved all problems.Because though the quiescent current of the electric pressure converter of little quiescent current itself is very little, but its voltage regulation performance is very general, with go up current driving ability after the load can only hundreds of microampere about, can't satisfy the requirement of EEPROM dynamic current of several milliamperes of needs when erasable.Consider and EEPROM carried out when erasable that electric current mainly all exhausts in this piece circuit of high pressure generator (HV GEN), so can adopt translation circuit as shown in Figure 2 to substitute original high-voltage generator circuit: with in the high-voltage generator circuit 42 vdd! Directly replace with external input voltage EXT_VDD, with logic gates all in this high-voltage generator circuit 42 all use can be high pressure resistant NMOS and PMOS constitute, the control signal (CTRL) of original this high-voltage generator circuit 42 of directly input is imported this high-voltage generator circuit 42 after becoming the signal that the high level amplitude is the outer power voltage amplitude after through Schmidt trigger 41 (Schmitt Buffer) again.Like this, energy supply structure of the present invention just as shown in Figure 3: comprise the electric pressure converter 2 of little quiescent current, its voltage EXE_VDD with the outside input convert to internal work voltage Vdd! And offer standard CMOS digital circuit 3 and Electrically Erasable Read Only Memory circuit 4, wherein Electrically Erasable Read Only Memory circuit 4 comprises high-voltage generator circuit 42 and the Schmidt trigger 41 that operating voltage directly is provided by external input voltage, and the control signal (CTRL) of described standard CMOS digital circuit 3 outputs is imported this high-voltage generator circuit 42 after becoming the signal that the high level amplitude is the outer power voltage amplitude after through Schmidt trigger 41 (Schmitt Buffer) again.Like this under static condition, the quiescent current of electric pressure converter 2 has only several microamperes, standard CMOS digital circuit 3 (DIGITAL_BLOCK) is the CMOS logic owing to what adopt, quiescent current can be ignored, the electric current of logic gate when static state of Electrically Erasable Read Only Memory circuit 4 (EEPROM_BLOCK) this part also can be ignored, remaining mimic channel does not have DC channel over the ground in the time of all can being designed to static state, the quiescent current of entire circuit almost is exactly the quiescent current of electric pressure converter 2 when static state like this, has only several microamperes; During circuit working, remove this piece circuit of high pressure generator 42 (HV_GEN) under dynamic condition, the electric current of remaining circuitry consumes can not surpass 1mA, can be provided by electric pressure converter 2.Therefore, adopted energy supply structure shown in Figure 3 can satisfy the application of low-power consumption afterwards.

Certainly this power supply architecture also not only is applied to adopt sub-micron, deep-submicron CMOS; In the eeprom circuit, can under high pressure work and module that dynamic power consumption is bigger as long as have in the entire circuit, the power supply of this module just can be used outer power voltage EXT_VDD, and principle of the present invention also can be expanded the low-power consumption application scenario that applies to more than power supply power supply more than two groups simultaneously.

Claims

1. energy supply structure that is applied to one group of the low-power consumption occasion above supply voltage, comprise one group of above supply voltage, and the standard CMOS digital circuit (3) and the Electrically Erasable Read Only Memory circuit (4) that are connected with corresponding supply voltage respectively, described Electrically Erasable Read Only Memory circuit (4) comprises high-voltage generator circuit (42), it is characterized in that, described Electrically Erasable Read Only Memory circuit (4) also comprises: a Schmidt trigger (41) that is connected with high-voltage generator circuit (42), import high-voltage generator circuit (42) again behind the control signal process Schmidt trigger (41) of described standard CMOS digital circuit (3) output;

Described supply voltage is two groups, promptly internal power source voltage (Vdd! ) and outer power voltage (EXT_VDD), described internal power source voltage (Vdd! ) converted by electric pressure converter (2) by outer power voltage (EXT_VDD), described electric pressure converter (2) is little quiescent current electric pressure converter, the operating voltage of described Schmidt trigger (41) and high-voltage generator circuit (42) is provided by outer power voltage (EXT_VDD), and the operating voltage of the other parts of described standard CMOS digital circuit (3) and Electrically Erasable Read Only Memory circuit (4) is by internal power source voltage (Vdd! ) provide, after becoming the signal that the high level amplitude is outer power voltage (EXT_VDD) amplitude, the control signal that described Schmidt trigger (41) is exported standard CMOS digital circuit (3) imports high-voltage generator circuit (42) again.

2. the energy supply structure that is applied to one group of above supply voltage of low-power consumption occasion according to claim 1 is characterized in that described standard CMOS digital circuit (3) adopts the CMOS logical organization.