CN100380691C - Method for roughening a surface of a body, and optoelectronic component - Google Patents
Method for roughening a surface of a body, and optoelectronic component Download PDFInfo
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- CN100380691C CN100380691C CNB2003801080681A CN200380108068A CN100380691C CN 100380691 C CN100380691 C CN 100380691C CN B2003801080681 A CNB2003801080681 A CN B2003801080681A CN 200380108068 A CN200380108068 A CN 200380108068A CN 100380691 C CN100380691 C CN 100380691C
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- Prior art keywords
- mask layer
- corrosion
- described method
- mask
- depth
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/20—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
- H01L33/22—Roughened surfaces, e.g. at the interface between epitaxial layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
- H01L21/0334—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
- H01L21/0337—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/308—Chemical or electrical treatment, e.g. electrolytic etching using masks
- H01L21/3081—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their composition, e.g. multilayer masks, materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/308—Chemical or electrical treatment, e.g. electrolytic etching using masks
- H01L21/3083—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
- H01L21/3086—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment
Abstract
The invention relates to a method for roughening a surface of a body ( 1 ), comprising the following steps: coating the surface with a mask layer ( 2 ); applying pre-shaped mask bodies ( 3 ) to the mask layer ( 2 ); etching though the mask layer at locations that are not covered by mask bodies ( 3 ), and etching the body ( 1 ) at locations of its surface that are not covered by the mask layer ( 2 ). The invention also relates to an optoelectronic component. By using the mask layer ( 2 ) as an additional auxiliary mask, methods having a low selectivity with regard to polystyrene balls can be used for etching.
Description
Technical field
The present invention relates to a kind of method of body surface hacking, wherein hacking is realized by corroding.
Background technology
The surface hacking is particularly advantageous in light-emitting diode (LED) and uses.Its reason is the light output from the semiconductor substrate that constitutes the light-emitting diode basis.Generally there is high index jump here, wherein the refractive index n of semi-conducting material=1.5 typically.And refractive index n=1.5 of the resin of encirclement semiconductor substrate.Draw thus from the high index jump of the radiation of semiconductor substrate output.So just resin-encapsulate is produced a less angle of total reflection that is approximately 26 °.The light that this angle of total reflection causes producing in semiconductor has only seldom a part to export.In the light-emitting diode of generally making of simple cube, some radiation can not be launched in about 26 ° wide output taper and be caught by semiconductor crystal, this be because it for the angle of surface normal also because repeatedly reflection and the cause that can not change.So light radiation owing to particularly in the contact zone, active area or also be absorbed early or late in substrate loses.
The hacking of semiconductor surface helps making the radiating scattering of propagating beyond the output conical surface in this conical surface.This especially to have the light-emitting diode chip for backlight unit of transparent substrates or active reflector below the active area, especially to thin-film led favourable.These advantages also are suitable for concerning Organic Light Emitting Diode.
From document US 3,739, knownly in 217 can improve the output of light from gallium-phosphite crystal by surperficial hacking.
" 40% Efficient Thin-Film Surface-TexturedLight-Emitting Diodes by Optimization of Natural Lithography (improving film surface structure light-emitting diode 40% efficient by the optimization of natural photoetching) "-document of people such as R.Windisch is at IEEE Transactions on Electron Devices (Electrical Engineer association relates to the journal of electronic installation) the 47th volume, 2000 No. 7 periodicals, 1492～1498 pages-proposing semiconductor to aluminium-gallium-arsenide base carries out hacking and improves from semi-conductive light output.Here used following hacking method: place polystyrene sphere on the surface of semiconductor substrate, these beads for example can be prepared into an individual layer on water surface, transfer to the surface of semiconductor substrate then by immersion.After treating that water is done, on the surface of these beads attached to this matrix.Dry corrosion (trockenaetzen) is carried out on this surface subsequently, thereby keeps column in the position of bead, and by dry corrosion method process the space between the column is eroded from semiconductor substrate.
This known shortcoming that is used for the method for matrix surface hacking is not to be suitable for the semiconductor of being made by aluminium-gallium-indium-phosphite or aluminium-gallium-indium-nitride material.Its reason is that the selectivity of used dry corrosion method p-poly-phenyl ethene bead is too little.In other words, compare with bead, the semiconductor corrosion is very slow, so the bead of using as etching mask only disappears with regard to beginning corrosion process in advance during the very little constructional depth of corrosion in the surface of semiconductor substrate, thereby can not to reach its value be 0.25 to 5 required corrosion depth and structure width ratio.In order effectively to improve the output of light from semiconductor substrate, this ratio is necessary.
Summary of the invention
The objective of the invention is to propose a kind of hacking method of body surface, this method is applicable to many different materials.
This purpose is by a kind of being used for the method for a body surface hacking to be realized that this method comprises the following steps:
A) apply one deck mask layer from the teeth outwards;
B) on mask layer, place preformed mask body;
C) penetrate mask layer in the position corrosion that not masked body covers;
D) corrode this object at the position that does not have mask layer of body surface,
Wherein implement this method: keep structure on object surfaces, its width (b) satisfies with the ratio of corrosion depth (t): 0.1＜t/b＜10.
The present invention utilizes such basic concept to relax the selective problems of used caustic solution, promptly except sheltering with polystyrene sphere, also uses an auxiliary mask.This auxiliary mask is made with such material, that is: it both had been different from the material of the object that will be corroded, and is different from the material of bead again.Utilize this additional etching mask to be divided into two steps to corrosion process: the structure that bead wherein is set on the surface in a first step is transferred on the auxiliary mask; In one second step, then be that the structure of auxiliary mask is transferred on the object surfaces that will be corroded.
Except bead, also have another kind of material to participate in, thereby the much bigger selectivity of combination of materials is provided as mask, wherein here just can be in the optimization that realizes described process aspect the selectivity of the relevant increase between mask material and the material that will be corroded.The caustic solution that for example has is not suitable for the specific combination of materials of the bead and the object that will be corroded, but this caustic solution may be used for carrying out first corrosion step according to the caustic solution of two present steps.In addition, now availablely a kind ofly needn't need selectable method corrode the object of wanting hacking to being positioned at lip-deep bead.Exactly, need on the one hand only second kind of caustic solution to the material of auxiliary mask with on the other hand the object that will be corroded is had high selectivity and get final product.
A kind of object surfaces hacking method provided by the invention, this method comprises the following steps:
In a first step, object surfaces is applied one deck mask layer;
In next step, preformed mask body is set on this mask layer;
Corrosion penetrates mask layer in next step again, that is corrosion penetrates the position that not masked body covers;
Corroding object at the position that does not have mask layer on its surface in the next step again.
The advantage of this method is that corrosion process can be divided into two steps by adding another etching mask, wherein just no longer needs a kind of caustic solution that corrodes described object with respect to preformed mask body very selectively.Exactly, can just can obtain the very suitable caustic solution of extensive fields by the material change of mask body and mask layer, that is very the caustic solution of extensive fields can be selected for described corrosion process for use.
In a kind of embodiment of this method, this object contains aluminium-gallium-indium-phosphite (AlGaInP).This semi-conducting material helps emitting light emitting diode use in redness or blue spectral range.This semi-conducting material can be deposited to carborundum or selectively at GaAs based the end.
In the another kind of favourable embodiment of this method, this object contains aluminium-gallium-indium-nitride (AlGaInN).This material also is specially adapted to the light-emitting diode in redness or blue spectral range.
In a kind of embodiment of this method, apply the mask layer that one deck is made with a kind of dielectric.For example available Si
xN
y, as Si
3N
4, SiON, SiO
2, Al
2O
3And other similar material is as dielectric.That is the most handy this class dielectric is made mask layer.But be fit to do other material of mask layer in addition.Critically be that just the material of mask layer can corrode mask body selectively with a kind of corrosion process, the different with it corrosion process of the then available another kind of described object is corroded selectively to mask layer.
In one embodiment, preformed mask body can be used the bead of being made by polystyrene.This material is made the possibility of polystyrene sphere in enormous quantities with its good chemical stability with the method for simple and inexpensive and is specially adapted to the mask body of method described here.
This mask body not only can be used as individual layer by the form of random alignment but also can be arranged on the surface of mask layer by regularly arranged form.
In a kind of advantageous embodiment of this method, described corrosion step carries out by means of a kind of dry corrosion method.The ion beam etching methods such as (CAIBE=Chemical Assisted Ion Beam Etching) that for example ion etching of available reaction (RIE=Reactive Ion Etching), ion beam etching (IBE=Ion Beam Etching) and chemistry are supported.
As the dry corrosion rule as also using a kind of inductive couple plasma etch (ICP=Inductive Coupled Plasma).
The dry corrosion method has such advantage to the inventive method, does not need to use liquid that is:, and this has just increased the local stability of mask body, because can not produce liquid flow.
In a preferred version, this method is to implement like this: the structure in the retention surface makes the ratio of its width b and corrosion depth t be:
0.1＜t/b＜10，
This method is preferably implemented like this, that is:
0.25＜t/b＜5。
For the scattering of the semiconductor die surface of improving optics, in order to improve the outside output of light from this crystal, the above-mentioned degree of depth-width ratio is particularly advantageous.
Above-mentioned corrosion depth-width is than realizing by the size and the material of suitable selective etching process and mask body.
Here in a kind of modification of described method, be close to after the mask layer corrosion penetrates and remove mask body.And in another kind of modification, mask body then is retained on the surface of mask layer, so that use as additional etching mask in second corrosion process.After described corrosion process finished, mask layer can remove, but also can be retained on the object surfaces.
This method is preferably implemented like this, makes corrosion depth in the object between 50 and 100 nanometers.This corrosion depth can a corrosion process realizes by carrying out with a kind of suitable selectivity between the mask layer and the object that will be corroded.In addition, in order to reach desirable corrosion depth, also must the suitable selective etching duration.
Concerning described method here, mask layer preferably applies into the thickness between 10 and 100 nanometers.Wherein, the minimum thickness of mask layer is necessary, because otherwise just can not be reliably use as the mask of object.But to penetrate the required duration of mask layer for corrosion and keep within limits in order to make, should not surpass the maximum ga(u)ge of regulation again.
In order to realize the aforementioned proportion of corrosion depth and structure width, be preferably between 150 and 300 nanometers at the lateral dimension of the mask body on the mask layer.
Method described here is preferably in first corrosion step and uses such process, and this process is to mask body and will be had bad selectivity by the object of hacking.Even can consider to use such process, this process is serious by the object of hacking to the corrosion comparison of mask body, but only just occurs this situation when this corrosion process has a suitable selectivity again to mask layer.
Corrosion penetrate mask layer for example the equipment used of the ion etching of available a kind of reaction finish.
In this case, preferably use a fluorination process, wherein use a kind of by CHF
3Mist with argon.Here generally with a standard reaction ion etching equipment that has a parallel-plate reactor.
The for example available inductive couple plasma etching apparatus of second corrosion step is finished, and wherein uses a kind of by CH
4And H
2Mist as etchant gas.
In addition, the present invention also provides a kind of photoelectric cell with a semiconductor substrate.This semiconductor substrate contains aluminium-gallium-indium-phosphite or aluminium-gallium-indium-nitride.In addition, this matrix surface carries out structuring, and wherein structure width with the ratio of the constructional depth that is equivalent to corrosion depth is: 0.25＜t/b＜5.In addition, propose with a kind of semiconductor element, however wherein semiconductor substrate without aluminium-gallium-indium-phosphite, and with aluminium-gallium-indium-nitride.This photoelectric cell, for example light-emitting diode can be made of said method for the first time.The described ratio that is not suitable for being used for forming t described here and b by the known method of background technology.
Here the notion of " structure " is meant that semiconductor substrate corrosion back is from its surperficial bossing.The structure width here for example can be the width on column described in the aforementioned documents or pinnacle, " 40% Efficient Thin-Film Surface-TexturedLight-Emitting Diodes by Optimization of Natural Lithography (improving film surface structure light-emitting diode 40% efficient by the optimization of natural photoetching) "-document of seeing people such as R.Windisch is at IEEE Transactions on Electron Devices (Electrical Engineer association relates to the journal of electronic installation) the 47th volume, 2000 No. 7 periodicals, 1492～1498 pages.
Description of drawings
Describe the present invention in detail below in conjunction with an embodiment and accompanying drawing thereof:
Fig. 1 represents a kind of object that will be corroded, coating one deck mask layer and mask body on this object;
Fig. 2 is illustrated in the object among Fig. 1 behind first corrosion step;
Fig. 3 represents the object among Fig. 2 behind second corrosion step;
Fig. 4 represents to remove the object among Fig. 3 behind the mask layer.
Embodiment
Should be pointed out that whole Fig. 1 to 4 are schematic cross section; The element that should also be noted that every components identical or have identical or similar functions at least all uses identical Reference numeral to represent.
Fig. 1 represents a kind of object 1, and this object for example can be a kind of semiconductor substrate.Surface-coated one deck mask layer 2 at object 1.Mask layer 2 preferably has a thickness d between 10 and 100 nanometers.
Mask layer 2 is provided with mask body 3, on the one hand forms an individual layer in the special circumstances that these mask bodies are studied here, has the bead shape on the other hand.Here the lateral dimension A of bead is between 150 and 300 nanometers.But the mask body of also available other shape and other suitable material.
Fig. 2 is illustrated in Fig. 1 surface structure behind first corrosion step.Mask layer 2 is corroded at the position that does not have masked body 3 to cover and penetrates, and correspondingly produces the mask layer 2 that one deck has through hole, is wherein still arranging mask body 3 on the surface of mask layer 2.But mask body 3 slightly reduces on volume than the mask body shown in Fig. 1 owing to inevitably corrode usually.Its reason is that etching mask layer 2 used almost whole caustic solution are all always eroding part mask body 3 on the Xiao Cheng very much.
Remove mask layer 2 lip-deep mask bodies 3 then.But this step is not enforceable, and exactly, mask body 3 also can be retained on the surface of mask layer 2.
Fig. 3 represents to carry out the configuration state of second Fig. 1 behind the corrosion step.In other words, the surface of object 1 has had structure 4.The residue that on the surface of structure 4, also has mask layer 2.
Fig. 4 represents to remove the configuration state according to Fig. 3 behind the mask layer 2.At this moment the structure 4 of Chan Shenging is satisfying following condition aspect the ratio of its width b and corrosion depth t:
0.25＜t/b＜5
Structure 4 for example can be columniform little form.
Structure 4 can position along the regional in front net grid that structure defined by mask body 3 regularly, but structure 4 also can be randomly dispersed on the surface of object 1.
Claims (18)
1. be used for the method with the surperficial hacking of an object (1), this method comprises the following steps:
A) apply one deck mask layer (2) from the teeth outwards;
B) go up placement preformed mask body (3) at mask layer (2);
C) penetrate mask layer (2) in the position corrosion that not masked body (3) covers;
D) corrode this object at the position that does not have mask layer (2) on object (1) surface,
Wherein implement this method: keep structure (4) on the surface of object (1), its width (b) satisfies with the ratio of corrosion depth (t): 0.1＜t/b＜10.
2. by the described method of claim 1, wherein said object (1) contains aluminium-gallium-indium-phosphite.
3. by the described method of claim 1, wherein said object (1) contains aluminium-gallium-indium-nitride.
4. by each described method in the claim 1 to 3, wherein said mask layer (2) is made with a kind of dielectric.
5. by each described method in the claim 1 to 3, the wherein available bead of being made by polystyrene is as preformed mask body (3).
6. by each described method in the claim 1 to 3, wherein implement described corrosion step with a kind of dry corrosion method.
7. by each described method in the claim 1 to 3, wherein this method is to implement like this: keep structure (4) on the surface of object (1), its width (b) satisfies with the ratio of corrosion depth (t):
0.25＜t/b＜5。
8. by each described method in the claim 1 to 3, wherein and then after step c), remove the nubbin of mask body (3) from mask layer (2).
9. by each described method in the claim 1 to 3, wherein the corrosion depth (t) in the object (1) is between 50 and 100 nanometers.
10. by each described method in the claim 1 to 3, wherein the thickness (d) of mask layer (2) coating is between 10 and 100 nanometers.
11., wherein have a lateral dimension (A) between 150 and 300 nanometers at the mask body (3) on the mask layer (2) by each described method in the claim 1 to 3.
12. by each described method in the claim 1 to 3, wherein penetrate mask layer (2) in position corrosion that not masked body (3) covers and finish by a process steps, this process steps is to the seriously corroded of the corrosion comparison object (1) of mask body (3).
13. by each described method in the claim 1 to 3, wherein to penetrate mask layer (2) be to finish with the equipment that the ion etching of a reaction is used in corrosion.
14., wherein use CHF by the described method of claim 13
3With the mixture of Ar as etchant gas.
15. by each described method in the claim 1 to 3, wherein the corrosion of object (1) is to finish with an isoionic equipment that is fit to the induction coupling.
16., wherein use CH by the method for claim 15
4And H
2Mixture as etchant gas.
17. have a kind of photoelectric cell of semiconductor substrate, this semiconductor substrate contains aluminium-gallium-indium-phosphite, and its surface carried out structuring, wherein the width (b) of structure (4) satisfies with the ratio of the degree of depth (t) of structure (4): 0.25＜t/b＜5.
18. have a kind of photoelectric cell of semiconductor substrate, this semiconductor substrate contains aluminium-gallium-indium-nitride, and its surface carried out structuring, wherein the width (b) of structure (4) satisfies with the ratio of the degree of depth (t) of structure (4): 0.25＜t/b＜5.
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE10261426 | 2002-12-30 | ||
| DE10261426.1 | 2002-12-30 | ||
| DE10306779.5 | 2003-02-18 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1732575A CN1732575A (en) | 2006-02-08 |
| CN100380691C true CN100380691C (en) | 2008-04-09 |
Family
ID=32519454
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB2003801080681A Expired - Fee Related CN100380691C (en) | 2002-12-30 | 2003-12-18 | Method for roughening a surface of a body, and optoelectronic component |
Country Status (3)
| Country | Link |
|---|---|
| CN (1) | CN100380691C (en) |
| DE (1) | DE10306779A1 (en) |
| TW (1) | TW200419667A (en) |
Families Citing this family (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE102009008223A1 (en) | 2009-02-10 | 2010-08-12 | Osram Opto Semiconductors Gmbh | Method for structuring a semiconductor surface and semiconductor chip |
| DE102009018286A1 (en) | 2009-04-21 | 2010-10-28 | Osram Opto Semiconductors Gmbh | Radiation-emitting semiconductor chip manufacturing method, involves applying structuring process on structured surface of photoresist, and partially transferring structure attached to photoresist to outer surface of uncoupling layer |
| DE102009023355A1 (en) | 2009-05-29 | 2010-12-02 | Osram Opto Semiconductors Gmbh | Method for producing an optoelectronic semiconductor component |
| CN102064245A (en) * | 2010-11-12 | 2011-05-18 | 西安神光安瑞光电科技有限公司 | Method for manufacturing light-emitting diode |
| TWI495158B (en) * | 2011-08-31 | 2015-08-01 | Asahi Kasei E Materials Corp | An optical substrate, a semiconductor light-emitting element, an embossing mold, and an exposure apparatus |
| CN102623590A (en) * | 2012-03-31 | 2012-08-01 | 中国科学院半导体研究所 | Method for producing nanometer gallium nitride light-emitting diode (LED) |
| KR101233062B1 (en) * | 2012-04-18 | 2013-02-19 | (주)휴넷플러스 | Method for fabricating nano patterned substrate for high efficiency nitride based light emitting diode |
| DE102012220909A1 (en) * | 2012-09-27 | 2014-05-15 | Osram Opto Semiconductors Gmbh | Method for separating regions of a semiconductor layer |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH05160078A (en) * | 1991-02-19 | 1993-06-25 | Nikon Corp | Dry etching method |
| US5240558A (en) * | 1992-10-27 | 1993-08-31 | Motorola, Inc. | Method for forming a semiconductor device |
| US5676853A (en) * | 1996-05-21 | 1997-10-14 | Micron Display Technology, Inc. | Mask for forming features on a semiconductor substrate and a method for forming the mask |
| US6252725B1 (en) * | 1998-08-18 | 2001-06-26 | Trw Inc. | Semiconductor micro epi-optical components |
| US20010014426A1 (en) * | 1998-08-28 | 2001-08-16 | John Michiels | Mask forming methods and a field emission display emitter mask forming method |
| JP2002100609A (en) * | 2000-09-22 | 2002-04-05 | Shiro Sakai | Method for roughenning surface of semiconductor |
-
2003
- 2003-02-18 DE DE10306779A patent/DE10306779A1/en not_active Withdrawn
- 2003-12-18 CN CNB2003801080681A patent/CN100380691C/en not_active Expired - Fee Related
- 2003-12-26 TW TW92137040A patent/TW200419667A/en unknown
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH05160078A (en) * | 1991-02-19 | 1993-06-25 | Nikon Corp | Dry etching method |
| US5240558A (en) * | 1992-10-27 | 1993-08-31 | Motorola, Inc. | Method for forming a semiconductor device |
| US5676853A (en) * | 1996-05-21 | 1997-10-14 | Micron Display Technology, Inc. | Mask for forming features on a semiconductor substrate and a method for forming the mask |
| US6252725B1 (en) * | 1998-08-18 | 2001-06-26 | Trw Inc. | Semiconductor micro epi-optical components |
| US20010014426A1 (en) * | 1998-08-28 | 2001-08-16 | John Michiels | Mask forming methods and a field emission display emitter mask forming method |
| JP2002100609A (en) * | 2000-09-22 | 2002-04-05 | Shiro Sakai | Method for roughenning surface of semiconductor |
Also Published As
| Publication number | Publication date |
|---|---|
| CN1732575A (en) | 2006-02-08 |
| TW200419667A (en) | 2004-10-01 |
| DE10306779A1 (en) | 2004-07-22 |
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