CN100373554C - Method for cleaning semiconductor chip - Google Patents
Method for cleaning semiconductor chip Download PDFInfo
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- CN100373554C CN100373554C CNB2005100061129A CN200510006112A CN100373554C CN 100373554 C CN100373554 C CN 100373554C CN B2005100061129 A CNB2005100061129 A CN B2005100061129A CN 200510006112 A CN200510006112 A CN 200510006112A CN 100373554 C CN100373554 C CN 100373554C
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Abstract
The present invention provides a method for cleaning semiconductor chips, which comprises at least two-stage cleaning programs which respectively are a first-stage brushing program using dilute hydrogen fluoride (dilute HF, DHF) as cleaning liquid, and a cleaning program using the dilute hydrogen fluoride as the cleaning liquid. The present invention further provides a pre-cleaning program and a post-cleaning program for the semiconductor chips, wherein the pre-cleaning program is executed before the brushing program, the post-cleaning program is executed after the cleaning program is completed, and the pre-cleaning program and the post-cleaning program use ammonia water as the cleaning liquid.
Description
Technical field
The invention provides a kind of clean method of semiconductor chip, particularly relate to a kind of method that is used to clean the semiconductor chip of handling through cmp.
Background technology
Along with the trend development of element on the chip towards small and dense collection, the requirement of the photolithographic exposure depth of field (depth offocus) is also gradually harsh.Because at very lagre scale integrated circuit (VLSIC) (very large scale integration, VLSI) and utmost point very lagre scale integrated circuit (VLSIC) (ultra large scale integration, ULSI) in the technology, be formed at objects such as various element on the semiconductor chip and multiple layer metal internal connecting layer in a large number, can on semiconductor chip, form precipitous physical features (severe topography), and then cause the difficulty of subsequent deposition or design transfer (pattern transfer) technology.Therefore before carrying out down-stream, must carry out a planarization (planarization) technology prior to chip surface.
Traditional planarization is with spin-coating glass (spin on glass, SOG) and the resistance agent fill and lead up after etching (resist etch back, REB) technology is main, yet SOG and REC can't carry out global planarization (global planarization) in the technology below 250 nanometers (nm).Therefore (chemical mechanical polishing, CMP) technology is carried out planarization mainly to take cmp at present in VLSI and ULSI technology.
Generally speaking, the ground slurry that the utilization of CMP technology is suitable and the mode of mechanical lapping, remove the aimed thin film layer (target thin film) that has irregular surface on the semiconductor chip equably, so that semiconductor chip can have the surface of smooth and regular (regular and planar) after handling through CMP.Wherein, ground slurry generally is made of chemical assistant and grinding powder, and chemical assistant may be pH value buffer, oxidant or interfacial agent etc., then may be compositions such as tripoli or alum clay as for grinding powder.By the chemical reaction that chemical assistant provided, and grind the mechanical lapping effect that produces between powder and wafer and grinding pad, can effectively planarization wafer surface.
In addition, because technologic demand must provide the ground slurry with high selectivity (high selectivity) sometimes.For example, at deep trench isolation (deep trench isolation, DTI) mosaic technology of technology, copper, especially shallow trench isolation are from (shallow trench isolation, STI) technology promptly must provide the ground slurry that silica and silicon nitride are had high selectivity.
With STI technology is example, and the high selectivity ground slurry can avoid the semiconductor-based end to expose because of overmastication.Please refer to Fig. 1, the silicon nitride layer 2 that at first covers one deck patterning on the semiconductor-based end 4 is with as shielding, and the semiconductor-based end 4 of part is covered in etching, with formation groove 8.Then carry out the deposition of silica, for example high-density plasma vapour deposition (high-density plasma chemical vapordeposition, HDPCVD) technology, with the etched effect of while lead-in portion in deposition process, avoid groove 8 openings to be subjected to clogged with deposits and can't in groove 8, to fill up silica 6.Yet the oxide layer 6 that this deposition is finished forms irregular profile according to the surface configuration of chip 10.Therefore, must remove by the CMP silicon oxide layer 6 that silicon nitride layer 2 tops are unnecessary, with planarization chip 10 surfaces (shown in dotted line).At this moment, top high hardness silicon nitride layer 2 of the semiconductor-based ends 4 promptly is used as the layer that stops of mechanical lapping, exposes the semiconductor layer 4 of below to avoid overmastication.And have the ground slurry of high selectivity for silica and silicon nitride, and then help when removing oxide layer 6, reduce destruction, thereby further avoid the exposure at the semiconductor-based end 4 nitration case 2.
The CMP technology that this kind utilizes the high selectivity ground slurry to be carried out has contribution especially for the chip manufacturing of high integration.For example in the technology of little live width, the thickness of silicon nitride 2 is less, therefore if ground slurry is low to its selectance with silica 6, then may be in the process of grinding silica 6 overmastication silicon nitride 2, thereby expose the semiconductor-based end 4.Be with, (highselectivity slurry HSS) has been applied in the STI CMP technology of 130 nanometers, to produce the element with higher reliability this kind high selectivity ground slurry at present.
Yet the effect of STI CMP technology although the high selectivity ground slurry can gain uses at present the STI CMP technology of high selectivity ground slurry to still have problems such as scratches (microscratch) and ground slurry be residual.The problem of existing scratches is improved by adjusting grinding technics, and the residual problem of ground slurry then must be dependent on the afterwash program of CMP and be handled.In addition because residual ground slurry and chip that grinding produced will cause oxide to be easy to collapse, even cause electric leakage to wait other defective, therefore effectively clean will be increase chip yield and reliability indispensable.
In typical oxide ground slurry STI CMP technology, add the cleaning solution of the hydrogen fluoride of dilution with ammoniacal liquor (NaOH) or ammoniacal liquor, and in this ablution program, need not scrub with cleaning brush as the afterwash program.Yet in the STI CMP technology that adopts HSS, above-mentioned cleaning way also can't thoroughly be removed residual ground slurry.The interfacial agent that this is special because of HSS comprises, and those interfacial agents will cause the residual event of more serious ground slurry.Wherein, the purpose that adds those interfacial agents is that effectively control removes the speed of silicon nitride and silica, thereby increase removes selectivity.
Therefore, in order to solve the ground slurry residue problem that HSS causes, need further to improve for cleaning procedure.Wherein a kind of mode of ameliorating is applied to chip surface in conjunction with the mode of scrubbing in cleaning procedure, to increase the efficient of removing residue.This kind cleaning procedure not only can effectively remove ground slurry residual on the chip, and the oxide consume is also limited on the groove that it caused.Yet this kind cleaning way but can cause chip surface silicon nitride skewness, thereby influences the uniformity of STI ladder height (step height).And the ladder height uniformity has critical influence for the technology under 90 nanometers, that is for further increase chip integration its importance is arranged.Therefore, need badly and a kind of effectively remove on the chip ground slurry residue and not influence the inhomogeneity cleaning way of STI ladder height, to solve facing a difficult choice of being faced at present.
Summary of the invention
The object of the present invention is to provide the afterwash method of the STI CMP technology of a kind of HSS of employing, to solve the problem of above-mentioned existing afterwash method.
According to claim of the present invention, disclose a kind of clean method of semiconductor chip.In this clean method, (dilute HF DHF) carries out a brushing program, and after this step, utilizes dilution hydrogen fluoride to carry out a cleaning procedure again to utilize dilution hydrogen fluoride.
In addition, the present invention also provides two stage at least cleaning procedure, wherein provides the stage of cleaning brush can effectively improve the shortcoming that has skill chips remained on surface ground slurry now in chip surface, thereby avoids those residues to cause the damaged of chip surface.And in another stage cleaning procedure, then make cleaning brush leave chip surface and clean, cause serious damaged of silicon nitride layer to avoid scrubbing for a long time at chip surface.That is the time that moderate reduction is scrubbed can keep the uniformity of silicon nitride layer, thereby keep the reliability of semiconductor chip.
Description of drawings
Fig. 1 is the profile of existing sti structure.
Fig. 2 is the flow chart according to a specific embodiment of the present invention.
Fig. 3 is the flow chart according to another specific embodiment of the present invention.
Fig. 4 is the flow chart according to another specific embodiment again of the present invention.
Fig. 5 scrubs down for omnidistance brush section, the comparison sheet of chip uniformity difference.
The simple symbol explanation
2 silicon nitrides 305 carry out a washed with de-ionized water program
The 4 semiconductor-based ends 306, provided DHF and carried out scrubbing
Program
6 silica 308 provide DHF and carry out one and clean journey
Preface
8 grooves 312 carry out a washed with de-ionized water program
10 chips 402 provide the chip behind the CMP
202 provide chip 406 behind the CMP that DHF is provided and carry out scrubbing
Program
206 provide DHF and carry out scrubbing 408 and DHF is provided and carries out one and clean journey
The program preface
208 provide DHF and carry out one and clean journey 409 and carry out a washed with de-ionized water program
Preface
212 carry out scrubbing after a washed with de-ionized water program 410 provides ammoniacal liquor and carries out one
Or back cleaning procedure
302 provide the chip 412 behind the CMP to carry out a washed with de-ionized water program
304 provide ammoniacal liquor and carry out one and scrub in advance
Or prerinse program
Embodiment
See also Fig. 2, Fig. 2 is the flow chart according to a specific embodiment of the present invention.As shown in Figure 2, the hydrogen fluoride solution of a dilution at first is provided on the chip behind the cmp, and utilizes a cleaning brush to scrub about 45 seconds (step 206) of chip surface.Then stop the action of scrubbing, and continue to utilize about 15 seconds (step 208) of hydrogen fluoride solution flushing chip surface of dilution.At last, carry out a washed with de-ionized water program, with cleaning solution and other residue (step 212) of flush away remnants.
See also Fig. 3, Fig. 3 is the flow chart according to another specific embodiment of the present invention.As shown in Figure 3, at first on the chip behind the cmp, provide ammonia spirit flushing chip surface, perhaps can cooperate a cleaning brush to come chip surface is carried out a brushing program (step 304) simultaneously.Carry out a washed with de-ionized water program subsequently again, with flush away residual ammonia spirit (step 305) on chip.The hydrogen fluoride solution of one dilution then is provided on chip, and utilizes a cleaning brush to scrub about 45 seconds (step 306) of chip surface.Stop the action of scrubbing then, and continue to utilize about 15 seconds (step 308) of hydrogen fluoride solution flushing chip surface of dilution.At last, carry out a washed with de-ionized water program, with cleaning solution and other residue (step 312) of flush away remnants.
See also Fig. 4, Fig. 4 is the flow chart according to another specific embodiment of the present invention.As shown in Figure 4, at first on the chip behind the cmp, provide a hydrogen fluoride solution, and cooperate a cleaning brush to scrub about 45 seconds (step 406) of chip surface simultaneously.Then stop the action of scrubbing, and continue to utilize about 15 seconds (step 408) of hydrogen fluoride solution flushing chip surface of dilution.And then carry out a washed with de-ionized water program, with the hydrogen fluoride solution (step 409) of flush away dilution.Follow visual clean-up performance, effect or other considerations, ammonia spirit flushing chip surface is provided again, perhaps can when ammonia spirit washes chip, cooperate a cleaning brush to come chip surface is carried out a brushing program (step 410) simultaneously.At last, carry out a washed with de-ionized water program, with cleaning solution and other residue (step 412) of flush away remnants.
And in above-mentioned specific embodiment of the present invention, the time of utilizing the hydrogen fluoride solution that dilutes to scrub and wash chip surface is a variable element, for example can on the chip behind the cmp, provide hydrogen fluoride solution and scrubbed about 35 seconds, then on this chip, provide hydrogen fluoride solution again and about 25 seconds of the action that stops to scrub.In other words, the time scale that the present invention can scrub and clean according to the demand adjustment of actual conditions, by and large, this duration of scrubbing is about to three times of above-mentioned scavenging period.And the method that this kind stops to scrub in the back segment cleaning procedure can effectively clean under the situation of ground slurry residue, avoids scrubbing for a long time the surface that may damage chip.
Please refer to Fig. 5, Fig. 5 shows the cleaning procedure that existing whole process is scrubbed, and scrubs and under the program that back segment cleans the difference comparison sheet of the uniformity of each regional remaining nitride silicon thickness on the wafer in the cleaning procedure leading portion with the present invention.In this table, FPGA represents the looser zone of STI pattern distribution, and DMV represents the fine and close zone of STI pattern distribution, and on behalf of the STI pattern, G06 account for the zone of chip area about 50%, and the WID scope then is the silicon nitride layer difference in thickness in FPGA and DMV zone.
As can be seen from Figure 5, under the situation of removing the ground slurry residue fully, in the technology that existing whole process is scrubbed, the silicon nitride thickness difference between chip middle section and neighboring area is bigger; And the mode that the present invention only scrubs in the technology that leading portion is scrubbed then can effectively reduce the difference of silicon nitride thickness between middle section and neighboring area.
In sum, compared to existing skill, the present invention has thorough cleaning chip and does not influence the advantage of the chip surface silicon nitride uniformity.
The above only is the preferred embodiments of the present invention, and all equalizations of doing according to claim of the present invention change and modify, and all should belong to covering scope of the present invention.
Claims (20)
1. the clean method of a semiconductor chip, wherein this clean method comprises:
Utilize dilution hydrogen fluoride to carry out a brushing program; And
Utilize described dilution hydrogen fluoride to carry out a cleaning procedure.
2. clean method as claimed in claim 1, wherein this semiconductor chip is the semiconductor chip of an experience chemical mechanical milling tech.
3. clean method as claimed in claim 2, wherein this chemical mechanical milling tech selects for use the high selectivity ground slurry to be used as grinding agent, to form at least one shallow isolating trough in this semiconductor chip.
4. clean method as claimed in claim 1, wherein the carrying out of this brushing program time is carried out to three times of time for this cleaning procedure.
5. clean method as claimed in claim 1 is wherein carrying out before this dilutes hydrofluoric brushing program, and this clean method also comprises:
Utilize ammoniacal liquor to carry out a pre-brushing program; And
One washed with de-ionized water program.
6. clean method as claimed in claim 1 is wherein carrying out before this dilutes hydrofluoric brushing program, and this clean method also comprises:
Utilize ammoniacal liquor to carry out a prerinse program; And
One washed with de-ionized water program.
7. clean method as claimed in claim 1 is wherein finished after this dilutes hydrofluoric cleaning procedure, and this clean method also comprises:
Utilize ammoniacal liquor to carry out a back brushing program; And
One washed with de-ionized water program.
8. clean method as claimed in claim 1 is wherein carrying out after this dilutes hydrofluoric cleaning procedure, and this clean method also comprises:
Utilize ammoniacal liquor to carry out a back cleaning procedure; And
One washed with de-ionized water program.
9. clean method as claimed in claim 1 is wherein carrying out after this dilutes hydrofluoric cleaning procedure, and this clean method also comprises a washed with de-ionized water program.
10. clean method that experiences the semiconductor chip of chemical mechanical milling tech, wherein this clean method comprises:
Utilize one first cleaning fluid to carry out a cleaning procedure;
Utilize one second cleaning fluid to carry out a brushing program;
Utilize one second cleaning fluid to carry out a cleaning procedure; And
One washed with de-ionized water program.
11. clean method as claimed in claim 10, wherein this chemical mechanical milling tech selects for use the high selectivity ground slurry to be used as grinding agent, to form at least one shallow isolating trough in this semiconductor chip.
12. clean method as claimed in claim 10, wherein the carrying out of this brushing program time is carried out to three times of time for this cleaning procedure.
13. clean method as claimed in claim 10, wherein this first cleaning fluid is an ammoniacal liquor, and this second cleaning fluid is dilution hydrogen fluoride.
14. clean method as claimed in claim 13, wherein this cleaning procedure is a pre-brushing program or a prerinse program.
15. clean method as claimed in claim 10, wherein after finishing this cleaning procedure, this clean method also comprises a washed with de-ionized water program.
16. a clean method that experiences the semiconductor chip of chemical mechanical milling tech, wherein this clean method comprises:
Utilize one first cleaning fluid to carry out a brushing program;
Utilize one first cleaning fluid to carry out a cleaning procedure;
Utilize one second cleaning fluid to carry out a cleaning procedure; And
One washed with de-ionized water program.
17. clean method as claimed in claim 16, wherein this chemical mechanical milling tech selects for use the high selectivity ground slurry to be used as grinding agent, to form at least one shallow isolating trough in this semiconductor chip.
18. clean method as claimed in claim 16, wherein the carrying out of this brushing program time is carried out to three times of time for this cleaning procedure.
19. clean method as claimed in claim 16, wherein this first cleaning fluid is dilution hydrogen fluoride, and this second cleaning fluid is an ammoniacal liquor.
20. clean method as claimed in claim 16, wherein this cleaning procedure is a back brushing program or a back cleaning procedure.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2005100061129A CN100373554C (en) | 2005-01-28 | 2005-01-28 | Method for cleaning semiconductor chip |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2005100061129A CN100373554C (en) | 2005-01-28 | 2005-01-28 | Method for cleaning semiconductor chip |
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| Publication Number | Publication Date |
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| CN1812057A CN1812057A (en) | 2006-08-02 |
| CN100373554C true CN100373554C (en) | 2008-03-05 |
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| Application Number | Title | Priority Date | Filing Date |
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| CNB2005100061129A Expired - Fee Related CN100373554C (en) | 2005-01-28 | 2005-01-28 | Method for cleaning semiconductor chip |
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Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8551253B2 (en) * | 2010-06-29 | 2013-10-08 | WD Media, LLC | Post polish disk cleaning process |
| CN107855936A (en) * | 2017-10-31 | 2018-03-30 | 天津中环领先材料技术有限公司 | A kind of cleaning method of zone-melting silicon polished wafer polissoir |
| CN111092011B (en) * | 2018-10-23 | 2022-09-16 | 山东浪潮华光光电子股份有限公司 | Treatment method for improving surface pollution of LED chip |
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| US5656681A (en) * | 1994-06-07 | 1997-08-12 | Toyo Boseki Kabushiki Kaisha | Grafting reaction product and method for producing the same |
| US5996595A (en) * | 1993-10-20 | 1999-12-07 | Verteq, Inc. | Semiconductor wafer cleaning system |
| US6057248A (en) * | 1997-07-21 | 2000-05-02 | United Microelectronics Corp. | Method of removing residual contaminants in an alignment mark after a CMP process |
| US6098639A (en) * | 1996-05-24 | 2000-08-08 | Micron Technology, Inc. | Wet cleans for composite surfaces |
| US6099662A (en) * | 1999-02-11 | 2000-08-08 | Taiwan Semiconductor Manufacturing Company | Process for cleaning a semiconductor substrate after chemical-mechanical polishing |
| US6302766B1 (en) * | 1998-08-31 | 2001-10-16 | Cypress Semiconductor Corp. | System for cleaning a surface of a dielectric material |
| CN1341276A (en) * | 1999-10-28 | 2002-03-20 | 皇家菲利浦电子有限公司 | Method and apparatus for cleaning semiconductor wafer |
| US20040084059A1 (en) * | 2002-10-31 | 2004-05-06 | Texas Instruments Incorporated | Modified clean chemistry and megasonic nozzle for removing backside CMP slurries |
-
2005
- 2005-01-28 CN CNB2005100061129A patent/CN100373554C/en not_active Expired - Fee Related
Patent Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5996595A (en) * | 1993-10-20 | 1999-12-07 | Verteq, Inc. | Semiconductor wafer cleaning system |
| US5656681A (en) * | 1994-06-07 | 1997-08-12 | Toyo Boseki Kabushiki Kaisha | Grafting reaction product and method for producing the same |
| US6098639A (en) * | 1996-05-24 | 2000-08-08 | Micron Technology, Inc. | Wet cleans for composite surfaces |
| US6057248A (en) * | 1997-07-21 | 2000-05-02 | United Microelectronics Corp. | Method of removing residual contaminants in an alignment mark after a CMP process |
| US6302766B1 (en) * | 1998-08-31 | 2001-10-16 | Cypress Semiconductor Corp. | System for cleaning a surface of a dielectric material |
| US6099662A (en) * | 1999-02-11 | 2000-08-08 | Taiwan Semiconductor Manufacturing Company | Process for cleaning a semiconductor substrate after chemical-mechanical polishing |
| CN1341276A (en) * | 1999-10-28 | 2002-03-20 | 皇家菲利浦电子有限公司 | Method and apparatus for cleaning semiconductor wafer |
| US20040084059A1 (en) * | 2002-10-31 | 2004-05-06 | Texas Instruments Incorporated | Modified clean chemistry and megasonic nozzle for removing backside CMP slurries |
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| CN1812057A (en) | 2006-08-02 |
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