CN100363828C - Picture element structure and manufacturing method and storage capacitance structure therefor - Google Patents
Picture element structure and manufacturing method and storage capacitance structure therefor Download PDFInfo
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- CN100363828C CN100363828C CNB2005100000197A CN200510000019A CN100363828C CN 100363828 C CN100363828 C CN 100363828C CN B2005100000197 A CNB2005100000197 A CN B2005100000197A CN 200510000019 A CN200510000019 A CN 200510000019A CN 100363828 C CN100363828 C CN 100363828C
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Abstract
The present invention relates to a picture element structure, a manufacturing method thereof, and the structure of a storage capacitor. The picture element structure comprises an active element, a picture element electrode, a lower electrode, a brake insulating layer, an upper electrode, a protective layer and a leakage current inhibition layer, wherein the picture element electrodes are electrically connected with the active element; the lower electrode is arranged below the picture element electrode; the brake insulating layer extends to the lower part of the picture element electrode from the active element so as to cover the lower electrode; the upper electrode is arranged on the brake insulating layer and is electrically connected with the picture element electrode; the protective layer extends to the lower part of the picture element electrode from the active element so as to cover parts of area of the upper electrode; the leakage current inhibition layer is arranged between the brake insulating layer and the upper electrode. Parts of area of the leakage current inhibition layer are positioned at an area above the lower electrode and does not completely cover the area above the lower electrode. The present invention also provides a method for manufacturing the picture element structure. By means of the leakage current inhibition layer, the present invention can effectively prevent particles existing on both sides of the lower electrode from resulting in electricity leakage of a storage capacitor with an architecture of a metallic layer-an insulating layer-a metallic layer so as to further improve the excellent rate.
Description
Technical field
The present invention relates to structure and the manufacture method thereof of a kind of semiconductor element (semiconductor device), particularly relate to a kind of LCD (liquid crystal display, image element structure LCD) (pixel structure) and manufacture method thereof.
Background technology
At improving rapidly of multimedia society, be indebted to the tremendous progress of semiconductor element or display device mostly.With regard to display, (cathode ray tube CRT) because of having excellent display quality and its economy, monopolizes monitor market in recent years to cathode-ray tube (CRT) always.Yet, operate the environment of most terminating machine/display equipments on the table for the individual, or with the incision of the viewpoint of environmental protection, if predicted with the trend of saving the energy, cathode-ray tube (CRT) is because of still existing a lot of problems in space utilization and the energy resource consumption, and can't effectively provide solution for the demand of light, thin, short, little and low consumpting power.Therefore, have that high image quality, space utilization efficient are good, (thin film transistor liquid crystaldisplay TFT-LCD) becomes the main flow in market to the membrane transistor LCD of low consumpting power, advantageous characteristic such as radiationless gradually.
The membrane transistor LCD mainly is made of electric crystal array film substrate, colorful filter array substrate and liquid crystal layer, and wherein electric crystal array film substrate is formed by the membrane transistor of a plurality of arrayed and with the pixel electrode (pixel electrode) of the corresponding configuration of each membrane transistor.And membrane transistor is intended for the on-off element of liquid crystal display.In addition, in order to control other picture element unit, usually can be via scan wiring (scan line) and data distribution (date line) choosing specific picture element, and by suitable operating voltage is provided, to show the display data of corresponding this picture element.In addition, the subregion of above-mentioned pixel electrode can be covered on scan wiring or the shared distribution (common line) usually, to form storage capacitors.In the prior art, it is that (metal-insuator-metal, framework MIM) below will describe at the storage capacitor structure of this kind framework metal level-insulation course-metal level that a kind of storage capacitors is arranged.
Seeing also shown in Figure 1ly, is the diagrammatic cross-section of the storage capacitors of existing known metal level-insulation course-metal level (MIM) framework.In existing known image element structure, the storage capacitors Cst of metal level-insulation course-metal level (MIM) framework normally is coupled to form by the top electrode 120 of scan wiring or shared distribution 100 and its top.And scan wiring or shared distribution 100 are to be electrically insulated each other by lock insulation course 110 with top electrode 120.In addition, pixel electrode 140 is to electrically connect by opening in the protective seam 130 132 and top electrode 120.
It should be noted that two sides at scan wiring or shared distribution 100, regular meeting has a little particulate (particle) 50.And these particulates 50 make the phenomenon that has leakage current between scan wiring or shared distribution 100 and the top electrode 120 easily, cause the capacitance of storage capacitors Cst to reduce.
This shows that above-mentioned existing image element structure and manufacture method thereof and storage capacitors obviously still have inconvenience and defective, and demand urgently further being improved in structure, method and use.In order to solve the problem that image element structure and manufacture method thereof and storage capacitors exist, relevant manufacturer there's no one who doesn't or isn't seeks solution painstakingly, but do not see always that for a long time suitable design finished by development, and common product does not have appropriate structure to address the above problem, and this obviously is the problem that the anxious desire of relevant dealer solves.
Because the defective that above-mentioned existing image element structure and manufacture method thereof and storage capacitors exist, the inventor is based on being engaged in this type of product design manufacturing abundant for many years practical experience and professional knowledge, and the utilization of cooperation scientific principle, actively studied innovation, in the hope of founding a kind of novel image element structure and manufacture method and storage capacitor structure, can improve general existing image element structure and manufacture method and storage capacitors, make it have more practicality.Through constantly research, design, and after studying sample and improvement repeatedly, create the present invention who has practical value finally.
Summary of the invention
The objective of the invention is to, overcome the defective that existing image element structure exists, and provide a kind of new image element structure, technical matters to be solved is to make it can improve the shortcoming of the easy electric leakage of storage capacitors that has known metal level-insulation course-metal level (MIM) framework now, with raising storage capacitors value, thereby be suitable for practicality more.
Another object of the present invention is to, overcome the existing defective of manufacture method of existing image element structure, and a kind of manufacture method of new image element structure is provided, technical matters to be solved is to make the storage capacitors of image element structure be not easy electric leakage, and then can improve acceptance rate.
A further object of the present invention is, overcome the defective that existing storage capacitor structure exists, and a kind of new storage capacitor structure, technical matters to be solved are provided is to make it prevent the storage capacitors electric leakage by a drain current suppressing layer, thereby is suitable for practicality more.
The object of the invention to solve the technical problems realizes by the following technical solutions.According to a kind of image element structure that the present invention proposes, it comprises: an active member; One pixel electrode electrically connects with this active member; One bottom electrode is disposed at the below of this pixel electrode; One lock insulation course extends to this pixel electrode below from this active member, to cover this bottom electrode; One top electrode is disposed on this lock insulation course, and electrically connects with this pixel electrode; One protective seam extends to this pixel electrode below from this active member, to cover the subregion of this top electrode; And a drain current suppressing layer, be disposed between this lock insulation course and this top electrode, wherein this drain current suppressing layer exposes this lock insulation course of part of this bottom electrode top, and this lock insulation course of this top electrode and the part that is exposed directly contacts.
The object of the invention to solve the technical problems also can be applied to the following technical measures to achieve further.
Aforesaid image element structure, wherein said drain current suppressing layer comprises two strip patterns, is positioned at this bottom electrode two sides top, and covers the subregion of this bottom electrode top respectively.
Aforesaid image element structure, wherein said drain current suppressing layer comprise a frame shape pattern, and wherein an opposite side of this frame shape pattern is the top that is positioned at these bottom electrode two sides, and cover the subregion of this bottom electrode top respectively.
Aforesaid image element structure has one first opening in the wherein said protective seam, exposing this top electrode of part, and this pixel electrode is to see through this first opening and the electric connection of this top electrode.
Aforesaid image element structure, wherein said drain current suppressing layer comprises an amorphous silicon layer.
Aforesaid image element structure, wherein said drain current suppressing layer more comprise a n type doped amorphous silicon layer, are disposed on this amorphous silicon layer.
The object of the invention to solve the technical problems also adopts following technical scheme to realize.The manufacture method of a kind of image element structure that proposes according to the present invention, it may further comprise the steps: form a gate and a bottom electrode on a substrate; Form a lock insulation course on this substrate and this lock insulation course cover this gate and this bottom electrode; And form a channel layer and a drain current suppressing layer on this lock insulation course, wherein this channel layer is to be positioned at this gate top, and this drain current suppressing layer exposes this lock insulation course of part of this bottom electrode top, and this lock insulation course of this top electrode and the part that is exposed directly contacts.
The object of the invention to solve the technical problems also can be applied to the following technical measures to achieve further.
The manufacture method of aforesaid image element structure, the formation method of wherein said drain current suppressing layer are included in this bottom electrode two sides top and form two strip patterns, to cover the subregion of this bottom electrode top respectively.
The manufacture method of aforesaid image element structure, the formation method of wherein said drain current suppressing layer is included in and forms a frame shape pattern on this lock insulation course, wherein an opposite side of this frame shape pattern is to be positioned at this bottom electrode two sides top, and covers the subregion of this bottom electrode top respectively.
The manufacture method of aforesaid image element structure, it more comprises: form an one source pole/drain and a top electrode on this substrate, wherein this source/drain is to cover this channel layer partly and this lock insulation course partly, and this top electrode is to cover this lock insulation course and this drain current suppressing layer; On this substrate, form a protective seam, to cover this lock insulation course, this top electrode and this source/drain; And on this protective seam, form a pixel electrode.
The manufacture method of aforesaid image element structure wherein before forming this pixel electrode, more is included in and forms one first opening in this protective seam, to expose this top electrode of part.
The manufacture method of aforesaid image element structure wherein before forming this pixel electrode, more is included in and forms one second opening in this protective seam, to expose this source/drain of part.
The manufacture method of aforesaid image element structure wherein before forming this source/drain, more is included in and forms an ohmic contact layer on this channel layer.
The object of the invention to solve the technical problems more adopts following technical scheme to realize.According to a kind of storage capacitor structure that the present invention proposes, it comprises: a bottom electrode; One insulation course covers this bottom electrode; One top electrode is disposed on this insulation course; And a drain current suppressing layer, be disposed between this insulation course and this top electrode, wherein this drain current suppressing layer exposes this lock insulation course of part of this bottom electrode top, and this lock insulation course of this top electrode and the part that is exposed directly contacts.
The object of the invention to solve the technical problems also can be applied to the following technical measures to achieve further.
Aforesaid storage capacitor structure, wherein said drain current suppressing layer comprises two strip patterns, is positioned at this bottom electrode two sides top, and covers the subregion of this bottom electrode top respectively.
Aforesaid storage capacitor structure, wherein said drain current suppressing layer comprise a frame shape pattern, and wherein an opposite side of this frame shape pattern is to be positioned at this bottom electrode two sides top, and cover the subregion of this bottom electrode top respectively.
Aforesaid storage capacitor structure, wherein said drain current suppressing layer comprises an amorphous silicon layer.
Aforesaid storage capacitor structure, wherein said drain current suppressing layer more comprise a n type doped amorphous silicon layer, are disposed on this amorphous silicon layer.
The present invention compared with prior art has tangible advantage and beneficial effect.By above technical scheme as can be known, in order to reach aforementioned goal of the invention, major technique of the present invention thes contents are as follows:
Based on above-mentioned and other purposes, the present invention proposes a kind of image element structure, comprises an active member, a pixel electrode, a bottom electrode, a lock insulation course, a top electrode, a protective seam and a drain current suppressing layer.Pixel electrode is to electrically connect with active member, and bottom electrode is the below that is disposed at pixel electrode.In addition, the lock insulation course extends to pixel electrode below from active member, and covering bottom electrode, and top electrode is to be disposed on the lock insulation course, and electrically connects with pixel electrode.In addition; protective seam extends to the pixel electrode below from active member; to cover the subregion of top electrode; and the drain current suppressing layer is to be disposed between lock insulation course and the top electrode; wherein this drain current suppressing layer exposes this lock insulation course of part of this bottom electrode top, and this lock insulation course of this top electrode and the part that is exposed directly contacts.
In the above-mentioned image element structure, for example have one first opening in the protective seam, exposing the part top electrode, and pixel electrode for example is to see through first opening and top electrode electric connection.
The present invention also proposes a kind of manufacture method of image element structure, mainly comprises the following steps: at first, forms a gate and a bottom electrode on a substrate.Continue it, form a lock insulation course on substrate and the lock insulation course cover gate and bottom electrode.Then, form a channel layer and a drain current suppressing layer on the lock insulation course, wherein channel layer is to be positioned at the gate top, and this drain current suppressing layer exposes this lock insulation course of part of this bottom electrode top, and this lock insulation course of this top electrode and the part that is exposed directly contacts.
The manufacture method of above-mentioned image element structure for example more is included in and forms an one source pole/drain and a top electrode on the substrate, and wherein source/drain is to cover channel layer and part lock insulation course, and top electrode is to cover bottom electrode and drain current suppressing layer.Then, on this substrate, form a protective seam, to cover lock insulation course, top electrode and source/drain.Then, on protective seam, form a pixel electrode.
In the manufacture method of above-mentioned image element structure, the formation method of drain current suppressing layer for example is to form two strip patterns above bottom electrode two sides, to cover the subregion of bottom electrode top respectively.
In the manufacture method of above-mentioned image element structure, the formation method of drain current suppressing layer for example is to form a frame shape pattern on the lock insulation course, and wherein an opposite side of this frame shape pattern is to be positioned at bottom electrode two sides top, and covers the subregion of bottom electrode top respectively.
In the manufacture method of above-mentioned image element structure, before forming pixel electrode, for example more be included in and form one first opening in the protective seam, to expose the part top electrode.
In the manufacture method of above-mentioned image element structure, before forming pixel electrode, for example more be included in and form one second opening in the protective seam, to expose the part source/drain.
In the manufacture method of above-mentioned image element structure, before forming source/drain, for example more be included in and form an ohmic contact layer on the channel layer.
The present invention proposes a kind of storage capacitor structure again, and it comprises a bottom electrode, an insulation course, a top electrode and a drain current suppressing layer.Wherein, insulation course is to cover bottom electrode, and top electrode is to be disposed on the insulation course.In addition, the drain current suppressing layer is to be disposed between insulation course and the top electrode, and this drain current suppressing layer exposes this lock insulation course of part of this bottom electrode top, and this lock insulation course of this top electrode and the part that is exposed directly contacts.
In the above-mentioned image element structure and storage capacitor structure, the drain current suppressing layer for example is the pattern of two strips, and it is positioned at bottom electrode two sides top, and covers the subregion of bottom electrode top respectively.
In the above-mentioned image element structure and storage capacitor structure, the drain current suppressing layer for example is the pattern of a frame shape, and an opposite side of this frame shape pattern is to be positioned at bottom electrode two sides, and covers the subregion of bottom electrode top respectively.
In the above-mentioned image element structure and storage capacitor structure, the drain current suppressing layer for example is to be an amorphous silicon layer.In addition, the drain current suppressing layer for example more comprises a n type doped amorphous silicon layer, and it is disposed on the amorphous silicon layer.
By technique scheme, the present invention has following advantage at least: in image element structure of the present invention and the manufacture method thereof, adopt a drain current suppressing layer to be disposed between lock insulation course and the top electrode, and the subregion of this drain current suppressing layer is to be positioned at the bottom electrode top.Can prevent effectively that by this drain current suppressing layer the particulate that is present in bottom electrode two sides from causing the storage capacitors electric leakage of this metal level-insulation course-metal level (MIM) framework, and then improve acceptance rate.
In sum, in image element structure of the present invention and manufacture method thereof and the storage capacitor structure, this image element structure can improve the shortcoming of the easy electric leakage of storage capacitors of existing metal level-insulation course-metal level (MIM) framework, and can improve the storage capacitors value.The manufacture method of this image element structure can make the storage capacitors of image element structure be difficult for electric leakage, and then improves acceptance rate.This storage capacitor structure prevents the storage capacitors electric leakage by a drain current suppressing layer.It has above-mentioned plurality of advantages and practical value, and in like product and manufacture method, do not see have similar structures design and method to publish or use and really genus innovation, no matter it all has bigger improvement on product structure, manufacture method or function, have technically than much progress, and produced handy and practical effect, and more existing image element structure and manufacture method thereof and storage capacitors have the multinomial effect of enhancement, thereby be suitable for practicality more, and have the extensive value of industry, really be a new and innovative, progressive, practical new design.
Above-mentioned explanation only is the general introduction of technical solution of the present invention, for can clearer understanding technological means of the present invention, and can be implemented according to the content of instructions, and for above-mentioned and other purposes of the present invention, feature and advantage thereof can be become apparent, below especially exemplified by preferred embodiment, and conjunction with figs., be described in detail as follows.
Description of drawings
Fig. 1 is the diagrammatic cross-section that has the storage capacitors of known metal level-insulation course-metal level (MIM) framework now.
Fig. 2 A is the top view according to a kind of image element structure of a preferred embodiment of the present invention.
Fig. 2 B is the top view according to another image element structure of a preferred embodiment of the present invention.
Fig. 3 is the sectional view of I-I ' line among Fig. 2 A.
Fig. 4 A and Fig. 4 B are the top views of two kinds of image element structures in addition according to a preferred embodiment of the present invention.
Fig. 5 is the sectional view of II-II ' line among Fig. 2 A.
Fig. 6 A to Fig. 6 F is the step of manufacturing process flow diagram according to the image element structure of a preferred embodiment of the present invention.
50: particulate 100: scan wiring or shared distribution
110,240: lock insulation course 120,250: top electrode
130,260: protective seam 132,218a: opening
140,220: pixel electrode 200: image element structure
210: active member 212: gate
214: channel layer 216: source/drain
218: ohmic contact layer 230: bottom electrode
264: the second openings of 262: the first openings
270: drain current suppressing layer 272,274: side
276: amorphous silicon layer 278:n type doped amorphous silicon layer
Cst: storage capacitors
Embodiment
Reach technological means and the effect that predetermined goal of the invention is taked for further setting forth the present invention, below in conjunction with accompanying drawing and preferred embodiment, to image element structure and manufacture method and its embodiment of storage capacitor structure, structure, manufacture method, step, feature and the effect thereof that foundation the present invention proposes, describe in detail as after.
Please consult Fig. 2 A and shown in Figure 3 simultaneously, Fig. 2 A is the top view according to a kind of image element structure of a preferred embodiment of the present invention, and Fig. 3 is the sectional view of I-I ' line among Fig. 2 A.The image element structure 200 of preferred embodiment of the present invention comprises an active member 210, a pixel electrode 220, a bottom electrode 230, a lock insulation course 240, a top electrode 250, a protective seam 260 and a drain current suppressing layer 270.Pixel electrode 220 is to electrically connect with active member 210, and bottom electrode 230 is the belows that are disposed at pixel electrode 250.In addition, lock insulation course 240 extends to the below of pixel electrode 220 from active member 210, and covering bottom electrode 230, and top electrode 250 is to be disposed on the lock insulation course 240, and electrically connects with pixel electrode 220.In addition; protective seam 260 extends to pixel electrode 220 belows from active member 210; to cover the subregion of top electrode 250; and drain current suppressing layer 270 is to be disposed between lock insulation course 240 and the top electrode 250; wherein the subregion of drain current suppressing layer 270 is the zones that are positioned at bottom electrode 230 tops, and does not cover the zone of bottom electrode 230 tops fully.
In the above-mentioned image element structure 200, drain current suppressing layer 270 for example comprises an amorphous silicon layer 276 and a n type doped amorphous silicon layer 278, and wherein n type doped amorphous silicon layer 278 is to be disposed on the amorphous silicon layer 276.In addition, drain current suppressing layer 270 for example is two strip patterns, and it is positioned at bottom electrode 230 2 sides top, and covers the subregion of bottom electrode 230 tops respectively.In addition, in Fig. 2 A, bottom electrode 230 for example is a shared distribution.And for example have one first opening 262 in the protective seam 260, exposing part top electrode 250, and pixel electrode 220 for example is to see through first opening 262 to electrically connect with top electrode 250.
In a preferred embodiment of the present invention, the top electrode 250 of bottom electrode 230 and its top can be coupled into the storage capacitors Cst of one metal level-insulation course-metal level (MIM) framework.In some cases, bottom electrode 230 2 sides have a little particulate 50 usually, and it causes storage capacitors Cst electric leakage easily.Yet owing to dispose drain current suppressing layer 270 between lock insulation course 240 and the top electrode 250, it can prevent that these particulates 50 from causing electric leakage between top electrode 250 and the bottom electrode 230.Therefore, the image element structure 200 of present embodiment can prevent storage capacitors Cst electric leakage, and then can improve the display quality of LCD.
Seeing also shown in Fig. 2 B, is the top view according to another image element structure of a preferred embodiment of the present invention.In a preferred embodiment of the present invention, the current inhibition layer 270 of image element structure 200 is except two strip patterns that illustrated as Fig. 2 A, current inhibition layer 270 also can be a frame shape pattern, and the side the 272, the 274th of this frame shape pattern is positioned at bottom electrode 230 2 sides top, and covers the subregion of bottom electrode 230 tops respectively.
Seeing also shown in Fig. 4 A and Fig. 4 B, is the top view of two kinds of image element structures in addition according to a preferred embodiment of the present invention.In a preferred embodiment of the present invention, the bottom electrode 230 of storage capacitors is except for the shared distribution that is illustrated among Fig. 2 A and Fig. 2 B, and bottom electrode 230 also can be the one scan distribution.In addition, drain current suppressing layer 270 for example is two strip patterns (shown in Fig. 4 A) or a frame shape pattern (shown in Fig. 4 B).
Seeing also shown in Figure 5ly, is the sectional view of II-II ' line among Fig. 2 A.In a preferred embodiment of the present invention, active member 210 for example is a membrane transistor, and it comprises a gate 212, a channel layer 214 and one source pole/drain 216.Wherein, gate 212 is to be disposed at lock insulation course 240 belows, and channel layer 214 is to be disposed on the lock insulation course 240 of gate 212 tops.In addition, source/drain 216 is to be disposed at protective seam 260 belows, and covers channel layer 214 and part lock insulation course 240, and wherein source/drain 216 is to electrically connect with pixel electrode 220.In addition, active member 210 for example more comprises an ohmic contact layer 218, and it is disposed between channel layer 214 and the source/drain 216.
In the above-mentioned image element structure 200, protective seam 260 is to cover source/drain 216 and lock insulation course 240.In addition, for example have one second opening 264 in this protective seam 260, exposing part source/drain 216, and pixel electrode 220 for example is to see through second opening 264 to electrically connect with source/drain 216.
Seeing also shown in Fig. 6 A to Fig. 6 F, is the step of manufacturing process flow diagram according to the image element structure of a preferred embodiment of the present invention.The manufacture method of the image element structure of present embodiment mainly comprises the following steps:
At first, as shown in Figure 6A, form a gate 212 and a bottom electrode 230 on a substrate 300.Wherein, gate 212 for example is to form simultaneously with bottom electrode 2 30, its formation method for example is earlier with sputter (sputtering) or physical vapour deposition (PVD) (physics vapor deposition, PVD) on substrate 300, form a conductor material layer (not illustrating among the figure), this conductor material layer of patterning again is to form gate 212 and bottom electrode 230.
It should be noted that in the present embodiment this bottom electrode 230 can be scan wiring or shared distribution.That is if desire is made the image element structure (as shown in Figure 4) that has storage capacitors (Cst on gate) on the gate, then bottom electrode 230 is a scan wiring.And if desire is made the image element structure (as shown in Figure 2) that has storage capacitors (Cston common) on the shared distribution, then bottom electrode 230 is shared distribution.
Continue it, shown in Fig. 6 B, form a lock insulation course 240 on substrate 300, to cover gate 212 and bottom electrode 230.Wherein, the formation method of lock insulation course 240 be utilize chemical vapour deposition technique (chemical vapor deposition, CVD) or electricity slurry enhanced chemical vapor deposition (plasmaenhanced CVD, PECVD) method form a silicon nitride layer on substrate 300.
Then, shown in Fig. 6 C, form a channel layer 214 and an amorphous silicon layer 276 on lock insulation course 240, and on channel layer 214 and amorphous silicon layer 276, form an ohmic contact layer 218 and a n type doped amorphous silicon layer 278 respectively.Wherein, channel layer 214 is to be positioned at gate 212 tops, and amorphous silicon layer 276 is to constitute a drain current suppressing layer 270 with n type doped amorphous silicon layer 278, and this drain current suppressing layer 270 does not cover the zone of bottom electrode 230 tops fully.In addition, the formation method of channel layer 214 and amorphous silicon layer 276 for example is to form an amorphous silicon material layer (not illustrating among the figure) earlier on lock insulation course 240, and this amorphous silicon material layer of patterning more afterwards is to form channel layer 214 and amorphous silicon layer 276.In addition, the material of ohmic contact layer 218 for example is a n type doped amorphous silicon.
In a preferred embodiment of the present invention, drain current suppressing layer 270 for example is two strip patterns (as shown in Figure 2), and it is positioned at bottom electrode 230 2 sides, to cover the subregion of bottom electrode 230 respectively.In addition, drain current suppressing layer 270 also can be a frame shape pattern (as shown in Figure 4), and wherein an opposite side the 272, the 274th of this frame shape pattern is positioned at bottom electrode 230 2 sides, and covers the subregion of bottom electrode 230 respectively.
Afterwards, shown in Fig. 6 D, form an one source pole/drain 216 and a top electrode 250 on substrate 300, wherein source/drain 216 is to cover ohmic contact layer 218 and part lock insulation course 240, and top electrode 250 is to cover bottom electrode 230 and drain current suppressing layer 270.In addition, source/drain 216 for example is to form simultaneously with top electrode 250, its formation method for example is earlier to form a conductor material layer (not illustrating among the figure) with sputtering method or physical vaporous deposition on substrate 300, and this conductor material layer of patterning again is to form source/drain 216 and top electrode 250.In addition, when the patterned conductor material layer, more comprise patterning ohmic contact layer 218, in ohmic contact layer 218, to form an opening 218a.
Then, shown in Fig. 6 E, on substrate 300, form a protective seam 260, to cover lock insulation course 240, top electrode 250 and source/drain 216.Wherein, the formation method of protective seam 260 for example is to starch the enhanced chemical vapor deposition method in form a silicon nitride layer on substrate 300 with chemical vapour deposition technique or electricity.
Then, shown in Fig. 6 F, on protective seam 260, form a pixel electrode 220, to electrically connect with top electrode 250 and source/drain 216.And the material of this pixel electrode 220 for example be indium tin oxide (Indium Tin Oxide, ITO), indium-zinc oxide (Indium Zinc Oxide, IZO) or other electrically conducting transparent materials.
It should be noted that; in one embodiment of the invention before forming pixel electrode 220; for example more be included in the protective seam 260 and form one first opening 262, exposing part top electrode 250, and pixel electrode 220 for example is to see through this first opening 262 to electrically connect with top electrode 250.In addition, before forming pixel electrode 220, for example more be included in and form one second opening 264 in the protective seam 260, exposing part source/drain 216, and pixel electrode 220 for example is to see through this second opening 264 to electrically connect with source/drain 216.
In sum, image element structure of the present invention and manufacture method thereof have following advantage at least:
1, compared to prior art, therefore image element structure of the present invention can improve the particulate that is present in bottom electrode two sides because of having a drain current suppressing layer, causes the shortcoming of storage capacitors electric leakage easily, and then can improve the acceptance rate of image element structure.
2, the manufacture method of image element structure of the present invention and existing process-compatible under the situation that does not change processing procedure, can increase the acceptance rate of image element structure.
The above, it only is preferred embodiment of the present invention, be not that the present invention is done any pro forma restriction, though the present invention discloses as above with preferred embodiment, yet be not in order to limit the present invention, any those skilled in the art, in not breaking away from the technical solution of the present invention scope, when the method that can utilize above-mentioned announcement and technology contents are made a little change or be modified to the equivalent embodiment of equivalent variations, but every content that does not break away from technical solution of the present invention, according to technical spirit of the present invention to any simple modification that above embodiment did, equivalent variations and modification all still belong in the scope of technical solution of the present invention.
Claims (18)
1. image element structure is characterized in that it comprises:
One active member;
One pixel electrode electrically connects with this active member;
One bottom electrode is disposed at the below of this pixel electrode;
One lock insulation course extends to this pixel electrode below from this active member, to cover this bottom electrode;
One top electrode is disposed on this lock insulation course, and electrically connects with this pixel electrode;
One protective seam extends to this pixel electrode below from this active member, to cover the subregion of this top electrode; And
One drain current suppressing layer is disposed between this lock insulation course and this top electrode, and wherein this drain current suppressing layer exposes this lock insulation course of part of this bottom electrode top, and this lock insulation course of this top electrode and the part that is exposed directly contacts.
2. image element structure according to claim 1 is characterized in that wherein said drain current suppressing layer comprises two strip patterns, is positioned at this bottom electrode two sides top, and covers the subregion of this bottom electrode top respectively.
3. image element structure according to claim 1 is characterized in that wherein said drain current suppressing layer comprises a frame shape pattern, and wherein an opposite side of this frame shape pattern is the top that is positioned at these bottom electrode two sides, and covers the subregion of this bottom electrode top respectively.
4. image element structure according to claim 1 is characterized in that having one first opening in the wherein said protective seam, and exposing this top electrode of part, and this pixel electrode is to see through this first opening and the electric connection of this top electrode.
5. image element structure according to claim 1 is characterized in that wherein said drain current suppressing layer comprises an amorphous silicon layer.
6. image element structure according to claim 5 is characterized in that wherein said drain current suppressing layer more comprises a n type doped amorphous silicon layer, is disposed on this amorphous silicon layer.
7. the manufacture method of an image element structure is characterized in that it may further comprise the steps:
Form a gate and a bottom electrode on a substrate;
Form a lock insulation course on this substrate and this lock insulation course cover this gate and this bottom electrode; And
Form a channel layer and a drain current suppressing layer on this lock insulation course, wherein this channel layer is to be positioned at this gate top, and this drain current suppressing layer exposes this lock insulation course of part of this bottom electrode top; And
On this substrate, form an one source pole/drain and a top electrode, wherein this source/drain is to cover this channel layer partly and this lock insulation course partly, and this top electrode is this lock insulation course and this drain current suppressing layer that covers another part, and this top electrode directly contacts with this lock insulation course of part that is exposed by this drain current suppressing layer.
8. the manufacture method of image element structure according to claim 7 is characterized in that the formation method of wherein said drain current suppressing layer is included in this bottom electrode two sides top formation two strip patterns, to cover the subregion of this bottom electrode top respectively.
9. the manufacture method of image element structure according to claim 7, the formation method that it is characterized in that wherein said drain current suppressing layer is included in formation one frame shape pattern on this lock insulation course, wherein an opposite side of this frame shape pattern is to be positioned at this bottom electrode two sides top, and covers the subregion of this bottom electrode top respectively.
10. the manufacture method of image element structure according to claim 7 is characterized in that it more comprises:
On this substrate, form a protective seam, to cover this lock insulation course, this top electrode and this source/drain; And
On this protective seam, form a pixel electrode.
11. the manufacture method of image element structure according to claim 10 is characterized in that wherein before forming this pixel electrode, more was included in and formed one first opening in this protective seam, to expose this top electrode of part.
12. the manufacture method of image element structure according to claim 10 is characterized in that wherein before forming this pixel electrode, more was included in and formed one second opening in this protective seam, to expose this source/drain of part.
13. the manufacture method of image element structure according to claim 10 is characterized in that wherein before forming this source/drain, more was included in and formed an ohmic contact layer on this channel layer.
14. a storage capacitor structure is characterized in that it comprises:
One bottom electrode;
One insulation course covers this bottom electrode;
One top electrode is disposed on this insulation course; And
One drain current suppressing layer is disposed between this insulation course and this top electrode, and wherein this drain current suppressing layer exposes this lock insulation course of part of this bottom electrode top, and this lock insulation course of this top electrode and the part that is exposed directly contacts.
15. storage capacitor structure according to claim 14 is characterized in that wherein said drain current suppressing layer comprises two strip patterns, is positioned at this bottom electrode two sides top, and covers the subregion of this bottom electrode top respectively.
16. storage capacitor structure according to claim 14, it is characterized in that wherein said drain current suppressing layer comprises a frame shape pattern, wherein an opposite side of this frame shape pattern is to be positioned at this bottom electrode two sides top, and covers the subregion of this bottom electrode top respectively.
17. storage capacitor structure according to claim 14 is characterized in that wherein said drain current suppressing layer comprises an amorphous silicon layer.
18. storage capacitor structure according to claim 17 is characterized in that wherein said drain current suppressing layer more comprises a n type doped amorphous silicon layer, is disposed on this amorphous silicon layer.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2005100000197A CN100363828C (en) | 2005-01-04 | 2005-01-04 | Picture element structure and manufacturing method and storage capacitance structure therefor |
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| Application Number | Priority Date | Filing Date | Title |
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| CNB2005100000197A CN100363828C (en) | 2005-01-04 | 2005-01-04 | Picture element structure and manufacturing method and storage capacitance structure therefor |
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| Publication Number | Publication Date |
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| CN1632673A CN1632673A (en) | 2005-06-29 |
| CN100363828C true CN100363828C (en) | 2008-01-23 |
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| Country | Link |
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0774368A (en) * | 1994-09-01 | 1995-03-17 | Matsushita Electric Ind Co Ltd | Manufacture of semiconductor device |
| CN1383027A (en) * | 2001-04-24 | 2002-12-04 | 株式会社日立制作所 | Image display and mfg. method thereof |
| CN1514468A (en) * | 2002-12-31 | 2004-07-21 | Lg.飞利浦Lcd有限公司 | Thin-film transistor array base plate and its manufacturing method |
-
2005
- 2005-01-04 CN CNB2005100000197A patent/CN100363828C/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0774368A (en) * | 1994-09-01 | 1995-03-17 | Matsushita Electric Ind Co Ltd | Manufacture of semiconductor device |
| CN1383027A (en) * | 2001-04-24 | 2002-12-04 | 株式会社日立制作所 | Image display and mfg. method thereof |
| CN1514468A (en) * | 2002-12-31 | 2004-07-21 | Lg.飞利浦Lcd有限公司 | Thin-film transistor array base plate and its manufacturing method |
Also Published As
| Publication number | Publication date |
|---|---|
| CN1632673A (en) | 2005-06-29 |
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