CN100357897C - Method for deciding blocking signal - Google Patents
Method for deciding blocking signal Download PDFInfo
- Publication number
- CN100357897C CN100357897C CNB2005100806362A CN200510080636A CN100357897C CN 100357897 C CN100357897 C CN 100357897C CN B2005100806362 A CNB2005100806362 A CN B2005100806362A CN 200510080636 A CN200510080636 A CN 200510080636A CN 100357897 C CN100357897 C CN 100357897C
- Authority
- CN
- China
- Prior art keywords
- processing unit
- central processing
- cpu
- signal
- system management
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Abstract
The present invention relates to a method for determining blockage signals. When a system management interrupt signal is sent out to a central processing unit, the method is used for judging whether a response signal is blocked to be transmitted to the central processing unit; the response signal is signal sent out by a system wafer so as to respond to a driving signal which is sent out by the central processing unit to the system wafer. The method is used for detecting whether the driving signal sent out the central processing unit reaches the system wafer and detecting whether the system management interrupt signal is sent out to the central processing unit. After the driving signal sent out by the central processing unit reaches the system wafer, when system management interrupt signals are continuously sent out to the central processing unit, the system management interrupt signals are judged to be used for retrieving temporary storage values of a computer system; therefore, the response signal is blocked to be sent out to the central processing unit.
Description
Technical field
The invention relates to a kind of method that determines blocking signal, particularly a kind of when system management interrupt signal is issued to CPU (central processing unit), whether decision intercepts the method that return signal transfers to CPU (central processing unit).
Background technology
Computer technology is more and more progressive now, the peripheral device that computer links is also more and more, therefore the complexity of computer system is along with improve, cause computer system need carry out more numerous and diverse system's debug, to improve the stability of computer system, avoid computer system when using, to produce the situation of system exception, along with system's debug development of technology, develop now and the testing staff (software is software by software, below all be called software) triggering system management interrupt (System Management interrupt, SMI) signal, (System ManagementMode SMM), captures the data of computer system working storage to order about CPU (central processing unit) executive system management mode, can learning the state of computer system when making a mistake, and the source that the analysis computer system makes a mistake.
When CPU (central processing unit) in the executive system management mode, and do not finish the acquisition working storage data the time, when transferring to CPU (central processing unit) as a return signal, south bridge wafer transmission return signal for example, because return signal is to reply CPU (central processing unit) for System on chip to have finished the execution incident that CPU (central processing unit) sends a drive signal, so CPU (central processing unit) will be changed the data of the working storage of computer system, so may cause the data of the working storage that captured is to be CPU (central processing unit) data after changing, but not be the desired data of testing staff, to hinder testing staff's debug computer system, so when CPU (central processing unit) receiving system management interrupt signal carries out System Management Mode, must intercept return signal and transfer to CPU (central processing unit), until the data of finishing the acquisition working storage.
In addition, because of system management interrupt signal also can be triggered by peripheral device, this system management interrupt signal is not the data that is used to capture working storage, so need not intercept return signal transfers to CPU (central processing unit), so decision intercepts the method for return signal now, it is the state working storage of all peripheral devices of detecting computer system, confirm whether system management interrupt signal is triggered by peripheral device, as not being, represent that promptly system management interrupt signal is triggered by software, so must intercept return signal transfers to CPU (central processing unit), yet the above-mentioned process of confirming the state working storage one by one, be quite time-consuming, and (hardware is hardware to expend computer system hardware, below all be called hardware) resource and cost, the mode that intercepts return signal is arranged now in addition in addition, it is that the system management interrupt signal of not worrying is triggered by peripheral device or software, and directly intercept return signal, so computer system will be easy to generate problem.
This shows that the method for above-mentioned existing decision blocking signal obviously still has inconvenience and defective, and demands urgently further being improved in method and use.In order to solve the problem of the method existence that determines blocking signal, relevant manufacturer there's no one who doesn't or isn't seeks solution painstakingly, but do not see always that for a long time suitable design finished by development, and common product does not have appropriate method to address the above problem, and this obviously is the problem that the anxious desire of relevant dealer solves.Therefore how to found a kind of method of new decision blocking signal, just become the current industry utmost point to need improved target.
Because the defective that the method for above-mentioned existing decision blocking signal exists, the inventor is based on being engaged in this type of product design manufacturing abundant for many years practical experience and professional knowledge, and the utilization of cooperation scientific principle, actively studied innovation, in the hope of founding a kind of method of new decision blocking signal, can improve the method for general existing decision blocking signal, make it have more practicality.Through constantly research, design, and after studying sample and improvement repeatedly, create the present invention who has practical value finally.
Summary of the invention
The objective of the invention is to, overcome the defective of the method existence of existing decision blocking signal, and provide a kind of method of new decision blocking signal, technical matters to be solved is to make it judge whether system management interrupt signal is triggered by software, be used to capture the data of working storage, transfer to CPU (central processing unit) to intercept return signal, capturing the data of correct working storage, thereby be suitable for practicality more.
Another object of the present invention is to, a kind of method that determines blocking signal is provided, technical matters to be solved is to make it by simple and easy determination methods, determine whether baffle system wafer transmission return signal is to CPU (central processing unit), improve the efficient that decision intercepts return signal, thereby be suitable for practicality more.
The object of the invention to solve the technical problems realizes by the following technical solutions.A kind of method that determines blocking signal according to the present invention's proposition, it is when applying to a system management interrupt signal and being sent to a CPU (central processing unit), whether decision intercepts a return signal transfers to this CPU (central processing unit), this return signal is that a System on chip is responded this CPU (central processing unit) and sent the signal of a drive signal to this System on chip, and this method may further comprise the steps: detect this CPU (central processing unit) and whether send this drive signal to this System on chip; And whether detecting has this system management interrupt signal to be sent to this CPU (central processing unit); Wherein, when this CPU (central processing unit) sends this drive signal to this System on chip, and this system management interrupt signal is sent to this CPU (central processing unit), promptly intercepts this return signal and transfers to this CPU (central processing unit).
The object of the invention to solve the technical problems also can be applied to the following technical measures to achieve further.
The method of aforesaid decision blocking signal, wherein whether send this drive signal to the step of this System on chip in this CPU (central processing unit) of detecting, more include a step, it is whether this CPU (central processing unit) of detecting is in advanced framework power supply interface (Advanced Configuration and PowerInterface, ACPI) a C3 state, when this CPU (central processing unit) is in this C3 state, promptly do not intercept this return signal and transfer to this CPU (central processing unit).
The method of aforesaid decision blocking signal, wherein after this return signal of obstruct transfers to the step of this CPU (central processing unit), more include a step, it is when this CPU (central processing unit) is finished execution to a System Management Mode that should system management interrupt signal, stops to intercept this return signal and transfers to this CPU (central processing unit).
The method of aforesaid decision blocking signal, whether have this system management interrupt signal be sent to two steps of this CPU (central processing unit), be to judge whether this system management interrupt signal is the data of the multiple transient memory of acquisition computer system in this CPU (central processing unit) of detecting if wherein whether sending this drive signal to this System on chip and detecting.
The method of aforesaid decision blocking signal, wherein said System on chip are a south bridge wafer.
The present invention compared with prior art has tangible advantage and beneficial effect.By above technical scheme as can be known, the present invention determines the method for blocking signal to have following advantage at least:
The present invention determines the method for blocking signal, be to send drive signal to System on chip in CPU (central processing unit), and when system management interrupt signal is sent to CPU (central processing unit), judge that this system management interrupt signal is for ordering about CPU (central processing unit) executive system management mode, the data of working storage with the acquisition computer system, so decision intercepts return signal and transfers to CPU (central processing unit), to avoid CPU (central processing unit) change working storage data, and the wrong data of acquisition, carry out the debugging computer system operation in order to the testing staff, by method of the present invention, can simple and easyly judge whether that decision intercepts return signal, so the present invention has high-level efficiency and the advantage that reduces hardware cost.
In sum, the method of the decision blocking signal that the present invention is special, it has above-mentioned many advantages and practical value, and in like product, do not see have similar method design to publish or use and really genus innovation, no matter it all has bigger improvement on method or function, have large improvement technically, and produced handy and practical effect, and the method for more existing decision blocking signal has the multinomial effect of enhancement, thereby being suitable for practicality more, really is a new and innovative, progressive, practical new design.
Above-mentioned explanation only is the general introduction of technical solution of the present invention, for can clearer understanding technological means of the present invention, and can be implemented according to the content of instructions, and for above-mentioned and other purposes, feature and advantage of the present invention can be become apparent, below especially exemplified by preferred embodiment, and conjunction with figs., be described in detail as follows.
Description of drawings
Fig. 1 is the process flow diagram that the present invention determines the method embodiment of blocking signal.
Fig. 2 is the sequential chart that the present invention determines the method embodiment of blocking signal.
Fig. 3 is another sequential chart of the present invention method embodiment of determining blocking signal.
Fig. 4 is the process flow diagram that the present invention determines another embodiment of method of blocking signal.
Embodiment
Reach technological means and the effect that predetermined goal of the invention is taked for further setting forth the present invention, below in conjunction with accompanying drawing and preferred embodiment, its embodiment of method, method, feature and the effect thereof of the decision blocking signal that foundation the present invention is proposed, describe in detail as after.
Seeing also shown in Figure 1ly, is the process flow diagram of the embodiment of the invention; As shown in the figure, at first carry out step S1, whether the detecting CPU (central processing unit) sends a drive signal to System on chip, System on chip is the south bridge wafer, drive signal is that CPU (central processing unit) flog system wafer control peripheral device is carried out incident, when the detecting CPU (central processing unit) sends this drive signal to System on chip, be further execution in step S2, whether detecting has system management interrupt signal to be triggered and is sent to CPU (central processing unit), when system management interrupt signal is sent to CPU (central processing unit), judge that promptly this system management interrupt signal is sent to CPU (central processing unit) by the testing staff triggers by software, to order about CPU (central processing unit) executive system management mode, with acquisition working storage data, so carry out step S3, intercept this return signal and transfer to CPU (central processing unit), finish the executive system management mode until CPU (central processing unit), return signal is that System on chip is used to reply the incident that CPU (central processing unit) is finished the execution drive signal.
The mode that intercepts this return signal can be and sends a blocking signal to System on chip, order about this System on chip and do not send this return signal, perhaps send blocking signal to CPU (central processing unit), order about CPU (central processing unit) and do not receive this return signal, to capture the data of correct working storage, but not acquisition working storage data is after changing carried out the debug operation in order to the testing staff.
Seeing also shown in Figure 2ly, is the sequential chart of the embodiment of the invention; As shown in the figure, when CPU (central processing unit) sends drive signal to System on chip, and there is system management interrupt signal to be triggered and when being sent to CPU (central processing unit), the present invention is that decision-making system management interrupt signal is triggered by software transmission one acquisition signal by the testing staff, so promptly can trigger blocking signal, be sent to CPU (central processing unit) to intercept return signal, finish the executive system management mode, promptly finish the data of acquisition working storage until CPU (central processing unit).
Seeing also shown in Figure 3ly, is another sequential chart of the embodiment of the invention; As shown in the figure, when system management interrupt signal at first is triggered, and transfer to CPU (central processing unit), afterwards, CPU (central processing unit) just sends drive signal to System on chip, judge that in the present invention of this situation this system management interrupt signal is triggered by peripheral device, do not transfer to CPU (central processing unit) so need not trigger blocking signal obstruct return signal, it is former because after the testing staff passes through the software trigger system management interrupt signal, would not send a command to CPU (central processing unit) by software again, send drive signal, so in this kind situation is that decision-making system management interrupt signal is triggered by peripheral device, do not transfer to CPU (central processing unit) so need not trigger blocking signal obstruct return signal.
From the above, by easy judgment mode of the present invention, can determine simply fast that whether needing to intercept return signal transfers to CPU (central processing unit), and do not need as located by prior art, must detect one by one the value of the working storage of computer system, to confirm whether system management interrupt signal is triggered by software, whether decision intercepts to reply and transfers to CPU (central processing unit) again, so the present invention has the efficient that the decision of promoting intercepts return signal, and reduces hardware cost.
Seeing also shown in Figure 4ly, is the process flow diagram of another embodiment of the present invention; Because of being in advanced framework power supply interface (Advanced Configuration and PowerInterface when CPU (central processing unit), during ACPI) a C3 state, software can triggering system management interrupt signal, so determining method of the present invention is more can set up a step, shown in step S11, it is the C3 state whether CPU (central processing unit) is in advanced framework power supply interface of detecting earlier, be in the C3 state of advanced framework power supply interface as CPU (central processing unit), promptly do not do follow-up detecting step, as when detecting CPU (central processing unit) and not being in the C3 state of advanced framework power supply interface, then continue and carry out step S12, whether the detecting CPU (central processing unit) sends drive signal to System on chip, then continue in this way and carry out step S13, whether detecting has system management interrupt signal to be sent to CPU (central processing unit), promptly carry out step S14 in this way, intercept return signal and transfer to CPU (central processing unit).
The above, it only is preferred embodiment of the present invention, be not that the present invention is done any pro forma restriction, though the present invention discloses as above with preferred embodiment, yet be not in order to limit the present invention, any those skilled in the art, in not breaking away from the technical solution of the present invention scope, when the technology contents that can utilize above-mentioned announcement is made a little change or is modified to the equivalent embodiment of equivalent variations, in every case be the content that does not break away from technical solution of the present invention, according to technical spirit of the present invention to any simple modification that above embodiment did, equivalent variations and modification all still belong in the scope of technical solution of the present invention.
Claims (5)
1, a kind of method that determines blocking signal, it is when applying to a system management interrupt signal and being sent to a CPU (central processing unit), whether decision intercepts a return signal transfers to this CPU (central processing unit), this return signal is that a System on chip is responded this CPU (central processing unit) and sent the signal of a drive signal to this System on chip, it is characterized in that this method may further comprise the steps:
Detect this CPU (central processing unit) and whether send this drive signal to this System on chip; And
Whether detecting has this system management interrupt signal to be sent to this CPU (central processing unit);
Wherein, when this CPU (central processing unit) sends this drive signal to this System on chip, and this system management interrupt signal is sent to this CPU (central processing unit), promptly intercepts this return signal and transfers to this CPU (central processing unit).
2, method according to claim 1, it is characterized in that wherein whether sending this drive signal to the step of this System on chip in this CPU (central processing unit) of detecting, more include a step, it is the C3 state whether this CPU (central processing unit) of detecting is in advanced framework power supply interface, when this CPU (central processing unit) is in this C3 state, promptly do not intercept this return signal and transfer to this CPU (central processing unit).
3, method according to claim 1, it is characterized in that wherein after this return signal of obstruct transfers to the step of this CPU (central processing unit), more include a step, it is when this CPU (central processing unit) is finished execution to a System Management Mode that should system management interrupt signal, stops to intercept this return signal and transfers to this CPU (central processing unit).
4, method according to claim 1, it is characterized in that whether wherein whether send this drive signal to this System on chip and detecting in this CPU (central processing unit) of detecting has this system management interrupt signal to be sent to two steps of this CPU (central processing unit), is to judge whether this system management interrupt signal is the data of the multiple transient memory of acquisition computer system.
5, method according to claim 1 is characterized in that wherein said System on chip is a south bridge wafer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2005100806362A CN100357897C (en) | 2005-07-04 | 2005-07-04 | Method for deciding blocking signal |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2005100806362A CN100357897C (en) | 2005-07-04 | 2005-07-04 | Method for deciding blocking signal |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1710544A CN1710544A (en) | 2005-12-21 |
| CN100357897C true CN100357897C (en) | 2007-12-26 |
Family
ID=35706790
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB2005100806362A Active CN100357897C (en) | 2005-07-04 | 2005-07-04 | Method for deciding blocking signal |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN100357897C (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1228177A (en) * | 1996-06-21 | 1999-09-08 | 英特尔公司 | System for controlling access to register mapped to I/O address space of computer system |
-
2005
- 2005-07-04 CN CNB2005100806362A patent/CN100357897C/en active Active
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1228177A (en) * | 1996-06-21 | 1999-09-08 | 英特尔公司 | System for controlling access to register mapped to I/O address space of computer system |
Non-Patent Citations (1)
| Title |
|---|
| System Management Mode. Transmeta,Corporation.. 2002 * |
Also Published As
| Publication number | Publication date |
|---|---|
| CN1710544A (en) | 2005-12-21 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN102937932B (en) | The automatic test device of integrated isomery testing tool and method | |
| CN101976217B (en) | Anomaly detection method and system for network processing unit | |
| CN102521098B (en) | Processing method and processing device for monitoring dead halt of CPU (Central Processing Unit) | |
| CN101458652B (en) | Embedded on-line emulation debugging system for microcontroller | |
| CN101464819A (en) | Hardware driven processor state storage prior to entering a low power mode | |
| CN105955876B (en) | Data monitoring processing method and device | |
| CN101556551B (en) | Hardware acquisition system and method for equipment failure log | |
| CN101373450B (en) | Method and system for processing CPU abnormity | |
| CN103544049A (en) | Testing environment automatic processing method, and method and device for realizing testing automation | |
| CN101739305A (en) | Operating system kernel level real-time dongle monitoring device and monitoring method thereof | |
| CN101431763A (en) | Method and apparatus for implementing base station power-down alarm by using interrupt | |
| WO2020211253A1 (en) | Elastic scaling method and apparatus for number of hosts in distributed system, and computer device | |
| CN103077140A (en) | Communication method and communication device for motion control card of robot and host | |
| CN103701651A (en) | Disaster recovery device and method for application service under domestic environment | |
| CN102169390A (en) | Information terminal and touch control method thereof | |
| CN105634502A (en) | Realization method of key scanning based on state machine | |
| CN100357897C (en) | Method for deciding blocking signal | |
| CN106412016A (en) | Connection control method and device for server | |
| CN103149909A (en) | Field programmable gate array (FPGA)-based controller area network (CAN) simulation node system | |
| CN102360343A (en) | Realization method of interrupt expansion of communication equipment | |
| CN100397351C (en) | Debug apparatus and method of computer system | |
| CN111459785B (en) | Clock processing circuit in chip debugging mode and clock processing method thereof | |
| CN101140529A (en) | Multiple events handling method and apparatus based on synchronous affair duplex separator | |
| CN103106111A (en) | Test system and test method of task priority inversion of multiple task operating system | |
| CN105760305A (en) | Real-time system monitoring method under linux |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant |