CN100356585C - Longitudinal quantum polka-dot floating grid tip structure, preparing method and storage thereof - Google Patents

Longitudinal quantum polka-dot floating grid tip structure, preparing method and storage thereof Download PDF

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Publication number
CN100356585C
CN100356585C CNB2005100121844A CN200510012184A CN100356585C CN 100356585 C CN100356585 C CN 100356585C CN B2005100121844 A CNB2005100121844 A CN B2005100121844A CN 200510012184 A CN200510012184 A CN 200510012184A CN 100356585 C CN100356585 C CN 100356585C
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quantum dot
substrate
dot
sige
floating grid
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CN1710722A (en
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邓宁
潘立阳
刘志弘
陈培毅
魏榕山
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Tsinghua University
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Tsinghua University
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Abstract

The present invention relates to a longitudinal quantum dot-floating grid point structure, a preparing method and a memorizer, which belongs to the technical field of memorizer design. The structure is characterized in that a layer of SiGe quantum dots are arranged above a substrate, a point structure is arranged at the lower part of a polysilicon floating grid, the point at the lower part of the polysilicon floating grid and the tops of the SiGe quantum dots are self-aligned. The preparing method of the structure comprises the following steps: preparing the SiGe quantum dots on the Si substrate; extensionally growing a silicon film on the SiGe quantum dots; forming concave pits which are arranged right above the quantum dots and are in longitudinal self-alignment with the quantum dots by dry-oxygen oxidation; depositing a polysilicon floating grid on an oxide layer to form a floating grid point structure which is self-aligned with the SiGe quantum dots. The present invention also provides a memorizer of the structure. When the same voltage is applied, the structure can improve tunneling current density. The structure can be used for a semiconductor non-volatile memorizer, and can reduce an operating voltage without reducing the thickness of the oxide layer. Therefore, the average electric field of the tunneling oxide layer is reduced, and the reliability of the memorizer is improved.

Description

Longitudinal quantum polka-dot floating grid tip structure, preparation method and memory
Technical field:
Longitudinal quantum polka-dot floating grid tip structure, preparation method and memory belong to the reservoir designs technical field.
Background technology:
Semiconductor non-volatile memory is occupied crucial status in IC industry, and 2004, the global marketing volume of semiconductor non-volatile memory was above 30,000,000,000 dollars.The F-N tunnelling is the core process of programming or wiping in the semiconductor non-volatile memory, and efficient is higher than the channel hot electron injection mode.But the F-N tunnelling needs higher relatively electric field, and therefore programming and erasing voltage are higher, cause tunnel oxide not reduce in proportion.Simultaneously, higher electric field will cause the degeneration of tunnel oxide in the tunnel oxide.Therefore, the operating voltage of reduction F-N tunnelling and the average electric field in the tunnel oxide are the key issue of semiconductor non-volatile memory to next generation's development.
By retrieval, do not report in the existing open source literature about the pertinent literature of longitudinal quantum polka-dot floating grid tip structure.
Summary of the invention:
The objective of the invention is to, propose to be used for quantum polka-dot floating grid tip structure of semiconductor non-volatile memory and preparation method thereof, and proposed a kind of nonvolatile storage that adopts this structure.
Structure proposed by the invention contains:
The P-Si substrate;
Tunnel oxide is positioned at P-Si substrate top;
Multi-crystal silicon floating bar is positioned at the tunnel oxide top;
It is characterized in that also having one deck SiGe quantum dot above described P-Si substrate, the bottom of described multi-crystal silicon floating bar is a cutting-edge structure.
The tip of described multi-crystal silicon floating bar bottom and the top of described SiGe quantum dot are self aligned.
A kind of preparation method of vertical autoregistration quantum polka-dot floating grid tip structure is characterized in that, contains following steps successively:
The first step: preparation SiGe quantum dot on the Si substrate;
Second step: epitaxial growth silicon thin film on the SiGe quantum dot for preparing;
The 3rd step: carry out dry-oxygen oxidation, directly over quantum dot, form and the vertical self aligned pit of quantum dot;
The 4th step: deposit multi-crystal silicon floating bar on the oxide layer that described dry-oxygen oxidation obtains forms and the self aligned floating boom cutting-edge structure of described SiGe quantum dot.
In the said method, the described first step prepares the SiGe quantum dot on the P-Si substrate, is to adopt high vacuum chemical vapor deposition or molecular beam epitaxial method self-organizing growth SiGe quantum dot on raceway groove.
The described first step prepares the SiGe quantum dot on the Si substrate, also can adopt directly epitaxy Si Ge film on the Si substrate, adopts the method for photoetching and etching to form the SiGe quantum dot then.
A kind of employing is the nonvolatile storage of structure as claimed in claim 1 or 2, contains:
The P-Si substrate;
Tunnel oxide is positioned at P-Si substrate top;
Multi-crystal silicon floating bar is positioned at the tunnel oxide top;
The controlled oxidation layer is positioned at the multi-crystal silicon floating bar top;
Control gate is positioned at controlled oxidation layer top;
It is characterized in that also having one deck SiGe quantum dot above described P-Si substrate, the bottom of described multi-crystal silicon floating bar is a cutting-edge structure.
Experiment showed, that structure proposed by the invention can apply under the condition of identical voltage, improve tunnelling current density.When being applied to semiconductor non-volatile memory, can under the condition that does not reduce oxidated layer thickness, reduce operating voltage, thereby reduce the average electric field in the tunnel oxide, improved the reliability of memory.
Description of drawings:
Fig. 1 longitudinal quantum polka-dot floating grid tip structure schematic diagram; Wherein 1 is tunnel oxide, and 2 is the most advanced and sophisticated floating boom of polysilicon, and 3 is the SiGe quantum dot;
The two-way enhancing F-N of the vertical autoregistration quantum polka-dot floating grid tip structure of Fig. 2 tunnelling schematic diagram;
The preparation technology figure of the vertical autoregistration quantum polka-dot floating grid tip structure of Fig. 3;
Fig. 4 adopts the semiconductor non-volatile memory of vertical autoregistration quantum polka-dot floating grid tip structure; Wherein 1 is tunnel oxide, and 2 are the most advanced and sophisticated floating boom of autoregistration polysilicon, and 3 is the SiGe quantum dot, and 4 is control gate, and 5 is the controlled oxidation layer.
Embodiment:
Longitudinal quantum polka-dot floating grid tip structure proposed by the invention as shown in Figure 1.Be distributed with the SiGe quantum dot above the P-Si substrate, in the present embodiment, the bottom of multi-crystal silicon floating bar is most advanced and sophisticated to be aimed at the tip of SiGe quantum dot.
As shown in Figure 2, electronics is during from both direction generation tunnelling, because quantum dot and multi-crystal silicon floating bar tip are to the effect of the geometry enhancer of electric field, near the internal field in quantum dot top and floating boom tip is strengthened, the potential barrier that electronics is faced is effectively narrowed down, thereby take place to strengthen the F-N tunnelling, can apply under the condition of identical voltage, can obtain higher tunnelling current density.Therefore, can under the condition of lower applied voltage, obtain identical tunnelling current density.If be applied to semiconductor non-volatile memory, can under the condition that does not reduce oxidated layer thickness, reduce operating voltage.Owing to reduced the average electric field in the tunnel oxide, can also improve the reliability of memory.
The preparation method that this structure is concrete following (Fig. 3):
1) preparation (3a) of quantum dot on the Si substrate: method self-organizing growth SiGe quantum dot on raceway groove that can adopt high vacuum chemical vapor deposition (UHV/CVD) or molecular beam epitaxy (MBE), also direct epitaxy Si Ge film on the Si substrate adopts the method for photoetching and etching to form the SiGe quantum dot then.
2) epitaxial growth Si film (3b): ESF epitaxial silicon film on the SiGe quantum dot for preparing.Use for conventional semiconductor non-volatile memory, the thickness of this layer Si film is about 5nm.The effect of ESF epitaxial silicon film is as follows: if directly carry out oxidation on the basis of Fig. 3 a, when obtaining self-alignment structure as shown in Figure 3 so, the thickness of middle tunnel oxide is certain, and this thickness is greatly about about 3nm.It is too small that this thickness is used for great majority.Therefore, the Si film by the second step extension suitable thickness can obtain suitable middle tunnel oxide layer thickness.
3) dry-oxygen oxidation (3c): because the oxidation rate of SiGe quantum dot is less than the oxidation rate of Si, therefore when reaching certain thickness, tunnel oxide can directly over quantum dot, form pit, deposit multi-crystal silicon floating bar on this oxide layer just forms self aligned floating boom cutting-edge structure.
4) CVD polysilicon membrane (3d): the deposit polysilicon membrane, obtain being used for the multi-crystal silicon floating bar of memory, the quantum dot of the tip of floating boom and raceway groove top is self aligned.
This structure is used for the semiconductor non-volatile memory (see figure 4), and concrete preparation method is as follows:
1) preparation of quantum dot on the Si substrate: adopt high vacuum chemical vapor deposition (UHV/CVD) self-organizing growth SiGe quantum dot on raceway groove, growthing process parameter is as follows: silane flow rate 2sccm, germane flow 5sccm; Growth temperature: 550 ℃, growth time: 40s, chamber pressure in the growth course: 10 -3Pa.
2) epitaxial growth Si film: adopt high vacuum chemical vapor deposition (UHV/CVD) epitaxial growth Si film 5nm.Growthing process parameter is as follows: silane flow rate 6sccm; Growth temperature: 550 ℃, growth time: 60s, chamber pressure in the growth course: 10 -3Pa.
3) dry-oxygen oxidation: carry out dry-oxygen oxidation.Oxidated layer thickness is 15nm.
4) CVD polysilicon membrane: the deposit polysilicon membrane obtains most advanced and sophisticated and the vertical self aligned multi-crystal silicon floating bar of quantum dot.
5), produce the semiconductor non-volatile memory of two-way enhancing F-N tunnelling as shown in Figure 4 in the manufacture craft of its standard semiconductor memory of the basic enterprising Xingqi of this structure.
The semiconductor memory of this structure can be reduced to 12V from 18V with operating voltage under the situation that keeps programming identical with traditional nonvolatile storage and erasing speed.Simultaneously, reduce the average field intensity in the tunnel oxide, improved the phenomenon of the tunnel oxide degraded layer that stress causes under the highfield, improved the reliability of nonvolatile storage.

Claims (6)

1, longitudinal quantum polka-dot floating grid tip structure, contain:
The P-Si substrate;
Tunnel oxide is positioned at P-Si substrate top;
Multi-crystal silicon floating bar is positioned at the tunnel oxide top;
It is characterized in that also having one deck SiGe quantum dot above described P-Si substrate, the bottom of described multi-crystal silicon floating bar is a cutting-edge structure.
2, longitudinal quantum polka-dot floating grid tip structure as claimed in claim 1 is characterized in that, the tip of described multi-crystal silicon floating bar bottom and the top of described SiGe quantum dot are self aligned.
3, a kind of preparation method of longitudinal quantum polka-dot floating grid tip structure is characterized in that, contains following steps successively:
The first step: preparation SiGe quantum dot on the Si substrate;
The first step: epitaxial growth silicon thin film on the SiGe quantum dot for preparing;
The 3rd step: carry out dry-oxygen oxidation, directly over quantum dot, form and the vertical self aligned pit of quantum dot;
The 4th step: deposit multi-crystal silicon floating bar on the oxide layer that described dry-oxygen oxidation obtains forms and the self aligned floating boom cutting-edge structure of described SiGe quantum dot.
4, the preparation method of a kind of longitudinal quantum polka-dot floating grid tip structure as claimed in claim 3, it is characterized in that, the described first step prepares the SiGe quantum dot on the P-Si substrate, be to adopt high vacuum chemical vapor deposition or molecular beam epitaxial method self-organizing growth SiGe quantum dot on raceway groove.
5, the preparation method of a kind of longitudinal quantum polka-dot floating grid tip structure as claimed in claim 3, it is characterized in that, the described first step prepares the SiGe quantum dot on the Si substrate, be to adopt directly epitaxy Si Ge film on the Si substrate, adopts the method for photoetching and etching to form the SiGe quantum dot then.
6, a kind of employing nonvolatile storage of structure as claimed in claim 1 or 2, contain:
The P-Si substrate;
Tunnel oxide is positioned at P-Si substrate top;
Multi-crystal silicon floating bar is positioned at the tunnel oxide top;
The controlled oxidation layer is positioned at the multi-crystal silicon floating bar top;
Control gate is positioned at controlled oxidation layer top;
It is characterized in that also having one deck SiGe quantum dot above described P-Si substrate, the bottom of described multi-crystal silicon floating bar is a cutting-edge structure.
CNB2005100121844A 2005-07-15 2005-07-15 Longitudinal quantum polka-dot floating grid tip structure, preparing method and storage thereof Expired - Fee Related CN100356585C (en)

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20010023942A1 (en) * 2000-03-23 2001-09-27 Samsung Electronics Co., Ltd. Semiconductor device of heterojunction structure having quantum dot buffer layer
CN1385904A (en) * 2001-05-10 2002-12-18 三星电子株式会社 Monoelectron memory device composed of quantum points and making method thereof
US20040219750A1 (en) * 2003-05-01 2004-11-04 Ting-Chang Chang Quantum structure and forming method of the same
CN1604331A (en) * 2004-11-19 2005-04-06 清华大学 Quantum dot memory based on longitudinal double barrier resonant tunneling structure

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20010023942A1 (en) * 2000-03-23 2001-09-27 Samsung Electronics Co., Ltd. Semiconductor device of heterojunction structure having quantum dot buffer layer
CN1385904A (en) * 2001-05-10 2002-12-18 三星电子株式会社 Monoelectron memory device composed of quantum points and making method thereof
US20040219750A1 (en) * 2003-05-01 2004-11-04 Ting-Chang Chang Quantum structure and forming method of the same
CN1604331A (en) * 2004-11-19 2005-04-06 清华大学 Quantum dot memory based on longitudinal double barrier resonant tunneling structure

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