CN100353441C - Method for detecting data structure of data in optical storing equipment - Google Patents
Method for detecting data structure of data in optical storing equipment Download PDFInfo
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- CN100353441C CN100353441C CNB2003101010125A CN200310101012A CN100353441C CN 100353441 C CN100353441 C CN 100353441C CN B2003101010125 A CNB2003101010125 A CN B2003101010125A CN 200310101012 A CN200310101012 A CN 200310101012A CN 100353441 C CN100353441 C CN 100353441C
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Abstract
The present invention provides a method for detecting a data structure in the data of a light storage device, which provides a first eight-bit register connected between an eight-to-fourteen modulator and a preposition zero counter; the minimum eight-bit data of the fourteen-bit data output by the eight-to-fourteen modulator is stored in the first eight-bit register; the preposition zero amount of the data temporarily stored in the first eight-bit register is calculated by the preposition zero counter.
Description
Technical field
The invention provides a kind of method that detects the data structure of the data in the light storage device, refer to especially a kind of obtain ten four figures according to crossfire before zero setting and the back zero setting method.
Background technology
In CD baking and rewritable system, need exist with non return to zero coded system (Non Return to Zero) earlier through the symbol data (symbol data) of two steps, convert 14 channel bits data (channel bit data) again to eight.Above-mentioned these steps are called as eight to 14 modulation (Eight to Fourteen Modulation).And in the standard of Red Book, by ten four figures according to the crossfire of being formed in, data occurring is 0 o'clock, its development length must not be greater than ten one-periods, also must not be less than three cycles, this restriction of zero extension time continuously, in Red Book, be called continuous distance of zero mark degree rule (run-length rule), the limitation reason of this extension time is that this ten four figures need be used as the important evidence of keeping linear speeds such as CD-ROM drive according to crossfire, its foundation of relying be exactly the continuous distance of zero mark degree of ten four figures according to crossfire, the three wherein minimum cycles are being represented the signal of 720KHz under 1.2 meter per seconds, ten the highest one-periods are then being represented the signal of 196KHz under 1.2 meter per seconds, any surpass or the signal that is lower than the standard cycle all can be regarded as rub-out signal.
In addition, Red Book has also defined digital accumulated value (digital sum value), and its non-return-to-zero coding value by accumulation ten four figures certificates is tried to achieve.Purpose is to allow the average electrical potential energy of non-return-to-zero coding value of ten four figures certificates near DC potential.Standard according to Red Book, any two groups by eight data that are modulated to 14, all must assign one group three combine code (merging bit) therebetween, its objective is that the entire stream that will make is after the combine code that adds three of this groups, can meet continuous distance of zero mark degree rule, also can allow the average electrical potential energy of non-return-to-zero coding value of whole ten four figures certificates near the direct current place value.This wherein optimal combine code needs just can learn through some computings.Wherein a step will calculate preposition number of zeros before this combine code and rearmounted number of zeros afterwards exactly earlier for this.
Summary of the invention
Prior art is to have utilized two groups of storeies or register intactly to write down last pen ten four figures certificate and back one ten four figures certificate, and preposition to-zero counter and the rearmounted to-zero counter of sending into correspondence by the data in these two groups of storeies calculate preceding zero setting and rearmounted number of zeros.But the spent internal memory of prior art is excessive, and decoding scheme is also relatively complicated, therefore is necessary to do further improvement.
Therefore fundamental purpose of the present invention provides a kind of method that detects the data structure of the data in the light storage device, to address the above problem.
The invention provides a kind of method that detects the data structure of the data in the light storage device, it includes provides first eight bit register, is connected between eight to 14 modulators and the preposition to-zero counter; Low eight with ten four figures certificates of this eight to 14 modulator output are temporary in this first eight bit register; And use this preposition to-zero counter to calculate the number of the preceding zero setting of the data that are temporary in this first eight bit register.
With respect to prior art, the present invention is because of only needing the high eight-bit and the minimum eight bit data of record ten four figures certificates, the number of zero setting and back zero setting before just clearly obtaining, judge whether to conform with continuous distance of zero mark degree rule by this, therefore directly intactly note down two ten four figures in front and back according to the method that judges whether to conform with continuous distance of zero mark degree rule compared with previous, the advantage of saving memory headroom is significantly arranged.
Description of drawings
Figure one is the block scheme according to optical disc burning system of the present invention.
Figure two is the data flow diagram among the present invention.
Description of symbols among the figure
20 8 to 14 modulators, 22 preposition to-zero counters
24 rearmounted to-zero counter 26 digital accumulated value computing units
28 impact dampers, 30 continuous distance of zero mark degree determining devices
32 combine code selector switchs, 34 digital accumulated value comparers
36 first eight bit registers, 38 second eight bit registers
40 data streaming combiners
Embodiment
Please refer to figure one.Figure one is the block scheme according to optical disc burning system 10 of the present invention.Optical disc burning system 10 includes eight to 14 modulators 20, preposition to-zero counter 22, rearmounted to-zero counter 24, numeral accumulation computing unit 26, impact damper 28, digital accumulated value comparer 34, continuous distance of zero mark degree determining device 30, second eight bit register 38, first eight bit register 36, data streaming combiner 40 and combine code selector switch 32.Eight to 14 modulators 20 are linked to digital accumulated value computing unit 26, second eight bit register 38, first eight bit register 36 and data streaming combiner 40; Distance of zero mark degree determining device 30 is linked to digital accumulated value computing unit 26 continuously.And second eight bit register 38 and first eight bit register 36 are connected to rearmounted to-zero counter 24 and preposition to-zero counter 22 respectively.
Data at first enter eight to 14 modulators 20 after the CD pick-up head reads, it is responsible for eight input data-switching become 14 channel bits data, and ten four figures certificate is to adopt the non-return-to-zero coding mode to exist, and the standard of its conversion is worked out in the Red Book of CD baking.And ten four figures after the process conversion are according in the middle of meeting difference input digit accumulated value computing unit 26 and the data streaming combiner 40, simultaneously, the high eight-bit of this ten four figures certificate can be imported second eight bit register 38, then can import in the middle of first eight bit register 36 for minimum eight.Rearmounted to-zero counter 24 detects the number than the back zero setting of low data that is temporary in second eight bit register 38 immediately, if what be temporary in this second eight bit register 38 all is zero than low data, then further detect the number of back zero setting of the high bit data of this second eight bit register 38.And preposition to-zero counter 22 detects the number than the preceding zero setting of low data that is temporary in first eight bit register 36, if what be temporary in this first eight bit register 36 all is zero than low data, then further detect the number of preceding zero setting of the high bit data of this first eight bit register 36.This wherein since according to ten four figures of Red Book listed 256 groups according to zero setting before as can be known and rearmounted number of zeros is neither under any situation surpasses eight, therefore the present invention can be by only detecting at last or the data of first eight bits just can be learnt preposition and rearmounted number of zeros definitely, and be further used as the important evidence that combine code (merging bit) is selected.And the different sequential accesses of the also available eight bit register utilization of the first above-mentioned eight bit register 36 and second eight bit register 38 substitute.
And because data enter order successively, so the rearmounted remainder that rearmounted to-zero counter 24 is exported is according to meeting elder generation process impact damper 28, so that the number of back zero setting and the preposition number of zeros of next record ten four figures certificates can enter continuous distance of zero mark degree determining device 30 simultaneously.Distance of zero mark degree determining device 30 can judge whether the channel bits data that enter can be observed the continuous distance of zero mark degree of the data of continuous distance of zero mark degree rule (run-length rule) defined and must be not less than for three cycles and be not more than for ten one-periods according to the number of the preceding zero setting of importing and the number of back zero setting continuously.Distance of zero mark degree determining device 30 is exported a signal immediately and is entered digital accumulated value computing unit 26 after action finishes continuously, with the foundation as the decision combine code.34 ten four figures certificates of being responsible for handling direct input digit accumulated value computing unit 26 of numeral accumulated value computing unit 26 and digital accumulated value comparer, the signal of being exported according to continuous distance of zero mark degree determining device 30 decides last combine code to select signal to produce last combine code with control combine code selector switch 32 again.Two ten four figures certificates in front and back that aforesaid data streaming combiner 40 will be stored in wherein extract, and the combine code that combine code selector switch 32 is produced interts among two channel bits data again.
Please refer to figure two.Figure two is the data flow diagram among the present invention.Show decimal number among the figure " 79 " after converting eight scale-of-two to, be expressed as " 01001111 ".These data of eight are sent to after eight to 14 modulators 20 modulate being read, these data of eight can become " 00100001000100 " ten four figures certificates, this ten four figures is according to being input to digital accumulated value arithmetic element 26 and data streaming combiner 40 immediately.And minimum eight of this ten four figures certificate " 00100001 " input advances first eight bit register 36, high eight-bit " 01000100 " then input advance second eight bit register 38.Rearmounted to-zero counter 24 reads the data that are stored in second eight bit register 38, judges the action of rearmounted number of zeros.Observe toward lowest order by most significant digit, can learn thereafter the zero setting number for " 2 ", rearmounted to-zero counter 24 is with being about to " 2 " export impact damper 28 stored to.And in like manner, preposition to-zero counter 22 reads the data that are stored in first eight bit register 36, is observed toward most significant digit by lowest order, can learn its preposition number of zeros also for " 2 ", preposition to-zero counter 24 with note will " 2 " export continuous distance of zero mark degree determining device 30 to.
With respect to prior art, the present invention is because of only needing the high eight-bit and the minimum eight bit data of record ten four figures certificates, the number of zero setting and back zero setting before just clearly obtaining, judge whether to conform with continuous distance of zero mark degree rule by this, therefore directly intactly note down two ten four figures in front and back according to the method that judges whether to conform with continuous distance of zero mark degree rule compared with previous, the advantage of saving memory headroom is significantly arranged.
The above only is preferred embodiment of the present invention, and variation and the modification done under the prerequisite that does not break away from spirit of the present invention and claims scope all belong to the covering scope of patent of the present invention.
Claims (12)
1. method that detects the data structure of the data in the light storage device, it includes the following step:
(a) provide first eight bit register, be connected between eight to 14 modulators and the preposition to-zero counter;
(b) minimum eight of the ten four figures certificates that this eight to 14 modulator is exported are temporary in this first eight bit register;
(c) use this preposition to-zero counter to calculate the number of the preceding zero setting of the data that are temporary in this first eight bit register.
2. as 1 described method of claim the, wherein step (c) comprises:
Detection is temporary in the number than the preceding zero setting of low data of this first eight bit register, if what be temporary in this first eight bit register all is zero than low data, then further detects the number of preceding zero setting of the high bit data of this first eight bit register.
3. as 1 described method of claim the, it comprises the following step in addition:
(d) provide second eight bit register, be connected between this eight to 14 modulator and the rearmounted to-zero counter;
(e) the high eight-bit with ten four figures certificates of this eight to 14 modulator output is temporary in this second eight bit register;
(f) use this postposition to-zero counter calculating to be temporary in the number of the data zero setting afterwards of this second eight bit register.
4. as 3 described methods of claim the, wherein step (f) comprises:
Detection is temporary in the number of zero setting after the high bit data of this second eight bit register, all is zero if be temporary in the high bit data of this second eight bit register, then further detects the number than the back zero setting of low data of this second eight bit register.
5. as 1 described method of claim the, it comprises the following step in addition:
(d) this first eight bit register is connected between this eight to 14 modulator and the rearmounted to-zero counter;
(e) the high eight-bit with ten four figures certificates of this eight to 14 modulator output is temporary in this first eight bit register;
(f) use this postposition to-zero counter calculating to be temporary in the number of the data zero setting afterwards of this first eight bit register.
6. as 5 described methods of claim the, wherein step (f) comprises:
Detection is temporary in the number of the high bit data zero setting afterwards of this first eight bit register, all is zero if be temporary in the high bit data of this first eight bit register, then further detects the number than zero setting after the low data of this first eight bit register.
7. method that detects the data structure of the data in the light storage device, it includes the following step:
(a) provide second eight bit register, be connected between eight to 14 modulators and the rearmounted to-zero counter;
(b) the high eight-bit with ten four figures certificates of this eight to 14 modulator output is temporary in this second eight bit register;
(c) use this postposition to-zero counter calculating to be temporary in the number of the data zero setting afterwards of this second eight bit register.
8. as 7 described methods of claim the, wherein step (c) comprises:
Detection is temporary in the number of the high bit data zero setting afterwards of this second eight bit register, all is zero if be temporary in the high bit data of this second eight bit register, then further detects the number than zero setting after the low data of this second eight bit register.
9. as 7 described methods of claim the, it comprises the following step in addition:
(d) provide first eight bit register, be connected between this eight to 14 modulator and the preposition to-zero counter;
(e) minimum eight of the ten four figures certificates that this eight to 14 modulator is exported are temporary in this first eight bit register;
(f) use this preposition to-zero counter to calculate the number of the preceding zero setting of the data that are temporary in this first eight bit register.
10. as 9 described methods of claim the, wherein step (f) comprises:
Detection is temporary in the number than the preceding zero setting of low data of this first eight bit register, if what be temporary in this first eight bit register all is zero than low data, then further detects the number of preceding zero setting of the high bit data of this first eight bit register.
11. as 7 described methods of claim the, it comprises the following step in addition:
(d) this second eight bit register is connected between this eight to 14 modulator and the preposition to-zero counter;
(e) minimum eight of the ten four figures certificates that this eight to 14 modulator is exported are temporary in this second eight bit register;
(f) use this preposition to-zero counter to calculate the number of the preceding zero setting of the data that are temporary in this second eight bit register.
12. as 11 described methods of claim the, wherein step (f) comprises:
Detection is temporary in the number than the preceding zero setting of low data of this second eight bit register, if what be temporary in this second eight bit register all is zero than low data, then further detects the number of preceding zero setting of the high bit data of this second eight bit register.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2003101010125A CN100353441C (en) | 2003-10-10 | 2003-10-10 | Method for detecting data structure of data in optical storing equipment |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2003101010125A CN100353441C (en) | 2003-10-10 | 2003-10-10 | Method for detecting data structure of data in optical storing equipment |
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| CN1606088A CN1606088A (en) | 2005-04-13 |
| CN100353441C true CN100353441C (en) | 2007-12-05 |
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| CNB2003101010125A Expired - Fee Related CN100353441C (en) | 2003-10-10 | 2003-10-10 | Method for detecting data structure of data in optical storing equipment |
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4544962A (en) * | 1981-07-06 | 1985-10-01 | Matsushita Electric Industrial Co., Ltd. | Method and apparatus for processing binary data |
| US5375249A (en) * | 1989-12-29 | 1994-12-20 | Samsung Electronics Co., Ltd. | Eight-to-fourteen-modulation circuit for a digital audio disc system |
| CN1197351A (en) * | 1997-04-18 | 1998-10-28 | 三星电子株式会社 | Demodulation circuit and demodulation table of digital video disk reproducing apparatus |
-
2003
- 2003-10-10 CN CNB2003101010125A patent/CN100353441C/en not_active Expired - Fee Related
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4544962A (en) * | 1981-07-06 | 1985-10-01 | Matsushita Electric Industrial Co., Ltd. | Method and apparatus for processing binary data |
| US5375249A (en) * | 1989-12-29 | 1994-12-20 | Samsung Electronics Co., Ltd. | Eight-to-fourteen-modulation circuit for a digital audio disc system |
| CN1197351A (en) * | 1997-04-18 | 1998-10-28 | 三星电子株式会社 | Demodulation circuit and demodulation table of digital video disk reproducing apparatus |
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| CN1606088A (en) | 2005-04-13 |
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